1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4 // 5 // Copyright (c) 2012 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 // Copyright (c) 2012 Linaro Ltd 8 // http://www.linaro.org 9 // 10 // Author: Thomas Abraham <thomas.ab@samsung.com> 11 // 12 // This driver implements the Samsung pinctrl driver. It supports setting up of 13 // pinmux and pinconf configurations. The gpiolib interface is also included. 14 // External interrupt (gpio and wakeup) support are not included in this driver 15 // but provides extensions to which platform specific implementation of the gpio 16 // and wakeup interrupts can be hooked to. 17 18 #include <linux/init.h> 19 #include <linux/platform_device.h> 20 #include <linux/io.h> 21 #include <linux/property.h> 22 #include <linux/slab.h> 23 #include <linux/err.h> 24 #include <linux/gpio/driver.h> 25 #include <linux/irqdomain.h> 26 #include <linux/of_device.h> 27 #include <linux/spinlock.h> 28 29 #include "../core.h" 30 #include "pinctrl-samsung.h" 31 32 /* maximum number of the memory resources */ 33 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 34 35 /* list of all possible config options supported */ 36 static struct pin_config { 37 const char *property; 38 enum pincfg_type param; 39 } cfg_params[] = { 40 { "samsung,pin-pud", PINCFG_TYPE_PUD }, 41 { "samsung,pin-drv", PINCFG_TYPE_DRV }, 42 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, 43 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, 44 { "samsung,pin-val", PINCFG_TYPE_DAT }, 45 }; 46 47 static unsigned int pin_base; 48 49 static int samsung_get_group_count(struct pinctrl_dev *pctldev) 50 { 51 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 52 53 return pmx->nr_groups; 54 } 55 56 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, 57 unsigned group) 58 { 59 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 60 61 return pmx->pin_groups[group].name; 62 } 63 64 static int samsung_get_group_pins(struct pinctrl_dev *pctldev, 65 unsigned group, 66 const unsigned **pins, 67 unsigned *num_pins) 68 { 69 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 70 71 *pins = pmx->pin_groups[group].pins; 72 *num_pins = pmx->pin_groups[group].num_pins; 73 74 return 0; 75 } 76 77 static int reserve_map(struct device *dev, struct pinctrl_map **map, 78 unsigned *reserved_maps, unsigned *num_maps, 79 unsigned reserve) 80 { 81 unsigned old_num = *reserved_maps; 82 unsigned new_num = *num_maps + reserve; 83 struct pinctrl_map *new_map; 84 85 if (old_num >= new_num) 86 return 0; 87 88 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); 89 if (!new_map) 90 return -ENOMEM; 91 92 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); 93 94 *map = new_map; 95 *reserved_maps = new_num; 96 97 return 0; 98 } 99 100 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, 101 unsigned *num_maps, const char *group, 102 const char *function) 103 { 104 if (WARN_ON(*num_maps == *reserved_maps)) 105 return -ENOSPC; 106 107 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 108 (*map)[*num_maps].data.mux.group = group; 109 (*map)[*num_maps].data.mux.function = function; 110 (*num_maps)++; 111 112 return 0; 113 } 114 115 static int add_map_configs(struct device *dev, struct pinctrl_map **map, 116 unsigned *reserved_maps, unsigned *num_maps, 117 const char *group, unsigned long *configs, 118 unsigned num_configs) 119 { 120 unsigned long *dup_configs; 121 122 if (WARN_ON(*num_maps == *reserved_maps)) 123 return -ENOSPC; 124 125 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 126 GFP_KERNEL); 127 if (!dup_configs) 128 return -ENOMEM; 129 130 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; 131 (*map)[*num_maps].data.configs.group_or_pin = group; 132 (*map)[*num_maps].data.configs.configs = dup_configs; 133 (*map)[*num_maps].data.configs.num_configs = num_configs; 134 (*num_maps)++; 135 136 return 0; 137 } 138 139 static int add_config(struct device *dev, unsigned long **configs, 140 unsigned *num_configs, unsigned long config) 141 { 142 unsigned old_num = *num_configs; 143 unsigned new_num = old_num + 1; 144 unsigned long *new_configs; 145 146 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, 147 GFP_KERNEL); 148 if (!new_configs) 149 return -ENOMEM; 150 151 new_configs[old_num] = config; 152 153 *configs = new_configs; 154 *num_configs = new_num; 155 156 return 0; 157 } 158 159 static void samsung_dt_free_map(struct pinctrl_dev *pctldev, 160 struct pinctrl_map *map, 161 unsigned num_maps) 162 { 163 int i; 164 165 for (i = 0; i < num_maps; i++) 166 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 167 kfree(map[i].data.configs.configs); 168 169 kfree(map); 170 } 171 172 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, 173 struct device *dev, 174 struct device_node *np, 175 struct pinctrl_map **map, 176 unsigned *reserved_maps, 177 unsigned *num_maps) 178 { 179 int ret, i; 180 u32 val; 181 unsigned long config; 182 unsigned long *configs = NULL; 183 unsigned num_configs = 0; 184 unsigned reserve; 185 struct property *prop; 186 const char *group; 187 bool has_func = false; 188 189 ret = of_property_read_u32(np, "samsung,pin-function", &val); 190 if (!ret) 191 has_func = true; 192 193 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { 194 ret = of_property_read_u32(np, cfg_params[i].property, &val); 195 if (!ret) { 196 config = PINCFG_PACK(cfg_params[i].param, val); 197 ret = add_config(dev, &configs, &num_configs, config); 198 if (ret < 0) 199 goto exit; 200 /* EINVAL=missing, which is fine since it's optional */ 201 } else if (ret != -EINVAL) { 202 dev_err(dev, "could not parse property %s\n", 203 cfg_params[i].property); 204 } 205 } 206 207 reserve = 0; 208 if (has_func) 209 reserve++; 210 if (num_configs) 211 reserve++; 212 ret = of_property_count_strings(np, "samsung,pins"); 213 if (ret < 0) { 214 dev_err(dev, "could not parse property samsung,pins\n"); 215 goto exit; 216 } 217 reserve *= ret; 218 219 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); 220 if (ret < 0) 221 goto exit; 222 223 of_property_for_each_string(np, "samsung,pins", prop, group) { 224 if (has_func) { 225 ret = add_map_mux(map, reserved_maps, 226 num_maps, group, np->full_name); 227 if (ret < 0) 228 goto exit; 229 } 230 231 if (num_configs) { 232 ret = add_map_configs(dev, map, reserved_maps, 233 num_maps, group, configs, 234 num_configs); 235 if (ret < 0) 236 goto exit; 237 } 238 } 239 240 ret = 0; 241 242 exit: 243 kfree(configs); 244 return ret; 245 } 246 247 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, 248 struct device_node *np_config, 249 struct pinctrl_map **map, 250 unsigned *num_maps) 251 { 252 struct samsung_pinctrl_drv_data *drvdata; 253 unsigned reserved_maps; 254 struct device_node *np; 255 int ret; 256 257 drvdata = pinctrl_dev_get_drvdata(pctldev); 258 259 reserved_maps = 0; 260 *map = NULL; 261 *num_maps = 0; 262 263 if (!of_get_child_count(np_config)) 264 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, 265 np_config, map, 266 &reserved_maps, 267 num_maps); 268 269 for_each_child_of_node(np_config, np) { 270 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, 271 &reserved_maps, num_maps); 272 if (ret < 0) { 273 samsung_dt_free_map(pctldev, *map, *num_maps); 274 of_node_put(np); 275 return ret; 276 } 277 } 278 279 return 0; 280 } 281 282 #ifdef CONFIG_DEBUG_FS 283 /* Forward declaration which can be used by samsung_pin_dbg_show */ 284 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 285 unsigned long *config); 286 static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN", 287 "PUD_PDN"}; 288 289 static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev, 290 struct seq_file *s, unsigned int pin) 291 { 292 enum pincfg_type cfg_type; 293 unsigned long config; 294 int ret; 295 296 for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) { 297 config = PINCFG_PACK(cfg_type, 0); 298 ret = samsung_pinconf_get(pctldev, pin, &config); 299 if (ret < 0) 300 continue; 301 302 seq_printf(s, " %s(0x%lx)", reg_names[cfg_type], 303 PINCFG_UNPACK_VALUE(config)); 304 } 305 } 306 #endif 307 308 /* list of pinctrl callbacks for the pinctrl core */ 309 static const struct pinctrl_ops samsung_pctrl_ops = { 310 .get_groups_count = samsung_get_group_count, 311 .get_group_name = samsung_get_group_name, 312 .get_group_pins = samsung_get_group_pins, 313 .dt_node_to_map = samsung_dt_node_to_map, 314 .dt_free_map = samsung_dt_free_map, 315 #ifdef CONFIG_DEBUG_FS 316 .pin_dbg_show = samsung_pin_dbg_show, 317 #endif 318 }; 319 320 /* check if the selector is a valid pin function selector */ 321 static int samsung_get_functions_count(struct pinctrl_dev *pctldev) 322 { 323 struct samsung_pinctrl_drv_data *drvdata; 324 325 drvdata = pinctrl_dev_get_drvdata(pctldev); 326 return drvdata->nr_functions; 327 } 328 329 /* return the name of the pin function specified */ 330 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, 331 unsigned selector) 332 { 333 struct samsung_pinctrl_drv_data *drvdata; 334 335 drvdata = pinctrl_dev_get_drvdata(pctldev); 336 return drvdata->pmx_functions[selector].name; 337 } 338 339 /* return the groups associated for the specified function selector */ 340 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, 341 unsigned selector, const char * const **groups, 342 unsigned * const num_groups) 343 { 344 struct samsung_pinctrl_drv_data *drvdata; 345 346 drvdata = pinctrl_dev_get_drvdata(pctldev); 347 *groups = drvdata->pmx_functions[selector].groups; 348 *num_groups = drvdata->pmx_functions[selector].num_groups; 349 return 0; 350 } 351 352 /* 353 * given a pin number that is local to a pin controller, find out the pin bank 354 * and the register base of the pin bank. 355 */ 356 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, 357 unsigned pin, void __iomem **reg, u32 *offset, 358 struct samsung_pin_bank **bank) 359 { 360 struct samsung_pin_bank *b; 361 362 b = drvdata->pin_banks; 363 364 while ((pin >= b->pin_base) && 365 ((b->pin_base + b->nr_pins - 1) < pin)) 366 b++; 367 368 *reg = b->pctl_base + b->pctl_offset; 369 *offset = pin - b->pin_base; 370 if (bank) 371 *bank = b; 372 } 373 374 /* enable or disable a pinmux function */ 375 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, 376 unsigned group) 377 { 378 struct samsung_pinctrl_drv_data *drvdata; 379 const struct samsung_pin_bank_type *type; 380 struct samsung_pin_bank *bank; 381 void __iomem *reg; 382 u32 mask, shift, data, pin_offset; 383 unsigned long flags; 384 const struct samsung_pmx_func *func; 385 const struct samsung_pin_group *grp; 386 387 drvdata = pinctrl_dev_get_drvdata(pctldev); 388 func = &drvdata->pmx_functions[selector]; 389 grp = &drvdata->pin_groups[group]; 390 391 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, 392 ®, &pin_offset, &bank); 393 type = bank->type; 394 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 395 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; 396 if (shift >= 32) { 397 /* Some banks have two config registers */ 398 shift -= 32; 399 reg += 4; 400 } 401 402 raw_spin_lock_irqsave(&bank->slock, flags); 403 404 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); 405 data &= ~(mask << shift); 406 data |= func->val << shift; 407 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); 408 409 raw_spin_unlock_irqrestore(&bank->slock, flags); 410 } 411 412 /* enable a specified pinmux by writing to registers */ 413 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, 414 unsigned selector, 415 unsigned group) 416 { 417 samsung_pinmux_setup(pctldev, selector, group); 418 return 0; 419 } 420 421 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ 422 static const struct pinmux_ops samsung_pinmux_ops = { 423 .get_functions_count = samsung_get_functions_count, 424 .get_function_name = samsung_pinmux_get_fname, 425 .get_function_groups = samsung_pinmux_get_groups, 426 .set_mux = samsung_pinmux_set_mux, 427 }; 428 429 /* set or get the pin config settings for a specified pin */ 430 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, 431 unsigned long *config, bool set) 432 { 433 struct samsung_pinctrl_drv_data *drvdata; 434 const struct samsung_pin_bank_type *type; 435 struct samsung_pin_bank *bank; 436 void __iomem *reg_base; 437 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 438 u32 data, width, pin_offset, mask, shift; 439 u32 cfg_value, cfg_reg; 440 unsigned long flags; 441 442 drvdata = pinctrl_dev_get_drvdata(pctldev); 443 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, 444 &pin_offset, &bank); 445 type = bank->type; 446 447 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) 448 return -EINVAL; 449 450 width = type->fld_width[cfg_type]; 451 cfg_reg = type->reg_offset[cfg_type]; 452 453 raw_spin_lock_irqsave(&bank->slock, flags); 454 455 mask = (1 << width) - 1; 456 shift = pin_offset * width; 457 data = readl(reg_base + cfg_reg); 458 459 if (set) { 460 cfg_value = PINCFG_UNPACK_VALUE(*config); 461 data &= ~(mask << shift); 462 data |= (cfg_value << shift); 463 writel(data, reg_base + cfg_reg); 464 } else { 465 data >>= shift; 466 data &= mask; 467 *config = PINCFG_PACK(cfg_type, data); 468 } 469 470 raw_spin_unlock_irqrestore(&bank->slock, flags); 471 472 return 0; 473 } 474 475 /* set the pin config settings for a specified pin */ 476 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 477 unsigned long *configs, unsigned num_configs) 478 { 479 int i, ret; 480 481 for (i = 0; i < num_configs; i++) { 482 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); 483 if (ret < 0) 484 return ret; 485 } /* for each config */ 486 487 return 0; 488 } 489 490 /* get the pin config settings for a specified pin */ 491 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 492 unsigned long *config) 493 { 494 return samsung_pinconf_rw(pctldev, pin, config, false); 495 } 496 497 /* set the pin config settings for a specified pin group */ 498 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, 499 unsigned group, unsigned long *configs, 500 unsigned num_configs) 501 { 502 struct samsung_pinctrl_drv_data *drvdata; 503 const unsigned int *pins; 504 unsigned int cnt; 505 506 drvdata = pinctrl_dev_get_drvdata(pctldev); 507 pins = drvdata->pin_groups[group].pins; 508 509 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) 510 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); 511 512 return 0; 513 } 514 515 /* get the pin config settings for a specified pin group */ 516 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, 517 unsigned int group, unsigned long *config) 518 { 519 struct samsung_pinctrl_drv_data *drvdata; 520 const unsigned int *pins; 521 522 drvdata = pinctrl_dev_get_drvdata(pctldev); 523 pins = drvdata->pin_groups[group].pins; 524 samsung_pinconf_get(pctldev, pins[0], config); 525 return 0; 526 } 527 528 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ 529 static const struct pinconf_ops samsung_pinconf_ops = { 530 .pin_config_get = samsung_pinconf_get, 531 .pin_config_set = samsung_pinconf_set, 532 .pin_config_group_get = samsung_pinconf_group_get, 533 .pin_config_group_set = samsung_pinconf_group_set, 534 }; 535 536 /* 537 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held 538 * to avoid race condition. 539 */ 540 static void samsung_gpio_set_value(struct gpio_chip *gc, 541 unsigned offset, int value) 542 { 543 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 544 const struct samsung_pin_bank_type *type = bank->type; 545 void __iomem *reg; 546 u32 data; 547 548 reg = bank->pctl_base + bank->pctl_offset; 549 550 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 551 data &= ~(1 << offset); 552 if (value) 553 data |= 1 << offset; 554 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); 555 } 556 557 /* gpiolib gpio_set callback function */ 558 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 559 { 560 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 561 unsigned long flags; 562 563 raw_spin_lock_irqsave(&bank->slock, flags); 564 samsung_gpio_set_value(gc, offset, value); 565 raw_spin_unlock_irqrestore(&bank->slock, flags); 566 } 567 568 /* gpiolib gpio_get callback function */ 569 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) 570 { 571 void __iomem *reg; 572 u32 data; 573 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 574 const struct samsung_pin_bank_type *type = bank->type; 575 576 reg = bank->pctl_base + bank->pctl_offset; 577 578 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 579 data >>= offset; 580 data &= 1; 581 return data; 582 } 583 584 /* 585 * The samsung_gpio_set_direction() should be called with "bank->slock" held 586 * to avoid race condition. 587 * The calls to gpio_direction_output() and gpio_direction_input() 588 * leads to this function call. 589 */ 590 static int samsung_gpio_set_direction(struct gpio_chip *gc, 591 unsigned offset, bool input) 592 { 593 const struct samsung_pin_bank_type *type; 594 struct samsung_pin_bank *bank; 595 void __iomem *reg; 596 u32 data, mask, shift; 597 598 bank = gpiochip_get_data(gc); 599 type = bank->type; 600 601 reg = bank->pctl_base + bank->pctl_offset 602 + type->reg_offset[PINCFG_TYPE_FUNC]; 603 604 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 605 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; 606 if (shift >= 32) { 607 /* Some banks have two config registers */ 608 shift -= 32; 609 reg += 4; 610 } 611 612 data = readl(reg); 613 data &= ~(mask << shift); 614 if (!input) 615 data |= PIN_CON_FUNC_OUTPUT << shift; 616 writel(data, reg); 617 618 return 0; 619 } 620 621 /* gpiolib gpio_direction_input callback function. */ 622 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 623 { 624 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 625 unsigned long flags; 626 int ret; 627 628 raw_spin_lock_irqsave(&bank->slock, flags); 629 ret = samsung_gpio_set_direction(gc, offset, true); 630 raw_spin_unlock_irqrestore(&bank->slock, flags); 631 return ret; 632 } 633 634 /* gpiolib gpio_direction_output callback function. */ 635 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 636 int value) 637 { 638 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 639 unsigned long flags; 640 int ret; 641 642 raw_spin_lock_irqsave(&bank->slock, flags); 643 samsung_gpio_set_value(gc, offset, value); 644 ret = samsung_gpio_set_direction(gc, offset, false); 645 raw_spin_unlock_irqrestore(&bank->slock, flags); 646 647 return ret; 648 } 649 650 /* 651 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin 652 * and a virtual IRQ, if not already present. 653 */ 654 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 655 { 656 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 657 unsigned int virq; 658 659 if (!bank->irq_domain) 660 return -ENXIO; 661 662 virq = irq_create_mapping(bank->irq_domain, offset); 663 664 return (virq) ? : -ENXIO; 665 } 666 667 static struct samsung_pin_group *samsung_pinctrl_create_groups( 668 struct device *dev, 669 struct samsung_pinctrl_drv_data *drvdata, 670 unsigned int *cnt) 671 { 672 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 673 struct samsung_pin_group *groups, *grp; 674 const struct pinctrl_pin_desc *pdesc; 675 int i; 676 677 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups), 678 GFP_KERNEL); 679 if (!groups) 680 return ERR_PTR(-EINVAL); 681 grp = groups; 682 683 pdesc = ctrldesc->pins; 684 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { 685 grp->name = pdesc->name; 686 grp->pins = &pdesc->number; 687 grp->num_pins = 1; 688 } 689 690 *cnt = ctrldesc->npins; 691 return groups; 692 } 693 694 static int samsung_pinctrl_create_function(struct device *dev, 695 struct samsung_pinctrl_drv_data *drvdata, 696 struct device_node *func_np, 697 struct samsung_pmx_func *func) 698 { 699 int npins; 700 int ret; 701 int i; 702 703 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) 704 return 0; 705 706 npins = of_property_count_strings(func_np, "samsung,pins"); 707 if (npins < 1) { 708 dev_err(dev, "invalid pin list in %pOFn node", func_np); 709 return -EINVAL; 710 } 711 712 func->name = func_np->full_name; 713 714 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL); 715 if (!func->groups) 716 return -ENOMEM; 717 718 for (i = 0; i < npins; ++i) { 719 const char *gname; 720 721 ret = of_property_read_string_index(func_np, "samsung,pins", 722 i, &gname); 723 if (ret) { 724 dev_err(dev, 725 "failed to read pin name %d from %pOFn node\n", 726 i, func_np); 727 return ret; 728 } 729 730 func->groups[i] = gname; 731 } 732 733 func->num_groups = npins; 734 return 1; 735 } 736 737 static struct samsung_pmx_func *samsung_pinctrl_create_functions( 738 struct device *dev, 739 struct samsung_pinctrl_drv_data *drvdata, 740 unsigned int *cnt) 741 { 742 struct samsung_pmx_func *functions, *func; 743 struct device_node *dev_np = dev->of_node; 744 struct device_node *cfg_np; 745 unsigned int func_cnt = 0; 746 int ret; 747 748 /* 749 * Iterate over all the child nodes of the pin controller node 750 * and create pin groups and pin function lists. 751 */ 752 for_each_child_of_node(dev_np, cfg_np) { 753 struct device_node *func_np; 754 755 if (!of_get_child_count(cfg_np)) { 756 if (!of_find_property(cfg_np, 757 "samsung,pin-function", NULL)) 758 continue; 759 ++func_cnt; 760 continue; 761 } 762 763 for_each_child_of_node(cfg_np, func_np) { 764 if (!of_find_property(func_np, 765 "samsung,pin-function", NULL)) 766 continue; 767 ++func_cnt; 768 } 769 } 770 771 functions = devm_kcalloc(dev, func_cnt, sizeof(*functions), 772 GFP_KERNEL); 773 if (!functions) 774 return ERR_PTR(-ENOMEM); 775 func = functions; 776 777 /* 778 * Iterate over all the child nodes of the pin controller node 779 * and create pin groups and pin function lists. 780 */ 781 func_cnt = 0; 782 for_each_child_of_node(dev_np, cfg_np) { 783 struct device_node *func_np; 784 785 if (!of_get_child_count(cfg_np)) { 786 ret = samsung_pinctrl_create_function(dev, drvdata, 787 cfg_np, func); 788 if (ret < 0) { 789 of_node_put(cfg_np); 790 return ERR_PTR(ret); 791 } 792 if (ret > 0) { 793 ++func; 794 ++func_cnt; 795 } 796 continue; 797 } 798 799 for_each_child_of_node(cfg_np, func_np) { 800 ret = samsung_pinctrl_create_function(dev, drvdata, 801 func_np, func); 802 if (ret < 0) { 803 of_node_put(func_np); 804 of_node_put(cfg_np); 805 return ERR_PTR(ret); 806 } 807 if (ret > 0) { 808 ++func; 809 ++func_cnt; 810 } 811 } 812 } 813 814 *cnt = func_cnt; 815 return functions; 816 } 817 818 /* 819 * Parse the information about all the available pin groups and pin functions 820 * from device node of the pin-controller. A pin group is formed with all 821 * the pins listed in the "samsung,pins" property. 822 */ 823 824 static int samsung_pinctrl_parse_dt(struct platform_device *pdev, 825 struct samsung_pinctrl_drv_data *drvdata) 826 { 827 struct device *dev = &pdev->dev; 828 struct samsung_pin_group *groups; 829 struct samsung_pmx_func *functions; 830 unsigned int grp_cnt = 0, func_cnt = 0; 831 832 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); 833 if (IS_ERR(groups)) { 834 dev_err(dev, "failed to parse pin groups\n"); 835 return PTR_ERR(groups); 836 } 837 838 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); 839 if (IS_ERR(functions)) { 840 dev_err(dev, "failed to parse pin functions\n"); 841 return PTR_ERR(functions); 842 } 843 844 drvdata->pin_groups = groups; 845 drvdata->nr_groups = grp_cnt; 846 drvdata->pmx_functions = functions; 847 drvdata->nr_functions = func_cnt; 848 849 return 0; 850 } 851 852 /* register the pinctrl interface with the pinctrl subsystem */ 853 static int samsung_pinctrl_register(struct platform_device *pdev, 854 struct samsung_pinctrl_drv_data *drvdata) 855 { 856 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 857 struct pinctrl_pin_desc *pindesc, *pdesc; 858 struct samsung_pin_bank *pin_bank; 859 char *pin_names; 860 int pin, bank, ret; 861 862 ctrldesc->name = "samsung-pinctrl"; 863 ctrldesc->owner = THIS_MODULE; 864 ctrldesc->pctlops = &samsung_pctrl_ops; 865 ctrldesc->pmxops = &samsung_pinmux_ops; 866 ctrldesc->confops = &samsung_pinconf_ops; 867 868 pindesc = devm_kcalloc(&pdev->dev, 869 drvdata->nr_pins, sizeof(*pindesc), 870 GFP_KERNEL); 871 if (!pindesc) 872 return -ENOMEM; 873 ctrldesc->pins = pindesc; 874 ctrldesc->npins = drvdata->nr_pins; 875 876 /* dynamically populate the pin number and pin name for pindesc */ 877 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) 878 pdesc->number = pin + drvdata->pin_base; 879 880 /* 881 * allocate space for storing the dynamically generated names for all 882 * the pins which belong to this pin-controller. 883 */ 884 pin_names = devm_kzalloc(&pdev->dev, 885 array3_size(sizeof(char), PIN_NAME_LENGTH, 886 drvdata->nr_pins), 887 GFP_KERNEL); 888 if (!pin_names) 889 return -ENOMEM; 890 891 /* for each pin, the name of the pin is pin-bank name + pin number */ 892 for (bank = 0; bank < drvdata->nr_banks; bank++) { 893 pin_bank = &drvdata->pin_banks[bank]; 894 for (pin = 0; pin < pin_bank->nr_pins; pin++) { 895 sprintf(pin_names, "%s-%d", pin_bank->name, pin); 896 pdesc = pindesc + pin_bank->pin_base + pin; 897 pdesc->name = pin_names; 898 pin_names += PIN_NAME_LENGTH; 899 } 900 } 901 902 ret = samsung_pinctrl_parse_dt(pdev, drvdata); 903 if (ret) 904 return ret; 905 906 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, 907 drvdata); 908 if (IS_ERR(drvdata->pctl_dev)) { 909 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 910 return PTR_ERR(drvdata->pctl_dev); 911 } 912 913 for (bank = 0; bank < drvdata->nr_banks; ++bank) { 914 pin_bank = &drvdata->pin_banks[bank]; 915 pin_bank->grange.name = pin_bank->name; 916 pin_bank->grange.id = bank; 917 pin_bank->grange.pin_base = drvdata->pin_base 918 + pin_bank->pin_base; 919 pin_bank->grange.base = pin_bank->grange.pin_base; 920 pin_bank->grange.npins = pin_bank->nr_pins; 921 pin_bank->grange.gc = &pin_bank->gpio_chip; 922 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); 923 } 924 925 return 0; 926 } 927 928 /* unregister the pinctrl interface with the pinctrl subsystem */ 929 static int samsung_pinctrl_unregister(struct platform_device *pdev, 930 struct samsung_pinctrl_drv_data *drvdata) 931 { 932 struct samsung_pin_bank *bank = drvdata->pin_banks; 933 int i; 934 935 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) 936 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); 937 938 return 0; 939 } 940 941 static const struct gpio_chip samsung_gpiolib_chip = { 942 .request = gpiochip_generic_request, 943 .free = gpiochip_generic_free, 944 .set = samsung_gpio_set, 945 .get = samsung_gpio_get, 946 .direction_input = samsung_gpio_direction_input, 947 .direction_output = samsung_gpio_direction_output, 948 .to_irq = samsung_gpio_to_irq, 949 .owner = THIS_MODULE, 950 }; 951 952 /* register the gpiolib interface with the gpiolib subsystem */ 953 static int samsung_gpiolib_register(struct platform_device *pdev, 954 struct samsung_pinctrl_drv_data *drvdata) 955 { 956 struct samsung_pin_bank *bank = drvdata->pin_banks; 957 struct gpio_chip *gc; 958 int ret; 959 int i; 960 961 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { 962 bank->gpio_chip = samsung_gpiolib_chip; 963 964 gc = &bank->gpio_chip; 965 gc->base = bank->grange.base; 966 gc->ngpio = bank->nr_pins; 967 gc->parent = &pdev->dev; 968 gc->fwnode = bank->fwnode; 969 gc->label = bank->name; 970 971 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); 972 if (ret) { 973 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", 974 gc->label, ret); 975 return ret; 976 } 977 } 978 979 return 0; 980 } 981 982 static const struct samsung_pin_ctrl * 983 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev) 984 { 985 struct device_node *node = pdev->dev.of_node; 986 const struct samsung_pinctrl_of_match_data *of_data; 987 int id; 988 989 id = of_alias_get_id(node, "pinctrl"); 990 if (id < 0) { 991 dev_err(&pdev->dev, "failed to get alias id\n"); 992 return NULL; 993 } 994 995 of_data = of_device_get_match_data(&pdev->dev); 996 if (id >= of_data->num_ctrl) { 997 dev_err(&pdev->dev, "invalid alias id %d\n", id); 998 return NULL; 999 } 1000 1001 return &(of_data->ctrl[id]); 1002 } 1003 1004 static void samsung_banks_node_put(struct samsung_pinctrl_drv_data *d) 1005 { 1006 struct samsung_pin_bank *bank; 1007 unsigned int i; 1008 1009 bank = d->pin_banks; 1010 for (i = 0; i < d->nr_banks; ++i, ++bank) 1011 fwnode_handle_put(bank->fwnode); 1012 } 1013 1014 /* 1015 * Iterate over all driver pin banks to find one matching the name of node, 1016 * skipping optional "-gpio" node suffix. When found, assign node to the bank. 1017 */ 1018 static void samsung_banks_node_get(struct device *dev, struct samsung_pinctrl_drv_data *d) 1019 { 1020 const char *suffix = "-gpio-bank"; 1021 struct samsung_pin_bank *bank; 1022 struct fwnode_handle *child; 1023 /* Pin bank names are up to 4 characters */ 1024 char node_name[20]; 1025 unsigned int i; 1026 size_t len; 1027 1028 bank = d->pin_banks; 1029 for (i = 0; i < d->nr_banks; ++i, ++bank) { 1030 strscpy(node_name, bank->name, sizeof(node_name)); 1031 len = strlcat(node_name, suffix, sizeof(node_name)); 1032 if (len >= sizeof(node_name)) { 1033 dev_err(dev, "Too long pin bank name '%s', ignoring\n", 1034 bank->name); 1035 continue; 1036 } 1037 1038 for_each_gpiochip_node(dev, child) { 1039 struct device_node *np = to_of_node(child); 1040 1041 if (of_node_name_eq(np, node_name)) 1042 break; 1043 if (of_node_name_eq(np, bank->name)) 1044 break; 1045 } 1046 1047 if (child) 1048 bank->fwnode = child; 1049 else 1050 dev_warn(dev, "Missing node for bank %s - invalid DTB\n", 1051 bank->name); 1052 /* child reference dropped in samsung_drop_banks_of_node() */ 1053 } 1054 } 1055 1056 /* retrieve the soc specific data */ 1057 static const struct samsung_pin_ctrl * 1058 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, 1059 struct platform_device *pdev) 1060 { 1061 const struct samsung_pin_bank_data *bdata; 1062 const struct samsung_pin_ctrl *ctrl; 1063 struct samsung_pin_bank *bank; 1064 struct resource *res; 1065 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; 1066 unsigned int i; 1067 1068 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev); 1069 if (!ctrl) 1070 return ERR_PTR(-ENOENT); 1071 1072 d->suspend = ctrl->suspend; 1073 d->resume = ctrl->resume; 1074 d->nr_banks = ctrl->nr_banks; 1075 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, 1076 sizeof(*d->pin_banks), GFP_KERNEL); 1077 if (!d->pin_banks) 1078 return ERR_PTR(-ENOMEM); 1079 1080 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) 1081 return ERR_PTR(-EINVAL); 1082 1083 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { 1084 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 1085 if (!res) { 1086 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); 1087 return ERR_PTR(-EINVAL); 1088 } 1089 virt_base[i] = devm_ioremap(&pdev->dev, res->start, 1090 resource_size(res)); 1091 if (!virt_base[i]) { 1092 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); 1093 return ERR_PTR(-EIO); 1094 } 1095 } 1096 1097 bank = d->pin_banks; 1098 bdata = ctrl->pin_banks; 1099 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { 1100 bank->type = bdata->type; 1101 bank->pctl_offset = bdata->pctl_offset; 1102 bank->nr_pins = bdata->nr_pins; 1103 bank->eint_func = bdata->eint_func; 1104 bank->eint_type = bdata->eint_type; 1105 bank->eint_mask = bdata->eint_mask; 1106 bank->eint_offset = bdata->eint_offset; 1107 bank->name = bdata->name; 1108 1109 raw_spin_lock_init(&bank->slock); 1110 bank->drvdata = d; 1111 bank->pin_base = d->nr_pins; 1112 d->nr_pins += bank->nr_pins; 1113 1114 bank->eint_base = virt_base[0]; 1115 bank->pctl_base = virt_base[bdata->pctl_res_idx]; 1116 } 1117 /* 1118 * Legacy platforms should provide only one resource with IO memory. 1119 * Store it as virt_base because legacy driver needs to access it 1120 * through samsung_pinctrl_drv_data. 1121 */ 1122 d->virt_base = virt_base[0]; 1123 1124 samsung_banks_node_get(&pdev->dev, d); 1125 1126 d->pin_base = pin_base; 1127 pin_base += d->nr_pins; 1128 1129 return ctrl; 1130 } 1131 1132 static int samsung_pinctrl_probe(struct platform_device *pdev) 1133 { 1134 struct samsung_pinctrl_drv_data *drvdata; 1135 const struct samsung_pin_ctrl *ctrl; 1136 struct device *dev = &pdev->dev; 1137 int ret; 1138 1139 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 1140 if (!drvdata) 1141 return -ENOMEM; 1142 1143 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); 1144 if (IS_ERR(ctrl)) { 1145 dev_err(&pdev->dev, "driver data not available\n"); 1146 return PTR_ERR(ctrl); 1147 } 1148 drvdata->dev = dev; 1149 1150 ret = platform_get_irq_optional(pdev, 0); 1151 if (ret < 0 && ret != -ENXIO) 1152 return ret; 1153 if (ret > 0) 1154 drvdata->irq = ret; 1155 1156 if (ctrl->retention_data) { 1157 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, 1158 ctrl->retention_data); 1159 if (IS_ERR(drvdata->retention_ctrl)) { 1160 ret = PTR_ERR(drvdata->retention_ctrl); 1161 goto err_put_banks; 1162 } 1163 } 1164 1165 ret = samsung_pinctrl_register(pdev, drvdata); 1166 if (ret) 1167 goto err_put_banks; 1168 1169 ret = samsung_gpiolib_register(pdev, drvdata); 1170 if (ret) 1171 goto err_unregister; 1172 1173 if (ctrl->eint_gpio_init) 1174 ctrl->eint_gpio_init(drvdata); 1175 if (ctrl->eint_wkup_init) 1176 ctrl->eint_wkup_init(drvdata); 1177 1178 platform_set_drvdata(pdev, drvdata); 1179 1180 return 0; 1181 1182 err_unregister: 1183 samsung_pinctrl_unregister(pdev, drvdata); 1184 err_put_banks: 1185 samsung_banks_node_put(drvdata); 1186 return ret; 1187 } 1188 1189 /* 1190 * samsung_pinctrl_suspend - save pinctrl state for suspend 1191 * 1192 * Save data for all banks handled by this device. 1193 */ 1194 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) 1195 { 1196 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1197 int i; 1198 1199 for (i = 0; i < drvdata->nr_banks; i++) { 1200 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1201 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1202 const u8 *offs = bank->type->reg_offset; 1203 const u8 *widths = bank->type->fld_width; 1204 enum pincfg_type type; 1205 1206 /* Registers without a powerdown config aren't lost */ 1207 if (!widths[PINCFG_TYPE_CON_PDN]) 1208 continue; 1209 1210 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1211 if (widths[type]) 1212 bank->pm_save[type] = readl(reg + offs[type]); 1213 1214 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1215 /* Some banks have two config registers */ 1216 bank->pm_save[PINCFG_TYPE_NUM] = 1217 readl(reg + offs[PINCFG_TYPE_FUNC] + 4); 1218 pr_debug("Save %s @ %p (con %#010x %08x)\n", 1219 bank->name, reg, 1220 bank->pm_save[PINCFG_TYPE_FUNC], 1221 bank->pm_save[PINCFG_TYPE_NUM]); 1222 } else { 1223 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, 1224 reg, bank->pm_save[PINCFG_TYPE_FUNC]); 1225 } 1226 } 1227 1228 if (drvdata->suspend) 1229 drvdata->suspend(drvdata); 1230 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) 1231 drvdata->retention_ctrl->enable(drvdata); 1232 1233 return 0; 1234 } 1235 1236 /* 1237 * samsung_pinctrl_resume - restore pinctrl state from suspend 1238 * 1239 * Restore one of the banks that was saved during suspend. 1240 * 1241 * We don't bother doing anything complicated to avoid glitching lines since 1242 * we're called before pad retention is turned off. 1243 */ 1244 static int __maybe_unused samsung_pinctrl_resume(struct device *dev) 1245 { 1246 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1247 int i; 1248 1249 if (drvdata->resume) 1250 drvdata->resume(drvdata); 1251 1252 for (i = 0; i < drvdata->nr_banks; i++) { 1253 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1254 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1255 const u8 *offs = bank->type->reg_offset; 1256 const u8 *widths = bank->type->fld_width; 1257 enum pincfg_type type; 1258 1259 /* Registers without a powerdown config aren't lost */ 1260 if (!widths[PINCFG_TYPE_CON_PDN]) 1261 continue; 1262 1263 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1264 /* Some banks have two config registers */ 1265 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", 1266 bank->name, reg, 1267 readl(reg + offs[PINCFG_TYPE_FUNC]), 1268 readl(reg + offs[PINCFG_TYPE_FUNC] + 4), 1269 bank->pm_save[PINCFG_TYPE_FUNC], 1270 bank->pm_save[PINCFG_TYPE_NUM]); 1271 writel(bank->pm_save[PINCFG_TYPE_NUM], 1272 reg + offs[PINCFG_TYPE_FUNC] + 4); 1273 } else { 1274 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, 1275 reg, readl(reg + offs[PINCFG_TYPE_FUNC]), 1276 bank->pm_save[PINCFG_TYPE_FUNC]); 1277 } 1278 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1279 if (widths[type]) 1280 writel(bank->pm_save[type], reg + offs[type]); 1281 } 1282 1283 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) 1284 drvdata->retention_ctrl->disable(drvdata); 1285 1286 return 0; 1287 } 1288 1289 static const struct of_device_id samsung_pinctrl_dt_match[] = { 1290 #ifdef CONFIG_PINCTRL_EXYNOS_ARM 1291 { .compatible = "samsung,exynos3250-pinctrl", 1292 .data = &exynos3250_of_data }, 1293 { .compatible = "samsung,exynos4210-pinctrl", 1294 .data = &exynos4210_of_data }, 1295 { .compatible = "samsung,exynos4x12-pinctrl", 1296 .data = &exynos4x12_of_data }, 1297 { .compatible = "samsung,exynos5250-pinctrl", 1298 .data = &exynos5250_of_data }, 1299 { .compatible = "samsung,exynos5260-pinctrl", 1300 .data = &exynos5260_of_data }, 1301 { .compatible = "samsung,exynos5410-pinctrl", 1302 .data = &exynos5410_of_data }, 1303 { .compatible = "samsung,exynos5420-pinctrl", 1304 .data = &exynos5420_of_data }, 1305 { .compatible = "samsung,s5pv210-pinctrl", 1306 .data = &s5pv210_of_data }, 1307 #endif 1308 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64 1309 { .compatible = "samsung,exynos5433-pinctrl", 1310 .data = &exynos5433_of_data }, 1311 { .compatible = "samsung,exynos7-pinctrl", 1312 .data = &exynos7_of_data }, 1313 { .compatible = "samsung,exynos7885-pinctrl", 1314 .data = &exynos7885_of_data }, 1315 { .compatible = "samsung,exynos850-pinctrl", 1316 .data = &exynos850_of_data }, 1317 { .compatible = "samsung,exynosautov9-pinctrl", 1318 .data = &exynosautov9_of_data }, 1319 { .compatible = "tesla,fsd-pinctrl", 1320 .data = &fsd_of_data }, 1321 #endif 1322 #ifdef CONFIG_PINCTRL_S3C64XX 1323 { .compatible = "samsung,s3c64xx-pinctrl", 1324 .data = &s3c64xx_of_data }, 1325 #endif 1326 #ifdef CONFIG_PINCTRL_S3C24XX 1327 { .compatible = "samsung,s3c2412-pinctrl", 1328 .data = &s3c2412_of_data }, 1329 { .compatible = "samsung,s3c2416-pinctrl", 1330 .data = &s3c2416_of_data }, 1331 { .compatible = "samsung,s3c2440-pinctrl", 1332 .data = &s3c2440_of_data }, 1333 { .compatible = "samsung,s3c2450-pinctrl", 1334 .data = &s3c2450_of_data }, 1335 #endif 1336 {}, 1337 }; 1338 1339 static const struct dev_pm_ops samsung_pinctrl_pm_ops = { 1340 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, 1341 samsung_pinctrl_resume) 1342 }; 1343 1344 static struct platform_driver samsung_pinctrl_driver = { 1345 .probe = samsung_pinctrl_probe, 1346 .driver = { 1347 .name = "samsung-pinctrl", 1348 .of_match_table = samsung_pinctrl_dt_match, 1349 .suppress_bind_attrs = true, 1350 .pm = &samsung_pinctrl_pm_ops, 1351 }, 1352 }; 1353 1354 static int __init samsung_pinctrl_drv_register(void) 1355 { 1356 return platform_driver_register(&samsung_pinctrl_driver); 1357 } 1358 postcore_initcall(samsung_pinctrl_drv_register); 1359