1 /* 2 * Exynos specific definitions for Samsung pinctrl and gpiolib driver. 3 * 4 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * Copyright (c) 2012 Linaro Ltd 7 * http://www.linaro.org 8 * 9 * This file contains the Exynos specific definitions for the Samsung 10 * pinctrl/gpiolib interface drivers. 11 * 12 * Author: Thomas Abraham <thomas.ab@samsung.com> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 */ 19 20 /* External GPIO and wakeup interrupt related definitions */ 21 #define EXYNOS_GPIO_ECON_OFFSET 0x700 22 #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800 23 #define EXYNOS_GPIO_EMASK_OFFSET 0x900 24 #define EXYNOS_GPIO_EPEND_OFFSET 0xA00 25 #define EXYNOS_WKUP_ECON_OFFSET 0xE00 26 #define EXYNOS_WKUP_EMASK_OFFSET 0xF00 27 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40 28 #define EXYNOS7_WKUP_ECON_OFFSET 0x700 29 #define EXYNOS7_WKUP_EMASK_OFFSET 0x900 30 #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00 31 #define EXYNOS_SVC_OFFSET 0xB08 32 #define EXYNOS_EINT_FUNC 0xF 33 34 /* helpers to access interrupt service register */ 35 #define EXYNOS_SVC_GROUP_SHIFT 3 36 #define EXYNOS_SVC_GROUP_MASK 0x1f 37 #define EXYNOS_SVC_NUM_MASK 7 38 #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \ 39 EXYNOS_SVC_GROUP_MASK) 40 41 /* Exynos specific external interrupt trigger types */ 42 #define EXYNOS_EINT_LEVEL_LOW 0 43 #define EXYNOS_EINT_LEVEL_HIGH 1 44 #define EXYNOS_EINT_EDGE_FALLING 2 45 #define EXYNOS_EINT_EDGE_RISING 3 46 #define EXYNOS_EINT_EDGE_BOTH 4 47 #define EXYNOS_EINT_CON_MASK 0xF 48 #define EXYNOS_EINT_CON_LEN 4 49 50 #define EXYNOS_EINT_MAX_PER_BANK 8 51 #define EXYNOS_EINT_NR_WKUP_EINT 52 53 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ 54 { \ 55 .type = &bank_type_off, \ 56 .pctl_offset = reg, \ 57 .nr_pins = pins, \ 58 .eint_type = EINT_TYPE_NONE, \ 59 .name = id \ 60 } 61 62 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ 63 { \ 64 .type = &bank_type_off, \ 65 .pctl_offset = reg, \ 66 .nr_pins = pins, \ 67 .eint_type = EINT_TYPE_GPIO, \ 68 .eint_offset = offs, \ 69 .name = id \ 70 } 71 72 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ 73 { \ 74 .type = &bank_type_alive, \ 75 .pctl_offset = reg, \ 76 .nr_pins = pins, \ 77 .eint_type = EINT_TYPE_WKUP, \ 78 .eint_offset = offs, \ 79 .name = id \ 80 } 81 82 #define EXYNOS_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \ 83 { \ 84 .type = &bank_type_alive, \ 85 .pctl_offset = reg, \ 86 .nr_pins = pins, \ 87 .eint_type = EINT_TYPE_WKUP, \ 88 .eint_offset = offs, \ 89 .name = id, \ 90 .pctl_res_idx = pctl_idx, \ 91 } \ 92 93 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \ 94 { \ 95 .type = &exynos5433_bank_type_off, \ 96 .pctl_offset = reg, \ 97 .nr_pins = pins, \ 98 .eint_type = EINT_TYPE_GPIO, \ 99 .eint_offset = offs, \ 100 .name = id \ 101 } 102 103 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \ 104 { \ 105 .type = &exynos5433_bank_type_alive, \ 106 .pctl_offset = reg, \ 107 .nr_pins = pins, \ 108 .eint_type = EINT_TYPE_WKUP, \ 109 .eint_offset = offs, \ 110 .name = id \ 111 } 112 113 #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \ 114 { \ 115 .type = &exynos5433_bank_type_alive, \ 116 .pctl_offset = reg, \ 117 .nr_pins = pins, \ 118 .eint_type = EINT_TYPE_WKUP, \ 119 .eint_offset = offs, \ 120 .name = id, \ 121 .pctl_res_idx = pctl_idx, \ 122 } \ 123 124 /** 125 * struct exynos_weint_data: irq specific data for all the wakeup interrupts 126 * generated by the external wakeup interrupt controller. 127 * @irq: interrupt number within the domain. 128 * @bank: bank responsible for this interrupt 129 */ 130 struct exynos_weint_data { 131 unsigned int irq; 132 struct samsung_pin_bank *bank; 133 }; 134 135 /** 136 * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts 137 * generated by the external wakeup interrupt controller. 138 * @nr_banks: count of banks being part of the mux 139 * @banks: array of banks being part of the mux 140 */ 141 struct exynos_muxed_weint_data { 142 unsigned int nr_banks; 143 struct samsung_pin_bank *banks[]; 144 }; 145