1 /*
2  * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
3  *
4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5  *		http://www.samsung.com
6  * Copyright (c) 2012 Linaro Ltd
7  *		http://www.linaro.org
8  *
9  * This file contains the Exynos specific definitions for the Samsung
10  * pinctrl/gpiolib interface drivers.
11  *
12  * Author: Thomas Abraham <thomas.ab@samsung.com>
13  *
14  * This program is free software; you can redistribute it and/or modify
15  * it under the terms of the GNU General Public License as published by
16  * the Free Software Foundation; either version 2 of the License, or
17  * (at your option) any later version.
18  */
19 
20 #ifndef __PINCTRL_SAMSUNG_EXYNOS_H
21 #define __PINCTRL_SAMSUNG_EXYNOS_H
22 
23 /* External GPIO and wakeup interrupt related definitions */
24 #define EXYNOS_GPIO_ECON_OFFSET		0x700
25 #define EXYNOS_GPIO_EFLTCON_OFFSET	0x800
26 #define EXYNOS_GPIO_EMASK_OFFSET	0x900
27 #define EXYNOS_GPIO_EPEND_OFFSET	0xA00
28 #define EXYNOS_WKUP_ECON_OFFSET		0xE00
29 #define EXYNOS_WKUP_EMASK_OFFSET	0xF00
30 #define EXYNOS_WKUP_EPEND_OFFSET	0xF40
31 #define EXYNOS7_WKUP_ECON_OFFSET	0x700
32 #define EXYNOS7_WKUP_EMASK_OFFSET	0x900
33 #define EXYNOS7_WKUP_EPEND_OFFSET	0xA00
34 #define EXYNOS_SVC_OFFSET		0xB08
35 #define EXYNOS_EINT_FUNC		0xF
36 
37 /* helpers to access interrupt service register */
38 #define EXYNOS_SVC_GROUP_SHIFT		3
39 #define EXYNOS_SVC_GROUP_MASK		0x1f
40 #define EXYNOS_SVC_NUM_MASK		7
41 #define EXYNOS_SVC_GROUP(x)		((x >> EXYNOS_SVC_GROUP_SHIFT) & \
42 						EXYNOS_SVC_GROUP_MASK)
43 
44 /* Exynos specific external interrupt trigger types */
45 #define EXYNOS_EINT_LEVEL_LOW		0
46 #define EXYNOS_EINT_LEVEL_HIGH		1
47 #define EXYNOS_EINT_EDGE_FALLING	2
48 #define EXYNOS_EINT_EDGE_RISING		3
49 #define EXYNOS_EINT_EDGE_BOTH		4
50 #define EXYNOS_EINT_CON_MASK		0xF
51 #define EXYNOS_EINT_CON_LEN		4
52 
53 #define EXYNOS_EINT_MAX_PER_BANK	8
54 #define EXYNOS_EINT_NR_WKUP_EINT
55 
56 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id)		\
57 	{						\
58 		.type		= &bank_type_off,	\
59 		.pctl_offset	= reg,			\
60 		.nr_pins	= pins,			\
61 		.eint_type	= EINT_TYPE_NONE,	\
62 		.name		= id			\
63 	}
64 
65 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs)	\
66 	{						\
67 		.type		= &bank_type_off,	\
68 		.pctl_offset	= reg,			\
69 		.nr_pins	= pins,			\
70 		.eint_type	= EINT_TYPE_GPIO,	\
71 		.eint_offset	= offs,			\
72 		.name		= id			\
73 	}
74 
75 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs)	\
76 	{						\
77 		.type		= &bank_type_alive,	\
78 		.pctl_offset	= reg,			\
79 		.nr_pins	= pins,			\
80 		.eint_type	= EINT_TYPE_WKUP,	\
81 		.eint_offset	= offs,			\
82 		.name		= id			\
83 	}
84 
85 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs)		\
86 	{							\
87 		.type		= &exynos5433_bank_type_off,	\
88 		.pctl_offset	= reg,				\
89 		.nr_pins	= pins,				\
90 		.eint_type	= EINT_TYPE_GPIO,		\
91 		.eint_offset	= offs,				\
92 		.name		= id				\
93 	}
94 
95 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs)		\
96 	{							\
97 		.type		= &exynos5433_bank_type_alive,	\
98 		.pctl_offset	= reg,				\
99 		.nr_pins	= pins,				\
100 		.eint_type	= EINT_TYPE_WKUP,		\
101 		.eint_offset	= offs,				\
102 		.name		= id				\
103 	}
104 
105 #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
106 	{							\
107 		.type           = &exynos5433_bank_type_alive,	\
108 		.pctl_offset    = reg,				\
109 		.nr_pins        = pins,				\
110 		.eint_type      = EINT_TYPE_WKUP,		\
111 		.eint_offset    = offs,				\
112 		.name           = id,				\
113 		.pctl_res_idx   = pctl_idx,			\
114 	}							\
115 
116 /**
117  * struct exynos_weint_data: irq specific data for all the wakeup interrupts
118  * generated by the external wakeup interrupt controller.
119  * @irq: interrupt number within the domain.
120  * @bank: bank responsible for this interrupt
121  */
122 struct exynos_weint_data {
123 	unsigned int irq;
124 	struct samsung_pin_bank *bank;
125 };
126 
127 /**
128  * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
129  * generated by the external wakeup interrupt controller.
130  * @nr_banks: count of banks being part of the mux
131  * @banks: array of banks being part of the mux
132  */
133 struct exynos_muxed_weint_data {
134 	unsigned int nr_banks;
135 	struct samsung_pin_bank *banks[];
136 };
137 
138 int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d);
139 int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d);
140 void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata);
141 void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata);
142 struct samsung_retention_ctrl *
143 exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
144 		      const struct samsung_retention_data *data);
145 
146 #endif /* __PINCTRL_SAMSUNG_EXYNOS_H */
147