1077365a9SGeert Uytterhoeven // SPDX-License-Identifier: GPL-2.0 2077365a9SGeert Uytterhoeven /* 3077365a9SGeert Uytterhoeven * r8a7791/r8a7743 processor support - PFC hardware block. 4077365a9SGeert Uytterhoeven * 5077365a9SGeert Uytterhoeven * Copyright (C) 2013 Renesas Electronics Corporation 6077365a9SGeert Uytterhoeven * Copyright (C) 2014-2017 Cogent Embedded, Inc. 7077365a9SGeert Uytterhoeven */ 8077365a9SGeert Uytterhoeven 9077365a9SGeert Uytterhoeven #include <linux/errno.h> 10077365a9SGeert Uytterhoeven #include <linux/kernel.h> 11077365a9SGeert Uytterhoeven 12077365a9SGeert Uytterhoeven #include "sh_pfc.h" 13077365a9SGeert Uytterhoeven 14077365a9SGeert Uytterhoeven /* 15077365a9SGeert Uytterhoeven * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in 16077365a9SGeert Uytterhoeven * which case they support both 3.3V and 1.8V signalling. 17077365a9SGeert Uytterhoeven */ 18077365a9SGeert Uytterhoeven #define CPU_ALL_GP(fn, sfx) \ 1961232cd6SGeert Uytterhoeven PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2061232cd6SGeert Uytterhoeven PORT_GP_CFG_26(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2161232cd6SGeert Uytterhoeven PORT_GP_CFG_32(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2261232cd6SGeert Uytterhoeven PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2361232cd6SGeert Uytterhoeven PORT_GP_CFG_32(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2461232cd6SGeert Uytterhoeven PORT_GP_CFG_32(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2561232cd6SGeert Uytterhoeven PORT_GP_CFG_24(6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 2661232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 24, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2761232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 25, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2861232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 26, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 2961232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 27, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3061232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 28, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3161232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 29, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3261232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 30, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3361232cd6SGeert Uytterhoeven PORT_GP_CFG_1(6, 31, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3461232cd6SGeert Uytterhoeven PORT_GP_CFG_7(7, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3561232cd6SGeert Uytterhoeven PORT_GP_1(7, 7, fn, sfx), \ 3661232cd6SGeert Uytterhoeven PORT_GP_1(7, 8, fn, sfx), \ 3761232cd6SGeert Uytterhoeven PORT_GP_1(7, 9, fn, sfx), \ 3861232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 10, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 3961232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 11, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4061232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 12, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4161232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 13, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4261232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 14, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4361232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 15, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4461232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 16, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4561232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 17, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4661232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 18, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4761232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 19, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4861232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 20, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 4961232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 21, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 5061232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 22, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 5161232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 23, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 5261232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 24, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 5361232cd6SGeert Uytterhoeven PORT_GP_CFG_1(7, 25, fn, sfx, SH_PFC_PIN_CFG_PULL_UP) 5461232cd6SGeert Uytterhoeven 5561232cd6SGeert Uytterhoeven #define CPU_ALL_NOGP(fn) \ 5661232cd6SGeert Uytterhoeven PIN_NOGP_CFG(ASEBRK_N_ACK, "ASEBRK#/ACK", fn, SH_PFC_PIN_CFG_PULL_DOWN), \ 5761232cd6SGeert Uytterhoeven PIN_NOGP_CFG(AVS1, "AVS1", fn, SH_PFC_PIN_CFG_PULL_UP), \ 5861232cd6SGeert Uytterhoeven PIN_NOGP_CFG(AVS2, "AVS2", fn, SH_PFC_PIN_CFG_PULL_UP), \ 5961232cd6SGeert Uytterhoeven PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP), \ 6061232cd6SGeert Uytterhoeven PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP), \ 6161232cd6SGeert Uytterhoeven PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP), \ 6261232cd6SGeert Uytterhoeven PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP) 63077365a9SGeert Uytterhoeven 64077365a9SGeert Uytterhoeven enum { 65077365a9SGeert Uytterhoeven PINMUX_RESERVED = 0, 66077365a9SGeert Uytterhoeven 67077365a9SGeert Uytterhoeven PINMUX_DATA_BEGIN, 68077365a9SGeert Uytterhoeven GP_ALL(DATA), 69077365a9SGeert Uytterhoeven PINMUX_DATA_END, 70077365a9SGeert Uytterhoeven 71077365a9SGeert Uytterhoeven PINMUX_FUNCTION_BEGIN, 72077365a9SGeert Uytterhoeven GP_ALL(FN), 73077365a9SGeert Uytterhoeven 74077365a9SGeert Uytterhoeven /* GPSR0 */ 75077365a9SGeert Uytterhoeven FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5, 76077365a9SGeert Uytterhoeven FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11, 77077365a9SGeert Uytterhoeven FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19, 78077365a9SGeert Uytterhoeven FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29, 79077365a9SGeert Uytterhoeven FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8, 80077365a9SGeert Uytterhoeven FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20, 81077365a9SGeert Uytterhoeven 82077365a9SGeert Uytterhoeven /* GPSR1 */ 83077365a9SGeert Uytterhoeven FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3, 84077365a9SGeert Uytterhoeven FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16, 85077365a9SGeert Uytterhoeven FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25, 86077365a9SGeert Uytterhoeven FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N, 87077365a9SGeert Uytterhoeven FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18, 88077365a9SGeert Uytterhoeven FN_IP3_21_20, 89077365a9SGeert Uytterhoeven 90077365a9SGeert Uytterhoeven /* GPSR2 */ 91077365a9SGeert Uytterhoeven FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, 92077365a9SGeert Uytterhoeven FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19, 93077365a9SGeert Uytterhoeven FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26, 94077365a9SGeert Uytterhoeven FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9, 95077365a9SGeert Uytterhoeven FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22, 96077365a9SGeert Uytterhoeven FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0, 97077365a9SGeert Uytterhoeven FN_IP6_5_3, FN_IP6_7_6, 98077365a9SGeert Uytterhoeven 99077365a9SGeert Uytterhoeven /* GPSR3 */ 100077365a9SGeert Uytterhoeven FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13, 101077365a9SGeert Uytterhoeven FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24, 102077365a9SGeert Uytterhoeven FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9, 103077365a9SGeert Uytterhoeven FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24, 104077365a9SGeert Uytterhoeven FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7, 105077365a9SGeert Uytterhoeven FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16, 106077365a9SGeert Uytterhoeven FN_IP9_18_17, 107077365a9SGeert Uytterhoeven 108077365a9SGeert Uytterhoeven /* GPSR4 */ 109077365a9SGeert Uytterhoeven FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25, 110077365a9SGeert Uytterhoeven FN_VI0_DATA0_VI0_B0, FN_VI0_DATA1_VI0_B1, FN_VI0_DATA2_VI0_B2, 111077365a9SGeert Uytterhoeven FN_IP9_28_27, FN_VI0_DATA4_VI0_B4, FN_VI0_DATA5_VI0_B5, 112077365a9SGeert Uytterhoeven FN_VI0_DATA6_VI0_B6, FN_VI0_DATA7_VI0_B7, FN_IP9_31_29, FN_IP10_2_0, 113077365a9SGeert Uytterhoeven FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15, 114077365a9SGeert Uytterhoeven FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25, 115077365a9SGeert Uytterhoeven FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6, 116077365a9SGeert Uytterhoeven FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4, 117077365a9SGeert Uytterhoeven 118077365a9SGeert Uytterhoeven /* GPSR5 */ 119077365a9SGeert Uytterhoeven FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19, 120077365a9SGeert Uytterhoeven FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24, 121077365a9SGeert Uytterhoeven FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30, 122077365a9SGeert Uytterhoeven FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10, 123077365a9SGeert Uytterhoeven FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20, 124077365a9SGeert Uytterhoeven FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3, 125077365a9SGeert Uytterhoeven FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22, 126077365a9SGeert Uytterhoeven 127077365a9SGeert Uytterhoeven /* GPSR6 */ 128077365a9SGeert Uytterhoeven FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14, 129077365a9SGeert Uytterhoeven FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, 130077365a9SGeert Uytterhoeven FN_IP13_22, FN_IP13_24_23, FN_SD1_CLK, 131077365a9SGeert Uytterhoeven FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0, 132077365a9SGeert Uytterhoeven FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7, 133077365a9SGeert Uytterhoeven FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17, 134077365a9SGeert Uytterhoeven FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29, 135077365a9SGeert Uytterhoeven FN_USB1_OVC, FN_DU0_DOTCLKIN, 136077365a9SGeert Uytterhoeven 137077365a9SGeert Uytterhoeven /* GPSR7 */ 138077365a9SGeert Uytterhoeven FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24, 139077365a9SGeert Uytterhoeven FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8, 140077365a9SGeert Uytterhoeven FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, 141077365a9SGeert Uytterhoeven FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27, 142077365a9SGeert Uytterhoeven FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12, 143077365a9SGeert Uytterhoeven FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, 144077365a9SGeert Uytterhoeven 145077365a9SGeert Uytterhoeven /* IPSR0 */ 146077365a9SGeert Uytterhoeven FN_D0, FN_D1, FN_D2, FN_D3, FN_D4, FN_D5, FN_D6, FN_D7, FN_D8, 147077365a9SGeert Uytterhoeven FN_D9, FN_D10, FN_D11, FN_D12, FN_D13, FN_D14, FN_D15, 148077365a9SGeert Uytterhoeven FN_A0, FN_ATAWR0_N_C, FN_MSIOF0_SCK_B, FN_I2C0_SCL_C, FN_PWM2_B, 149077365a9SGeert Uytterhoeven FN_A1, FN_MSIOF0_SYNC_B, FN_A2, FN_MSIOF0_SS1_B, 150077365a9SGeert Uytterhoeven FN_A3, FN_MSIOF0_SS2_B, FN_A4, FN_MSIOF0_TXD_B, 151077365a9SGeert Uytterhoeven FN_A5, FN_MSIOF0_RXD_B, FN_A6, FN_MSIOF1_SCK, 152077365a9SGeert Uytterhoeven 153077365a9SGeert Uytterhoeven /* IPSR1 */ 154077365a9SGeert Uytterhoeven FN_A7, FN_MSIOF1_SYNC, FN_A8, FN_MSIOF1_SS1, FN_I2C0_SCL, 155077365a9SGeert Uytterhoeven FN_A9, FN_MSIOF1_SS2, FN_I2C0_SDA, 156077365a9SGeert Uytterhoeven FN_A10, FN_MSIOF1_TXD, FN_MSIOF1_TXD_D, 157077365a9SGeert Uytterhoeven FN_A11, FN_MSIOF1_RXD, FN_I2C3_SCL_D, FN_MSIOF1_RXD_D, 158077365a9SGeert Uytterhoeven FN_A12, FN_FMCLK, FN_I2C3_SDA_D, FN_MSIOF1_SCK_D, 159077365a9SGeert Uytterhoeven FN_A13, FN_ATAG0_N_C, FN_BPFCLK, FN_MSIOF1_SS1_D, 160077365a9SGeert Uytterhoeven FN_A14, FN_ATADIR0_N_C, FN_FMIN, FN_FMIN_C, FN_MSIOF1_SYNC_D, 161077365a9SGeert Uytterhoeven FN_A15, FN_BPFCLK_C, 162077365a9SGeert Uytterhoeven FN_A16, FN_DREQ2_B, FN_FMCLK_C, FN_SCIFA1_SCK_B, 163077365a9SGeert Uytterhoeven FN_A17, FN_DACK2_B, FN_I2C0_SDA_C, 164077365a9SGeert Uytterhoeven FN_A18, FN_DREQ1, FN_SCIFA1_RXD_C, FN_SCIFB1_RXD_C, 165077365a9SGeert Uytterhoeven 166077365a9SGeert Uytterhoeven /* IPSR2 */ 167077365a9SGeert Uytterhoeven FN_A19, FN_DACK1, FN_SCIFA1_TXD_C, FN_SCIFB1_TXD_C, FN_SCIFB1_SCK_B, 168077365a9SGeert Uytterhoeven FN_A20, FN_SPCLK, 169077365a9SGeert Uytterhoeven FN_A21, FN_ATAWR0_N_B, FN_MOSI_IO0, 170077365a9SGeert Uytterhoeven FN_A22, FN_MISO_IO1, FN_FMCLK_B, FN_TX0, FN_SCIFA0_TXD, 171077365a9SGeert Uytterhoeven FN_A23, FN_IO2, FN_BPFCLK_B, FN_RX0, FN_SCIFA0_RXD, 172077365a9SGeert Uytterhoeven FN_A24, FN_DREQ2, FN_IO3, FN_TX1, FN_SCIFA1_TXD, 173077365a9SGeert Uytterhoeven FN_A25, FN_DACK2, FN_SSL, FN_DREQ1_C, FN_RX1, FN_SCIFA1_RXD, 174077365a9SGeert Uytterhoeven FN_CS0_N, FN_ATAG0_N_B, FN_I2C1_SCL, 175077365a9SGeert Uytterhoeven FN_CS1_N_A26, FN_ATADIR0_N_B, FN_I2C1_SDA, 176077365a9SGeert Uytterhoeven FN_EX_CS1_N, FN_MSIOF2_SCK, 177077365a9SGeert Uytterhoeven FN_EX_CS2_N, FN_ATAWR0_N, FN_MSIOF2_SYNC, 178077365a9SGeert Uytterhoeven FN_EX_CS3_N, FN_ATADIR0_N, FN_MSIOF2_TXD, FN_ATAG0_N, FN_EX_WAIT1, 179077365a9SGeert Uytterhoeven 180077365a9SGeert Uytterhoeven /* IPSR3 */ 181077365a9SGeert Uytterhoeven FN_EX_CS4_N, FN_ATARD0_N, FN_MSIOF2_RXD, FN_EX_WAIT2, 182077365a9SGeert Uytterhoeven FN_EX_CS5_N, FN_ATACS00_N, FN_MSIOF2_SS1, FN_HRX1_B, 183077365a9SGeert Uytterhoeven FN_SCIFB1_RXD_B, FN_PWM1, FN_TPU_TO1, 184077365a9SGeert Uytterhoeven FN_BS_N, FN_ATACS10_N, FN_MSIOF2_SS2, FN_HTX1_B, 185077365a9SGeert Uytterhoeven FN_SCIFB1_TXD_B, FN_PWM2, FN_TPU_TO2, 186077365a9SGeert Uytterhoeven FN_RD_WR_N, FN_HRX2_B, FN_FMIN_B, FN_SCIFB0_RXD_B, FN_DREQ1_D, 187077365a9SGeert Uytterhoeven FN_WE0_N, FN_HCTS2_N_B, FN_SCIFB0_TXD_B, 188077365a9SGeert Uytterhoeven FN_WE1_N, FN_ATARD0_N_B, FN_HTX2_B, FN_SCIFB0_RTS_N_B, 189077365a9SGeert Uytterhoeven FN_EX_WAIT0, FN_HRTS2_N_B, FN_SCIFB0_CTS_N_B, 190077365a9SGeert Uytterhoeven FN_DREQ0, FN_PWM3, FN_TPU_TO3, 191077365a9SGeert Uytterhoeven FN_DACK0, FN_DRACK0, FN_REMOCON, 192077365a9SGeert Uytterhoeven FN_SPEEDIN, FN_HSCK0_C, FN_HSCK2_C, FN_SCIFB0_SCK_B, 193077365a9SGeert Uytterhoeven FN_SCIFB2_SCK_B, FN_DREQ2_C, FN_HTX2_D, 194077365a9SGeert Uytterhoeven FN_SSI_SCK0129, FN_HRX0_C, FN_HRX2_C, FN_SCIFB0_RXD_C, FN_SCIFB2_RXD_C, 195077365a9SGeert Uytterhoeven FN_SSI_WS0129, FN_HTX0_C, FN_HTX2_C, FN_SCIFB0_TXD_C, FN_SCIFB2_TXD_C, 196077365a9SGeert Uytterhoeven 197077365a9SGeert Uytterhoeven /* IPSR4 */ 198077365a9SGeert Uytterhoeven FN_SSI_SDATA0, FN_I2C0_SCL_B, FN_IIC0_SCL_B, FN_MSIOF2_SCK_C, 199077365a9SGeert Uytterhoeven FN_SSI_SCK1, FN_I2C0_SDA_B, FN_IIC0_SDA_B, FN_MSIOF2_SYNC_C, 200077365a9SGeert Uytterhoeven FN_GLO_I0_D, 201077365a9SGeert Uytterhoeven FN_SSI_WS1, FN_I2C1_SCL_B, FN_IIC1_SCL_B, FN_MSIOF2_TXD_C, FN_GLO_I1_D, 202077365a9SGeert Uytterhoeven FN_SSI_SDATA1, FN_I2C1_SDA_B, FN_IIC1_SDA_B, FN_MSIOF2_RXD_C, 203077365a9SGeert Uytterhoeven FN_SSI_SCK2, FN_I2C2_SCL, FN_GPS_CLK_B, FN_GLO_Q0_D, FN_HSCK1_E, 204077365a9SGeert Uytterhoeven FN_SSI_WS2, FN_I2C2_SDA, FN_GPS_SIGN_B, FN_RX2_E, 205077365a9SGeert Uytterhoeven FN_GLO_Q1_D, FN_HCTS1_N_E, 206077365a9SGeert Uytterhoeven FN_SSI_SDATA2, FN_GPS_MAG_B, FN_TX2_E, FN_HRTS1_N_E, 207077365a9SGeert Uytterhoeven FN_SSI_SCK34, FN_SSI_WS34, FN_SSI_SDATA3, 208077365a9SGeert Uytterhoeven FN_SSI_SCK4, FN_GLO_SS_D, 209077365a9SGeert Uytterhoeven FN_SSI_WS4, FN_GLO_RFON_D, 210077365a9SGeert Uytterhoeven FN_SSI_SDATA4, FN_MSIOF2_SCK_D, 211077365a9SGeert Uytterhoeven FN_SSI_SCK5, FN_MSIOF1_SCK_C, FN_TS_SDATA0, FN_GLO_I0, 212077365a9SGeert Uytterhoeven FN_MSIOF2_SYNC_D, FN_VI1_R2_B, 213077365a9SGeert Uytterhoeven 214077365a9SGeert Uytterhoeven /* IPSR5 */ 215077365a9SGeert Uytterhoeven FN_SSI_WS5, FN_MSIOF1_SYNC_C, FN_TS_SCK0, FN_GLO_I1, 216077365a9SGeert Uytterhoeven FN_MSIOF2_TXD_D, FN_VI1_R3_B, 217077365a9SGeert Uytterhoeven FN_SSI_SDATA5, FN_MSIOF1_TXD_C, FN_TS_SDEN0, FN_GLO_Q0, 218077365a9SGeert Uytterhoeven FN_MSIOF2_SS1_D, FN_VI1_R4_B, 219077365a9SGeert Uytterhoeven FN_SSI_SCK6, FN_MSIOF1_RXD_C, FN_TS_SPSYNC0, FN_GLO_Q1, 220077365a9SGeert Uytterhoeven FN_MSIOF2_RXD_D, FN_VI1_R5_B, 221077365a9SGeert Uytterhoeven FN_SSI_WS6, FN_GLO_SCLK, FN_MSIOF2_SS2_D, FN_VI1_R6_B, 222077365a9SGeert Uytterhoeven FN_SSI_SDATA6, FN_STP_IVCXO27_0_B, FN_GLO_SDATA, FN_VI1_R7_B, 223077365a9SGeert Uytterhoeven FN_SSI_SCK78, FN_STP_ISCLK_0_B, FN_GLO_SS, 224077365a9SGeert Uytterhoeven FN_SSI_WS78, FN_TX0_D, FN_STP_ISD_0_B, FN_GLO_RFON, 225077365a9SGeert Uytterhoeven FN_SSI_SDATA7, FN_RX0_D, FN_STP_ISEN_0_B, 226077365a9SGeert Uytterhoeven FN_SSI_SDATA8, FN_TX1_D, FN_STP_ISSYNC_0_B, 227077365a9SGeert Uytterhoeven FN_SSI_SCK9, FN_RX1_D, FN_GLO_SCLK_D, 228077365a9SGeert Uytterhoeven FN_SSI_WS9, FN_TX3_D, FN_CAN0_TX_D, FN_GLO_SDATA_D, 229077365a9SGeert Uytterhoeven FN_SSI_SDATA9, FN_RX3_D, FN_CAN0_RX_D, 230077365a9SGeert Uytterhoeven 231077365a9SGeert Uytterhoeven /* IPSR6 */ 232077365a9SGeert Uytterhoeven FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B, 233077365a9SGeert Uytterhoeven FN_SCIF_CLK, FN_DVC_MUTE, FN_BPFCLK_E, 234077365a9SGeert Uytterhoeven FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2, 235077365a9SGeert Uytterhoeven FN_SCIFA2_RXD, FN_FMIN_E, 236077365a9SGeert Uytterhoeven FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD, 23730d36999SGeert Uytterhoeven FN_IRQ0, FN_SCIFB1_RXD_D, 23830d36999SGeert Uytterhoeven FN_IRQ1, FN_SCIFB1_SCK_C, 23930d36999SGeert Uytterhoeven FN_IRQ2, FN_SCIFB1_TXD_D, 24030d36999SGeert Uytterhoeven FN_IRQ3, FN_I2C4_SCL_C, FN_MSIOF2_TXD_E, 24130d36999SGeert Uytterhoeven FN_IRQ4, FN_HRX1_C, FN_I2C4_SDA_C, FN_MSIOF2_RXD_E, 242077365a9SGeert Uytterhoeven FN_IRQ5, FN_HTX1_C, FN_I2C1_SCL_E, FN_MSIOF2_SCK_E, 243077365a9SGeert Uytterhoeven FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_I2C1_SDA_E, FN_MSIOF2_SYNC_E, 244077365a9SGeert Uytterhoeven FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D, 245077365a9SGeert Uytterhoeven FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D, 246077365a9SGeert Uytterhoeven 247077365a9SGeert Uytterhoeven /* IPSR7 */ 248077365a9SGeert Uytterhoeven FN_IRQ9, FN_DU1_DOTCLKIN_B, FN_CAN_CLK_D, FN_GPS_MAG_C, 249077365a9SGeert Uytterhoeven FN_SCIF_CLK_B, FN_GPS_MAG_D, 250077365a9SGeert Uytterhoeven FN_DU1_DR0, FN_LCDOUT0, FN_VI1_DATA0_B, FN_TX0_B, 251077365a9SGeert Uytterhoeven FN_SCIFA0_TXD_B, FN_MSIOF2_SCK_B, 252077365a9SGeert Uytterhoeven FN_DU1_DR1, FN_LCDOUT1, FN_VI1_DATA1_B, FN_RX0_B, 253077365a9SGeert Uytterhoeven FN_SCIFA0_RXD_B, FN_MSIOF2_SYNC_B, 254077365a9SGeert Uytterhoeven FN_DU1_DR2, FN_LCDOUT2, FN_SSI_SCK0129_B, 255077365a9SGeert Uytterhoeven FN_DU1_DR3, FN_LCDOUT3, FN_SSI_WS0129_B, 256077365a9SGeert Uytterhoeven FN_DU1_DR4, FN_LCDOUT4, FN_SSI_SDATA0_B, 257077365a9SGeert Uytterhoeven FN_DU1_DR5, FN_LCDOUT5, FN_SSI_SCK1_B, 258077365a9SGeert Uytterhoeven FN_DU1_DR6, FN_LCDOUT6, FN_SSI_WS1_B, 259077365a9SGeert Uytterhoeven FN_DU1_DR7, FN_LCDOUT7, FN_SSI_SDATA1_B, 260077365a9SGeert Uytterhoeven FN_DU1_DG0, FN_LCDOUT8, FN_VI1_DATA2_B, FN_TX1_B, 261077365a9SGeert Uytterhoeven FN_SCIFA1_TXD_B, FN_MSIOF2_SS1_B, 262077365a9SGeert Uytterhoeven FN_DU1_DG1, FN_LCDOUT9, FN_VI1_DATA3_B, FN_RX1_B, 263077365a9SGeert Uytterhoeven FN_SCIFA1_RXD_B, FN_MSIOF2_SS2_B, 264077365a9SGeert Uytterhoeven FN_DU1_DG2, FN_LCDOUT10, FN_VI1_DATA4_B, FN_SCIF1_SCK_B, 265077365a9SGeert Uytterhoeven FN_SCIFA1_SCK, FN_SSI_SCK78_B, 266077365a9SGeert Uytterhoeven 267077365a9SGeert Uytterhoeven /* IPSR8 */ 268077365a9SGeert Uytterhoeven FN_DU1_DG3, FN_LCDOUT11, FN_VI1_DATA5_B, FN_SSI_WS78_B, 269077365a9SGeert Uytterhoeven FN_DU1_DG4, FN_LCDOUT12, FN_VI1_DATA6_B, FN_HRX0_B, 270077365a9SGeert Uytterhoeven FN_SCIFB2_RXD_B, FN_SSI_SDATA7_B, 271077365a9SGeert Uytterhoeven FN_DU1_DG5, FN_LCDOUT13, FN_VI1_DATA7_B, FN_HCTS0_N_B, 272077365a9SGeert Uytterhoeven FN_SCIFB2_TXD_B, FN_SSI_SDATA8_B, 273077365a9SGeert Uytterhoeven FN_DU1_DG6, FN_LCDOUT14, FN_HRTS0_N_B, 274077365a9SGeert Uytterhoeven FN_SCIFB2_CTS_N_B, FN_SSI_SCK9_B, 275077365a9SGeert Uytterhoeven FN_DU1_DG7, FN_LCDOUT15, FN_HTX0_B, FN_SCIFB2_RTS_N_B, FN_SSI_WS9_B, 276077365a9SGeert Uytterhoeven FN_DU1_DB0, FN_LCDOUT16, FN_VI1_CLK_B, FN_TX2_B, 277077365a9SGeert Uytterhoeven FN_SCIFA2_TXD_B, FN_MSIOF2_TXD_B, 278077365a9SGeert Uytterhoeven FN_DU1_DB1, FN_LCDOUT17, FN_VI1_HSYNC_N_B, FN_RX2_B, 279077365a9SGeert Uytterhoeven FN_SCIFA2_RXD_B, FN_MSIOF2_RXD_B, 280077365a9SGeert Uytterhoeven FN_DU1_DB2, FN_LCDOUT18, FN_VI1_VSYNC_N_B, FN_SCIF2_SCK_B, 281077365a9SGeert Uytterhoeven FN_SCIFA2_SCK, FN_SSI_SDATA9_B, 282077365a9SGeert Uytterhoeven FN_DU1_DB3, FN_LCDOUT19, FN_VI1_CLKENB_B, 283077365a9SGeert Uytterhoeven FN_DU1_DB4, FN_LCDOUT20, FN_VI1_FIELD_B, FN_CAN1_RX, 284077365a9SGeert Uytterhoeven FN_DU1_DB5, FN_LCDOUT21, FN_TX3, FN_SCIFA3_TXD, FN_CAN1_TX, 285077365a9SGeert Uytterhoeven 286077365a9SGeert Uytterhoeven /* IPSR9 */ 287077365a9SGeert Uytterhoeven FN_DU1_DB6, FN_LCDOUT22, FN_I2C3_SCL_C, FN_RX3, FN_SCIFA3_RXD, 288077365a9SGeert Uytterhoeven FN_DU1_DB7, FN_LCDOUT23, FN_I2C3_SDA_C, FN_SCIF3_SCK, FN_SCIFA3_SCK, 289077365a9SGeert Uytterhoeven FN_DU1_DOTCLKIN, FN_QSTVA_QVS, 290077365a9SGeert Uytterhoeven FN_DU1_DOTCLKOUT0, FN_QCLK, 291077365a9SGeert Uytterhoeven FN_DU1_DOTCLKOUT1, FN_QSTVB_QVE, FN_CAN0_TX, 292077365a9SGeert Uytterhoeven FN_TX3_B, FN_I2C2_SCL_B, FN_PWM4, 293077365a9SGeert Uytterhoeven FN_DU1_EXHSYNC_DU1_HSYNC, FN_QSTH_QHS, 294077365a9SGeert Uytterhoeven FN_DU1_EXVSYNC_DU1_VSYNC, FN_QSTB_QHE, 295077365a9SGeert Uytterhoeven FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_QCPV_QDE, 296077365a9SGeert Uytterhoeven FN_CAN0_RX, FN_RX3_B, FN_I2C2_SDA_B, 297077365a9SGeert Uytterhoeven FN_DU1_DISP, FN_QPOLA, 298077365a9SGeert Uytterhoeven FN_DU1_CDE, FN_QPOLB, FN_PWM4_B, 299077365a9SGeert Uytterhoeven FN_VI0_CLKENB, FN_TX4, FN_SCIFA4_TXD, FN_TS_SDATA0_D, 300077365a9SGeert Uytterhoeven FN_VI0_FIELD, FN_RX4, FN_SCIFA4_RXD, FN_TS_SCK0_D, 301077365a9SGeert Uytterhoeven FN_VI0_HSYNC_N, FN_TX5, FN_SCIFA5_TXD, FN_TS_SDEN0_D, 302077365a9SGeert Uytterhoeven FN_VI0_VSYNC_N, FN_RX5, FN_SCIFA5_RXD, FN_TS_SPSYNC0_D, 303077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3, FN_SCIF3_SCK_B, FN_SCIFA3_SCK_B, 304077365a9SGeert Uytterhoeven FN_VI0_G0, FN_IIC1_SCL, FN_STP_IVCXO27_0_C, FN_I2C4_SCL, 305077365a9SGeert Uytterhoeven FN_HCTS2_N, FN_SCIFB2_CTS_N, FN_ATAWR1_N, 306077365a9SGeert Uytterhoeven 307077365a9SGeert Uytterhoeven /* IPSR10 */ 308077365a9SGeert Uytterhoeven FN_VI0_G1, FN_IIC1_SDA, FN_STP_ISCLK_0_C, FN_I2C4_SDA, 309077365a9SGeert Uytterhoeven FN_HRTS2_N, FN_SCIFB2_RTS_N, FN_ATADIR1_N, 310077365a9SGeert Uytterhoeven FN_VI0_G2, FN_VI2_HSYNC_N, FN_STP_ISD_0_C, FN_I2C3_SCL_B, 311077365a9SGeert Uytterhoeven FN_HSCK2, FN_SCIFB2_SCK, FN_ATARD1_N, 312077365a9SGeert Uytterhoeven FN_VI0_G3, FN_VI2_VSYNC_N, FN_STP_ISEN_0_C, FN_I2C3_SDA_B, 313077365a9SGeert Uytterhoeven FN_HRX2, FN_SCIFB2_RXD, FN_ATACS01_N, 314077365a9SGeert Uytterhoeven FN_VI0_G4, FN_VI2_CLKENB, FN_STP_ISSYNC_0_C, 315077365a9SGeert Uytterhoeven FN_HTX2, FN_SCIFB2_TXD, FN_SCIFB0_SCK_D, 316077365a9SGeert Uytterhoeven FN_VI0_G5, FN_VI2_FIELD, FN_STP_OPWM_0_C, FN_FMCLK_D, 317077365a9SGeert Uytterhoeven FN_CAN0_TX_E, FN_HTX1_D, FN_SCIFB0_TXD_D, 318077365a9SGeert Uytterhoeven FN_VI0_G6, FN_VI2_CLK, FN_BPFCLK_D, 319077365a9SGeert Uytterhoeven FN_VI0_G7, FN_VI2_DATA0, FN_FMIN_D, 320077365a9SGeert Uytterhoeven FN_VI0_R0, FN_VI2_DATA1, FN_GLO_I0_B, 321077365a9SGeert Uytterhoeven FN_TS_SDATA0_C, FN_ATACS11_N, 322077365a9SGeert Uytterhoeven FN_VI0_R1, FN_VI2_DATA2, FN_GLO_I1_B, 323077365a9SGeert Uytterhoeven FN_TS_SCK0_C, FN_ATAG1_N, 324077365a9SGeert Uytterhoeven FN_VI0_R2, FN_VI2_DATA3, FN_GLO_Q0_B, FN_TS_SDEN0_C, 325077365a9SGeert Uytterhoeven FN_VI0_R3, FN_VI2_DATA4, FN_GLO_Q1_B, FN_TS_SPSYNC0_C, 326077365a9SGeert Uytterhoeven FN_VI0_R4, FN_VI2_DATA5, FN_GLO_SCLK_B, FN_TX0_C, FN_I2C1_SCL_D, 327077365a9SGeert Uytterhoeven 328077365a9SGeert Uytterhoeven /* IPSR11 */ 329077365a9SGeert Uytterhoeven FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_I2C1_SDA_D, 330077365a9SGeert Uytterhoeven FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_I2C4_SCL_B, 331077365a9SGeert Uytterhoeven FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, 332077365a9SGeert Uytterhoeven FN_I2C4_SDA_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 333077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B, 334077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B, 335077365a9SGeert Uytterhoeven FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 336077365a9SGeert Uytterhoeven FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 337077365a9SGeert Uytterhoeven FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5, 338077365a9SGeert Uytterhoeven FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7, 339077365a9SGeert Uytterhoeven FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO, 340077365a9SGeert Uytterhoeven FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC, 341077365a9SGeert Uytterhoeven FN_VI1_DATA7, FN_AVB_MDC, 342077365a9SGeert Uytterhoeven FN_ETH_MDIO, FN_AVB_RX_CLK, FN_I2C2_SCL_C, 343077365a9SGeert Uytterhoeven FN_ETH_CRS_DV, FN_AVB_LINK, FN_I2C2_SDA_C, 344077365a9SGeert Uytterhoeven 345077365a9SGeert Uytterhoeven /* IPSR12 */ 346077365a9SGeert Uytterhoeven FN_ETH_RX_ER, FN_AVB_CRS, FN_I2C3_SCL, FN_IIC0_SCL, 347077365a9SGeert Uytterhoeven FN_ETH_RXD0, FN_AVB_PHY_INT, FN_I2C3_SDA, FN_IIC0_SDA, 348077365a9SGeert Uytterhoeven FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, 349077365a9SGeert Uytterhoeven FN_I2C2_SCL_D, FN_MSIOF1_RXD_E, 350077365a9SGeert Uytterhoeven FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_I2C2_SDA_D, FN_MSIOF1_SCK_E, 351077365a9SGeert Uytterhoeven FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, 352077365a9SGeert Uytterhoeven FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, 353077365a9SGeert Uytterhoeven FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, 354077365a9SGeert Uytterhoeven FN_CAN1_TX_C, FN_MSIOF1_TXD_E, 355077365a9SGeert Uytterhoeven FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, 356077365a9SGeert Uytterhoeven FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 357077365a9SGeert Uytterhoeven FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 358077365a9SGeert Uytterhoeven FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 359077365a9SGeert Uytterhoeven FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, 360077365a9SGeert Uytterhoeven FN_ADIDATA_B, FN_MSIOF0_SYNC_C, 361077365a9SGeert Uytterhoeven FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, 362077365a9SGeert Uytterhoeven FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, 363077365a9SGeert Uytterhoeven 364077365a9SGeert Uytterhoeven /* IPSR13 */ 365077365a9SGeert Uytterhoeven FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C, 366077365a9SGeert Uytterhoeven FN_ADICLK_B, FN_MSIOF0_SS1_C, 367077365a9SGeert Uytterhoeven FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C, 368077365a9SGeert Uytterhoeven FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C, 369077365a9SGeert Uytterhoeven FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B, 370077365a9SGeert Uytterhoeven FN_ADICHS2_B, FN_MSIOF0_TXD_C, 371077365a9SGeert Uytterhoeven FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B, 372077365a9SGeert Uytterhoeven FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B, 373077365a9SGeert Uytterhoeven FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B, 374077365a9SGeert Uytterhoeven FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F, 375077365a9SGeert Uytterhoeven FN_SCIFA5_TXD_B, FN_TX3_C, 376077365a9SGeert Uytterhoeven FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F, 377077365a9SGeert Uytterhoeven FN_SCIFA5_RXD_B, FN_RX3_C, 378077365a9SGeert Uytterhoeven FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B, 379077365a9SGeert Uytterhoeven FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B, 380077365a9SGeert Uytterhoeven FN_SD1_DATA3, FN_IERX_B, 381077365a9SGeert Uytterhoeven FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_I2C1_SCL_C, 382077365a9SGeert Uytterhoeven 383077365a9SGeert Uytterhoeven /* IPSR14 */ 384077365a9SGeert Uytterhoeven FN_SD1_WP, FN_PWM1_B, FN_I2C1_SDA_C, 385077365a9SGeert Uytterhoeven FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD, 386077365a9SGeert Uytterhoeven FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1, 387077365a9SGeert Uytterhoeven FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3, 388077365a9SGeert Uytterhoeven FN_SD2_CD, FN_MMC_D4, FN_IIC1_SCL_C, FN_TX5_B, FN_SCIFA5_TXD_C, 389077365a9SGeert Uytterhoeven FN_SD2_WP, FN_MMC_D5, FN_IIC1_SDA_C, FN_RX5_B, FN_SCIFA5_RXD_C, 390077365a9SGeert Uytterhoeven FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B, 391077365a9SGeert Uytterhoeven FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B, 392077365a9SGeert Uytterhoeven FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B, 393077365a9SGeert Uytterhoeven FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B, 394077365a9SGeert Uytterhoeven FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E, 395077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N_C, FN_IIC0_SCL_C, FN_VI1_G4_B, 396077365a9SGeert Uytterhoeven FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E, 397077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N_C, FN_IIC0_SDA_C, FN_VI1_G5_B, 398077365a9SGeert Uytterhoeven 399077365a9SGeert Uytterhoeven /* IPSR15 */ 400077365a9SGeert Uytterhoeven FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, 401077365a9SGeert Uytterhoeven FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, 402077365a9SGeert Uytterhoeven FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, 403077365a9SGeert Uytterhoeven FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B, 404077365a9SGeert Uytterhoeven FN_PWM5_B, FN_SCIFA3_TXD_C, 405077365a9SGeert Uytterhoeven FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5, 406077365a9SGeert Uytterhoeven FN_VI1_G6_B, FN_SCIFA3_RXD_C, 407077365a9SGeert Uytterhoeven FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6, 408077365a9SGeert Uytterhoeven FN_VI1_G7_B, FN_SCIFA3_SCK_C, 409077365a9SGeert Uytterhoeven FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C, 410077365a9SGeert Uytterhoeven FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C, 411077365a9SGeert Uytterhoeven FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK, 412077365a9SGeert Uytterhoeven FN_TCLK2, FN_VI1_DATA3_C, 413077365a9SGeert Uytterhoeven FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C, 414077365a9SGeert Uytterhoeven FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C, 415077365a9SGeert Uytterhoeven 416077365a9SGeert Uytterhoeven /* IPSR16 */ 417077365a9SGeert Uytterhoeven FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C, 418077365a9SGeert Uytterhoeven FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C, 419077365a9SGeert Uytterhoeven FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CLK, FN_GLO_RFON_C, 420077365a9SGeert Uytterhoeven FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B, 421077365a9SGeert Uytterhoeven FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B, 422077365a9SGeert Uytterhoeven 423077365a9SGeert Uytterhoeven /* MOD_SEL */ 424077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 425077365a9SGeert Uytterhoeven FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, 426077365a9SGeert Uytterhoeven FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, 427077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, 428077365a9SGeert Uytterhoeven FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 429077365a9SGeert Uytterhoeven FN_SEL_SSI9_0, FN_SEL_SSI9_1, 430077365a9SGeert Uytterhoeven FN_SEL_SCFA_0, FN_SEL_SCFA_1, 431077365a9SGeert Uytterhoeven FN_SEL_QSP_0, FN_SEL_QSP_1, 432077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, 433077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3, 434077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_4, 435077365a9SGeert Uytterhoeven FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 436077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 437077365a9SGeert Uytterhoeven FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, 438077365a9SGeert Uytterhoeven FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, 439077365a9SGeert Uytterhoeven FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 440077365a9SGeert Uytterhoeven 441077365a9SGeert Uytterhoeven /* MOD_SEL2 */ 442077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, 443077365a9SGeert Uytterhoeven FN_SEL_SCIF0_4, 444077365a9SGeert Uytterhoeven FN_SEL_SCIF_0, FN_SEL_SCIF_1, 445077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 446077365a9SGeert Uytterhoeven FN_SEL_CAN0_4, FN_SEL_CAN0_5, 447077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, 448077365a9SGeert Uytterhoeven FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, 449077365a9SGeert Uytterhoeven FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 450077365a9SGeert Uytterhoeven FN_SEL_ADG_0, FN_SEL_ADG_1, 451077365a9SGeert Uytterhoeven FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4, 452077365a9SGeert Uytterhoeven FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 453077365a9SGeert Uytterhoeven FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, 454077365a9SGeert Uytterhoeven FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 455077365a9SGeert Uytterhoeven FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 456077365a9SGeert Uytterhoeven FN_SEL_SIM_0, FN_SEL_SIM_1, 457077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, 458077365a9SGeert Uytterhoeven 459077365a9SGeert Uytterhoeven /* MOD_SEL3 */ 460077365a9SGeert Uytterhoeven FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, 461077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, 462077365a9SGeert Uytterhoeven FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 463077365a9SGeert Uytterhoeven FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 464077365a9SGeert Uytterhoeven FN_SEL_I2C4_0, FN_SEL_I2C4_1, FN_SEL_I2C4_2, 465077365a9SGeert Uytterhoeven FN_SEL_I2C3_0, FN_SEL_I2C3_1, FN_SEL_I2C3_2, FN_SEL_I2C3_3, 466077365a9SGeert Uytterhoeven FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, 467077365a9SGeert Uytterhoeven FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 468077365a9SGeert Uytterhoeven FN_SEL_MMC_0, FN_SEL_MMC_1, 469077365a9SGeert Uytterhoeven FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, 470077365a9SGeert Uytterhoeven FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, 471077365a9SGeert Uytterhoeven FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3, 472077365a9SGeert Uytterhoeven FN_SEL_I2C1_4, 473077365a9SGeert Uytterhoeven FN_SEL_I2C0_0, FN_SEL_I2C0_1, FN_SEL_I2C0_2, 474077365a9SGeert Uytterhoeven 475077365a9SGeert Uytterhoeven /* MOD_SEL4 */ 476077365a9SGeert Uytterhoeven FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, 477077365a9SGeert Uytterhoeven FN_SEL_SOF1_4, 478077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 479077365a9SGeert Uytterhoeven FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 480077365a9SGeert Uytterhoeven FN_SEL_RAD_0, FN_SEL_RAD_1, 481077365a9SGeert Uytterhoeven FN_SEL_RCN_0, FN_SEL_RCN_1, 482077365a9SGeert Uytterhoeven FN_SEL_RSP_0, FN_SEL_RSP_1, 483077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3, 484077365a9SGeert Uytterhoeven FN_SEL_SCIF2_4, 485077365a9SGeert Uytterhoeven FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3, 486077365a9SGeert Uytterhoeven FN_SEL_SOF2_4, 487077365a9SGeert Uytterhoeven FN_SEL_SSI1_0, FN_SEL_SSI1_1, 488077365a9SGeert Uytterhoeven FN_SEL_SSI0_0, FN_SEL_SSI0_1, 489077365a9SGeert Uytterhoeven FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 490077365a9SGeert Uytterhoeven PINMUX_FUNCTION_END, 491077365a9SGeert Uytterhoeven 492077365a9SGeert Uytterhoeven PINMUX_MARK_BEGIN, 493077365a9SGeert Uytterhoeven 494077365a9SGeert Uytterhoeven EX_CS0_N_MARK, RD_N_MARK, 495077365a9SGeert Uytterhoeven 496077365a9SGeert Uytterhoeven AUDIO_CLKA_MARK, 497077365a9SGeert Uytterhoeven 498077365a9SGeert Uytterhoeven VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, 499077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 500077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 501077365a9SGeert Uytterhoeven 502077365a9SGeert Uytterhoeven SD1_CLK_MARK, 503077365a9SGeert Uytterhoeven 504077365a9SGeert Uytterhoeven USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK, 505077365a9SGeert Uytterhoeven DU0_DOTCLKIN_MARK, 506077365a9SGeert Uytterhoeven 507077365a9SGeert Uytterhoeven /* IPSR0 */ 508077365a9SGeert Uytterhoeven D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK, 509077365a9SGeert Uytterhoeven D6_MARK, D7_MARK, D8_MARK, 510077365a9SGeert Uytterhoeven D9_MARK, D10_MARK, D11_MARK, D12_MARK, D13_MARK, D14_MARK, D15_MARK, 511077365a9SGeert Uytterhoeven A0_MARK, ATAWR0_N_C_MARK, MSIOF0_SCK_B_MARK, I2C0_SCL_C_MARK, 512077365a9SGeert Uytterhoeven PWM2_B_MARK, 513077365a9SGeert Uytterhoeven A1_MARK, MSIOF0_SYNC_B_MARK, A2_MARK, MSIOF0_SS1_B_MARK, 514077365a9SGeert Uytterhoeven A3_MARK, MSIOF0_SS2_B_MARK, A4_MARK, MSIOF0_TXD_B_MARK, 515077365a9SGeert Uytterhoeven A5_MARK, MSIOF0_RXD_B_MARK, A6_MARK, MSIOF1_SCK_MARK, 516077365a9SGeert Uytterhoeven 517077365a9SGeert Uytterhoeven /* IPSR1 */ 518077365a9SGeert Uytterhoeven A7_MARK, MSIOF1_SYNC_MARK, A8_MARK, MSIOF1_SS1_MARK, I2C0_SCL_MARK, 519077365a9SGeert Uytterhoeven A9_MARK, MSIOF1_SS2_MARK, I2C0_SDA_MARK, 520077365a9SGeert Uytterhoeven A10_MARK, MSIOF1_TXD_MARK, MSIOF1_TXD_D_MARK, 521077365a9SGeert Uytterhoeven A11_MARK, MSIOF1_RXD_MARK, I2C3_SCL_D_MARK, MSIOF1_RXD_D_MARK, 522077365a9SGeert Uytterhoeven A12_MARK, FMCLK_MARK, I2C3_SDA_D_MARK, MSIOF1_SCK_D_MARK, 523077365a9SGeert Uytterhoeven A13_MARK, ATAG0_N_C_MARK, BPFCLK_MARK, MSIOF1_SS1_D_MARK, 524077365a9SGeert Uytterhoeven A14_MARK, ATADIR0_N_C_MARK, FMIN_MARK, FMIN_C_MARK, MSIOF1_SYNC_D_MARK, 525077365a9SGeert Uytterhoeven A15_MARK, BPFCLK_C_MARK, 526077365a9SGeert Uytterhoeven A16_MARK, DREQ2_B_MARK, FMCLK_C_MARK, SCIFA1_SCK_B_MARK, 527077365a9SGeert Uytterhoeven A17_MARK, DACK2_B_MARK, I2C0_SDA_C_MARK, 528077365a9SGeert Uytterhoeven A18_MARK, DREQ1_MARK, SCIFA1_RXD_C_MARK, SCIFB1_RXD_C_MARK, 529077365a9SGeert Uytterhoeven 530077365a9SGeert Uytterhoeven /* IPSR2 */ 531077365a9SGeert Uytterhoeven A19_MARK, DACK1_MARK, SCIFA1_TXD_C_MARK, 532077365a9SGeert Uytterhoeven SCIFB1_TXD_C_MARK, SCIFB1_SCK_B_MARK, 533077365a9SGeert Uytterhoeven A20_MARK, SPCLK_MARK, 534077365a9SGeert Uytterhoeven A21_MARK, ATAWR0_N_B_MARK, MOSI_IO0_MARK, 535077365a9SGeert Uytterhoeven A22_MARK, MISO_IO1_MARK, FMCLK_B_MARK, TX0_MARK, SCIFA0_TXD_MARK, 536077365a9SGeert Uytterhoeven A23_MARK, IO2_MARK, BPFCLK_B_MARK, RX0_MARK, SCIFA0_RXD_MARK, 537077365a9SGeert Uytterhoeven A24_MARK, DREQ2_MARK, IO3_MARK, TX1_MARK, SCIFA1_TXD_MARK, 538077365a9SGeert Uytterhoeven A25_MARK, DACK2_MARK, SSL_MARK, DREQ1_C_MARK, 539077365a9SGeert Uytterhoeven RX1_MARK, SCIFA1_RXD_MARK, 540077365a9SGeert Uytterhoeven CS0_N_MARK, ATAG0_N_B_MARK, I2C1_SCL_MARK, 541077365a9SGeert Uytterhoeven CS1_N_A26_MARK, ATADIR0_N_B_MARK, I2C1_SDA_MARK, 542077365a9SGeert Uytterhoeven EX_CS1_N_MARK, MSIOF2_SCK_MARK, 543077365a9SGeert Uytterhoeven EX_CS2_N_MARK, ATAWR0_N_MARK, MSIOF2_SYNC_MARK, 544077365a9SGeert Uytterhoeven EX_CS3_N_MARK, ATADIR0_N_MARK, MSIOF2_TXD_MARK, 545077365a9SGeert Uytterhoeven ATAG0_N_MARK, EX_WAIT1_MARK, 546077365a9SGeert Uytterhoeven 547077365a9SGeert Uytterhoeven /* IPSR3 */ 548077365a9SGeert Uytterhoeven EX_CS4_N_MARK, ATARD0_N_MARK, MSIOF2_RXD_MARK, EX_WAIT2_MARK, 549077365a9SGeert Uytterhoeven EX_CS5_N_MARK, ATACS00_N_MARK, MSIOF2_SS1_MARK, HRX1_B_MARK, 550077365a9SGeert Uytterhoeven SCIFB1_RXD_B_MARK, PWM1_MARK, TPU_TO1_MARK, 551077365a9SGeert Uytterhoeven BS_N_MARK, ATACS10_N_MARK, MSIOF2_SS2_MARK, HTX1_B_MARK, 552077365a9SGeert Uytterhoeven SCIFB1_TXD_B_MARK, PWM2_MARK, TPU_TO2_MARK, 553077365a9SGeert Uytterhoeven RD_WR_N_MARK, HRX2_B_MARK, FMIN_B_MARK, 554077365a9SGeert Uytterhoeven SCIFB0_RXD_B_MARK, DREQ1_D_MARK, 555077365a9SGeert Uytterhoeven WE0_N_MARK, HCTS2_N_B_MARK, SCIFB0_TXD_B_MARK, 556077365a9SGeert Uytterhoeven WE1_N_MARK, ATARD0_N_B_MARK, HTX2_B_MARK, SCIFB0_RTS_N_B_MARK, 557077365a9SGeert Uytterhoeven EX_WAIT0_MARK, HRTS2_N_B_MARK, SCIFB0_CTS_N_B_MARK, 558077365a9SGeert Uytterhoeven DREQ0_MARK, PWM3_MARK, TPU_TO3_MARK, 559077365a9SGeert Uytterhoeven DACK0_MARK, DRACK0_MARK, REMOCON_MARK, 560077365a9SGeert Uytterhoeven SPEEDIN_MARK, HSCK0_C_MARK, HSCK2_C_MARK, SCIFB0_SCK_B_MARK, 561077365a9SGeert Uytterhoeven SCIFB2_SCK_B_MARK, DREQ2_C_MARK, HTX2_D_MARK, 562077365a9SGeert Uytterhoeven SSI_SCK0129_MARK, HRX0_C_MARK, HRX2_C_MARK, 563077365a9SGeert Uytterhoeven SCIFB0_RXD_C_MARK, SCIFB2_RXD_C_MARK, 564077365a9SGeert Uytterhoeven SSI_WS0129_MARK, HTX0_C_MARK, HTX2_C_MARK, 565077365a9SGeert Uytterhoeven SCIFB0_TXD_C_MARK, SCIFB2_TXD_C_MARK, 566077365a9SGeert Uytterhoeven 567077365a9SGeert Uytterhoeven /* IPSR4 */ 568077365a9SGeert Uytterhoeven SSI_SDATA0_MARK, I2C0_SCL_B_MARK, IIC0_SCL_B_MARK, MSIOF2_SCK_C_MARK, 569077365a9SGeert Uytterhoeven SSI_SCK1_MARK, I2C0_SDA_B_MARK, IIC0_SDA_B_MARK, 570077365a9SGeert Uytterhoeven MSIOF2_SYNC_C_MARK, GLO_I0_D_MARK, 571077365a9SGeert Uytterhoeven SSI_WS1_MARK, I2C1_SCL_B_MARK, IIC1_SCL_B_MARK, 572077365a9SGeert Uytterhoeven MSIOF2_TXD_C_MARK, GLO_I1_D_MARK, 573077365a9SGeert Uytterhoeven SSI_SDATA1_MARK, I2C1_SDA_B_MARK, IIC1_SDA_B_MARK, MSIOF2_RXD_C_MARK, 574077365a9SGeert Uytterhoeven SSI_SCK2_MARK, I2C2_SCL_MARK, GPS_CLK_B_MARK, GLO_Q0_D_MARK, 575077365a9SGeert Uytterhoeven HSCK1_E_MARK, 576077365a9SGeert Uytterhoeven SSI_WS2_MARK, I2C2_SDA_MARK, GPS_SIGN_B_MARK, RX2_E_MARK, 577077365a9SGeert Uytterhoeven GLO_Q1_D_MARK, HCTS1_N_E_MARK, 578077365a9SGeert Uytterhoeven SSI_SDATA2_MARK, GPS_MAG_B_MARK, TX2_E_MARK, HRTS1_N_E_MARK, 579077365a9SGeert Uytterhoeven SSI_SCK34_MARK, SSI_WS34_MARK, SSI_SDATA3_MARK, 580077365a9SGeert Uytterhoeven SSI_SCK4_MARK, GLO_SS_D_MARK, 581077365a9SGeert Uytterhoeven SSI_WS4_MARK, GLO_RFON_D_MARK, 582077365a9SGeert Uytterhoeven SSI_SDATA4_MARK, MSIOF2_SCK_D_MARK, 583077365a9SGeert Uytterhoeven SSI_SCK5_MARK, MSIOF1_SCK_C_MARK, TS_SDATA0_MARK, GLO_I0_MARK, 584077365a9SGeert Uytterhoeven MSIOF2_SYNC_D_MARK, VI1_R2_B_MARK, 585077365a9SGeert Uytterhoeven 586077365a9SGeert Uytterhoeven /* IPSR5 */ 587077365a9SGeert Uytterhoeven SSI_WS5_MARK, MSIOF1_SYNC_C_MARK, TS_SCK0_MARK, GLO_I1_MARK, 588077365a9SGeert Uytterhoeven MSIOF2_TXD_D_MARK, VI1_R3_B_MARK, 589077365a9SGeert Uytterhoeven SSI_SDATA5_MARK, MSIOF1_TXD_C_MARK, TS_SDEN0_MARK, GLO_Q0_MARK, 590077365a9SGeert Uytterhoeven MSIOF2_SS1_D_MARK, VI1_R4_B_MARK, 591077365a9SGeert Uytterhoeven SSI_SCK6_MARK, MSIOF1_RXD_C_MARK, TS_SPSYNC0_MARK, GLO_Q1_MARK, 592077365a9SGeert Uytterhoeven MSIOF2_RXD_D_MARK, VI1_R5_B_MARK, 593077365a9SGeert Uytterhoeven SSI_WS6_MARK, GLO_SCLK_MARK, MSIOF2_SS2_D_MARK, VI1_R6_B_MARK, 594077365a9SGeert Uytterhoeven SSI_SDATA6_MARK, STP_IVCXO27_0_B_MARK, GLO_SDATA_MARK, VI1_R7_B_MARK, 595077365a9SGeert Uytterhoeven SSI_SCK78_MARK, STP_ISCLK_0_B_MARK, GLO_SS_MARK, 596077365a9SGeert Uytterhoeven SSI_WS78_MARK, TX0_D_MARK, STP_ISD_0_B_MARK, GLO_RFON_MARK, 597077365a9SGeert Uytterhoeven SSI_SDATA7_MARK, RX0_D_MARK, STP_ISEN_0_B_MARK, 598077365a9SGeert Uytterhoeven SSI_SDATA8_MARK, TX1_D_MARK, STP_ISSYNC_0_B_MARK, 599077365a9SGeert Uytterhoeven SSI_SCK9_MARK, RX1_D_MARK, GLO_SCLK_D_MARK, 600077365a9SGeert Uytterhoeven SSI_WS9_MARK, TX3_D_MARK, CAN0_TX_D_MARK, GLO_SDATA_D_MARK, 601077365a9SGeert Uytterhoeven SSI_SDATA9_MARK, RX3_D_MARK, CAN0_RX_D_MARK, 602077365a9SGeert Uytterhoeven 603077365a9SGeert Uytterhoeven /* IPSR6 */ 604077365a9SGeert Uytterhoeven AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK, 605077365a9SGeert Uytterhoeven SCIF_CLK_MARK, DVC_MUTE_MARK, BPFCLK_E_MARK, 606077365a9SGeert Uytterhoeven AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK, 607077365a9SGeert Uytterhoeven SCIFA2_RXD_MARK, FMIN_E_MARK, 608077365a9SGeert Uytterhoeven AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK, 60930d36999SGeert Uytterhoeven IRQ0_MARK, SCIFB1_RXD_D_MARK, 61030d36999SGeert Uytterhoeven IRQ1_MARK, SCIFB1_SCK_C_MARK, 61130d36999SGeert Uytterhoeven IRQ2_MARK, SCIFB1_TXD_D_MARK, 61230d36999SGeert Uytterhoeven IRQ3_MARK, I2C4_SCL_C_MARK, MSIOF2_TXD_E_MARK, 613077365a9SGeert Uytterhoeven IRQ4_MARK, HRX1_C_MARK, I2C4_SDA_C_MARK, 61430d36999SGeert Uytterhoeven MSIOF2_RXD_E_MARK, 615077365a9SGeert Uytterhoeven IRQ5_MARK, HTX1_C_MARK, I2C1_SCL_E_MARK, MSIOF2_SCK_E_MARK, 616077365a9SGeert Uytterhoeven IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK, 617077365a9SGeert Uytterhoeven I2C1_SDA_E_MARK, MSIOF2_SYNC_E_MARK, 618077365a9SGeert Uytterhoeven IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK, 619077365a9SGeert Uytterhoeven GPS_CLK_C_MARK, GPS_CLK_D_MARK, 620077365a9SGeert Uytterhoeven IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK, 621077365a9SGeert Uytterhoeven GPS_SIGN_C_MARK, GPS_SIGN_D_MARK, 622077365a9SGeert Uytterhoeven 623077365a9SGeert Uytterhoeven /* IPSR7 */ 624077365a9SGeert Uytterhoeven IRQ9_MARK, DU1_DOTCLKIN_B_MARK, CAN_CLK_D_MARK, GPS_MAG_C_MARK, 625077365a9SGeert Uytterhoeven SCIF_CLK_B_MARK, GPS_MAG_D_MARK, 626077365a9SGeert Uytterhoeven DU1_DR0_MARK, LCDOUT0_MARK, VI1_DATA0_B_MARK, TX0_B_MARK, 627077365a9SGeert Uytterhoeven SCIFA0_TXD_B_MARK, MSIOF2_SCK_B_MARK, 628077365a9SGeert Uytterhoeven DU1_DR1_MARK, LCDOUT1_MARK, VI1_DATA1_B_MARK, RX0_B_MARK, 629077365a9SGeert Uytterhoeven SCIFA0_RXD_B_MARK, MSIOF2_SYNC_B_MARK, 630077365a9SGeert Uytterhoeven DU1_DR2_MARK, LCDOUT2_MARK, SSI_SCK0129_B_MARK, 631077365a9SGeert Uytterhoeven DU1_DR3_MARK, LCDOUT3_MARK, SSI_WS0129_B_MARK, 632077365a9SGeert Uytterhoeven DU1_DR4_MARK, LCDOUT4_MARK, SSI_SDATA0_B_MARK, 633077365a9SGeert Uytterhoeven DU1_DR5_MARK, LCDOUT5_MARK, SSI_SCK1_B_MARK, 634077365a9SGeert Uytterhoeven DU1_DR6_MARK, LCDOUT6_MARK, SSI_WS1_B_MARK, 635077365a9SGeert Uytterhoeven DU1_DR7_MARK, LCDOUT7_MARK, SSI_SDATA1_B_MARK, 636077365a9SGeert Uytterhoeven DU1_DG0_MARK, LCDOUT8_MARK, VI1_DATA2_B_MARK, TX1_B_MARK, 637077365a9SGeert Uytterhoeven SCIFA1_TXD_B_MARK, MSIOF2_SS1_B_MARK, 638077365a9SGeert Uytterhoeven DU1_DG1_MARK, LCDOUT9_MARK, VI1_DATA3_B_MARK, RX1_B_MARK, 639077365a9SGeert Uytterhoeven SCIFA1_RXD_B_MARK, MSIOF2_SS2_B_MARK, 640077365a9SGeert Uytterhoeven DU1_DG2_MARK, LCDOUT10_MARK, VI1_DATA4_B_MARK, SCIF1_SCK_B_MARK, 641077365a9SGeert Uytterhoeven SCIFA1_SCK_MARK, SSI_SCK78_B_MARK, 642077365a9SGeert Uytterhoeven 643077365a9SGeert Uytterhoeven /* IPSR8 */ 644077365a9SGeert Uytterhoeven DU1_DG3_MARK, LCDOUT11_MARK, VI1_DATA5_B_MARK, SSI_WS78_B_MARK, 645077365a9SGeert Uytterhoeven DU1_DG4_MARK, LCDOUT12_MARK, VI1_DATA6_B_MARK, HRX0_B_MARK, 646077365a9SGeert Uytterhoeven SCIFB2_RXD_B_MARK, SSI_SDATA7_B_MARK, 647077365a9SGeert Uytterhoeven DU1_DG5_MARK, LCDOUT13_MARK, VI1_DATA7_B_MARK, HCTS0_N_B_MARK, 648077365a9SGeert Uytterhoeven SCIFB2_TXD_B_MARK, SSI_SDATA8_B_MARK, 649077365a9SGeert Uytterhoeven DU1_DG6_MARK, LCDOUT14_MARK, HRTS0_N_B_MARK, 650077365a9SGeert Uytterhoeven SCIFB2_CTS_N_B_MARK, SSI_SCK9_B_MARK, 651077365a9SGeert Uytterhoeven DU1_DG7_MARK, LCDOUT15_MARK, HTX0_B_MARK, 652077365a9SGeert Uytterhoeven SCIFB2_RTS_N_B_MARK, SSI_WS9_B_MARK, 653077365a9SGeert Uytterhoeven DU1_DB0_MARK, LCDOUT16_MARK, VI1_CLK_B_MARK, TX2_B_MARK, 654077365a9SGeert Uytterhoeven SCIFA2_TXD_B_MARK, MSIOF2_TXD_B_MARK, 655077365a9SGeert Uytterhoeven DU1_DB1_MARK, LCDOUT17_MARK, VI1_HSYNC_N_B_MARK, RX2_B_MARK, 656077365a9SGeert Uytterhoeven SCIFA2_RXD_B_MARK, MSIOF2_RXD_B_MARK, 657077365a9SGeert Uytterhoeven DU1_DB2_MARK, LCDOUT18_MARK, VI1_VSYNC_N_B_MARK, SCIF2_SCK_B_MARK, 658077365a9SGeert Uytterhoeven SCIFA2_SCK_MARK, SSI_SDATA9_B_MARK, 659077365a9SGeert Uytterhoeven DU1_DB3_MARK, LCDOUT19_MARK, VI1_CLKENB_B_MARK, 660077365a9SGeert Uytterhoeven DU1_DB4_MARK, LCDOUT20_MARK, VI1_FIELD_B_MARK, CAN1_RX_MARK, 661077365a9SGeert Uytterhoeven DU1_DB5_MARK, LCDOUT21_MARK, TX3_MARK, SCIFA3_TXD_MARK, CAN1_TX_MARK, 662077365a9SGeert Uytterhoeven 663077365a9SGeert Uytterhoeven /* IPSR9 */ 664077365a9SGeert Uytterhoeven DU1_DB6_MARK, LCDOUT22_MARK, I2C3_SCL_C_MARK, RX3_MARK, SCIFA3_RXD_MARK, 665077365a9SGeert Uytterhoeven DU1_DB7_MARK, LCDOUT23_MARK, I2C3_SDA_C_MARK, 666077365a9SGeert Uytterhoeven SCIF3_SCK_MARK, SCIFA3_SCK_MARK, 667077365a9SGeert Uytterhoeven DU1_DOTCLKIN_MARK, QSTVA_QVS_MARK, 668077365a9SGeert Uytterhoeven DU1_DOTCLKOUT0_MARK, QCLK_MARK, 669077365a9SGeert Uytterhoeven DU1_DOTCLKOUT1_MARK, QSTVB_QVE_MARK, CAN0_TX_MARK, 670077365a9SGeert Uytterhoeven TX3_B_MARK, I2C2_SCL_B_MARK, PWM4_MARK, 671077365a9SGeert Uytterhoeven DU1_EXHSYNC_DU1_HSYNC_MARK, QSTH_QHS_MARK, 672077365a9SGeert Uytterhoeven DU1_EXVSYNC_DU1_VSYNC_MARK, QSTB_QHE_MARK, 673077365a9SGeert Uytterhoeven DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, 674077365a9SGeert Uytterhoeven CAN0_RX_MARK, RX3_B_MARK, I2C2_SDA_B_MARK, 675077365a9SGeert Uytterhoeven DU1_DISP_MARK, QPOLA_MARK, 676077365a9SGeert Uytterhoeven DU1_CDE_MARK, QPOLB_MARK, PWM4_B_MARK, 677077365a9SGeert Uytterhoeven VI0_CLKENB_MARK, TX4_MARK, SCIFA4_TXD_MARK, TS_SDATA0_D_MARK, 678077365a9SGeert Uytterhoeven VI0_FIELD_MARK, RX4_MARK, SCIFA4_RXD_MARK, TS_SCK0_D_MARK, 679077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, TX5_MARK, SCIFA5_TXD_MARK, TS_SDEN0_D_MARK, 680077365a9SGeert Uytterhoeven VI0_VSYNC_N_MARK, RX5_MARK, SCIFA5_RXD_MARK, TS_SPSYNC0_D_MARK, 681077365a9SGeert Uytterhoeven VI0_DATA3_VI0_B3_MARK, SCIF3_SCK_B_MARK, SCIFA3_SCK_B_MARK, 682077365a9SGeert Uytterhoeven VI0_G0_MARK, IIC1_SCL_MARK, STP_IVCXO27_0_C_MARK, I2C4_SCL_MARK, 683077365a9SGeert Uytterhoeven HCTS2_N_MARK, SCIFB2_CTS_N_MARK, ATAWR1_N_MARK, 684077365a9SGeert Uytterhoeven 685077365a9SGeert Uytterhoeven /* IPSR10 */ 686077365a9SGeert Uytterhoeven VI0_G1_MARK, IIC1_SDA_MARK, STP_ISCLK_0_C_MARK, I2C4_SDA_MARK, 687077365a9SGeert Uytterhoeven HRTS2_N_MARK, SCIFB2_RTS_N_MARK, ATADIR1_N_MARK, 688077365a9SGeert Uytterhoeven VI0_G2_MARK, VI2_HSYNC_N_MARK, STP_ISD_0_C_MARK, I2C3_SCL_B_MARK, 689077365a9SGeert Uytterhoeven HSCK2_MARK, SCIFB2_SCK_MARK, ATARD1_N_MARK, 690077365a9SGeert Uytterhoeven VI0_G3_MARK, VI2_VSYNC_N_MARK, STP_ISEN_0_C_MARK, I2C3_SDA_B_MARK, 691077365a9SGeert Uytterhoeven HRX2_MARK, SCIFB2_RXD_MARK, ATACS01_N_MARK, 692077365a9SGeert Uytterhoeven VI0_G4_MARK, VI2_CLKENB_MARK, STP_ISSYNC_0_C_MARK, 693077365a9SGeert Uytterhoeven HTX2_MARK, SCIFB2_TXD_MARK, SCIFB0_SCK_D_MARK, 694077365a9SGeert Uytterhoeven VI0_G5_MARK, VI2_FIELD_MARK, STP_OPWM_0_C_MARK, FMCLK_D_MARK, 695077365a9SGeert Uytterhoeven CAN0_TX_E_MARK, HTX1_D_MARK, SCIFB0_TXD_D_MARK, 696077365a9SGeert Uytterhoeven VI0_G6_MARK, VI2_CLK_MARK, BPFCLK_D_MARK, 697077365a9SGeert Uytterhoeven VI0_G7_MARK, VI2_DATA0_MARK, FMIN_D_MARK, 698077365a9SGeert Uytterhoeven VI0_R0_MARK, VI2_DATA1_MARK, GLO_I0_B_MARK, 699077365a9SGeert Uytterhoeven TS_SDATA0_C_MARK, ATACS11_N_MARK, 700077365a9SGeert Uytterhoeven VI0_R1_MARK, VI2_DATA2_MARK, GLO_I1_B_MARK, 701077365a9SGeert Uytterhoeven TS_SCK0_C_MARK, ATAG1_N_MARK, 702077365a9SGeert Uytterhoeven VI0_R2_MARK, VI2_DATA3_MARK, GLO_Q0_B_MARK, TS_SDEN0_C_MARK, 703077365a9SGeert Uytterhoeven VI0_R3_MARK, VI2_DATA4_MARK, GLO_Q1_B_MARK, TS_SPSYNC0_C_MARK, 704077365a9SGeert Uytterhoeven VI0_R4_MARK, VI2_DATA5_MARK, GLO_SCLK_B_MARK, TX0_C_MARK, 705077365a9SGeert Uytterhoeven I2C1_SCL_D_MARK, 706077365a9SGeert Uytterhoeven 707077365a9SGeert Uytterhoeven /* IPSR11 */ 708077365a9SGeert Uytterhoeven VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, 709077365a9SGeert Uytterhoeven I2C1_SDA_D_MARK, 710077365a9SGeert Uytterhoeven VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, I2C4_SCL_B_MARK, 711077365a9SGeert Uytterhoeven VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK, 712077365a9SGeert Uytterhoeven I2C4_SDA_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK, 713077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK, 714077365a9SGeert Uytterhoeven TX4_B_MARK, SCIFA4_TXD_B_MARK, 715077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK, 716077365a9SGeert Uytterhoeven RX4_B_MARK, SCIFA4_RXD_B_MARK, 717077365a9SGeert Uytterhoeven VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK, 718077365a9SGeert Uytterhoeven VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK, 719077365a9SGeert Uytterhoeven VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK, 720077365a9SGeert Uytterhoeven VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK, 721077365a9SGeert Uytterhoeven VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK, 722077365a9SGeert Uytterhoeven VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK, 723077365a9SGeert Uytterhoeven VI1_DATA7_MARK, AVB_MDC_MARK, 724077365a9SGeert Uytterhoeven ETH_MDIO_MARK, AVB_RX_CLK_MARK, I2C2_SCL_C_MARK, 725077365a9SGeert Uytterhoeven ETH_CRS_DV_MARK, AVB_LINK_MARK, I2C2_SDA_C_MARK, 726077365a9SGeert Uytterhoeven 727077365a9SGeert Uytterhoeven /* IPSR12 */ 728077365a9SGeert Uytterhoeven ETH_RX_ER_MARK, AVB_CRS_MARK, I2C3_SCL_MARK, IIC0_SCL_MARK, 729077365a9SGeert Uytterhoeven ETH_RXD0_MARK, AVB_PHY_INT_MARK, I2C3_SDA_MARK, IIC0_SDA_MARK, 730077365a9SGeert Uytterhoeven ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK, 731077365a9SGeert Uytterhoeven I2C2_SCL_D_MARK, MSIOF1_RXD_E_MARK, 732077365a9SGeert Uytterhoeven ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK, 733077365a9SGeert Uytterhoeven I2C2_SDA_D_MARK, MSIOF1_SCK_E_MARK, 734077365a9SGeert Uytterhoeven ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK, 735077365a9SGeert Uytterhoeven CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK, 736077365a9SGeert Uytterhoeven ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK, 737077365a9SGeert Uytterhoeven CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK, 738077365a9SGeert Uytterhoeven ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK, 739077365a9SGeert Uytterhoeven ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK, 740077365a9SGeert Uytterhoeven ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK, 741077365a9SGeert Uytterhoeven ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK, 742077365a9SGeert Uytterhoeven STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK, 743077365a9SGeert Uytterhoeven ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK, 744077365a9SGeert Uytterhoeven STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK, 745077365a9SGeert Uytterhoeven ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK, 746077365a9SGeert Uytterhoeven 747077365a9SGeert Uytterhoeven /* IPSR13 */ 748077365a9SGeert Uytterhoeven STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK, 749077365a9SGeert Uytterhoeven ADICLK_B_MARK, MSIOF0_SS1_C_MARK, 750077365a9SGeert Uytterhoeven STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK, 751077365a9SGeert Uytterhoeven STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK, 752077365a9SGeert Uytterhoeven STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK, 753077365a9SGeert Uytterhoeven ADICHS2_B_MARK, MSIOF0_TXD_C_MARK, 754077365a9SGeert Uytterhoeven SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK, 755077365a9SGeert Uytterhoeven SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK, 756077365a9SGeert Uytterhoeven SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK, 757077365a9SGeert Uytterhoeven SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK, 758077365a9SGeert Uytterhoeven SCIFA5_TXD_B_MARK, TX3_C_MARK, 759077365a9SGeert Uytterhoeven SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK, 760077365a9SGeert Uytterhoeven SCIFA5_RXD_B_MARK, RX3_C_MARK, 761077365a9SGeert Uytterhoeven SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK, 762077365a9SGeert Uytterhoeven SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK, 763077365a9SGeert Uytterhoeven SD1_DATA3_MARK, IERX_B_MARK, 764077365a9SGeert Uytterhoeven SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, I2C1_SCL_C_MARK, 765077365a9SGeert Uytterhoeven 766077365a9SGeert Uytterhoeven /* IPSR14 */ 767077365a9SGeert Uytterhoeven SD1_WP_MARK, PWM1_B_MARK, I2C1_SDA_C_MARK, 768077365a9SGeert Uytterhoeven SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK, 769077365a9SGeert Uytterhoeven SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK, 770077365a9SGeert Uytterhoeven SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK, 771077365a9SGeert Uytterhoeven SD2_CD_MARK, MMC_D4_MARK, IIC1_SCL_C_MARK, TX5_B_MARK, 772077365a9SGeert Uytterhoeven SCIFA5_TXD_C_MARK, 773077365a9SGeert Uytterhoeven SD2_WP_MARK, MMC_D5_MARK, IIC1_SDA_C_MARK, RX5_B_MARK, 774077365a9SGeert Uytterhoeven SCIFA5_RXD_C_MARK, 775077365a9SGeert Uytterhoeven MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK, 776077365a9SGeert Uytterhoeven VI1_CLK_C_MARK, VI1_G0_B_MARK, 777077365a9SGeert Uytterhoeven MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK, 778077365a9SGeert Uytterhoeven VI1_CLKENB_C_MARK, VI1_G1_B_MARK, 779077365a9SGeert Uytterhoeven MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK, 780077365a9SGeert Uytterhoeven MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK, 781077365a9SGeert Uytterhoeven MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK, 782077365a9SGeert Uytterhoeven VI1_HSYNC_N_C_MARK, IIC0_SCL_C_MARK, VI1_G4_B_MARK, 783077365a9SGeert Uytterhoeven MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK, 784077365a9SGeert Uytterhoeven VI1_VSYNC_N_C_MARK, IIC0_SDA_C_MARK, VI1_G5_B_MARK, 785077365a9SGeert Uytterhoeven 786077365a9SGeert Uytterhoeven /* IPSR15 */ 787077365a9SGeert Uytterhoeven SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK, 788077365a9SGeert Uytterhoeven SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK, 789077365a9SGeert Uytterhoeven SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK, 790077365a9SGeert Uytterhoeven GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK, 791077365a9SGeert Uytterhoeven PWM5_B_MARK, SCIFA3_TXD_C_MARK, 792077365a9SGeert Uytterhoeven GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK, 793077365a9SGeert Uytterhoeven VI1_G6_B_MARK, SCIFA3_RXD_C_MARK, 794077365a9SGeert Uytterhoeven GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK, 795077365a9SGeert Uytterhoeven VI1_G7_B_MARK, SCIFA3_SCK_C_MARK, 796077365a9SGeert Uytterhoeven HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK, 797077365a9SGeert Uytterhoeven TCLK1_MARK, VI1_DATA1_C_MARK, 798077365a9SGeert Uytterhoeven HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK, 799077365a9SGeert Uytterhoeven HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK, 800077365a9SGeert Uytterhoeven TCLK2_MARK, VI1_DATA3_C_MARK, 801077365a9SGeert Uytterhoeven HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK, 802077365a9SGeert Uytterhoeven CAN0_RX_B_MARK, VI1_DATA4_C_MARK, 803077365a9SGeert Uytterhoeven HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK, 804077365a9SGeert Uytterhoeven CAN0_TX_B_MARK, VI1_DATA5_C_MARK, 805077365a9SGeert Uytterhoeven 806077365a9SGeert Uytterhoeven /* IPSR16 */ 807077365a9SGeert Uytterhoeven HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK, 808077365a9SGeert Uytterhoeven GLO_SDATA_C_MARK, VI1_DATA6_C_MARK, 809077365a9SGeert Uytterhoeven HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK, 810077365a9SGeert Uytterhoeven GLO_SS_C_MARK, VI1_DATA7_C_MARK, 811077365a9SGeert Uytterhoeven HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CLK_MARK, GLO_RFON_C_MARK, 812077365a9SGeert Uytterhoeven HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK, 813077365a9SGeert Uytterhoeven HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK, 814077365a9SGeert Uytterhoeven PINMUX_MARK_END, 815077365a9SGeert Uytterhoeven }; 816077365a9SGeert Uytterhoeven 817077365a9SGeert Uytterhoeven static const u16 pinmux_data[] = { 818077365a9SGeert Uytterhoeven PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ 819077365a9SGeert Uytterhoeven 820077365a9SGeert Uytterhoeven PINMUX_SINGLE(EX_CS0_N), 821077365a9SGeert Uytterhoeven PINMUX_SINGLE(RD_N), 822077365a9SGeert Uytterhoeven PINMUX_SINGLE(AUDIO_CLKA), 823077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_CLK), 824077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA0_VI0_B0), 825077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA1_VI0_B1), 826077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA2_VI0_B2), 827077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA4_VI0_B4), 828077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA5_VI0_B5), 829077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA6_VI0_B6), 830077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI0_DATA7_VI0_B7), 831077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_PWEN), 832077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_OVC), 833077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB1_PWEN), 834077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB1_OVC), 835077365a9SGeert Uytterhoeven PINMUX_SINGLE(DU0_DOTCLKIN), 836077365a9SGeert Uytterhoeven PINMUX_SINGLE(SD1_CLK), 837077365a9SGeert Uytterhoeven 838077365a9SGeert Uytterhoeven /* IPSR0 */ 839077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_0, D0), 840077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_1, D1), 841077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_2, D2), 842077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_3, D3), 843077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_4, D4), 844077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_5, D5), 845077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_6, D6), 846077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_7, D7), 847077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_8, D8), 848077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_9, D9), 849077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_10, D10), 850077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11, D11), 851077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_12, D12), 852077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_13, D13), 853077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_14, D14), 854077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15, D15), 855077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_18_16, A0), 856077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_18_16, ATAWR0_N_C, SEL_LBS_2), 857077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_18_16, MSIOF0_SCK_B, SEL_SOF0_1), 858077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_18_16, I2C0_SCL_C, SEL_I2C0_2), 859077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_18_16, PWM2_B), 860077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_20_19, A1), 861077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_20_19, MSIOF0_SYNC_B, SEL_SOF0_1), 862077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_22_21, A2), 863077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_21, MSIOF0_SS1_B, SEL_SOF0_1), 864077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_24_23, A3), 865077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_24_23, MSIOF0_SS2_B, SEL_SOF0_1), 866077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_26_25, A4), 867077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_25, MSIOF0_TXD_B, SEL_SOF0_1), 868077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_28_27, A5), 869077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_28_27, MSIOF0_RXD_B, SEL_SOF0_1), 870077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_30_29, A6), 871077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_30_29, MSIOF1_SCK, SEL_SOF1_0), 872077365a9SGeert Uytterhoeven 873077365a9SGeert Uytterhoeven /* IPSR1 */ 874077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_1_0, A7), 875077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_1_0, MSIOF1_SYNC, SEL_SOF1_0), 876077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_2, A8), 877077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_2, MSIOF1_SS1, SEL_SOF1_0), 878077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_2, I2C0_SCL, SEL_I2C0_0), 879077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_5_4, A9), 880077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_5_4, MSIOF1_SS2, SEL_SOF1_0), 881077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_5_4, I2C0_SDA, SEL_I2C0_0), 882077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_6, A10), 883077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_6, MSIOF1_TXD, SEL_SOF1_0), 884077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_6, MSIOF1_TXD_D, SEL_SOF1_3), 885077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_10_8, A11), 886077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_10_8, MSIOF1_RXD, SEL_SOF1_0), 887077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_10_8, I2C3_SCL_D, SEL_I2C3_3), 888077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_10_8, MSIOF1_RXD_D, SEL_SOF1_3), 889077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_13_11, A12), 890077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_13_11, FMCLK, SEL_FM_0), 891077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_13_11, I2C3_SDA_D, SEL_I2C3_3), 892077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_13_11, MSIOF1_SCK_D, SEL_SOF1_3), 893077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_16_14, A13), 894077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_16_14, ATAG0_N_C, SEL_LBS_2), 895077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_16_14, BPFCLK, SEL_FM_0), 896077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_16_14, MSIOF1_SS1_D, SEL_SOF1_3), 897077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_17, A14), 898077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_17, ATADIR0_N_C, SEL_LBS_2), 899077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_17, FMIN, SEL_FM_0), 900077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_17, FMIN_C, SEL_FM_2), 901077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_17, MSIOF1_SYNC_D, SEL_SOF1_3), 902077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_22_20, A15), 903077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_22_20, BPFCLK_C, SEL_FM_2), 904077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_25_23, A16), 905077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_23, DREQ2_B, SEL_LBS_1), 906077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_23, FMCLK_C, SEL_FM_2), 907077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_23, SCIFA1_SCK_B, SEL_SCIFA1_1), 908077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_28_26, A17), 909077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_28_26, DACK2_B, SEL_LBS_1), 910077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_28_26, I2C0_SDA_C, SEL_I2C0_2), 911077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_29, A18), 912077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_31_29, DREQ1, SEL_LBS_0), 913077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_31_29, SCIFA1_RXD_C, SEL_SCIFA1_2), 914077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_31_29, SCIFB1_RXD_C, SEL_SCIFB1_2), 915077365a9SGeert Uytterhoeven 916077365a9SGeert Uytterhoeven /* IPSR2 */ 917077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_2_0, A19), 918077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_2_0, DACK1), 919077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_2_0, SCIFA1_TXD_C, SEL_SCIFA1_2), 920077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_2_0, SCIFB1_TXD_C, SEL_SCIFB1_2), 921077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_2_0, SCIFB1_SCK_B, SEL_SCIFB1_1), 922077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_2_0, A20), 923077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_4_3, SPCLK, SEL_QSP_0), 924077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_6_5, A21), 925077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_6_5, ATAWR0_N_B, SEL_LBS_1), 926077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_6_5, MOSI_IO0, SEL_QSP_0), 927077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_9_7, A22), 928077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_9_7, MISO_IO1, SEL_QSP_0), 929077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_9_7, FMCLK_B, SEL_FM_1), 930077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_9_7, TX0, SEL_SCIF0_0), 931077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_9_7, SCIFA0_TXD, SEL_SCFA_0), 932077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_12_10, A23), 933077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_12_10, IO2, SEL_QSP_0), 934077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_12_10, BPFCLK_B, SEL_FM_1), 935077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_12_10, RX0, SEL_SCIF0_0), 936077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_12_10, SCIFA0_RXD, SEL_SCFA_0), 937077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_13, A24), 938077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_13, DREQ2, SEL_LBS_0), 939077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_13, IO3, SEL_QSP_0), 940077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_13, TX1, SEL_SCIF1_0), 941077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_13, SCIFA1_TXD, SEL_SCIFA1_0), 942077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_18_16, A25), 943077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_18_16, DACK2, SEL_LBS_0), 944077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_18_16, SSL, SEL_QSP_0), 945077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_18_16, DREQ1_C, SEL_LBS_2), 946077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_18_16, RX1, SEL_SCIF1_0), 947077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_18_16, SCIFA1_RXD, SEL_SCIFA1_0), 948077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_20_19, CS0_N), 949077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_20_19, ATAG0_N_B, SEL_LBS_1), 950077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_20_19, I2C1_SCL, SEL_I2C1_0), 951077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_22_21, CS1_N_A26), 952077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_22_21, ATADIR0_N_B, SEL_LBS_1), 953077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_22_21, I2C1_SDA, SEL_I2C1_0), 954077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_24_23, EX_CS1_N), 955077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_24_23, MSIOF2_SCK, SEL_SOF2_0), 956077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_26_25, EX_CS2_N), 957077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_26_25, ATAWR0_N, SEL_LBS_0), 958077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_26_25, MSIOF2_SYNC, SEL_SOF2_0), 959077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_29_27, EX_CS3_N), 960077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_29_27, ATADIR0_N, SEL_LBS_0), 961077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_29_27, MSIOF2_TXD, SEL_SOF2_0), 962077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_29_27, ATAG0_N, SEL_LBS_0), 963077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_29_27, EX_WAIT1), 964077365a9SGeert Uytterhoeven 965077365a9SGeert Uytterhoeven /* IPSR3 */ 966077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_2_0, EX_CS4_N), 967077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_2_0, ATARD0_N, SEL_LBS_0), 968077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_2_0, MSIOF2_RXD, SEL_SOF2_0), 969077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_2_0, EX_WAIT2), 970077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_5_3, EX_CS5_N), 971077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_5_3, ATACS00_N), 972077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_5_3, MSIOF2_SS1, SEL_SOF2_0), 973077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_5_3, HRX1_B, SEL_HSCIF1_1), 974077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_5_3, SCIFB1_RXD_B, SEL_SCIFB1_1), 975077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_5_3, PWM1), 976077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_5_3, TPU_TO1), 977077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_8_6, BS_N), 978077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_8_6, ATACS10_N), 979077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_8_6, MSIOF2_SS2, SEL_SOF2_0), 980077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_8_6, HTX1_B, SEL_HSCIF1_1), 981077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_8_6, SCIFB1_TXD_B, SEL_SCIFB1_1), 982077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_8_6, PWM2), 983077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_8_6, TPU_TO2), 984077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_9, RD_WR_N), 985077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_9, HRX2_B, SEL_HSCIF2_1), 986077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_9, FMIN_B, SEL_FM_1), 987077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_9, SCIFB0_RXD_B, SEL_SCIFB_1), 988077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_9, DREQ1_D, SEL_LBS_1), 989077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_13_12, WE0_N), 990077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_13_12, HCTS2_N_B, SEL_HSCIF2_1), 991077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_13_12, SCIFB0_TXD_B, SEL_SCIFB_1), 992077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_14, WE1_N), 993077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_15_14, ATARD0_N_B, SEL_LBS_1), 994077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_15_14, HTX2_B, SEL_HSCIF2_1), 995077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_15_14, SCIFB0_RTS_N_B, SEL_SCIFB_1), 996077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_17_16, EX_WAIT0), 997077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_17_16, HRTS2_N_B, SEL_HSCIF2_1), 998077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_17_16, SCIFB0_CTS_N_B, SEL_SCIFB_1), 999077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_18, DREQ0), 1000077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_18, PWM3), 1001077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_18, TPU_TO3), 1002077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_21_20, DACK0), 1003077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_21_20, DRACK0), 1004077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_21_20, REMOCON, SEL_RCN_0), 1005077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, SPEEDIN, SEL_RSP_0), 1006077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, HSCK0_C, SEL_HSCIF0_2), 1007077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, HSCK2_C, SEL_HSCIF2_2), 1008077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, SCIFB0_SCK_B, SEL_SCIFB_1), 1009077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, SCIFB2_SCK_B, SEL_SCIFB2_1), 1010077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_24_22, DREQ2_C, SEL_LBS_2), 1011077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, HTX2_C, SEL_HSCIF2_2), 1012077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_25, SSI_SCK0129, SEL_SSI0_0), 1013077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_25, HRX0_C, SEL_HSCIF0_2), 1014077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_25, HRX2_C, SEL_HSCIF2_2), 1015077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_25, SCIFB0_RXD_C, SEL_SCIFB_2), 1016077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_25, SCIFB2_RXD_C, SEL_SCIFB2_2), 1017077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, SSI_WS0129, SEL_SSI0_0), 1018077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, HTX0_C, SEL_HSCIF0_2), 1019077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, HTX2_C, SEL_HSCIF2_2), 1020077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, SCIFB0_TXD_C, SEL_SCIFB_2), 1021077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_30_28, SCIFB2_TXD_C, SEL_SCIFB2_2), 1022077365a9SGeert Uytterhoeven 1023077365a9SGeert Uytterhoeven /* IPSR4 */ 1024077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_1_0, SSI_SDATA0, SEL_SSI0_0), 1025077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_1_0, I2C0_SCL_B, SEL_I2C0_1), 1026077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_1_0, IIC0_SCL_B, SEL_IIC0_1), 1027077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_1_0, MSIOF2_SCK_C, SEL_SOF2_2), 1028077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_4_2, SSI_SCK1, SEL_SSI1_0), 1029077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_4_2, I2C0_SDA_B, SEL_I2C0_1), 1030077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_4_2, IIC0_SDA_B, SEL_IIC0_1), 1031077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_4_2, MSIOF2_SYNC_C, SEL_SOF2_2), 1032077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_4_2, GLO_I0_D, SEL_GPS_3), 1033077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_5, SSI_WS1, SEL_SSI1_0), 1034077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_5, I2C1_SCL_B, SEL_I2C1_1), 1035077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_5, IIC1_SCL_B, SEL_IIC1_1), 1036077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_5, MSIOF2_TXD_C, SEL_SOF2_2), 1037077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_5, GLO_I1_D, SEL_GPS_3), 1038077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_9_8, SSI_SDATA1, SEL_SSI1_0), 1039077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_9_8, I2C1_SDA_B, SEL_I2C1_1), 1040077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_9_8, IIC1_SDA_B, SEL_IIC1_1), 1041077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_9_8, MSIOF2_RXD_C, SEL_SOF2_2), 1042077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_12_10, SSI_SCK2), 1043077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_12_10, I2C2_SCL, SEL_I2C2_0), 1044077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_12_10, GPS_CLK_B, SEL_GPS_1), 1045077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_12_10, GLO_Q0_D, SEL_GPS_3), 1046077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_12_10, HSCK1_E, SEL_HSCIF1_4), 1047077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_15_13, SSI_WS2), 1048077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_13, I2C2_SDA, SEL_I2C2_0), 1049077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_13, GPS_SIGN_B, SEL_GPS_1), 1050077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_13, RX2_E, SEL_SCIF2_4), 1051077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_13, GLO_Q1_D, SEL_GPS_3), 1052077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_13, HCTS1_N_E, SEL_HSCIF1_4), 1053077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_18_16, SSI_SDATA2), 1054077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_18_16, GPS_MAG_B, SEL_GPS_1), 1055077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_18_16, TX2_E, SEL_SCIF2_4), 1056077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_18_16, HRTS1_N_E, SEL_HSCIF1_4), 1057077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19, SSI_SCK34), 1058077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_20, SSI_WS34), 1059077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_21, SSI_SDATA3), 1060077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_22, SSI_SCK4), 1061077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_22, GLO_SS_D, SEL_GPS_3), 1062077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_25_24, SSI_WS4), 1063077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_25_24, GLO_RFON_D, SEL_GPS_3), 1064077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_26, SSI_SDATA4), 1065077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_27_26, MSIOF2_SCK_D, SEL_SOF2_3), 1066077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_30_28, SSI_SCK5), 1067077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_30_28, MSIOF1_SCK_C, SEL_SOF1_2), 1068077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_30_28, TS_SDATA0, SEL_TSIF0_0), 1069077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_30_28, GLO_I0, SEL_GPS_0), 1070077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_30_28, MSIOF2_SYNC_D, SEL_SOF2_3), 1071077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_30_28, VI1_R2_B), 1072077365a9SGeert Uytterhoeven 1073077365a9SGeert Uytterhoeven /* IPSR5 */ 1074077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, SSI_WS5), 1075077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, MSIOF1_SYNC_C, SEL_SOF1_2), 1076077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, TS_SCK0, SEL_TSIF0_0), 1077077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, GLO_I1, SEL_GPS_0), 1078077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, MSIOF2_TXD_D, SEL_SOF2_3), 1079077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, VI1_R3_B), 1080077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_5_3, SSI_SDATA5), 1081077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, MSIOF1_TXD_C, SEL_SOF1_2), 1082077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, TS_SDEN0, SEL_TSIF0_0), 1083077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, GLO_Q0, SEL_GPS_0), 1084077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, MSIOF2_SS1_D, SEL_SOF2_3), 1085077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_5_3, VI1_R4_B), 1086077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_8_6, SSI_SCK6), 1087077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_8_6, MSIOF1_RXD_C, SEL_SOF1_2), 1088077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_8_6, TS_SPSYNC0, SEL_TSIF0_0), 1089077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_8_6, GLO_Q1, SEL_GPS_0), 1090077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_8_6, MSIOF2_RXD_D, SEL_SOF2_3), 1091077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_8_6, VI1_R5_B), 1092077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_9, SSI_WS6), 1093077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_11_9, GLO_SCLK, SEL_GPS_0), 1094077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_11_9, MSIOF2_SS2_D, SEL_SOF2_3), 1095077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_9, VI1_R6_B), 1096077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_14_12, SSI_SDATA6), 1097077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_14_12, STP_IVCXO27_0_B, SEL_SSP_1), 1098077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_14_12, GLO_SDATA, SEL_GPS_0), 1099077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_14_12, VI1_R7_B), 1100077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_16_15, SSI_SCK78, SEL_SSI7_0), 1101077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_16_15, STP_ISCLK_0_B, SEL_SSP_1), 1102077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_16_15, GLO_SS, SEL_GPS_0), 1103077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_19_17, SSI_WS78, SEL_SSI7_0), 1104077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_19_17, TX0_D, SEL_SCIF0_3), 1105077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_19_17, STP_ISD_0_B, SEL_SSP_1), 1106077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_19_17, GLO_RFON, SEL_GPS_0), 1107077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_21_20, SSI_SDATA7, SEL_SSI7_0), 1108077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_21_20, RX0_D, SEL_SCIF0_3), 1109077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_21_20, STP_ISEN_0_B, SEL_SSP_1), 1110077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_22, SSI_SDATA8, SEL_SSI8_0), 1111077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_22, TX1_D, SEL_SCIF1_3), 1112077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_22, STP_ISSYNC_0_B, SEL_SSP_1), 1113077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_25_24, SSI_SCK9, SEL_SSI9_0), 1114077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_25_24, RX1_D, SEL_SCIF1_3), 1115077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_25_24, GLO_SCLK_D, SEL_GPS_3), 1116077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_28_26, SSI_WS9, SEL_SSI9_0), 1117077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_28_26, TX3_D, SEL_SCIF3_3), 1118077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_28_26, CAN0_TX_D, SEL_CAN0_3), 1119077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_28_26, GLO_SDATA_D, SEL_GPS_3), 1120077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_31_29, SSI_SDATA9, SEL_SSI9_0), 1121077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_31_29, RX3_D, SEL_SCIF3_3), 1122077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_31_29, CAN0_RX_D, SEL_CAN0_3), 1123077365a9SGeert Uytterhoeven 1124077365a9SGeert Uytterhoeven /* IPSR6 */ 1125077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, AUDIO_CLKB, SEL_ADG_0), 1126077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, STP_OPWM_0_B, SEL_SSP_1), 1127077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, MSIOF1_SCK_B, SEL_SOF1_1), 1128077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, SCIF_CLK, SEL_SCIF_0), 1129077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_2_0, DVC_MUTE), 1130077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, BPFCLK_E, SEL_FM_4), 1131077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_5_3, AUDIO_CLKC), 1132077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, SCIFB0_SCK_C, SEL_SCIFB_2), 1133077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, MSIOF1_SYNC_B, SEL_SOF1_1), 1134077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, RX2, SEL_SCIF2_0), 1135077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, SCIFA2_RXD, SEL_SCIFA2_0), 1136077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, FMIN_E, SEL_FM_4), 1137077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_6, AUDIO_CLKOUT), 1138077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_7_6, MSIOF1_SS1_B, SEL_SOF1_1), 1139077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_7_6, TX2, SEL_SCIF2_0), 1140077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_7_6, SCIFA2_TXD, SEL_SCIFA2_0), 1141077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_9_8, IRQ0), 1142077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_9_8, SCIFB1_RXD_D, SEL_SCIFB1_3), 1143077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_10, IRQ1), 1144077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_11_10, SCIFB1_SCK_C, SEL_SCIFB1_2), 1145077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_13_12, IRQ2), 1146077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_13_12, SCIFB1_TXD_D, SEL_SCIFB1_3), 1147077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_14, IRQ3), 1148077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_15_14, I2C4_SCL_C, SEL_I2C4_2), 1149077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_15_14, MSIOF2_TXD_E, SEL_SOF2_4), 1150077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_18_16, IRQ4), 1151077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_18_16, HRX1_C, SEL_HSCIF1_2), 1152077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_18_16, I2C4_SDA_C, SEL_I2C4_2), 1153077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_18_16, MSIOF2_RXD_E, SEL_SOF2_4), 1154077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_20_19, IRQ5), 1155077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_20_19, HTX1_C, SEL_HSCIF1_2), 1156077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_20_19, I2C1_SCL_E, SEL_I2C1_4), 1157077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_20_19, MSIOF2_SCK_E, SEL_SOF2_4), 1158077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_21, IRQ6), 1159077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_21, HSCK1_C, SEL_HSCIF1_2), 1160077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_21, MSIOF1_SS2_B, SEL_SOF1_1), 1161077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_21, I2C1_SDA_E, SEL_I2C1_4), 1162077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_21, MSIOF2_SYNC_E, SEL_SOF2_4), 1163077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_26_24, IRQ7), 1164077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_26_24, HCTS1_N_C, SEL_HSCIF1_2), 1165077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_26_24, MSIOF1_TXD_B, SEL_SOF1_1), 1166077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_26_24, GPS_CLK_C, SEL_GPS_2), 1167077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_26_24, GPS_CLK_D, SEL_GPS_3), 1168077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_29_27, IRQ8), 1169077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_29_27, HRTS1_N_C, SEL_HSCIF1_2), 1170077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_29_27, MSIOF1_RXD_B, SEL_SOF1_1), 1171077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_29_27, GPS_SIGN_C, SEL_GPS_2), 1172077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_29_27, GPS_SIGN_D, SEL_GPS_3), 1173077365a9SGeert Uytterhoeven 1174077365a9SGeert Uytterhoeven /* IPSR7 */ 1175077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_2_0, IRQ9), 1176077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, DU1_DOTCLKIN_B, SEL_DIS_1), 1177077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, CAN_CLK_D, SEL_CANCLK_3), 1178077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, GPS_MAG_C, SEL_GPS_2), 1179077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, SCIF_CLK_B, SEL_SCIF_1), 1180077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, GPS_MAG_D, SEL_GPS_3), 1181077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_5_3, DU1_DR0), 1182077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_5_3, LCDOUT0), 1183077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, VI1_DATA0_B, SEL_VI1_1), 1184077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, TX0_B, SEL_SCIF0_1), 1185077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, SCIFA0_TXD_B, SEL_SCFA_1), 1186077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, MSIOF2_SCK_B, SEL_SOF2_1), 1187077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_8_6, DU1_DR1), 1188077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_8_6, LCDOUT1), 1189077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_8_6, VI1_DATA1_B, SEL_VI1_1), 1190077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_8_6, RX0_B, SEL_SCIF0_1), 1191077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_8_6, SCIFA0_RXD_B, SEL_SCFA_1), 1192077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_8_6, MSIOF2_SYNC_B, SEL_SOF2_1), 1193077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_10_9, DU1_DR2), 1194077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_10_9, LCDOUT2), 1195077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_10_9, SSI_SCK0129_B, SEL_SSI0_1), 1196077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_12_11, DU1_DR3), 1197077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_12_11, LCDOUT3), 1198077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_12_11, SSI_WS0129_B, SEL_SSI0_1), 1199077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_14_13, DU1_DR4), 1200077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_14_13, LCDOUT4), 1201077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_14_13, SSI_SDATA0_B, SEL_SSI0_1), 1202077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_16_15, DU1_DR5), 1203077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_16_15, LCDOUT5), 1204077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_16_15, SSI_SCK1_B, SEL_SSI1_1), 1205077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_18_17, DU1_DR6), 1206077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_18_17, LCDOUT6), 1207077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_18_17, SSI_WS1_B, SEL_SSI1_1), 1208077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_20_19, DU1_DR7), 1209077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_20_19, LCDOUT7), 1210077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_20_19, SSI_SDATA1_B, SEL_SSI1_1), 1211077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_21, DU1_DG0), 1212077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_21, LCDOUT8), 1213077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_21, VI1_DATA2_B, SEL_VI1_1), 1214077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_21, TX1_B, SEL_SCIF1_1), 1215077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_21, SCIFA1_TXD_B, SEL_SCIFA1_1), 1216077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_21, MSIOF2_SS1_B, SEL_SOF2_1), 1217077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_26_24, DU1_DG1), 1218077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_26_24, LCDOUT9), 1219077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_26_24, VI1_DATA3_B, SEL_VI1_1), 1220077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_26_24, RX1_B, SEL_SCIF1_1), 1221077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_26_24, SCIFA1_RXD_B, SEL_SCIFA1_1), 1222077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_26_24, MSIOF2_SS2_B, SEL_SOF2_1), 1223077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_29_27, DU1_DG2), 1224077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_29_27, LCDOUT10), 1225077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_29_27, VI1_DATA4_B, SEL_VI1_1), 1226077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_29_27, SCIF1_SCK_B), 1227077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_29_27, SCIFA1_SCK, SEL_SCIFA1_0), 1228077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_29_27, SSI_SCK78_B, SEL_SSI7_1), 1229077365a9SGeert Uytterhoeven 1230077365a9SGeert Uytterhoeven /* IPSR8 */ 1231077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_2_0, DU1_DG3), 1232077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_2_0, LCDOUT11), 1233077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_2_0, VI1_DATA5_B, SEL_VI1_1), 1234077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_2_0, SSI_WS78_B, SEL_SSI7_1), 1235077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_5_3, DU1_DG4), 1236077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_5_3, LCDOUT12), 1237077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_5_3, VI1_DATA6_B, SEL_VI1_1), 1238077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_5_3, HRX0_B, SEL_HSCIF0_1), 1239077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_5_3, SCIFB2_RXD_B, SEL_SCIFB2_1), 1240077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_5_3, SSI_SDATA7_B, SEL_SSI7_1), 1241077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_8_6, DU1_DG5), 1242077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_8_6, LCDOUT13), 1243077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_8_6, VI1_DATA7_B, SEL_VI1_1), 1244077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_8_6, HCTS0_N_B, SEL_HSCIF0_1), 1245077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_8_6, SCIFB2_TXD_B, SEL_SCIFB2_1), 1246077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_8_6, SSI_SDATA8_B, SEL_SSI8_1), 1247077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_9, DU1_DG6), 1248077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_9, LCDOUT14), 1249077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_9, HRTS0_N_B, SEL_HSCIF0_1), 1250077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_9, SCIFB2_CTS_N_B, SEL_SCIFB2_1), 1251077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_9, SSI_SCK9_B, SEL_SSI9_1), 1252077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_14_12, DU1_DG7), 1253077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_14_12, LCDOUT15), 1254077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_14_12, HTX0_B, SEL_HSCIF0_1), 1255077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_14_12, SCIFB2_RTS_N_B, SEL_SCIFB2_1), 1256077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_14_12, SSI_WS9_B, SEL_SSI9_1), 1257077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_17_15, DU1_DB0), 1258077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_17_15, LCDOUT16), 1259077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_15, VI1_CLK_B, SEL_VI1_1), 1260077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_15, TX2_B, SEL_SCIF2_1), 1261077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_15, SCIFA2_TXD_B, SEL_SCIFA2_1), 1262077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_15, MSIOF2_TXD_B, SEL_SOF2_1), 1263077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_20_18, DU1_DB1), 1264077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_20_18, LCDOUT17), 1265077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_20_18, VI1_HSYNC_N_B, SEL_VI1_1), 1266077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_20_18, RX2_B, SEL_SCIF2_1), 1267077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_20_18, SCIFA2_RXD_B, SEL_SCIFA2_1), 1268077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_20_18, MSIOF2_RXD_B, SEL_SOF2_1), 1269077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_21, DU1_DB2), 1270077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_21, LCDOUT18), 1271077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_23_21, VI1_VSYNC_N_B, SEL_VI1_1), 1272077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_21, SCIF2_SCK_B), 1273077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_23_21, SCIFA2_SCK, SEL_SCIFA2_1), 1274077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_23_21, SSI_SDATA9_B, SEL_SSI9_1), 1275077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_25_24, DU1_DB3), 1276077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_25_24, LCDOUT19), 1277077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_25_24, VI1_CLKENB_B, SEL_VI1_1), 1278077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_26, DU1_DB4), 1279077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_26, LCDOUT20), 1280077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_27_26, VI1_FIELD_B, SEL_VI1_1), 1281077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_27_26, CAN1_RX, SEL_CAN1_0), 1282077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_30_28, DU1_DB5), 1283077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_30_28, LCDOUT21), 1284077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_30_28, TX3, SEL_SCIF3_0), 1285077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_30_28, SCIFA3_TXD, SEL_SCIFA3_0), 1286077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_30_28, CAN1_TX, SEL_CAN1_0), 1287077365a9SGeert Uytterhoeven 1288077365a9SGeert Uytterhoeven /* IPSR9 */ 1289077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_2_0, DU1_DB6), 1290077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_2_0, LCDOUT22), 1291077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_2_0, I2C3_SCL_C, SEL_I2C3_2), 1292077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_2_0, RX3, SEL_SCIF3_0), 1293077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_2_0, SCIFA3_RXD, SEL_SCIFA3_0), 1294077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_5_3, DU1_DB7), 1295077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_5_3, LCDOUT23), 1296077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_5_3, I2C3_SDA_C, SEL_I2C3_2), 1297077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_5_3, SCIF3_SCK, SEL_SCIF3_0), 1298077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_5_3, SCIFA3_SCK, SEL_SCIFA3_0), 1299077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_6, DU1_DOTCLKIN, SEL_DIS_0), 1300077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_6, QSTVA_QVS), 1301077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7, DU1_DOTCLKOUT0), 1302077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7, QCLK), 1303077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_10_8, DU1_DOTCLKOUT1), 1304077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_10_8, QSTVB_QVE), 1305077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_10_8, CAN0_TX, SEL_CAN0_0), 1306077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_10_8, TX3_B, SEL_SCIF3_1), 1307077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_10_8, I2C2_SCL_B, SEL_I2C2_1), 1308077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_10_8, PWM4), 1309077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11, DU1_EXHSYNC_DU1_HSYNC), 1310077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11, QSTH_QHS), 1311077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_12, DU1_EXVSYNC_DU1_VSYNC), 1312077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_12, QSTB_QHE), 1313077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_13, DU1_EXODDF_DU1_ODDF_DISP_CDE), 1314077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_13, QCPV_QDE), 1315077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_13, CAN0_RX, SEL_CAN0_0), 1316077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_13, RX3_B, SEL_SCIF3_1), 1317077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_13, I2C2_SDA_B, SEL_I2C2_1), 1318077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_16, DU1_DISP), 1319077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_16, QPOLA), 1320077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_18_17, DU1_CDE), 1321077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_18_17, QPOLB), 1322077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_18_17, PWM4_B), 1323077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_20_19, VI0_CLKENB), 1324077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_20_19, TX4, SEL_SCIF4_0), 1325077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_20_19, SCIFA4_TXD, SEL_SCIFA4_0), 1326077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_20_19, TS_SDATA0_D, SEL_TSIF0_3), 1327077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_22_21, VI0_FIELD), 1328077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_22_21, RX4, SEL_SCIF4_0), 1329077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_22_21, SCIFA4_RXD, SEL_SCIFA4_0), 1330077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_22_21, TS_SCK0_D, SEL_TSIF0_3), 1331077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_24_23, VI0_HSYNC_N), 1332077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_24_23, TX5, SEL_SCIF5_0), 1333077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_24_23, SCIFA5_TXD, SEL_SCIFA5_0), 1334077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_24_23, TS_SDEN0_D, SEL_TSIF0_3), 1335077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_26_25, VI0_VSYNC_N), 1336077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_26_25, RX5, SEL_SCIF5_0), 1337077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_26_25, SCIFA5_RXD, SEL_SCIFA5_0), 1338077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_26_25, TS_SPSYNC0_D, SEL_TSIF0_3), 1339077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_28_27, VI0_DATA3_VI0_B3), 1340077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_28_27, SCIF3_SCK_B, SEL_SCIF3_1), 1341077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_28_27, SCIFA3_SCK_B, SEL_SCIFA3_1), 1342077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_29, VI0_G0), 1343077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_29, IIC1_SCL, SEL_IIC1_0), 1344077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_29, STP_IVCXO27_0_C, SEL_SSP_2), 1345077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_29, I2C4_SCL, SEL_I2C4_0), 1346077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_29, HCTS2_N, SEL_HSCIF2_0), 1347077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_29, SCIFB2_CTS_N, SEL_SCIFB2_0), 1348077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_29, ATAWR1_N), 1349077365a9SGeert Uytterhoeven 1350077365a9SGeert Uytterhoeven /* IPSR10 */ 1351077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_2_0, VI0_G1), 1352077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_2_0, IIC1_SDA, SEL_IIC1_0), 1353077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_2_0, STP_ISCLK_0_C, SEL_SSP_2), 1354077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_2_0, I2C4_SDA, SEL_I2C4_0), 1355077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_2_0, HRTS2_N, SEL_HSCIF2_0), 1356077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_2_0, SCIFB2_RTS_N, SEL_SCIFB2_0), 1357077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_2_0, ATADIR1_N), 1358077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_5_3, VI0_G2), 1359077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_5_3, VI2_HSYNC_N), 1360077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_5_3, STP_ISD_0_C, SEL_SSP_2), 1361077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_5_3, I2C3_SCL_B, SEL_I2C3_1), 1362077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_5_3, HSCK2, SEL_HSCIF2_0), 1363077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_5_3, SCIFB2_SCK, SEL_SCIFB2_0), 1364077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_5_3, ATARD1_N), 1365077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_8_6, VI0_G3), 1366077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_8_6, VI2_VSYNC_N), 1367077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_8_6, STP_ISEN_0_C, SEL_SSP_2), 1368077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_8_6, I2C3_SDA_B, SEL_I2C3_1), 1369077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_8_6, HRX2, SEL_HSCIF2_0), 1370077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_8_6, SCIFB2_RXD, SEL_SCIFB2_0), 1371077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_8_6, ATACS01_N), 1372077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_11_9, VI0_G4), 1373077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_11_9, VI2_CLKENB), 1374077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_9, STP_ISSYNC_0_C, SEL_SSP_2), 1375077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_9, HTX2, SEL_HSCIF2_0), 1376077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_9, SCIFB2_TXD, SEL_SCIFB2_0), 1377077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_9, SCIFB0_SCK_D, SEL_SCIFB_3), 1378077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_14_12, VI0_G5), 1379077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_14_12, VI2_FIELD), 1380077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_12, STP_OPWM_0_C, SEL_SSP_2), 1381077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_12, FMCLK_D, SEL_FM_3), 1382077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_12, CAN0_TX_E, SEL_CAN0_4), 1383077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_12, HTX1_D, SEL_HSCIF1_3), 1384077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_12, SCIFB0_TXD_D, SEL_SCIFB_3), 1385077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_16_15, VI0_G6), 1386077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_16_15, VI2_CLK), 1387077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_16_15, BPFCLK_D, SEL_FM_3), 1388077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_18_17, VI0_G7), 1389077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_18_17, VI2_DATA0), 1390077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_17, FMIN_D, SEL_FM_3), 1391077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_21_19, VI0_R0), 1392077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_21_19, VI2_DATA1), 1393077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_21_19, GLO_I0_B, SEL_GPS_1), 1394077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_21_19, TS_SDATA0_C, SEL_TSIF0_2), 1395077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_21_19, ATACS11_N), 1396077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_24_22, VI0_R1), 1397077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_24_22, VI2_DATA2), 1398077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_24_22, GLO_I1_B, SEL_GPS_1), 1399077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_24_22, TS_SCK0_C, SEL_TSIF0_2), 1400077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_24_22, ATAG1_N), 1401077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_26_25, VI0_R2), 1402077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_26_25, VI2_DATA3), 1403077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_26_25, GLO_Q0_B, SEL_GPS_1), 1404077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_26_25, TS_SDEN0_C, SEL_TSIF0_2), 1405077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_28_27, VI0_R3), 1406077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_28_27, VI2_DATA4), 1407077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_28_27, GLO_Q1_B, SEL_GPS_1), 1408077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_28_27, TS_SPSYNC0_C, SEL_TSIF0_2), 1409077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_31_29, VI0_R4), 1410077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_31_29, VI2_DATA5), 1411077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_29, GLO_SCLK_B, SEL_GPS_1), 1412077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_29, TX0_C, SEL_SCIF0_2), 1413077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_29, I2C1_SCL_D, SEL_I2C1_3), 1414077365a9SGeert Uytterhoeven 1415077365a9SGeert Uytterhoeven /* IPSR11 */ 1416077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_2_0, VI0_R5), 1417077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_2_0, VI2_DATA6), 1418077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_2_0, GLO_SDATA_B, SEL_GPS_1), 1419077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_2_0, RX0_C, SEL_SCIF0_2), 1420077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_2_0, I2C1_SDA_D, SEL_I2C1_3), 1421077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_5_3, VI0_R6), 1422077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_5_3, VI2_DATA7), 1423077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_5_3, GLO_SS_B, SEL_GPS_1), 1424077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_5_3, TX1_C, SEL_SCIF1_2), 1425077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_5_3, I2C4_SCL_B, SEL_I2C4_1), 1426077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_8_6, VI0_R7), 1427077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, GLO_RFON_B, SEL_GPS_1), 1428077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, RX1_C, SEL_SCIF1_2), 1429077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, CAN0_RX_E, SEL_CAN0_4), 1430077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, I2C4_SDA_B, SEL_I2C4_1), 1431077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, HRX1_D, SEL_HSCIF1_3), 1432077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3), 1433077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0), 1434077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_11_9, AVB_RXD0), 1435077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1), 1436077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_9, TX4_B, SEL_SCIF4_1), 1437077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1), 1438077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0), 1439077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_14_12, AVB_RXD1), 1440077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1), 1441077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_14_12, RX4_B, SEL_SCIF4_1), 1442077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1), 1443077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_16_15, VI1_CLKENB, SEL_VI1_0), 1444077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_16_15, AVB_RXD2), 1445077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1), 1446077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_18_17, VI1_FIELD, SEL_VI1_0), 1447077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_18_17, AVB_RXD3), 1448077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1), 1449077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_19, VI1_CLK, SEL_VI1_0), 1450077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_19, AVB_RXD4), 1451077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_20, VI1_DATA0, SEL_VI1_0), 1452077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_20, AVB_RXD5), 1453077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21, VI1_DATA1, SEL_VI1_0), 1454077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_21, AVB_RXD6), 1455077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_22, VI1_DATA2, SEL_VI1_0), 1456077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_22, AVB_RXD7), 1457077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_23, VI1_DATA3, SEL_VI1_0), 1458077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_23, AVB_RX_ER), 1459077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_24, VI1_DATA4, SEL_VI1_0), 1460077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_24, AVB_MDIO), 1461077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_25, VI1_DATA5, SEL_VI1_0), 1462077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_25, AVB_RX_DV), 1463077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_26, VI1_DATA6, SEL_VI1_0), 1464077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_26, AVB_MAGIC), 1465077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_27, VI1_DATA7, SEL_VI1_0), 1466077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_27, AVB_MDC), 1467077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_29_28, ETH_MDIO), 1468077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_29_28, AVB_RX_CLK), 1469077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_29_28, I2C2_SCL_C, SEL_I2C2_2), 1470077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_30, ETH_CRS_DV), 1471077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_30, AVB_LINK), 1472077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_31_30, I2C2_SDA_C, SEL_I2C2_2), 1473077365a9SGeert Uytterhoeven 1474077365a9SGeert Uytterhoeven /* IPSR12 */ 1475077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_1_0, ETH_RX_ER), 1476077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_1_0, AVB_CRS), 1477077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_1_0, I2C3_SCL, SEL_I2C3_0), 1478077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_1_0, IIC0_SCL, SEL_IIC0_0), 1479077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_3_2, ETH_RXD0), 1480077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_3_2, AVB_PHY_INT), 1481077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_2, I2C3_SDA, SEL_I2C3_0), 1482077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_2, IIC0_SDA, SEL_IIC0_0), 1483077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_6_4, ETH_RXD1), 1484077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_6_4, AVB_GTXREFCLK), 1485077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_6_4, CAN0_TX_C, SEL_CAN0_2), 1486077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_6_4, I2C2_SCL_D, SEL_I2C2_3), 1487077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4), 1488077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_9_7, ETH_LINK), 1489077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_9_7, AVB_TXD0), 1490077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_9_7, CAN0_RX_C, SEL_CAN0_2), 1491077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_9_7, I2C2_SDA_D, SEL_I2C2_3), 1492077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4), 1493077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_12_10, ETH_REFCLK), 1494077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_12_10, AVB_TXD1), 1495077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1), 1496077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_12_10, CAN1_RX_C, SEL_CAN1_2), 1497077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4), 1498077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_15_13, ETH_TXD1), 1499077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_15_13, AVB_TXD2), 1500077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1), 1501077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_15_13, CAN1_TX_C, SEL_CAN1_2), 1502077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4), 1503077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_17_16, ETH_TX_EN), 1504077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_17_16, AVB_TXD3), 1505077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_17_16, TCLK1_B, SEL_TMU1_0), 1506077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1), 1507077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_18, ETH_MAGIC), 1508077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_18, AVB_TXD4), 1509077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_18, IETX_C, SEL_IEB_2), 1510077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_21_20, ETH_TXD0), 1511077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_21_20, AVB_TXD5), 1512077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_21_20, IECLK_C, SEL_IEB_2), 1513077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_23_22, ETH_MDC), 1514077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_23_22, AVB_TXD6), 1515077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_23_22, IERX_C, SEL_IEB_2), 1516077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0), 1517077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_26_24, AVB_TXD7), 1518077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3), 1519077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_26_24, ADIDATA_B, SEL_RAD_1), 1520077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2), 1521077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_29_27, STP_ISCLK_0, SEL_SSP_0), 1522077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_29_27, AVB_TX_EN), 1523077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3), 1524077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1), 1525077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2), 1526077365a9SGeert Uytterhoeven 1527077365a9SGeert Uytterhoeven /* IPSR13 */ 1528077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, STP_ISD_0, SEL_SSP_0), 1529077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_2_0, AVB_TX_ER), 1530077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, SCIFB2_SCK_C, SEL_SCIFB2_2), 1531077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, ADICLK_B, SEL_RAD_1), 1532077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, MSIOF0_SS1_C, SEL_SOF0_2), 1533077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_4_3, STP_ISEN_0, SEL_SSP_0), 1534077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_4_3, AVB_TX_CLK), 1535077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_4_3, ADICHS0_B, SEL_RAD_1), 1536077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_4_3, MSIOF0_SS2_C, SEL_SOF0_2), 1537077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_5, STP_ISSYNC_0, SEL_SSP_0), 1538077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_6_5, AVB_COL), 1539077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_5, ADICHS1_B, SEL_RAD_1), 1540077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_5, MSIOF0_RXD_C, SEL_SOF0_2), 1541077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, STP_OPWM_0, SEL_SSP_0), 1542077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_9_7, AVB_GTX_CLK), 1543077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_9_7, PWM0_B), 1544077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, ADICHS2_B, SEL_RAD_1), 1545077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, MSIOF0_TXD_C, SEL_SOF0_2), 1546077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_10, SD0_CLK), 1547077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_10, SPCLK_B, SEL_QSP_1), 1548077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_11, SD0_CMD), 1549077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_11, MOSI_IO0_B, SEL_QSP_1), 1550077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_12, SD0_DATA0), 1551077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_12, MISO_IO1_B, SEL_QSP_1), 1552077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_13, SD0_DATA1), 1553077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_13, IO2_B, SEL_QSP_1), 1554077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_14, SD0_DATA2), 1555077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_14, IO3_B, SEL_QSP_1), 1556077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_15, SD0_DATA3), 1557077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15, SSL_B, SEL_QSP_1), 1558077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_18_16, SD0_CD), 1559077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, MMC_D6_B, SEL_MMC_1), 1560077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, SIM0_RST_B, SEL_SIM_1), 1561077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, CAN0_RX_F, SEL_CAN0_5), 1562077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, SCIFA5_TXD_B, SEL_SCIFA5_1), 1563077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, TX3_C, SEL_SCIF3_2), 1564077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_21_19, SD0_WP), 1565077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_21_19, MMC_D7_B, SEL_MMC_1), 1566077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_21_19, SIM0_D_B, SEL_SIM_1), 1567077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_21_19, CAN0_TX_F, SEL_CAN0_5), 1568077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_21_19, SCIFA5_RXD_B, SEL_SCIFA5_1), 1569077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_21_19, RX3_C, SEL_SCIF3_2), 1570077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_22, SD1_CMD), 1571077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22, REMOCON_B, SEL_RCN_1), 1572077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_24_23, SD1_DATA0), 1573077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_24_23, SPEEDIN_B, SEL_RSP_1), 1574077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_25, SD1_DATA1), 1575077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25, IETX_B, SEL_IEB_1), 1576077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_26, SD1_DATA2), 1577077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_26, IECLK_B, SEL_IEB_1), 1578077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_27, SD1_DATA3), 1579077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_27, IERX_B, SEL_IEB_1), 1580077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_30_28, SD1_CD), 1581077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_30_28, PWM0), 1582077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_30_28, TPU_TO0), 1583077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_30_28, I2C1_SCL_C, SEL_I2C1_2), 1584077365a9SGeert Uytterhoeven 1585077365a9SGeert Uytterhoeven /* IPSR14 */ 1586077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_1_0, SD1_WP), 1587077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_1_0, PWM1_B), 1588077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_1_0, I2C1_SDA_C, SEL_I2C1_2), 1589077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2, SD2_CLK), 1590077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2, MMC_CLK), 1591077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_3, SD2_CMD), 1592077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_3, MMC_CMD), 1593077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_4, SD2_DATA0), 1594077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_4, MMC_D0), 1595077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5, SD2_DATA1), 1596077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5, MMC_D1), 1597077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_6, SD2_DATA2), 1598077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_6, MMC_D2), 1599077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_7, SD2_DATA3), 1600077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_7, MMC_D3), 1601077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_10_8, SD2_CD), 1602077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_10_8, MMC_D4), 1603077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_10_8, IIC1_SCL_C, SEL_IIC1_2), 1604077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_10_8, TX5_B, SEL_SCIF5_1), 1605077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_10_8, SCIFA5_TXD_C, SEL_SCIFA5_2), 1606077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_13_11, SD2_WP), 1607077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_13_11, MMC_D5), 1608077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_13_11, IIC1_SDA_C, SEL_IIC1_2), 1609077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_13_11, RX5_B, SEL_SCIF5_1), 1610077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_13_11, SCIFA5_RXD_C, SEL_SCIFA5_2), 1611077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_16_14, MSIOF0_SCK, SEL_SOF0_0), 1612077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_16_14, RX2_C, SEL_SCIF2_2), 1613077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_16_14, ADIDATA, SEL_RAD_0), 1614077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_16_14, VI1_CLK_C, SEL_VI1_2), 1615077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_16_14, VI1_G0_B), 1616077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_17, MSIOF0_SYNC, SEL_SOF0_0), 1617077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_17, TX2_C, SEL_SCIF2_2), 1618077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_17, ADICS_SAMP, SEL_RAD_0), 1619077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_17, VI1_CLKENB_C, SEL_VI1_2), 1620077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_19_17, VI1_G1_B), 1621077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_22_20, MSIOF0_TXD, SEL_SOF0_0), 1622077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_22_20, ADICLK, SEL_RAD_0), 1623077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_22_20, VI1_FIELD_C, SEL_VI1_2), 1624077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_22_20, VI1_G2_B), 1625077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_25_23, MSIOF0_RXD, SEL_SOF0_0), 1626077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_25_23, ADICHS0, SEL_RAD_0), 1627077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_25_23, VI1_DATA0_C, SEL_VI1_2), 1628077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_25_23, VI1_G3_B), 1629077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, MSIOF0_SS1, SEL_SOF0_0), 1630077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, MMC_D6, SEL_MMC_0), 1631077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, ADICHS1, SEL_RAD_0), 1632077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, TX0_E, SEL_SCIF0_4), 1633077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, VI1_HSYNC_N_C, SEL_VI1_2), 1634077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_28_26, IIC0_SCL_C, SEL_IIC0_2), 1635077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_28_26, VI1_G4_B), 1636077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, MSIOF0_SS2, SEL_SOF0_0), 1637077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, MMC_D7, SEL_MMC_0), 1638077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, ADICHS2, SEL_RAD_0), 1639077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, RX0_E, SEL_SCIF0_4), 1640077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, VI1_VSYNC_N_C, SEL_VI1_2), 1641077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_29, IIC0_SDA_C, SEL_IIC0_2), 1642077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_31_29, VI1_G5_B), 1643077365a9SGeert Uytterhoeven 1644077365a9SGeert Uytterhoeven /* IPSR15 */ 1645077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_1_0, SIM0_RST, SEL_SIM_0), 1646077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_1_0, IETX, SEL_IEB_0), 1647077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_1_0, CAN1_TX_D, SEL_CAN1_3), 1648077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_3_2, SIM0_CLK), 1649077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_3_2, IECLK, SEL_IEB_0), 1650077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_3_2, CAN_CLK_C, SEL_CANCLK_2), 1651077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_4, SIM0_D, SEL_SIM_0), 1652077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_4, IERX, SEL_IEB_0), 1653077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_4, CAN1_RX_D, SEL_CAN1_3), 1654077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, GPS_CLK, SEL_GPS_0), 1655077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, DU1_DOTCLKIN_C, SEL_DIS_2), 1656077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, AUDIO_CLKB_B, SEL_ADG_1), 1657077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_8_6, PWM5_B), 1658077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, SCIFA3_TXD_C, SEL_SCIFA3_2), 1659077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, GPS_SIGN, SEL_GPS_0), 1660077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, TX4_C, SEL_SCIF4_2), 1661077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, SCIFA4_TXD_C, SEL_SCIFA4_2), 1662077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_9, PWM5), 1663077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_9, VI1_G6_B), 1664077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, SCIFA3_RXD_C, SEL_SCIFA3_2), 1665077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_14_12, GPS_MAG, SEL_GPS_0), 1666077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_14_12, RX4_C, SEL_SCIF4_2), 1667077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_14_12, SCIFA4_RXD_C, SEL_SCIFA4_2), 1668077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_14_12, PWM6), 1669077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_14_12, VI1_G7_B), 1670077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_14_12, SCIFA3_SCK_C, SEL_SCIFA3_2), 1671077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_15, HCTS0_N, SEL_HSCIF0_0), 1672077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_15, SCIFB0_CTS_N, SEL_SCIFB_0), 1673077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_15, GLO_I0_C, SEL_GPS_2), 1674077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_15, TCLK1, SEL_TMU1_0), 1675077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_15, VI1_DATA1_C, SEL_VI1_2), 1676077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_20_18, HRTS0_N, SEL_HSCIF0_0), 1677077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_20_18, SCIFB0_RTS_N, SEL_SCIFB_0), 1678077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_20_18, GLO_I1_C, SEL_GPS_2), 1679077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_20_18, VI1_DATA2_C, SEL_VI1_2), 1680077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_21, HSCK0, SEL_HSCIF0_0), 1681077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_21, SCIFB0_SCK, SEL_SCIFB_0), 1682077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_21, GLO_Q0_C, SEL_GPS_2), 1683077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_21, CAN_CLK, SEL_CANCLK_0), 1684077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_23_21, TCLK2), 1685077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_21, VI1_DATA3_C, SEL_VI1_2), 1686077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_26_24, HRX0, SEL_HSCIF0_0), 1687077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_26_24, SCIFB0_RXD, SEL_SCIFB_0), 1688077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_26_24, GLO_Q1_C, SEL_GPS_2), 1689077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_26_24, CAN0_RX_B, SEL_CAN0_1), 1690077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_26_24, VI1_DATA4_C, SEL_VI1_2), 1691077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_27, HTX0, SEL_HSCIF0_0), 1692077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_27, SCIFB0_TXD, SEL_SCIFB_0), 1693077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_27, GLO_SCLK_C, SEL_GPS_2), 1694077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_27, CAN0_TX_B, SEL_CAN0_1), 1695077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_27, VI1_DATA5_C, SEL_VI1_2), 1696077365a9SGeert Uytterhoeven 1697077365a9SGeert Uytterhoeven /* IPSR16 */ 1698077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, HRX1, SEL_HSCIF1_0), 1699077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, SCIFB1_RXD, SEL_SCIFB1_0), 1700077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_2_0, VI1_R0_B), 1701077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, GLO_SDATA_C, SEL_GPS_2), 1702077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, VI1_DATA6_C, SEL_VI1_2), 1703077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, HTX1, SEL_HSCIF1_0), 1704077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, SCIFB1_TXD, SEL_SCIFB1_0), 1705077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_5_3, VI1_R1_B), 1706077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, GLO_SS_C, SEL_GPS_2), 1707077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, VI1_DATA7_C, SEL_VI1_2), 1708077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_6, HSCK1, SEL_HSCIF1_0), 1709077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_6, SCIFB1_SCK, SEL_SCIFB1_0), 1710077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_6, MLB_CLK), 1711077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_6, GLO_RFON_C, SEL_GPS_2), 1712077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_9_8, HCTS1_N, SEL_HSCIF1_0), 1713077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_9_8, SCIFB1_CTS_N), 1714077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_9_8, MLB_SIG), 1715077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_9_8, CAN1_TX_B, SEL_CAN1_1), 1716077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_10, HRTS1_N, SEL_HSCIF1_0), 1717077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_11_10, SCIFB1_RTS_N), 1718077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_11_10, MLB_DAT), 1719077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_10, CAN1_RX_B, SEL_CAN1_1), 1720077365a9SGeert Uytterhoeven }; 1721077365a9SGeert Uytterhoeven 172261232cd6SGeert Uytterhoeven /* 172361232cd6SGeert Uytterhoeven * Pins not associated with a GPIO port. 172461232cd6SGeert Uytterhoeven */ 172561232cd6SGeert Uytterhoeven enum { 172661232cd6SGeert Uytterhoeven GP_ASSIGN_LAST(), 172761232cd6SGeert Uytterhoeven NOGP_ALL(), 172861232cd6SGeert Uytterhoeven }; 172961232cd6SGeert Uytterhoeven 1730077365a9SGeert Uytterhoeven static const struct sh_pfc_pin pinmux_pins[] = { 1731077365a9SGeert Uytterhoeven PINMUX_GPIO_GP_ALL(), 173261232cd6SGeert Uytterhoeven PINMUX_NOGP_ALL(), 1733077365a9SGeert Uytterhoeven }; 1734077365a9SGeert Uytterhoeven 17358d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 1736077365a9SGeert Uytterhoeven /* - ADI -------------------------------------------------------------------- */ 1737077365a9SGeert Uytterhoeven static const unsigned int adi_common_pins[] = { 1738077365a9SGeert Uytterhoeven /* ADIDATA, ADICS/SAMP, ADICLK */ 1739077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26), 1740077365a9SGeert Uytterhoeven }; 1741077365a9SGeert Uytterhoeven static const unsigned int adi_common_mux[] = { 1742077365a9SGeert Uytterhoeven /* ADIDATA, ADICS/SAMP, ADICLK */ 1743077365a9SGeert Uytterhoeven ADIDATA_MARK, ADICS_SAMP_MARK, ADICLK_MARK, 1744077365a9SGeert Uytterhoeven }; 1745077365a9SGeert Uytterhoeven static const unsigned int adi_chsel0_pins[] = { 1746077365a9SGeert Uytterhoeven /* ADICHS 0 */ 1747077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 27), 1748077365a9SGeert Uytterhoeven }; 1749077365a9SGeert Uytterhoeven static const unsigned int adi_chsel0_mux[] = { 1750077365a9SGeert Uytterhoeven /* ADICHS 0 */ 1751077365a9SGeert Uytterhoeven ADICHS0_MARK, 1752077365a9SGeert Uytterhoeven }; 1753077365a9SGeert Uytterhoeven static const unsigned int adi_chsel1_pins[] = { 1754077365a9SGeert Uytterhoeven /* ADICHS 1 */ 1755077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), 1756077365a9SGeert Uytterhoeven }; 1757077365a9SGeert Uytterhoeven static const unsigned int adi_chsel1_mux[] = { 1758077365a9SGeert Uytterhoeven /* ADICHS 1 */ 1759077365a9SGeert Uytterhoeven ADICHS1_MARK, 1760077365a9SGeert Uytterhoeven }; 1761077365a9SGeert Uytterhoeven static const unsigned int adi_chsel2_pins[] = { 1762077365a9SGeert Uytterhoeven /* ADICHS 2 */ 1763077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 29), 1764077365a9SGeert Uytterhoeven }; 1765077365a9SGeert Uytterhoeven static const unsigned int adi_chsel2_mux[] = { 1766077365a9SGeert Uytterhoeven /* ADICHS 2 */ 1767077365a9SGeert Uytterhoeven ADICHS2_MARK, 1768077365a9SGeert Uytterhoeven }; 1769077365a9SGeert Uytterhoeven static const unsigned int adi_common_b_pins[] = { 1770077365a9SGeert Uytterhoeven /* ADIDATA B, ADICS/SAMP B, ADICLK B */ 1771077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), 1772077365a9SGeert Uytterhoeven }; 1773077365a9SGeert Uytterhoeven static const unsigned int adi_common_b_mux[] = { 1774077365a9SGeert Uytterhoeven /* ADIDATA B, ADICS/SAMP B, ADICLK B */ 1775077365a9SGeert Uytterhoeven ADIDATA_B_MARK, ADICS_SAMP_B_MARK, ADICLK_B_MARK, 1776077365a9SGeert Uytterhoeven }; 1777077365a9SGeert Uytterhoeven static const unsigned int adi_chsel0_b_pins[] = { 1778077365a9SGeert Uytterhoeven /* ADICHS B 0 */ 1779077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), 1780077365a9SGeert Uytterhoeven }; 1781077365a9SGeert Uytterhoeven static const unsigned int adi_chsel0_b_mux[] = { 1782077365a9SGeert Uytterhoeven /* ADICHS B 0 */ 1783077365a9SGeert Uytterhoeven ADICHS0_B_MARK, 1784077365a9SGeert Uytterhoeven }; 1785077365a9SGeert Uytterhoeven static const unsigned int adi_chsel1_b_pins[] = { 1786077365a9SGeert Uytterhoeven /* ADICHS B 1 */ 1787077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 1788077365a9SGeert Uytterhoeven }; 1789077365a9SGeert Uytterhoeven static const unsigned int adi_chsel1_b_mux[] = { 1790077365a9SGeert Uytterhoeven /* ADICHS B 1 */ 1791077365a9SGeert Uytterhoeven ADICHS1_B_MARK, 1792077365a9SGeert Uytterhoeven }; 1793077365a9SGeert Uytterhoeven static const unsigned int adi_chsel2_b_pins[] = { 1794077365a9SGeert Uytterhoeven /* ADICHS B 2 */ 1795077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), 1796077365a9SGeert Uytterhoeven }; 1797077365a9SGeert Uytterhoeven static const unsigned int adi_chsel2_b_mux[] = { 1798077365a9SGeert Uytterhoeven /* ADICHS B 2 */ 1799077365a9SGeert Uytterhoeven ADICHS2_B_MARK, 1800077365a9SGeert Uytterhoeven }; 18018d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 1802077365a9SGeert Uytterhoeven 1803077365a9SGeert Uytterhoeven /* - Audio Clock ------------------------------------------------------------ */ 1804077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_pins[] = { 1805077365a9SGeert Uytterhoeven /* CLK */ 1806077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 28), 1807077365a9SGeert Uytterhoeven }; 1808077365a9SGeert Uytterhoeven 1809077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_mux[] = { 1810077365a9SGeert Uytterhoeven AUDIO_CLKA_MARK, 1811077365a9SGeert Uytterhoeven }; 1812077365a9SGeert Uytterhoeven 1813077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_pins[] = { 1814077365a9SGeert Uytterhoeven /* CLK */ 1815077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 29), 1816077365a9SGeert Uytterhoeven }; 1817077365a9SGeert Uytterhoeven 1818077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_mux[] = { 1819077365a9SGeert Uytterhoeven AUDIO_CLKB_MARK, 1820077365a9SGeert Uytterhoeven }; 1821077365a9SGeert Uytterhoeven 1822077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_b_pins[] = { 1823077365a9SGeert Uytterhoeven /* CLK */ 1824077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 20), 1825077365a9SGeert Uytterhoeven }; 1826077365a9SGeert Uytterhoeven 1827077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_b_mux[] = { 1828077365a9SGeert Uytterhoeven AUDIO_CLKB_B_MARK, 1829077365a9SGeert Uytterhoeven }; 1830077365a9SGeert Uytterhoeven 1831077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_pins[] = { 1832077365a9SGeert Uytterhoeven /* CLK */ 1833077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), 1834077365a9SGeert Uytterhoeven }; 1835077365a9SGeert Uytterhoeven 1836077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_mux[] = { 1837077365a9SGeert Uytterhoeven AUDIO_CLKC_MARK, 1838077365a9SGeert Uytterhoeven }; 1839077365a9SGeert Uytterhoeven 1840077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_pins[] = { 1841077365a9SGeert Uytterhoeven /* CLK */ 1842077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 31), 1843077365a9SGeert Uytterhoeven }; 1844077365a9SGeert Uytterhoeven 1845077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_mux[] = { 1846077365a9SGeert Uytterhoeven AUDIO_CLKOUT_MARK, 1847077365a9SGeert Uytterhoeven }; 1848077365a9SGeert Uytterhoeven 1849077365a9SGeert Uytterhoeven /* - AVB -------------------------------------------------------------------- */ 1850077365a9SGeert Uytterhoeven static const unsigned int avb_link_pins[] = { 1851077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 14), 1852077365a9SGeert Uytterhoeven }; 1853077365a9SGeert Uytterhoeven static const unsigned int avb_link_mux[] = { 1854077365a9SGeert Uytterhoeven AVB_LINK_MARK, 1855077365a9SGeert Uytterhoeven }; 1856077365a9SGeert Uytterhoeven static const unsigned int avb_magic_pins[] = { 1857077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 11), 1858077365a9SGeert Uytterhoeven }; 1859077365a9SGeert Uytterhoeven static const unsigned int avb_magic_mux[] = { 1860077365a9SGeert Uytterhoeven AVB_MAGIC_MARK, 1861077365a9SGeert Uytterhoeven }; 1862077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_pins[] = { 1863077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 16), 1864077365a9SGeert Uytterhoeven }; 1865077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_mux[] = { 1866077365a9SGeert Uytterhoeven AVB_PHY_INT_MARK, 1867077365a9SGeert Uytterhoeven }; 1868077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_pins[] = { 1869077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 9), 1870077365a9SGeert Uytterhoeven }; 1871077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_mux[] = { 1872077365a9SGeert Uytterhoeven AVB_MDC_MARK, AVB_MDIO_MARK, 1873077365a9SGeert Uytterhoeven }; 1874077365a9SGeert Uytterhoeven static const unsigned int avb_mii_pins[] = { 1875077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20), 1876077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 21), 1877077365a9SGeert Uytterhoeven 1878077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 1879077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), 1880077365a9SGeert Uytterhoeven 1881077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 10), 1882077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), 1883077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 29), 1884077365a9SGeert Uytterhoeven }; 1885077365a9SGeert Uytterhoeven static const unsigned int avb_mii_mux[] = { 1886077365a9SGeert Uytterhoeven AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, 1887077365a9SGeert Uytterhoeven AVB_TXD3_MARK, 1888077365a9SGeert Uytterhoeven 1889077365a9SGeert Uytterhoeven AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1890077365a9SGeert Uytterhoeven AVB_RXD3_MARK, 1891077365a9SGeert Uytterhoeven 1892077365a9SGeert Uytterhoeven AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, 1893077365a9SGeert Uytterhoeven AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK, 1894077365a9SGeert Uytterhoeven AVB_TX_CLK_MARK, AVB_COL_MARK, 1895077365a9SGeert Uytterhoeven }; 1896077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_pins[] = { 1897077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20), 1898077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 21), RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23), 1899077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), 1900077365a9SGeert Uytterhoeven 1901077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 1902077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5), 1903077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7), 1904077365a9SGeert Uytterhoeven 1905077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 10), 1906077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 17), 1907077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), RCAR_GP_PIN(5, 28), 1908077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 1909077365a9SGeert Uytterhoeven }; 1910077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_mux[] = { 1911077365a9SGeert Uytterhoeven AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, 1912077365a9SGeert Uytterhoeven AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK, 1913077365a9SGeert Uytterhoeven AVB_TXD6_MARK, AVB_TXD7_MARK, 1914077365a9SGeert Uytterhoeven 1915077365a9SGeert Uytterhoeven AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1916077365a9SGeert Uytterhoeven AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, 1917077365a9SGeert Uytterhoeven AVB_RXD6_MARK, AVB_RXD7_MARK, 1918077365a9SGeert Uytterhoeven 1919077365a9SGeert Uytterhoeven AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, 1920077365a9SGeert Uytterhoeven AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, 1921077365a9SGeert Uytterhoeven AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, 1922077365a9SGeert Uytterhoeven AVB_COL_MARK, 1923077365a9SGeert Uytterhoeven }; 1924077365a9SGeert Uytterhoeven 1925077365a9SGeert Uytterhoeven /* - CAN -------------------------------------------------------------------- */ 1926077365a9SGeert Uytterhoeven 1927077365a9SGeert Uytterhoeven static const unsigned int can0_data_pins[] = { 1928077365a9SGeert Uytterhoeven /* TX, RX */ 1929077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 29), 1930077365a9SGeert Uytterhoeven }; 1931077365a9SGeert Uytterhoeven 1932077365a9SGeert Uytterhoeven static const unsigned int can0_data_mux[] = { 1933077365a9SGeert Uytterhoeven CAN0_TX_MARK, CAN0_RX_MARK, 1934077365a9SGeert Uytterhoeven }; 1935077365a9SGeert Uytterhoeven 1936077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_pins[] = { 1937077365a9SGeert Uytterhoeven /* TX, RX */ 1938077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 4), RCAR_GP_PIN(7, 3), 1939077365a9SGeert Uytterhoeven }; 1940077365a9SGeert Uytterhoeven 1941077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_mux[] = { 1942077365a9SGeert Uytterhoeven CAN0_TX_B_MARK, CAN0_RX_B_MARK, 1943077365a9SGeert Uytterhoeven }; 1944077365a9SGeert Uytterhoeven 1945077365a9SGeert Uytterhoeven static const unsigned int can0_data_c_pins[] = { 1946077365a9SGeert Uytterhoeven /* TX, RX */ 1947077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 18), 1948077365a9SGeert Uytterhoeven }; 1949077365a9SGeert Uytterhoeven 1950077365a9SGeert Uytterhoeven static const unsigned int can0_data_c_mux[] = { 1951077365a9SGeert Uytterhoeven CAN0_TX_C_MARK, CAN0_RX_C_MARK, 1952077365a9SGeert Uytterhoeven }; 1953077365a9SGeert Uytterhoeven 1954077365a9SGeert Uytterhoeven static const unsigned int can0_data_d_pins[] = { 1955077365a9SGeert Uytterhoeven /* TX, RX */ 1956077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 27), 1957077365a9SGeert Uytterhoeven }; 1958077365a9SGeert Uytterhoeven 1959077365a9SGeert Uytterhoeven static const unsigned int can0_data_d_mux[] = { 1960077365a9SGeert Uytterhoeven CAN0_TX_D_MARK, CAN0_RX_D_MARK, 1961077365a9SGeert Uytterhoeven }; 1962077365a9SGeert Uytterhoeven 1963077365a9SGeert Uytterhoeven static const unsigned int can0_data_e_pins[] = { 1964077365a9SGeert Uytterhoeven /* TX, RX */ 1965077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 28), 1966077365a9SGeert Uytterhoeven }; 1967077365a9SGeert Uytterhoeven 1968077365a9SGeert Uytterhoeven static const unsigned int can0_data_e_mux[] = { 1969077365a9SGeert Uytterhoeven CAN0_TX_E_MARK, CAN0_RX_E_MARK, 1970077365a9SGeert Uytterhoeven }; 1971077365a9SGeert Uytterhoeven 1972077365a9SGeert Uytterhoeven static const unsigned int can0_data_f_pins[] = { 1973077365a9SGeert Uytterhoeven /* TX, RX */ 1974077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), 1975077365a9SGeert Uytterhoeven }; 1976077365a9SGeert Uytterhoeven 1977077365a9SGeert Uytterhoeven static const unsigned int can0_data_f_mux[] = { 1978077365a9SGeert Uytterhoeven CAN0_TX_F_MARK, CAN0_RX_F_MARK, 1979077365a9SGeert Uytterhoeven }; 1980077365a9SGeert Uytterhoeven 1981077365a9SGeert Uytterhoeven static const unsigned int can1_data_pins[] = { 1982077365a9SGeert Uytterhoeven /* TX, RX */ 1983077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 20), 1984077365a9SGeert Uytterhoeven }; 1985077365a9SGeert Uytterhoeven 1986077365a9SGeert Uytterhoeven static const unsigned int can1_data_mux[] = { 1987077365a9SGeert Uytterhoeven CAN1_TX_MARK, CAN1_RX_MARK, 1988077365a9SGeert Uytterhoeven }; 1989077365a9SGeert Uytterhoeven 1990077365a9SGeert Uytterhoeven static const unsigned int can1_data_b_pins[] = { 1991077365a9SGeert Uytterhoeven /* TX, RX */ 1992077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9), 1993077365a9SGeert Uytterhoeven }; 1994077365a9SGeert Uytterhoeven 1995077365a9SGeert Uytterhoeven static const unsigned int can1_data_b_mux[] = { 1996077365a9SGeert Uytterhoeven CAN1_TX_B_MARK, CAN1_RX_B_MARK, 1997077365a9SGeert Uytterhoeven }; 1998077365a9SGeert Uytterhoeven 1999077365a9SGeert Uytterhoeven static const unsigned int can1_data_c_pins[] = { 2000077365a9SGeert Uytterhoeven /* TX, RX */ 2001077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), RCAR_GP_PIN(5, 19), 2002077365a9SGeert Uytterhoeven }; 2003077365a9SGeert Uytterhoeven 2004077365a9SGeert Uytterhoeven static const unsigned int can1_data_c_mux[] = { 2005077365a9SGeert Uytterhoeven CAN1_TX_C_MARK, CAN1_RX_C_MARK, 2006077365a9SGeert Uytterhoeven }; 2007077365a9SGeert Uytterhoeven 2008077365a9SGeert Uytterhoeven static const unsigned int can1_data_d_pins[] = { 2009077365a9SGeert Uytterhoeven /* TX, RX */ 2010077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 29), RCAR_GP_PIN(4, 31), 2011077365a9SGeert Uytterhoeven }; 2012077365a9SGeert Uytterhoeven 2013077365a9SGeert Uytterhoeven static const unsigned int can1_data_d_mux[] = { 2014077365a9SGeert Uytterhoeven CAN1_TX_D_MARK, CAN1_RX_D_MARK, 2015077365a9SGeert Uytterhoeven }; 2016077365a9SGeert Uytterhoeven 2017077365a9SGeert Uytterhoeven static const unsigned int can_clk_pins[] = { 2018077365a9SGeert Uytterhoeven /* CLK */ 2019077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 2), 2020077365a9SGeert Uytterhoeven }; 2021077365a9SGeert Uytterhoeven 2022077365a9SGeert Uytterhoeven static const unsigned int can_clk_mux[] = { 2023077365a9SGeert Uytterhoeven CAN_CLK_MARK, 2024077365a9SGeert Uytterhoeven }; 2025077365a9SGeert Uytterhoeven 2026077365a9SGeert Uytterhoeven static const unsigned int can_clk_b_pins[] = { 2027077365a9SGeert Uytterhoeven /* CLK */ 2028077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 21), 2029077365a9SGeert Uytterhoeven }; 2030077365a9SGeert Uytterhoeven 2031077365a9SGeert Uytterhoeven static const unsigned int can_clk_b_mux[] = { 2032077365a9SGeert Uytterhoeven CAN_CLK_B_MARK, 2033077365a9SGeert Uytterhoeven }; 2034077365a9SGeert Uytterhoeven 2035077365a9SGeert Uytterhoeven static const unsigned int can_clk_c_pins[] = { 2036077365a9SGeert Uytterhoeven /* CLK */ 2037077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), 2038077365a9SGeert Uytterhoeven }; 2039077365a9SGeert Uytterhoeven 2040077365a9SGeert Uytterhoeven static const unsigned int can_clk_c_mux[] = { 2041077365a9SGeert Uytterhoeven CAN_CLK_C_MARK, 2042077365a9SGeert Uytterhoeven }; 2043077365a9SGeert Uytterhoeven 2044077365a9SGeert Uytterhoeven static const unsigned int can_clk_d_pins[] = { 2045077365a9SGeert Uytterhoeven /* CLK */ 2046077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 19), 2047077365a9SGeert Uytterhoeven }; 2048077365a9SGeert Uytterhoeven 2049077365a9SGeert Uytterhoeven static const unsigned int can_clk_d_mux[] = { 2050077365a9SGeert Uytterhoeven CAN_CLK_D_MARK, 2051077365a9SGeert Uytterhoeven }; 2052077365a9SGeert Uytterhoeven 2053077365a9SGeert Uytterhoeven /* - DU --------------------------------------------------------------------- */ 2054077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_pins[] = { 2055077365a9SGeert Uytterhoeven /* R[7:2], G[7:2], B[7:2] */ 2056077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 5), 2057077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 2), 2058077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13), 2059077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 10), 2060077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21), 2061077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 18), 2062077365a9SGeert Uytterhoeven }; 2063077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_mux[] = { 2064077365a9SGeert Uytterhoeven DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, 2065077365a9SGeert Uytterhoeven DU1_DR3_MARK, DU1_DR2_MARK, 2066077365a9SGeert Uytterhoeven DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, 2067077365a9SGeert Uytterhoeven DU1_DG3_MARK, DU1_DG2_MARK, 2068077365a9SGeert Uytterhoeven DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, 2069077365a9SGeert Uytterhoeven DU1_DB3_MARK, DU1_DB2_MARK, 2070077365a9SGeert Uytterhoeven }; 2071077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_pins[] = { 2072077365a9SGeert Uytterhoeven /* R[7:0], G[7:0], B[7:0] */ 2073077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 5), 2074077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 2), 2075077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 0), 2076077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13), 2077077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 10), 2078077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 8), 2079077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21), 2080077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 18), 2081077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16), 2082077365a9SGeert Uytterhoeven }; 2083077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_mux[] = { 2084077365a9SGeert Uytterhoeven DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, 2085077365a9SGeert Uytterhoeven DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK, 2086077365a9SGeert Uytterhoeven DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, 2087077365a9SGeert Uytterhoeven DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK, 2088077365a9SGeert Uytterhoeven DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, 2089077365a9SGeert Uytterhoeven DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK, 2090077365a9SGeert Uytterhoeven }; 2091077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_pins[] = { 2092077365a9SGeert Uytterhoeven /* CLKOUT */ 2093077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 25), 2094077365a9SGeert Uytterhoeven }; 2095077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_mux[] = { 2096077365a9SGeert Uytterhoeven DU1_DOTCLKOUT0_MARK 2097077365a9SGeert Uytterhoeven }; 2098077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_pins[] = { 2099077365a9SGeert Uytterhoeven /* CLKOUT */ 2100077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), 2101077365a9SGeert Uytterhoeven }; 2102077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_mux[] = { 2103077365a9SGeert Uytterhoeven DU1_DOTCLKOUT1_MARK 2104077365a9SGeert Uytterhoeven }; 2105077365a9SGeert Uytterhoeven static const unsigned int du_sync_pins[] = { 2106077365a9SGeert Uytterhoeven /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ 2107077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27), 2108077365a9SGeert Uytterhoeven }; 2109077365a9SGeert Uytterhoeven static const unsigned int du_sync_mux[] = { 2110077365a9SGeert Uytterhoeven DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK 2111077365a9SGeert Uytterhoeven }; 2112077365a9SGeert Uytterhoeven static const unsigned int du_oddf_pins[] = { 2113077365a9SGeert Uytterhoeven /* EXDISP/EXODDF/EXCDE */ 2114077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 29), 2115077365a9SGeert Uytterhoeven }; 2116077365a9SGeert Uytterhoeven static const unsigned int du_oddf_mux[] = { 2117077365a9SGeert Uytterhoeven DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, 2118077365a9SGeert Uytterhoeven }; 2119077365a9SGeert Uytterhoeven static const unsigned int du_cde_pins[] = { 2120077365a9SGeert Uytterhoeven /* CDE */ 2121077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 31), 2122077365a9SGeert Uytterhoeven }; 2123077365a9SGeert Uytterhoeven static const unsigned int du_cde_mux[] = { 2124077365a9SGeert Uytterhoeven DU1_CDE_MARK, 2125077365a9SGeert Uytterhoeven }; 2126077365a9SGeert Uytterhoeven static const unsigned int du_disp_pins[] = { 2127077365a9SGeert Uytterhoeven /* DISP */ 2128077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 30), 2129077365a9SGeert Uytterhoeven }; 2130077365a9SGeert Uytterhoeven static const unsigned int du_disp_mux[] = { 2131077365a9SGeert Uytterhoeven DU1_DISP_MARK, 2132077365a9SGeert Uytterhoeven }; 2133077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_pins[] = { 2134077365a9SGeert Uytterhoeven /* CLKIN */ 2135077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 31), 2136077365a9SGeert Uytterhoeven }; 2137077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_mux[] = { 2138077365a9SGeert Uytterhoeven DU0_DOTCLKIN_MARK 2139077365a9SGeert Uytterhoeven }; 2140077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_pins[] = { 2141077365a9SGeert Uytterhoeven /* CLKIN */ 2142077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 24), 2143077365a9SGeert Uytterhoeven }; 2144077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_mux[] = { 2145077365a9SGeert Uytterhoeven DU1_DOTCLKIN_MARK 2146077365a9SGeert Uytterhoeven }; 2147077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_b_pins[] = { 2148077365a9SGeert Uytterhoeven /* CLKIN */ 2149077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 19), 2150077365a9SGeert Uytterhoeven }; 2151077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_b_mux[] = { 2152077365a9SGeert Uytterhoeven DU1_DOTCLKIN_B_MARK, 2153077365a9SGeert Uytterhoeven }; 2154077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_c_pins[] = { 2155077365a9SGeert Uytterhoeven /* CLKIN */ 2156077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 20), 2157077365a9SGeert Uytterhoeven }; 2158077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_c_mux[] = { 2159077365a9SGeert Uytterhoeven DU1_DOTCLKIN_C_MARK, 2160077365a9SGeert Uytterhoeven }; 2161077365a9SGeert Uytterhoeven /* - ETH -------------------------------------------------------------------- */ 2162077365a9SGeert Uytterhoeven static const unsigned int eth_link_pins[] = { 2163077365a9SGeert Uytterhoeven /* LINK */ 2164077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), 2165077365a9SGeert Uytterhoeven }; 2166077365a9SGeert Uytterhoeven static const unsigned int eth_link_mux[] = { 2167077365a9SGeert Uytterhoeven ETH_LINK_MARK, 2168077365a9SGeert Uytterhoeven }; 2169077365a9SGeert Uytterhoeven static const unsigned int eth_magic_pins[] = { 2170077365a9SGeert Uytterhoeven /* MAGIC */ 2171077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 22), 2172077365a9SGeert Uytterhoeven }; 2173077365a9SGeert Uytterhoeven static const unsigned int eth_magic_mux[] = { 2174077365a9SGeert Uytterhoeven ETH_MAGIC_MARK, 2175077365a9SGeert Uytterhoeven }; 2176077365a9SGeert Uytterhoeven static const unsigned int eth_mdio_pins[] = { 2177077365a9SGeert Uytterhoeven /* MDC, MDIO */ 2178077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 13), 2179077365a9SGeert Uytterhoeven }; 2180077365a9SGeert Uytterhoeven static const unsigned int eth_mdio_mux[] = { 2181077365a9SGeert Uytterhoeven ETH_MDC_MARK, ETH_MDIO_MARK, 2182077365a9SGeert Uytterhoeven }; 2183077365a9SGeert Uytterhoeven static const unsigned int eth_rmii_pins[] = { 2184077365a9SGeert Uytterhoeven /* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK */ 2185077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 15), 2186077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 20), 2187077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 21), RCAR_GP_PIN(5, 19), 2188077365a9SGeert Uytterhoeven }; 2189077365a9SGeert Uytterhoeven static const unsigned int eth_rmii_mux[] = { 2190077365a9SGeert Uytterhoeven ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK, 2191077365a9SGeert Uytterhoeven ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK, 2192077365a9SGeert Uytterhoeven }; 2193077365a9SGeert Uytterhoeven 2194077365a9SGeert Uytterhoeven /* - HSCIF0 ----------------------------------------------------------------- */ 2195077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_pins[] = { 2196077365a9SGeert Uytterhoeven /* RX, TX */ 2197077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4), 2198077365a9SGeert Uytterhoeven }; 2199077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_mux[] = { 2200077365a9SGeert Uytterhoeven HRX0_MARK, HTX0_MARK, 2201077365a9SGeert Uytterhoeven }; 2202077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_pins[] = { 2203077365a9SGeert Uytterhoeven /* SCK */ 2204077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 2), 2205077365a9SGeert Uytterhoeven }; 2206077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_mux[] = { 2207077365a9SGeert Uytterhoeven HSCK0_MARK, 2208077365a9SGeert Uytterhoeven }; 2209077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_pins[] = { 2210077365a9SGeert Uytterhoeven /* RTS, CTS */ 2211077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 0), 2212077365a9SGeert Uytterhoeven }; 2213077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_mux[] = { 2214077365a9SGeert Uytterhoeven HRTS0_N_MARK, HCTS0_N_MARK, 2215077365a9SGeert Uytterhoeven }; 2216077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_b_pins[] = { 2217077365a9SGeert Uytterhoeven /* RX, TX */ 2218077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 15), 2219077365a9SGeert Uytterhoeven }; 2220077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_b_mux[] = { 2221077365a9SGeert Uytterhoeven HRX0_B_MARK, HTX0_B_MARK, 2222077365a9SGeert Uytterhoeven }; 2223077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_b_pins[] = { 2224077365a9SGeert Uytterhoeven /* RTS, CTS */ 2225077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13), 2226077365a9SGeert Uytterhoeven }; 2227077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_b_mux[] = { 2228077365a9SGeert Uytterhoeven HRTS0_N_B_MARK, HCTS0_N_B_MARK, 2229077365a9SGeert Uytterhoeven }; 2230077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_c_pins[] = { 2231077365a9SGeert Uytterhoeven /* RX, TX */ 2232077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 2233077365a9SGeert Uytterhoeven }; 2234077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_c_mux[] = { 2235077365a9SGeert Uytterhoeven HRX0_C_MARK, HTX0_C_MARK, 2236077365a9SGeert Uytterhoeven }; 2237077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_c_pins[] = { 2238077365a9SGeert Uytterhoeven /* SCK */ 2239077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), 2240077365a9SGeert Uytterhoeven }; 2241077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_c_mux[] = { 2242077365a9SGeert Uytterhoeven HSCK0_C_MARK, 2243077365a9SGeert Uytterhoeven }; 2244077365a9SGeert Uytterhoeven /* - HSCIF1 ----------------------------------------------------------------- */ 2245077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_pins[] = { 2246077365a9SGeert Uytterhoeven /* RX, TX */ 2247077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 6), 2248077365a9SGeert Uytterhoeven }; 2249077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_mux[] = { 2250077365a9SGeert Uytterhoeven HRX1_MARK, HTX1_MARK, 2251077365a9SGeert Uytterhoeven }; 2252077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_pins[] = { 2253077365a9SGeert Uytterhoeven /* SCK */ 2254077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 7), 2255077365a9SGeert Uytterhoeven }; 2256077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_mux[] = { 2257077365a9SGeert Uytterhoeven HSCK1_MARK, 2258077365a9SGeert Uytterhoeven }; 2259077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_pins[] = { 2260077365a9SGeert Uytterhoeven /* RTS, CTS */ 2261077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 9), RCAR_GP_PIN(7, 8), 2262077365a9SGeert Uytterhoeven }; 2263077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_mux[] = { 2264077365a9SGeert Uytterhoeven HRTS1_N_MARK, HCTS1_N_MARK, 2265077365a9SGeert Uytterhoeven }; 2266077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_pins[] = { 2267077365a9SGeert Uytterhoeven /* RX, TX */ 2268077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18), 2269077365a9SGeert Uytterhoeven }; 2270077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_mux[] = { 2271077365a9SGeert Uytterhoeven HRX1_B_MARK, HTX1_B_MARK, 2272077365a9SGeert Uytterhoeven }; 2273077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_c_pins[] = { 2274077365a9SGeert Uytterhoeven /* RX, TX */ 2275077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 14), RCAR_GP_PIN(7, 15), 2276077365a9SGeert Uytterhoeven }; 2277077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_c_mux[] = { 2278077365a9SGeert Uytterhoeven HRX1_C_MARK, HTX1_C_MARK, 2279077365a9SGeert Uytterhoeven }; 2280077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_c_pins[] = { 2281077365a9SGeert Uytterhoeven /* SCK */ 2282077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 16), 2283077365a9SGeert Uytterhoeven }; 2284077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_c_mux[] = { 2285077365a9SGeert Uytterhoeven HSCK1_C_MARK, 2286077365a9SGeert Uytterhoeven }; 2287077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_c_pins[] = { 2288077365a9SGeert Uytterhoeven /* RTS, CTS */ 2289077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 18), RCAR_GP_PIN(7, 17), 2290077365a9SGeert Uytterhoeven }; 2291077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_c_mux[] = { 2292077365a9SGeert Uytterhoeven HRTS1_N_C_MARK, HCTS1_N_C_MARK, 2293077365a9SGeert Uytterhoeven }; 2294077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_d_pins[] = { 2295077365a9SGeert Uytterhoeven /* RX, TX */ 2296077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 18), 2297077365a9SGeert Uytterhoeven }; 2298077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_d_mux[] = { 2299077365a9SGeert Uytterhoeven HRX1_D_MARK, HTX1_D_MARK, 2300077365a9SGeert Uytterhoeven }; 2301077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_e_pins[] = { 2302077365a9SGeert Uytterhoeven /* SCK */ 2303077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), 2304077365a9SGeert Uytterhoeven }; 2305077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_e_mux[] = { 2306077365a9SGeert Uytterhoeven HSCK1_E_MARK, 2307077365a9SGeert Uytterhoeven }; 2308077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_e_pins[] = { 2309077365a9SGeert Uytterhoeven /* RTS, CTS */ 2310077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 7), 2311077365a9SGeert Uytterhoeven }; 2312077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_e_mux[] = { 2313077365a9SGeert Uytterhoeven HRTS1_N_E_MARK, HCTS1_N_E_MARK, 2314077365a9SGeert Uytterhoeven }; 2315077365a9SGeert Uytterhoeven /* - HSCIF2 ----------------------------------------------------------------- */ 2316077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_pins[] = { 2317077365a9SGeert Uytterhoeven /* RX, TX */ 2318077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17), 2319077365a9SGeert Uytterhoeven }; 2320077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_mux[] = { 2321077365a9SGeert Uytterhoeven HRX2_MARK, HTX2_MARK, 2322077365a9SGeert Uytterhoeven }; 2323077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_pins[] = { 2324077365a9SGeert Uytterhoeven /* SCK */ 2325077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), 2326077365a9SGeert Uytterhoeven }; 2327077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_mux[] = { 2328077365a9SGeert Uytterhoeven HSCK2_MARK, 2329077365a9SGeert Uytterhoeven }; 2330077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_pins[] = { 2331077365a9SGeert Uytterhoeven /* RTS, CTS */ 2332077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13), 2333077365a9SGeert Uytterhoeven }; 2334077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_mux[] = { 2335077365a9SGeert Uytterhoeven HRTS2_N_MARK, HCTS2_N_MARK, 2336077365a9SGeert Uytterhoeven }; 2337077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_b_pins[] = { 2338077365a9SGeert Uytterhoeven /* RX, TX */ 2339077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 22), 2340077365a9SGeert Uytterhoeven }; 2341077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_b_mux[] = { 2342077365a9SGeert Uytterhoeven HRX2_B_MARK, HTX2_B_MARK, 2343077365a9SGeert Uytterhoeven }; 2344077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_b_pins[] = { 2345077365a9SGeert Uytterhoeven /* RTS, CTS */ 2346077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 21), 2347077365a9SGeert Uytterhoeven }; 2348077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_b_mux[] = { 2349077365a9SGeert Uytterhoeven HRTS2_N_B_MARK, HCTS2_N_B_MARK, 2350077365a9SGeert Uytterhoeven }; 2351077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_c_pins[] = { 2352077365a9SGeert Uytterhoeven /* RX, TX */ 2353077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 2354077365a9SGeert Uytterhoeven }; 2355077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_c_mux[] = { 2356077365a9SGeert Uytterhoeven HRX2_C_MARK, HTX2_C_MARK, 2357077365a9SGeert Uytterhoeven }; 2358077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_c_pins[] = { 2359077365a9SGeert Uytterhoeven /* SCK */ 2360077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), 2361077365a9SGeert Uytterhoeven }; 2362077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_c_mux[] = { 2363077365a9SGeert Uytterhoeven HSCK2_C_MARK, 2364077365a9SGeert Uytterhoeven }; 2365077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_d_pins[] = { 2366077365a9SGeert Uytterhoeven /* RX, TX */ 2367077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20), RCAR_GP_PIN(5, 31), 2368077365a9SGeert Uytterhoeven }; 2369077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_d_mux[] = { 2370077365a9SGeert Uytterhoeven HRX2_B_MARK, HTX2_D_MARK, 2371077365a9SGeert Uytterhoeven }; 2372077365a9SGeert Uytterhoeven /* - I2C0 ------------------------------------------------------------------- */ 2373077365a9SGeert Uytterhoeven static const unsigned int i2c0_pins[] = { 2374077365a9SGeert Uytterhoeven /* SCL, SDA */ 2375077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 2376077365a9SGeert Uytterhoeven }; 2377077365a9SGeert Uytterhoeven static const unsigned int i2c0_mux[] = { 2378077365a9SGeert Uytterhoeven I2C0_SCL_MARK, I2C0_SDA_MARK, 2379077365a9SGeert Uytterhoeven }; 2380077365a9SGeert Uytterhoeven static const unsigned int i2c0_b_pins[] = { 2381077365a9SGeert Uytterhoeven /* SCL, SDA */ 2382077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), 2383077365a9SGeert Uytterhoeven }; 2384077365a9SGeert Uytterhoeven static const unsigned int i2c0_b_mux[] = { 2385077365a9SGeert Uytterhoeven I2C0_SCL_B_MARK, I2C0_SDA_B_MARK, 2386077365a9SGeert Uytterhoeven }; 2387077365a9SGeert Uytterhoeven static const unsigned int i2c0_c_pins[] = { 2388077365a9SGeert Uytterhoeven /* SCL, SDA */ 2389077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 16), RCAR_GP_PIN(1, 1), 2390077365a9SGeert Uytterhoeven }; 2391077365a9SGeert Uytterhoeven static const unsigned int i2c0_c_mux[] = { 2392077365a9SGeert Uytterhoeven I2C0_SCL_C_MARK, I2C0_SDA_C_MARK, 2393077365a9SGeert Uytterhoeven }; 2394077365a9SGeert Uytterhoeven /* - I2C1 ------------------------------------------------------------------- */ 2395077365a9SGeert Uytterhoeven static const unsigned int i2c1_pins[] = { 2396077365a9SGeert Uytterhoeven /* SCL, SDA */ 2397077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11), 2398077365a9SGeert Uytterhoeven }; 2399077365a9SGeert Uytterhoeven static const unsigned int i2c1_mux[] = { 2400077365a9SGeert Uytterhoeven I2C1_SCL_MARK, I2C1_SDA_MARK, 2401077365a9SGeert Uytterhoeven }; 2402077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_pins[] = { 2403077365a9SGeert Uytterhoeven /* SCL, SDA */ 2404077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), 2405077365a9SGeert Uytterhoeven }; 2406077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_mux[] = { 2407077365a9SGeert Uytterhoeven I2C1_SCL_B_MARK, I2C1_SDA_B_MARK, 2408077365a9SGeert Uytterhoeven }; 2409077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_pins[] = { 2410077365a9SGeert Uytterhoeven /* SCL, SDA */ 2411077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), 2412077365a9SGeert Uytterhoeven }; 2413077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_mux[] = { 2414077365a9SGeert Uytterhoeven I2C1_SCL_C_MARK, I2C1_SDA_C_MARK, 2415077365a9SGeert Uytterhoeven }; 2416077365a9SGeert Uytterhoeven static const unsigned int i2c1_d_pins[] = { 2417077365a9SGeert Uytterhoeven /* SCL, SDA */ 2418077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), 2419077365a9SGeert Uytterhoeven }; 2420077365a9SGeert Uytterhoeven static const unsigned int i2c1_d_mux[] = { 2421077365a9SGeert Uytterhoeven I2C1_SCL_D_MARK, I2C1_SDA_D_MARK, 2422077365a9SGeert Uytterhoeven }; 2423077365a9SGeert Uytterhoeven static const unsigned int i2c1_e_pins[] = { 2424077365a9SGeert Uytterhoeven /* SCL, SDA */ 2425077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 15), RCAR_GP_PIN(7, 16), 2426077365a9SGeert Uytterhoeven }; 2427077365a9SGeert Uytterhoeven static const unsigned int i2c1_e_mux[] = { 2428077365a9SGeert Uytterhoeven I2C1_SCL_E_MARK, I2C1_SDA_E_MARK, 2429077365a9SGeert Uytterhoeven }; 2430077365a9SGeert Uytterhoeven /* - I2C2 ------------------------------------------------------------------- */ 2431077365a9SGeert Uytterhoeven static const unsigned int i2c2_pins[] = { 2432077365a9SGeert Uytterhoeven /* SCL, SDA */ 2433077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), 2434077365a9SGeert Uytterhoeven }; 2435077365a9SGeert Uytterhoeven static const unsigned int i2c2_mux[] = { 2436077365a9SGeert Uytterhoeven I2C2_SCL_MARK, I2C2_SDA_MARK, 2437077365a9SGeert Uytterhoeven }; 2438077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_pins[] = { 2439077365a9SGeert Uytterhoeven /* SCL, SDA */ 2440077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 29), 2441077365a9SGeert Uytterhoeven }; 2442077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_mux[] = { 2443077365a9SGeert Uytterhoeven I2C2_SCL_B_MARK, I2C2_SDA_B_MARK, 2444077365a9SGeert Uytterhoeven }; 2445077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_pins[] = { 2446077365a9SGeert Uytterhoeven /* SCL, SDA */ 2447077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), 2448077365a9SGeert Uytterhoeven }; 2449077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_mux[] = { 2450077365a9SGeert Uytterhoeven I2C2_SCL_C_MARK, I2C2_SDA_C_MARK, 2451077365a9SGeert Uytterhoeven }; 2452077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_pins[] = { 2453077365a9SGeert Uytterhoeven /* SCL, SDA */ 2454077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 18), 2455077365a9SGeert Uytterhoeven }; 2456077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_mux[] = { 2457077365a9SGeert Uytterhoeven I2C2_SCL_D_MARK, I2C2_SDA_D_MARK, 2458077365a9SGeert Uytterhoeven }; 2459077365a9SGeert Uytterhoeven /* - I2C3 ------------------------------------------------------------------- */ 2460077365a9SGeert Uytterhoeven static const unsigned int i2c3_pins[] = { 2461077365a9SGeert Uytterhoeven /* SCL, SDA */ 2462077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), 2463077365a9SGeert Uytterhoeven }; 2464077365a9SGeert Uytterhoeven static const unsigned int i2c3_mux[] = { 2465077365a9SGeert Uytterhoeven I2C3_SCL_MARK, I2C3_SDA_MARK, 2466077365a9SGeert Uytterhoeven }; 2467077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_pins[] = { 2468077365a9SGeert Uytterhoeven /* SCL, SDA */ 2469077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), 2470077365a9SGeert Uytterhoeven }; 2471077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_mux[] = { 2472077365a9SGeert Uytterhoeven I2C3_SCL_B_MARK, I2C3_SDA_B_MARK, 2473077365a9SGeert Uytterhoeven }; 2474077365a9SGeert Uytterhoeven static const unsigned int i2c3_c_pins[] = { 2475077365a9SGeert Uytterhoeven /* SCL, SDA */ 2476077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23), 2477077365a9SGeert Uytterhoeven }; 2478077365a9SGeert Uytterhoeven static const unsigned int i2c3_c_mux[] = { 2479077365a9SGeert Uytterhoeven I2C3_SCL_C_MARK, I2C3_SDA_C_MARK, 2480077365a9SGeert Uytterhoeven }; 2481077365a9SGeert Uytterhoeven static const unsigned int i2c3_d_pins[] = { 2482077365a9SGeert Uytterhoeven /* SCL, SDA */ 2483077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), 2484077365a9SGeert Uytterhoeven }; 2485077365a9SGeert Uytterhoeven static const unsigned int i2c3_d_mux[] = { 2486077365a9SGeert Uytterhoeven I2C3_SCL_D_MARK, I2C3_SDA_D_MARK, 2487077365a9SGeert Uytterhoeven }; 2488077365a9SGeert Uytterhoeven /* - I2C4 ------------------------------------------------------------------- */ 2489077365a9SGeert Uytterhoeven static const unsigned int i2c4_pins[] = { 2490077365a9SGeert Uytterhoeven /* SCL, SDA */ 2491077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), 2492077365a9SGeert Uytterhoeven }; 2493077365a9SGeert Uytterhoeven static const unsigned int i2c4_mux[] = { 2494077365a9SGeert Uytterhoeven I2C4_SCL_MARK, I2C4_SDA_MARK, 2495077365a9SGeert Uytterhoeven }; 2496077365a9SGeert Uytterhoeven static const unsigned int i2c4_b_pins[] = { 2497077365a9SGeert Uytterhoeven /* SCL, SDA */ 2498077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), 2499077365a9SGeert Uytterhoeven }; 2500077365a9SGeert Uytterhoeven static const unsigned int i2c4_b_mux[] = { 2501077365a9SGeert Uytterhoeven I2C4_SCL_B_MARK, I2C4_SDA_B_MARK, 2502077365a9SGeert Uytterhoeven }; 2503077365a9SGeert Uytterhoeven static const unsigned int i2c4_c_pins[] = { 2504077365a9SGeert Uytterhoeven /* SCL, SDA */ 2505077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 13), RCAR_GP_PIN(7, 14), 2506077365a9SGeert Uytterhoeven }; 2507077365a9SGeert Uytterhoeven static const unsigned int i2c4_c_mux[] = { 2508077365a9SGeert Uytterhoeven I2C4_SCL_C_MARK, I2C4_SDA_C_MARK, 2509077365a9SGeert Uytterhoeven }; 2510077365a9SGeert Uytterhoeven /* - I2C7 ------------------------------------------------------------------- */ 2511077365a9SGeert Uytterhoeven static const unsigned int i2c7_pins[] = { 2512077365a9SGeert Uytterhoeven /* SCL, SDA */ 2513077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), 2514077365a9SGeert Uytterhoeven }; 2515077365a9SGeert Uytterhoeven static const unsigned int i2c7_mux[] = { 2516077365a9SGeert Uytterhoeven IIC0_SCL_MARK, IIC0_SDA_MARK, 2517077365a9SGeert Uytterhoeven }; 2518077365a9SGeert Uytterhoeven static const unsigned int i2c7_b_pins[] = { 2519077365a9SGeert Uytterhoeven /* SCL, SDA */ 2520077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), 2521077365a9SGeert Uytterhoeven }; 2522077365a9SGeert Uytterhoeven static const unsigned int i2c7_b_mux[] = { 2523077365a9SGeert Uytterhoeven IIC0_SCL_B_MARK, IIC0_SDA_B_MARK, 2524077365a9SGeert Uytterhoeven }; 2525077365a9SGeert Uytterhoeven static const unsigned int i2c7_c_pins[] = { 2526077365a9SGeert Uytterhoeven /* SCL, SDA */ 2527077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), 2528077365a9SGeert Uytterhoeven }; 2529077365a9SGeert Uytterhoeven static const unsigned int i2c7_c_mux[] = { 2530077365a9SGeert Uytterhoeven IIC0_SCL_C_MARK, IIC0_SDA_C_MARK, 2531077365a9SGeert Uytterhoeven }; 2532077365a9SGeert Uytterhoeven /* - I2C8 ------------------------------------------------------------------- */ 2533077365a9SGeert Uytterhoeven static const unsigned int i2c8_pins[] = { 2534077365a9SGeert Uytterhoeven /* SCL, SDA */ 2535077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), 2536077365a9SGeert Uytterhoeven }; 2537077365a9SGeert Uytterhoeven static const unsigned int i2c8_mux[] = { 2538077365a9SGeert Uytterhoeven IIC1_SCL_MARK, IIC1_SDA_MARK, 2539077365a9SGeert Uytterhoeven }; 2540077365a9SGeert Uytterhoeven static const unsigned int i2c8_b_pins[] = { 2541077365a9SGeert Uytterhoeven /* SCL, SDA */ 2542077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), 2543077365a9SGeert Uytterhoeven }; 2544077365a9SGeert Uytterhoeven static const unsigned int i2c8_b_mux[] = { 2545077365a9SGeert Uytterhoeven IIC1_SCL_B_MARK, IIC1_SDA_B_MARK, 2546077365a9SGeert Uytterhoeven }; 2547077365a9SGeert Uytterhoeven static const unsigned int i2c8_c_pins[] = { 2548077365a9SGeert Uytterhoeven /* SCL, SDA */ 2549077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 22), RCAR_GP_PIN(6, 23), 2550077365a9SGeert Uytterhoeven }; 2551077365a9SGeert Uytterhoeven static const unsigned int i2c8_c_mux[] = { 2552077365a9SGeert Uytterhoeven IIC1_SCL_C_MARK, IIC1_SDA_C_MARK, 2553077365a9SGeert Uytterhoeven }; 2554077365a9SGeert Uytterhoeven /* - INTC ------------------------------------------------------------------- */ 2555077365a9SGeert Uytterhoeven static const unsigned int intc_irq0_pins[] = { 2556077365a9SGeert Uytterhoeven /* IRQ */ 2557077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 10), 2558077365a9SGeert Uytterhoeven }; 2559077365a9SGeert Uytterhoeven static const unsigned int intc_irq0_mux[] = { 2560077365a9SGeert Uytterhoeven IRQ0_MARK, 2561077365a9SGeert Uytterhoeven }; 2562077365a9SGeert Uytterhoeven static const unsigned int intc_irq1_pins[] = { 2563077365a9SGeert Uytterhoeven /* IRQ */ 2564077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 11), 2565077365a9SGeert Uytterhoeven }; 2566077365a9SGeert Uytterhoeven static const unsigned int intc_irq1_mux[] = { 2567077365a9SGeert Uytterhoeven IRQ1_MARK, 2568077365a9SGeert Uytterhoeven }; 2569077365a9SGeert Uytterhoeven static const unsigned int intc_irq2_pins[] = { 2570077365a9SGeert Uytterhoeven /* IRQ */ 2571077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 12), 2572077365a9SGeert Uytterhoeven }; 2573077365a9SGeert Uytterhoeven static const unsigned int intc_irq2_mux[] = { 2574077365a9SGeert Uytterhoeven IRQ2_MARK, 2575077365a9SGeert Uytterhoeven }; 2576077365a9SGeert Uytterhoeven static const unsigned int intc_irq3_pins[] = { 2577077365a9SGeert Uytterhoeven /* IRQ */ 2578077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 13), 2579077365a9SGeert Uytterhoeven }; 2580077365a9SGeert Uytterhoeven static const unsigned int intc_irq3_mux[] = { 2581077365a9SGeert Uytterhoeven IRQ3_MARK, 2582077365a9SGeert Uytterhoeven }; 25838d3b2e3dSBiju Das 25848d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 2585077365a9SGeert Uytterhoeven /* - MLB+ ------------------------------------------------------------------- */ 2586077365a9SGeert Uytterhoeven static const unsigned int mlb_3pin_pins[] = { 2587077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9), 2588077365a9SGeert Uytterhoeven }; 2589077365a9SGeert Uytterhoeven static const unsigned int mlb_3pin_mux[] = { 2590077365a9SGeert Uytterhoeven MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, 2591077365a9SGeert Uytterhoeven }; 25928d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 25938d3b2e3dSBiju Das 2594077365a9SGeert Uytterhoeven /* - MMCIF ------------------------------------------------------------------ */ 25951f38e713SGeert Uytterhoeven static const unsigned int mmc_data_pins[] = { 2596077365a9SGeert Uytterhoeven /* D[0:7] */ 2597077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19), 2598077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21), 2599077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 22), RCAR_GP_PIN(6, 23), 2600077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), 2601077365a9SGeert Uytterhoeven }; 26021f38e713SGeert Uytterhoeven static const unsigned int mmc_data_mux[] = { 2603077365a9SGeert Uytterhoeven MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK, 2604077365a9SGeert Uytterhoeven MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK, 2605077365a9SGeert Uytterhoeven }; 26061f38e713SGeert Uytterhoeven static const unsigned int mmc_data_b_pins[] = { 2607077365a9SGeert Uytterhoeven /* D[0:7] */ 2608077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19), 2609077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21), 2610077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 22), RCAR_GP_PIN(6, 23), 2611077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7), 2612077365a9SGeert Uytterhoeven }; 26131f38e713SGeert Uytterhoeven static const unsigned int mmc_data_b_mux[] = { 2614077365a9SGeert Uytterhoeven MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK, 2615077365a9SGeert Uytterhoeven MMC_D4_MARK, MMC_D5_MARK, MMC_D6_B_MARK, MMC_D7_B_MARK, 2616077365a9SGeert Uytterhoeven }; 2617077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_pins[] = { 2618077365a9SGeert Uytterhoeven /* CLK, CMD */ 2619077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17), 2620077365a9SGeert Uytterhoeven }; 2621077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_mux[] = { 2622077365a9SGeert Uytterhoeven MMC_CLK_MARK, MMC_CMD_MARK, 2623077365a9SGeert Uytterhoeven }; 2624077365a9SGeert Uytterhoeven /* - MSIOF0 ----------------------------------------------------------------- */ 2625077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_pins[] = { 2626077365a9SGeert Uytterhoeven /* SCK */ 2627077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 24), 2628077365a9SGeert Uytterhoeven }; 2629077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_mux[] = { 2630077365a9SGeert Uytterhoeven MSIOF0_SCK_MARK, 2631077365a9SGeert Uytterhoeven }; 2632077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_pins[] = { 2633077365a9SGeert Uytterhoeven /* SYNC */ 2634077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 25), 2635077365a9SGeert Uytterhoeven }; 2636077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_mux[] = { 2637077365a9SGeert Uytterhoeven MSIOF0_SYNC_MARK, 2638077365a9SGeert Uytterhoeven }; 2639077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_pins[] = { 2640077365a9SGeert Uytterhoeven /* SS1 */ 2641077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), 2642077365a9SGeert Uytterhoeven }; 2643077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_mux[] = { 2644077365a9SGeert Uytterhoeven MSIOF0_SS1_MARK, 2645077365a9SGeert Uytterhoeven }; 2646077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_pins[] = { 2647077365a9SGeert Uytterhoeven /* SS2 */ 2648077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 29), 2649077365a9SGeert Uytterhoeven }; 2650077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_mux[] = { 2651077365a9SGeert Uytterhoeven MSIOF0_SS2_MARK, 2652077365a9SGeert Uytterhoeven }; 2653077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_pins[] = { 2654077365a9SGeert Uytterhoeven /* RXD */ 2655077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 27), 2656077365a9SGeert Uytterhoeven }; 2657077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_mux[] = { 2658077365a9SGeert Uytterhoeven MSIOF0_RXD_MARK, 2659077365a9SGeert Uytterhoeven }; 2660077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_pins[] = { 2661077365a9SGeert Uytterhoeven /* TXD */ 2662077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 26), 2663077365a9SGeert Uytterhoeven }; 2664077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_mux[] = { 2665077365a9SGeert Uytterhoeven MSIOF0_TXD_MARK, 2666077365a9SGeert Uytterhoeven }; 2667077365a9SGeert Uytterhoeven 2668077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_b_pins[] = { 2669077365a9SGeert Uytterhoeven /* SCK */ 2670077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 16), 2671077365a9SGeert Uytterhoeven }; 2672077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_b_mux[] = { 2673077365a9SGeert Uytterhoeven MSIOF0_SCK_B_MARK, 2674077365a9SGeert Uytterhoeven }; 2675077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_b_pins[] = { 2676077365a9SGeert Uytterhoeven /* SYNC */ 2677077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 17), 2678077365a9SGeert Uytterhoeven }; 2679077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_b_mux[] = { 2680077365a9SGeert Uytterhoeven MSIOF0_SYNC_B_MARK, 2681077365a9SGeert Uytterhoeven }; 2682077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_b_pins[] = { 2683077365a9SGeert Uytterhoeven /* SS1 */ 2684077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 18), 2685077365a9SGeert Uytterhoeven }; 2686077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_b_mux[] = { 2687077365a9SGeert Uytterhoeven MSIOF0_SS1_B_MARK, 2688077365a9SGeert Uytterhoeven }; 2689077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_b_pins[] = { 2690077365a9SGeert Uytterhoeven /* SS2 */ 2691077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), 2692077365a9SGeert Uytterhoeven }; 2693077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_b_mux[] = { 2694077365a9SGeert Uytterhoeven MSIOF0_SS2_B_MARK, 2695077365a9SGeert Uytterhoeven }; 2696077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_b_pins[] = { 2697077365a9SGeert Uytterhoeven /* RXD */ 2698077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 21), 2699077365a9SGeert Uytterhoeven }; 2700077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_b_mux[] = { 2701077365a9SGeert Uytterhoeven MSIOF0_RXD_B_MARK, 2702077365a9SGeert Uytterhoeven }; 2703077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_b_pins[] = { 2704077365a9SGeert Uytterhoeven /* TXD */ 2705077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20), 2706077365a9SGeert Uytterhoeven }; 2707077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_b_mux[] = { 2708077365a9SGeert Uytterhoeven MSIOF0_TXD_B_MARK, 2709077365a9SGeert Uytterhoeven }; 2710077365a9SGeert Uytterhoeven 2711077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_c_pins[] = { 2712077365a9SGeert Uytterhoeven /* SCK */ 2713077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), 2714077365a9SGeert Uytterhoeven }; 2715077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_c_mux[] = { 2716077365a9SGeert Uytterhoeven MSIOF0_SCK_C_MARK, 2717077365a9SGeert Uytterhoeven }; 2718077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_c_pins[] = { 2719077365a9SGeert Uytterhoeven /* SYNC */ 2720077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 25), 2721077365a9SGeert Uytterhoeven }; 2722077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_c_mux[] = { 2723077365a9SGeert Uytterhoeven MSIOF0_SYNC_C_MARK, 2724077365a9SGeert Uytterhoeven }; 2725077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_c_pins[] = { 2726077365a9SGeert Uytterhoeven /* SS1 */ 2727077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 2728077365a9SGeert Uytterhoeven }; 2729077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_c_mux[] = { 2730077365a9SGeert Uytterhoeven MSIOF0_SS1_C_MARK, 2731077365a9SGeert Uytterhoeven }; 2732077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_c_pins[] = { 2733077365a9SGeert Uytterhoeven /* SS2 */ 2734077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), 2735077365a9SGeert Uytterhoeven }; 2736077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_c_mux[] = { 2737077365a9SGeert Uytterhoeven MSIOF0_SS2_C_MARK, 2738077365a9SGeert Uytterhoeven }; 2739077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_c_pins[] = { 2740077365a9SGeert Uytterhoeven /* RXD */ 2741077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 2742077365a9SGeert Uytterhoeven }; 2743077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_c_mux[] = { 2744077365a9SGeert Uytterhoeven MSIOF0_RXD_C_MARK, 2745077365a9SGeert Uytterhoeven }; 2746077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_c_pins[] = { 2747077365a9SGeert Uytterhoeven /* TXD */ 2748077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), 2749077365a9SGeert Uytterhoeven }; 2750077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_c_mux[] = { 2751077365a9SGeert Uytterhoeven MSIOF0_TXD_C_MARK, 2752077365a9SGeert Uytterhoeven }; 2753077365a9SGeert Uytterhoeven /* - MSIOF1 ----------------------------------------------------------------- */ 2754077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_pins[] = { 2755077365a9SGeert Uytterhoeven /* SCK */ 2756077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 22), 2757077365a9SGeert Uytterhoeven }; 2758077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_mux[] = { 2759077365a9SGeert Uytterhoeven MSIOF1_SCK_MARK, 2760077365a9SGeert Uytterhoeven }; 2761077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_pins[] = { 2762077365a9SGeert Uytterhoeven /* SYNC */ 2763077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 23), 2764077365a9SGeert Uytterhoeven }; 2765077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_mux[] = { 2766077365a9SGeert Uytterhoeven MSIOF1_SYNC_MARK, 2767077365a9SGeert Uytterhoeven }; 2768077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_pins[] = { 2769077365a9SGeert Uytterhoeven /* SS1 */ 2770077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), 2771077365a9SGeert Uytterhoeven }; 2772077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_mux[] = { 2773077365a9SGeert Uytterhoeven MSIOF1_SS1_MARK, 2774077365a9SGeert Uytterhoeven }; 2775077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_pins[] = { 2776077365a9SGeert Uytterhoeven /* SS2 */ 2777077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 25), 2778077365a9SGeert Uytterhoeven }; 2779077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_mux[] = { 2780077365a9SGeert Uytterhoeven MSIOF1_SS2_MARK, 2781077365a9SGeert Uytterhoeven }; 2782077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_pins[] = { 2783077365a9SGeert Uytterhoeven /* RXD */ 2784077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), 2785077365a9SGeert Uytterhoeven }; 2786077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_mux[] = { 2787077365a9SGeert Uytterhoeven MSIOF1_RXD_MARK, 2788077365a9SGeert Uytterhoeven }; 2789077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_pins[] = { 2790077365a9SGeert Uytterhoeven /* TXD */ 2791077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), 2792077365a9SGeert Uytterhoeven }; 2793077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_mux[] = { 2794077365a9SGeert Uytterhoeven MSIOF1_TXD_MARK, 2795077365a9SGeert Uytterhoeven }; 2796077365a9SGeert Uytterhoeven 2797077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_pins[] = { 2798077365a9SGeert Uytterhoeven /* SCK */ 2799077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 29), 2800077365a9SGeert Uytterhoeven }; 2801077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_mux[] = { 2802077365a9SGeert Uytterhoeven MSIOF1_SCK_B_MARK, 2803077365a9SGeert Uytterhoeven }; 2804077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_b_pins[] = { 2805077365a9SGeert Uytterhoeven /* SYNC */ 2806077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), 2807077365a9SGeert Uytterhoeven }; 2808077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_b_mux[] = { 2809077365a9SGeert Uytterhoeven MSIOF1_SYNC_B_MARK, 2810077365a9SGeert Uytterhoeven }; 2811077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_pins[] = { 2812077365a9SGeert Uytterhoeven /* SS1 */ 2813077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 31), 2814077365a9SGeert Uytterhoeven }; 2815077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_mux[] = { 2816077365a9SGeert Uytterhoeven MSIOF1_SS1_B_MARK, 2817077365a9SGeert Uytterhoeven }; 2818077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_pins[] = { 2819077365a9SGeert Uytterhoeven /* SS2 */ 2820077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 16), 2821077365a9SGeert Uytterhoeven }; 2822077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_mux[] = { 2823077365a9SGeert Uytterhoeven MSIOF1_SS2_B_MARK, 2824077365a9SGeert Uytterhoeven }; 2825077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_b_pins[] = { 2826077365a9SGeert Uytterhoeven /* RXD */ 2827077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 18), 2828077365a9SGeert Uytterhoeven }; 2829077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_b_mux[] = { 2830077365a9SGeert Uytterhoeven MSIOF1_RXD_B_MARK, 2831077365a9SGeert Uytterhoeven }; 2832077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_b_pins[] = { 2833077365a9SGeert Uytterhoeven /* TXD */ 2834077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 17), 2835077365a9SGeert Uytterhoeven }; 2836077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_b_mux[] = { 2837077365a9SGeert Uytterhoeven MSIOF1_TXD_B_MARK, 2838077365a9SGeert Uytterhoeven }; 2839077365a9SGeert Uytterhoeven 2840077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_c_pins[] = { 2841077365a9SGeert Uytterhoeven /* SCK */ 2842077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), 2843077365a9SGeert Uytterhoeven }; 2844077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_c_mux[] = { 2845077365a9SGeert Uytterhoeven MSIOF1_SCK_C_MARK, 2846077365a9SGeert Uytterhoeven }; 2847077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_c_pins[] = { 2848077365a9SGeert Uytterhoeven /* SYNC */ 2849077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), 2850077365a9SGeert Uytterhoeven }; 2851077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_c_mux[] = { 2852077365a9SGeert Uytterhoeven MSIOF1_SYNC_C_MARK, 2853077365a9SGeert Uytterhoeven }; 2854077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_c_pins[] = { 2855077365a9SGeert Uytterhoeven /* RXD */ 2856077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), 2857077365a9SGeert Uytterhoeven }; 2858077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_c_mux[] = { 2859077365a9SGeert Uytterhoeven MSIOF1_RXD_C_MARK, 2860077365a9SGeert Uytterhoeven }; 2861077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_c_pins[] = { 2862077365a9SGeert Uytterhoeven /* TXD */ 2863077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), 2864077365a9SGeert Uytterhoeven }; 2865077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_c_mux[] = { 2866077365a9SGeert Uytterhoeven MSIOF1_TXD_C_MARK, 2867077365a9SGeert Uytterhoeven }; 2868077365a9SGeert Uytterhoeven 2869077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_d_pins[] = { 2870077365a9SGeert Uytterhoeven /* SCK */ 2871077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 28), 2872077365a9SGeert Uytterhoeven }; 2873077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_d_mux[] = { 2874077365a9SGeert Uytterhoeven MSIOF1_SCK_D_MARK, 2875077365a9SGeert Uytterhoeven }; 2876077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_d_pins[] = { 2877077365a9SGeert Uytterhoeven /* SYNC */ 2878077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 30), 2879077365a9SGeert Uytterhoeven }; 2880077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_d_mux[] = { 2881077365a9SGeert Uytterhoeven MSIOF1_SYNC_D_MARK, 2882077365a9SGeert Uytterhoeven }; 2883077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_d_pins[] = { 2884077365a9SGeert Uytterhoeven /* SS1 */ 2885077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), 2886077365a9SGeert Uytterhoeven }; 2887077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_d_mux[] = { 2888077365a9SGeert Uytterhoeven MSIOF1_SS1_D_MARK, 2889077365a9SGeert Uytterhoeven }; 2890077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_d_pins[] = { 2891077365a9SGeert Uytterhoeven /* RXD */ 2892077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), 2893077365a9SGeert Uytterhoeven }; 2894077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_d_mux[] = { 2895077365a9SGeert Uytterhoeven MSIOF1_RXD_D_MARK, 2896077365a9SGeert Uytterhoeven }; 2897077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_d_pins[] = { 2898077365a9SGeert Uytterhoeven /* TXD */ 2899077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), 2900077365a9SGeert Uytterhoeven }; 2901077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_d_mux[] = { 2902077365a9SGeert Uytterhoeven MSIOF1_TXD_D_MARK, 2903077365a9SGeert Uytterhoeven }; 2904077365a9SGeert Uytterhoeven 2905077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_e_pins[] = { 2906077365a9SGeert Uytterhoeven /* SCK */ 2907077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), 2908077365a9SGeert Uytterhoeven }; 2909077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_e_mux[] = { 2910077365a9SGeert Uytterhoeven MSIOF1_SCK_E_MARK, 2911077365a9SGeert Uytterhoeven }; 2912077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_e_pins[] = { 2913077365a9SGeert Uytterhoeven /* SYNC */ 2914077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 19), 2915077365a9SGeert Uytterhoeven }; 2916077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_e_mux[] = { 2917077365a9SGeert Uytterhoeven MSIOF1_SYNC_E_MARK, 2918077365a9SGeert Uytterhoeven }; 2919077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_e_pins[] = { 2920077365a9SGeert Uytterhoeven /* RXD */ 2921077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), 2922077365a9SGeert Uytterhoeven }; 2923077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_e_mux[] = { 2924077365a9SGeert Uytterhoeven MSIOF1_RXD_E_MARK, 2925077365a9SGeert Uytterhoeven }; 2926077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_e_pins[] = { 2927077365a9SGeert Uytterhoeven /* TXD */ 2928077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), 2929077365a9SGeert Uytterhoeven }; 2930077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_e_mux[] = { 2931077365a9SGeert Uytterhoeven MSIOF1_TXD_E_MARK, 2932077365a9SGeert Uytterhoeven }; 2933077365a9SGeert Uytterhoeven /* - MSIOF2 ----------------------------------------------------------------- */ 2934077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_pins[] = { 2935077365a9SGeert Uytterhoeven /* SCK */ 2936077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 13), 2937077365a9SGeert Uytterhoeven }; 2938077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_mux[] = { 2939077365a9SGeert Uytterhoeven MSIOF2_SCK_MARK, 2940077365a9SGeert Uytterhoeven }; 2941077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_pins[] = { 2942077365a9SGeert Uytterhoeven /* SYNC */ 2943077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), 2944077365a9SGeert Uytterhoeven }; 2945077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_mux[] = { 2946077365a9SGeert Uytterhoeven MSIOF2_SYNC_MARK, 2947077365a9SGeert Uytterhoeven }; 2948077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_pins[] = { 2949077365a9SGeert Uytterhoeven /* SS1 */ 2950077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), 2951077365a9SGeert Uytterhoeven }; 2952077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_mux[] = { 2953077365a9SGeert Uytterhoeven MSIOF2_SS1_MARK, 2954077365a9SGeert Uytterhoeven }; 2955077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_pins[] = { 2956077365a9SGeert Uytterhoeven /* SS2 */ 2957077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 18), 2958077365a9SGeert Uytterhoeven }; 2959077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_mux[] = { 2960077365a9SGeert Uytterhoeven MSIOF2_SS2_MARK, 2961077365a9SGeert Uytterhoeven }; 2962077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_pins[] = { 2963077365a9SGeert Uytterhoeven /* RXD */ 2964077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), 2965077365a9SGeert Uytterhoeven }; 2966077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_mux[] = { 2967077365a9SGeert Uytterhoeven MSIOF2_RXD_MARK, 2968077365a9SGeert Uytterhoeven }; 2969077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_pins[] = { 2970077365a9SGeert Uytterhoeven /* TXD */ 2971077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 15), 2972077365a9SGeert Uytterhoeven }; 2973077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_mux[] = { 2974077365a9SGeert Uytterhoeven MSIOF2_TXD_MARK, 2975077365a9SGeert Uytterhoeven }; 2976077365a9SGeert Uytterhoeven 2977077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_b_pins[] = { 2978077365a9SGeert Uytterhoeven /* SCK */ 2979077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), 2980077365a9SGeert Uytterhoeven }; 2981077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_b_mux[] = { 2982077365a9SGeert Uytterhoeven MSIOF2_SCK_B_MARK, 2983077365a9SGeert Uytterhoeven }; 2984077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_b_pins[] = { 2985077365a9SGeert Uytterhoeven /* SYNC */ 2986077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), 2987077365a9SGeert Uytterhoeven }; 2988077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_b_mux[] = { 2989077365a9SGeert Uytterhoeven MSIOF2_SYNC_B_MARK, 2990077365a9SGeert Uytterhoeven }; 2991077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_b_pins[] = { 2992077365a9SGeert Uytterhoeven /* SS1 */ 2993077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), 2994077365a9SGeert Uytterhoeven }; 2995077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_b_mux[] = { 2996077365a9SGeert Uytterhoeven MSIOF2_SS1_B_MARK, 2997077365a9SGeert Uytterhoeven }; 2998077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_b_pins[] = { 2999077365a9SGeert Uytterhoeven /* SS2 */ 3000077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), 3001077365a9SGeert Uytterhoeven }; 3002077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_b_mux[] = { 3003077365a9SGeert Uytterhoeven MSIOF2_SS2_B_MARK, 3004077365a9SGeert Uytterhoeven }; 3005077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_b_pins[] = { 3006077365a9SGeert Uytterhoeven /* RXD */ 3007077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), 3008077365a9SGeert Uytterhoeven }; 3009077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_b_mux[] = { 3010077365a9SGeert Uytterhoeven MSIOF2_RXD_B_MARK, 3011077365a9SGeert Uytterhoeven }; 3012077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_b_pins[] = { 3013077365a9SGeert Uytterhoeven /* TXD */ 3014077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), 3015077365a9SGeert Uytterhoeven }; 3016077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_b_mux[] = { 3017077365a9SGeert Uytterhoeven MSIOF2_TXD_B_MARK, 3018077365a9SGeert Uytterhoeven }; 3019077365a9SGeert Uytterhoeven 3020077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_c_pins[] = { 3021077365a9SGeert Uytterhoeven /* SCK */ 3022077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), 3023077365a9SGeert Uytterhoeven }; 3024077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_c_mux[] = { 3025077365a9SGeert Uytterhoeven MSIOF2_SCK_C_MARK, 3026077365a9SGeert Uytterhoeven }; 3027077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_c_pins[] = { 3028077365a9SGeert Uytterhoeven /* SYNC */ 3029077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 3), 3030077365a9SGeert Uytterhoeven }; 3031077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_c_mux[] = { 3032077365a9SGeert Uytterhoeven MSIOF2_SYNC_C_MARK, 3033077365a9SGeert Uytterhoeven }; 3034077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_c_pins[] = { 3035077365a9SGeert Uytterhoeven /* RXD */ 3036077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5), 3037077365a9SGeert Uytterhoeven }; 3038077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_c_mux[] = { 3039077365a9SGeert Uytterhoeven MSIOF2_RXD_C_MARK, 3040077365a9SGeert Uytterhoeven }; 3041077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_c_pins[] = { 3042077365a9SGeert Uytterhoeven /* TXD */ 3043077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), 3044077365a9SGeert Uytterhoeven }; 3045077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_c_mux[] = { 3046077365a9SGeert Uytterhoeven MSIOF2_TXD_C_MARK, 3047077365a9SGeert Uytterhoeven }; 3048077365a9SGeert Uytterhoeven 3049077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_d_pins[] = { 3050077365a9SGeert Uytterhoeven /* SCK */ 3051077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), 3052077365a9SGeert Uytterhoeven }; 3053077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_d_mux[] = { 3054077365a9SGeert Uytterhoeven MSIOF2_SCK_D_MARK, 3055077365a9SGeert Uytterhoeven }; 3056077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_d_pins[] = { 3057077365a9SGeert Uytterhoeven /* SYNC */ 3058077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), 3059077365a9SGeert Uytterhoeven }; 3060077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_d_mux[] = { 3061077365a9SGeert Uytterhoeven MSIOF2_SYNC_D_MARK, 3062077365a9SGeert Uytterhoeven }; 3063077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_d_pins[] = { 3064077365a9SGeert Uytterhoeven /* SS1 */ 3065077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), 3066077365a9SGeert Uytterhoeven }; 3067077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_d_mux[] = { 3068077365a9SGeert Uytterhoeven MSIOF2_SS1_D_MARK, 3069077365a9SGeert Uytterhoeven }; 3070077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_d_pins[] = { 3071077365a9SGeert Uytterhoeven /* SS2 */ 3072077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 19), 3073077365a9SGeert Uytterhoeven }; 3074077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_d_mux[] = { 3075077365a9SGeert Uytterhoeven MSIOF2_SS2_D_MARK, 3076077365a9SGeert Uytterhoeven }; 3077077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_d_pins[] = { 3078077365a9SGeert Uytterhoeven /* RXD */ 3079077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), 3080077365a9SGeert Uytterhoeven }; 3081077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_d_mux[] = { 3082077365a9SGeert Uytterhoeven MSIOF2_RXD_D_MARK, 3083077365a9SGeert Uytterhoeven }; 3084077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_d_pins[] = { 3085077365a9SGeert Uytterhoeven /* TXD */ 3086077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), 3087077365a9SGeert Uytterhoeven }; 3088077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_d_mux[] = { 3089077365a9SGeert Uytterhoeven MSIOF2_TXD_D_MARK, 3090077365a9SGeert Uytterhoeven }; 3091077365a9SGeert Uytterhoeven 3092077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_e_pins[] = { 3093077365a9SGeert Uytterhoeven /* SCK */ 3094077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 15), 3095077365a9SGeert Uytterhoeven }; 3096077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_e_mux[] = { 3097077365a9SGeert Uytterhoeven MSIOF2_SCK_E_MARK, 3098077365a9SGeert Uytterhoeven }; 3099077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_e_pins[] = { 3100077365a9SGeert Uytterhoeven /* SYNC */ 3101077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 16), 3102077365a9SGeert Uytterhoeven }; 3103077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_e_mux[] = { 3104077365a9SGeert Uytterhoeven MSIOF2_SYNC_E_MARK, 3105077365a9SGeert Uytterhoeven }; 3106077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_e_pins[] = { 3107077365a9SGeert Uytterhoeven /* RXD */ 3108077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 14), 3109077365a9SGeert Uytterhoeven }; 3110077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_e_mux[] = { 3111077365a9SGeert Uytterhoeven MSIOF2_RXD_E_MARK, 3112077365a9SGeert Uytterhoeven }; 3113077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_e_pins[] = { 3114077365a9SGeert Uytterhoeven /* TXD */ 3115077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 13), 3116077365a9SGeert Uytterhoeven }; 3117077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_e_mux[] = { 3118077365a9SGeert Uytterhoeven MSIOF2_TXD_E_MARK, 3119077365a9SGeert Uytterhoeven }; 3120077365a9SGeert Uytterhoeven /* - PWM -------------------------------------------------------------------- */ 3121077365a9SGeert Uytterhoeven static const unsigned int pwm0_pins[] = { 3122077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 14), 3123077365a9SGeert Uytterhoeven }; 3124077365a9SGeert Uytterhoeven static const unsigned int pwm0_mux[] = { 3125077365a9SGeert Uytterhoeven PWM0_MARK, 3126077365a9SGeert Uytterhoeven }; 3127077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_pins[] = { 3128077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), 3129077365a9SGeert Uytterhoeven }; 3130077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_mux[] = { 3131077365a9SGeert Uytterhoeven PWM0_B_MARK, 3132077365a9SGeert Uytterhoeven }; 3133077365a9SGeert Uytterhoeven static const unsigned int pwm1_pins[] = { 3134077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), 3135077365a9SGeert Uytterhoeven }; 3136077365a9SGeert Uytterhoeven static const unsigned int pwm1_mux[] = { 3137077365a9SGeert Uytterhoeven PWM1_MARK, 3138077365a9SGeert Uytterhoeven }; 3139077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_pins[] = { 3140077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 15), 3141077365a9SGeert Uytterhoeven }; 3142077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_mux[] = { 3143077365a9SGeert Uytterhoeven PWM1_B_MARK, 3144077365a9SGeert Uytterhoeven }; 3145077365a9SGeert Uytterhoeven static const unsigned int pwm2_pins[] = { 3146077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 18), 3147077365a9SGeert Uytterhoeven }; 3148077365a9SGeert Uytterhoeven static const unsigned int pwm2_mux[] = { 3149077365a9SGeert Uytterhoeven PWM2_MARK, 3150077365a9SGeert Uytterhoeven }; 3151077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_pins[] = { 3152077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 16), 3153077365a9SGeert Uytterhoeven }; 3154077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_mux[] = { 3155077365a9SGeert Uytterhoeven PWM2_B_MARK, 3156077365a9SGeert Uytterhoeven }; 3157077365a9SGeert Uytterhoeven static const unsigned int pwm3_pins[] = { 3158077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24), 3159077365a9SGeert Uytterhoeven }; 3160077365a9SGeert Uytterhoeven static const unsigned int pwm3_mux[] = { 3161077365a9SGeert Uytterhoeven PWM3_MARK, 3162077365a9SGeert Uytterhoeven }; 3163077365a9SGeert Uytterhoeven static const unsigned int pwm4_pins[] = { 3164077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), 3165077365a9SGeert Uytterhoeven }; 3166077365a9SGeert Uytterhoeven static const unsigned int pwm4_mux[] = { 3167077365a9SGeert Uytterhoeven PWM4_MARK, 3168077365a9SGeert Uytterhoeven }; 3169077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_pins[] = { 3170077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 31), 3171077365a9SGeert Uytterhoeven }; 3172077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_mux[] = { 3173077365a9SGeert Uytterhoeven PWM4_B_MARK, 3174077365a9SGeert Uytterhoeven }; 3175077365a9SGeert Uytterhoeven static const unsigned int pwm5_pins[] = { 3176077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 21), 3177077365a9SGeert Uytterhoeven }; 3178077365a9SGeert Uytterhoeven static const unsigned int pwm5_mux[] = { 3179077365a9SGeert Uytterhoeven PWM5_MARK, 3180077365a9SGeert Uytterhoeven }; 3181077365a9SGeert Uytterhoeven static const unsigned int pwm5_b_pins[] = { 3182077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 20), 3183077365a9SGeert Uytterhoeven }; 3184077365a9SGeert Uytterhoeven static const unsigned int pwm5_b_mux[] = { 3185077365a9SGeert Uytterhoeven PWM5_B_MARK, 3186077365a9SGeert Uytterhoeven }; 3187077365a9SGeert Uytterhoeven static const unsigned int pwm6_pins[] = { 3188077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 22), 3189077365a9SGeert Uytterhoeven }; 3190077365a9SGeert Uytterhoeven static const unsigned int pwm6_mux[] = { 3191077365a9SGeert Uytterhoeven PWM6_MARK, 3192077365a9SGeert Uytterhoeven }; 3193077365a9SGeert Uytterhoeven /* - QSPI ------------------------------------------------------------------- */ 3194077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_pins[] = { 3195077365a9SGeert Uytterhoeven /* SPCLK, SSL */ 3196077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 9), 3197077365a9SGeert Uytterhoeven }; 3198077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_mux[] = { 3199077365a9SGeert Uytterhoeven SPCLK_MARK, SSL_MARK, 3200077365a9SGeert Uytterhoeven }; 32017cba3cbcSGeert Uytterhoeven static const unsigned int qspi_data_pins[] = { 3202077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1, IO2, IO3 */ 3203077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), 3204077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 8), 3205077365a9SGeert Uytterhoeven }; 32067cba3cbcSGeert Uytterhoeven static const unsigned int qspi_data_mux[] = { 3207077365a9SGeert Uytterhoeven MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK, 3208077365a9SGeert Uytterhoeven }; 3209077365a9SGeert Uytterhoeven 3210077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_b_pins[] = { 3211077365a9SGeert Uytterhoeven /* SPCLK, SSL */ 3212077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 5), 3213077365a9SGeert Uytterhoeven }; 3214077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_b_mux[] = { 3215077365a9SGeert Uytterhoeven SPCLK_B_MARK, SSL_B_MARK, 3216077365a9SGeert Uytterhoeven }; 32177cba3cbcSGeert Uytterhoeven static const unsigned int qspi_data_b_pins[] = { 3218077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1, IO2, IO3 */ 3219077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), 3220077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 4), 3221077365a9SGeert Uytterhoeven }; 32227cba3cbcSGeert Uytterhoeven static const unsigned int qspi_data_b_mux[] = { 3223077365a9SGeert Uytterhoeven MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK, 3224077365a9SGeert Uytterhoeven }; 3225077365a9SGeert Uytterhoeven /* - SCIF0 ------------------------------------------------------------------ */ 3226077365a9SGeert Uytterhoeven static const unsigned int scif0_data_pins[] = { 3227077365a9SGeert Uytterhoeven /* RX, TX */ 3228077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), 3229077365a9SGeert Uytterhoeven }; 3230077365a9SGeert Uytterhoeven static const unsigned int scif0_data_mux[] = { 3231077365a9SGeert Uytterhoeven RX0_MARK, TX0_MARK, 3232077365a9SGeert Uytterhoeven }; 3233077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_pins[] = { 3234077365a9SGeert Uytterhoeven /* RX, TX */ 3235077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 0), 3236077365a9SGeert Uytterhoeven }; 3237077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_mux[] = { 3238077365a9SGeert Uytterhoeven RX0_B_MARK, TX0_B_MARK, 3239077365a9SGeert Uytterhoeven }; 3240077365a9SGeert Uytterhoeven static const unsigned int scif0_data_c_pins[] = { 3241077365a9SGeert Uytterhoeven /* RX, TX */ 3242077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), RCAR_GP_PIN(4, 25), 3243077365a9SGeert Uytterhoeven }; 3244077365a9SGeert Uytterhoeven static const unsigned int scif0_data_c_mux[] = { 3245077365a9SGeert Uytterhoeven RX0_C_MARK, TX0_C_MARK, 3246077365a9SGeert Uytterhoeven }; 3247077365a9SGeert Uytterhoeven static const unsigned int scif0_data_d_pins[] = { 3248077365a9SGeert Uytterhoeven /* RX, TX */ 3249077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), 3250077365a9SGeert Uytterhoeven }; 3251077365a9SGeert Uytterhoeven static const unsigned int scif0_data_d_mux[] = { 3252077365a9SGeert Uytterhoeven RX0_D_MARK, TX0_D_MARK, 3253077365a9SGeert Uytterhoeven }; 3254077365a9SGeert Uytterhoeven static const unsigned int scif0_data_e_pins[] = { 3255077365a9SGeert Uytterhoeven /* RX, TX */ 3256077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 29), RCAR_GP_PIN(6, 28), 3257077365a9SGeert Uytterhoeven }; 3258077365a9SGeert Uytterhoeven static const unsigned int scif0_data_e_mux[] = { 3259077365a9SGeert Uytterhoeven RX0_E_MARK, TX0_E_MARK, 3260077365a9SGeert Uytterhoeven }; 3261077365a9SGeert Uytterhoeven /* - SCIF1 ------------------------------------------------------------------ */ 3262077365a9SGeert Uytterhoeven static const unsigned int scif1_data_pins[] = { 3263077365a9SGeert Uytterhoeven /* RX, TX */ 3264077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), 3265077365a9SGeert Uytterhoeven }; 3266077365a9SGeert Uytterhoeven static const unsigned int scif1_data_mux[] = { 3267077365a9SGeert Uytterhoeven RX1_MARK, TX1_MARK, 3268077365a9SGeert Uytterhoeven }; 3269077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_pins[] = { 3270077365a9SGeert Uytterhoeven /* RX, TX */ 3271077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 8), 3272077365a9SGeert Uytterhoeven }; 3273077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_mux[] = { 3274077365a9SGeert Uytterhoeven RX1_B_MARK, TX1_B_MARK, 3275077365a9SGeert Uytterhoeven }; 3276077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_b_pins[] = { 3277077365a9SGeert Uytterhoeven /* SCK */ 3278077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), 3279077365a9SGeert Uytterhoeven }; 3280077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_b_mux[] = { 3281077365a9SGeert Uytterhoeven SCIF1_SCK_B_MARK, 3282077365a9SGeert Uytterhoeven }; 3283077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_pins[] = { 3284077365a9SGeert Uytterhoeven /* RX, TX */ 3285077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 27), 3286077365a9SGeert Uytterhoeven }; 3287077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_mux[] = { 3288077365a9SGeert Uytterhoeven RX1_C_MARK, TX1_C_MARK, 3289077365a9SGeert Uytterhoeven }; 3290077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_pins[] = { 3291077365a9SGeert Uytterhoeven /* RX, TX */ 3292077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 24), 3293077365a9SGeert Uytterhoeven }; 3294077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_mux[] = { 3295077365a9SGeert Uytterhoeven RX1_D_MARK, TX1_D_MARK, 3296077365a9SGeert Uytterhoeven }; 3297077365a9SGeert Uytterhoeven /* - SCIF2 ------------------------------------------------------------------ */ 3298077365a9SGeert Uytterhoeven static const unsigned int scif2_data_pins[] = { 3299077365a9SGeert Uytterhoeven /* RX, TX */ 3300077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), RCAR_GP_PIN(2, 31), 3301077365a9SGeert Uytterhoeven }; 3302077365a9SGeert Uytterhoeven static const unsigned int scif2_data_mux[] = { 3303077365a9SGeert Uytterhoeven RX2_MARK, TX2_MARK, 3304077365a9SGeert Uytterhoeven }; 3305077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_pins[] = { 3306077365a9SGeert Uytterhoeven /* RX, TX */ 3307077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16), 3308077365a9SGeert Uytterhoeven }; 3309077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_mux[] = { 3310077365a9SGeert Uytterhoeven RX2_B_MARK, TX2_B_MARK, 3311077365a9SGeert Uytterhoeven }; 3312077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_b_pins[] = { 3313077365a9SGeert Uytterhoeven /* SCK */ 3314077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), 3315077365a9SGeert Uytterhoeven }; 3316077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_b_mux[] = { 3317077365a9SGeert Uytterhoeven SCIF2_SCK_B_MARK, 3318077365a9SGeert Uytterhoeven }; 3319077365a9SGeert Uytterhoeven static const unsigned int scif2_data_c_pins[] = { 3320077365a9SGeert Uytterhoeven /* RX, TX */ 3321077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), 3322077365a9SGeert Uytterhoeven }; 3323077365a9SGeert Uytterhoeven static const unsigned int scif2_data_c_mux[] = { 3324077365a9SGeert Uytterhoeven RX2_C_MARK, TX2_C_MARK, 3325077365a9SGeert Uytterhoeven }; 3326077365a9SGeert Uytterhoeven static const unsigned int scif2_data_e_pins[] = { 3327077365a9SGeert Uytterhoeven /* RX, TX */ 3328077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), 3329077365a9SGeert Uytterhoeven }; 3330077365a9SGeert Uytterhoeven static const unsigned int scif2_data_e_mux[] = { 3331077365a9SGeert Uytterhoeven RX2_E_MARK, TX2_E_MARK, 3332077365a9SGeert Uytterhoeven }; 3333077365a9SGeert Uytterhoeven /* - SCIF3 ------------------------------------------------------------------ */ 3334077365a9SGeert Uytterhoeven static const unsigned int scif3_data_pins[] = { 3335077365a9SGeert Uytterhoeven /* RX, TX */ 3336077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21), 3337077365a9SGeert Uytterhoeven }; 3338077365a9SGeert Uytterhoeven static const unsigned int scif3_data_mux[] = { 3339077365a9SGeert Uytterhoeven RX3_MARK, TX3_MARK, 3340077365a9SGeert Uytterhoeven }; 3341077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_pins[] = { 3342077365a9SGeert Uytterhoeven /* SCK */ 3343077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), 3344077365a9SGeert Uytterhoeven }; 3345077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_mux[] = { 3346077365a9SGeert Uytterhoeven SCIF3_SCK_MARK, 3347077365a9SGeert Uytterhoeven }; 3348077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_pins[] = { 3349077365a9SGeert Uytterhoeven /* RX, TX */ 3350077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 26), 3351077365a9SGeert Uytterhoeven }; 3352077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_mux[] = { 3353077365a9SGeert Uytterhoeven RX3_B_MARK, TX3_B_MARK, 3354077365a9SGeert Uytterhoeven }; 3355077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_b_pins[] = { 3356077365a9SGeert Uytterhoeven /* SCK */ 3357077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), 3358077365a9SGeert Uytterhoeven }; 3359077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_b_mux[] = { 3360077365a9SGeert Uytterhoeven SCIF3_SCK_B_MARK, 3361077365a9SGeert Uytterhoeven }; 3362077365a9SGeert Uytterhoeven static const unsigned int scif3_data_c_pins[] = { 3363077365a9SGeert Uytterhoeven /* RX, TX */ 3364077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), 3365077365a9SGeert Uytterhoeven }; 3366077365a9SGeert Uytterhoeven static const unsigned int scif3_data_c_mux[] = { 3367077365a9SGeert Uytterhoeven RX3_C_MARK, TX3_C_MARK, 3368077365a9SGeert Uytterhoeven }; 3369077365a9SGeert Uytterhoeven static const unsigned int scif3_data_d_pins[] = { 3370077365a9SGeert Uytterhoeven /* RX, TX */ 3371077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 26), 3372077365a9SGeert Uytterhoeven }; 3373077365a9SGeert Uytterhoeven static const unsigned int scif3_data_d_mux[] = { 3374077365a9SGeert Uytterhoeven RX3_D_MARK, TX3_D_MARK, 3375077365a9SGeert Uytterhoeven }; 3376077365a9SGeert Uytterhoeven /* - SCIF4 ------------------------------------------------------------------ */ 3377077365a9SGeert Uytterhoeven static const unsigned int scif4_data_pins[] = { 3378077365a9SGeert Uytterhoeven /* RX, TX */ 3379077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 1), 3380077365a9SGeert Uytterhoeven }; 3381077365a9SGeert Uytterhoeven static const unsigned int scif4_data_mux[] = { 3382077365a9SGeert Uytterhoeven RX4_MARK, TX4_MARK, 3383077365a9SGeert Uytterhoeven }; 3384077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_pins[] = { 3385077365a9SGeert Uytterhoeven /* RX, TX */ 3386077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 0), 3387077365a9SGeert Uytterhoeven }; 3388077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_mux[] = { 3389077365a9SGeert Uytterhoeven RX4_B_MARK, TX4_B_MARK, 3390077365a9SGeert Uytterhoeven }; 3391077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_pins[] = { 3392077365a9SGeert Uytterhoeven /* RX, TX */ 3393077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 22), RCAR_GP_PIN(7, 21), 3394077365a9SGeert Uytterhoeven }; 3395077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_mux[] = { 3396077365a9SGeert Uytterhoeven RX4_C_MARK, TX4_C_MARK, 3397077365a9SGeert Uytterhoeven }; 3398077365a9SGeert Uytterhoeven /* - SCIF5 ------------------------------------------------------------------ */ 3399077365a9SGeert Uytterhoeven static const unsigned int scif5_data_pins[] = { 3400077365a9SGeert Uytterhoeven /* RX, TX */ 3401077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 3), 3402077365a9SGeert Uytterhoeven }; 3403077365a9SGeert Uytterhoeven static const unsigned int scif5_data_mux[] = { 3404077365a9SGeert Uytterhoeven RX5_MARK, TX5_MARK, 3405077365a9SGeert Uytterhoeven }; 3406077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_pins[] = { 3407077365a9SGeert Uytterhoeven /* RX, TX */ 3408077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 23), RCAR_GP_PIN(6, 22), 3409077365a9SGeert Uytterhoeven }; 3410077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_mux[] = { 3411077365a9SGeert Uytterhoeven RX5_B_MARK, TX5_B_MARK, 3412077365a9SGeert Uytterhoeven }; 3413077365a9SGeert Uytterhoeven /* - SCIFA0 ----------------------------------------------------------------- */ 3414077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_pins[] = { 3415077365a9SGeert Uytterhoeven /* RXD, TXD */ 3416077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), 3417077365a9SGeert Uytterhoeven }; 3418077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_mux[] = { 3419077365a9SGeert Uytterhoeven SCIFA0_RXD_MARK, SCIFA0_TXD_MARK, 3420077365a9SGeert Uytterhoeven }; 3421077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_b_pins[] = { 3422077365a9SGeert Uytterhoeven /* RXD, TXD */ 3423077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 0), 3424077365a9SGeert Uytterhoeven }; 3425077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_b_mux[] = { 3426077365a9SGeert Uytterhoeven SCIFA0_RXD_B_MARK, SCIFA0_TXD_B_MARK 3427077365a9SGeert Uytterhoeven }; 3428077365a9SGeert Uytterhoeven /* - SCIFA1 ----------------------------------------------------------------- */ 3429077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_pins[] = { 3430077365a9SGeert Uytterhoeven /* RXD, TXD */ 3431077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), 3432077365a9SGeert Uytterhoeven }; 3433077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_mux[] = { 3434077365a9SGeert Uytterhoeven SCIFA1_RXD_MARK, SCIFA1_TXD_MARK, 3435077365a9SGeert Uytterhoeven }; 3436077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_pins[] = { 3437077365a9SGeert Uytterhoeven /* SCK */ 3438077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), 3439077365a9SGeert Uytterhoeven }; 3440077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_mux[] = { 3441077365a9SGeert Uytterhoeven SCIFA1_SCK_MARK, 3442077365a9SGeert Uytterhoeven }; 3443077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_b_pins[] = { 3444077365a9SGeert Uytterhoeven /* RXD, TXD */ 3445077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 8), 3446077365a9SGeert Uytterhoeven }; 3447077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_b_mux[] = { 3448077365a9SGeert Uytterhoeven SCIFA1_RXD_B_MARK, SCIFA1_TXD_B_MARK, 3449077365a9SGeert Uytterhoeven }; 3450077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_b_pins[] = { 3451077365a9SGeert Uytterhoeven /* SCK */ 3452077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 0), 3453077365a9SGeert Uytterhoeven }; 3454077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_b_mux[] = { 3455077365a9SGeert Uytterhoeven SCIFA1_SCK_B_MARK, 3456077365a9SGeert Uytterhoeven }; 3457077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_c_pins[] = { 3458077365a9SGeert Uytterhoeven /* RXD, TXD */ 3459077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), 3460077365a9SGeert Uytterhoeven }; 3461077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_c_mux[] = { 3462077365a9SGeert Uytterhoeven SCIFA1_RXD_C_MARK, SCIFA1_TXD_C_MARK, 3463077365a9SGeert Uytterhoeven }; 3464077365a9SGeert Uytterhoeven /* - SCIFA2 ----------------------------------------------------------------- */ 3465077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_pins[] = { 3466077365a9SGeert Uytterhoeven /* RXD, TXD */ 3467077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), RCAR_GP_PIN(2, 31), 3468077365a9SGeert Uytterhoeven }; 3469077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_mux[] = { 3470077365a9SGeert Uytterhoeven SCIFA2_RXD_MARK, SCIFA2_TXD_MARK, 3471077365a9SGeert Uytterhoeven }; 3472077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_pins[] = { 3473077365a9SGeert Uytterhoeven /* SCK */ 3474077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), 3475077365a9SGeert Uytterhoeven }; 3476077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_mux[] = { 3477077365a9SGeert Uytterhoeven SCIFA2_SCK_MARK, 3478077365a9SGeert Uytterhoeven }; 3479077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_b_pins[] = { 3480077365a9SGeert Uytterhoeven /* RXD, TXD */ 3481077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16), 3482077365a9SGeert Uytterhoeven }; 3483077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_b_mux[] = { 3484077365a9SGeert Uytterhoeven SCIFA2_RXD_B_MARK, SCIFA2_TXD_B_MARK, 3485077365a9SGeert Uytterhoeven }; 3486077365a9SGeert Uytterhoeven /* - SCIFA3 ----------------------------------------------------------------- */ 3487077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_pins[] = { 3488077365a9SGeert Uytterhoeven /* RXD, TXD */ 3489077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21), 3490077365a9SGeert Uytterhoeven }; 3491077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_mux[] = { 3492077365a9SGeert Uytterhoeven SCIFA3_RXD_MARK, SCIFA3_TXD_MARK, 3493077365a9SGeert Uytterhoeven }; 3494077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_pins[] = { 3495077365a9SGeert Uytterhoeven /* SCK */ 3496077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), 3497077365a9SGeert Uytterhoeven }; 3498077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_mux[] = { 3499077365a9SGeert Uytterhoeven SCIFA3_SCK_MARK, 3500077365a9SGeert Uytterhoeven }; 3501077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_b_pins[] = { 3502077365a9SGeert Uytterhoeven /* RXD, TXD */ 3503077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20), 3504077365a9SGeert Uytterhoeven }; 3505077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_b_mux[] = { 3506077365a9SGeert Uytterhoeven SCIFA3_RXD_B_MARK, SCIFA3_TXD_B_MARK, 3507077365a9SGeert Uytterhoeven }; 3508077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_b_pins[] = { 3509077365a9SGeert Uytterhoeven /* SCK */ 3510077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), 3511077365a9SGeert Uytterhoeven }; 3512077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_b_mux[] = { 3513077365a9SGeert Uytterhoeven SCIFA3_SCK_B_MARK, 3514077365a9SGeert Uytterhoeven }; 3515077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_c_pins[] = { 3516077365a9SGeert Uytterhoeven /* RXD, TXD */ 3517077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 20), 3518077365a9SGeert Uytterhoeven }; 3519077365a9SGeert Uytterhoeven static const unsigned int scifa3_data_c_mux[] = { 3520077365a9SGeert Uytterhoeven SCIFA3_RXD_C_MARK, SCIFA3_TXD_C_MARK, 3521077365a9SGeert Uytterhoeven }; 3522077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_c_pins[] = { 3523077365a9SGeert Uytterhoeven /* SCK */ 3524077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 22), 3525077365a9SGeert Uytterhoeven }; 3526077365a9SGeert Uytterhoeven static const unsigned int scifa3_clk_c_mux[] = { 3527077365a9SGeert Uytterhoeven SCIFA3_SCK_C_MARK, 3528077365a9SGeert Uytterhoeven }; 3529077365a9SGeert Uytterhoeven /* - SCIFA4 ----------------------------------------------------------------- */ 3530077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_pins[] = { 3531077365a9SGeert Uytterhoeven /* RXD, TXD */ 3532077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 1), 3533077365a9SGeert Uytterhoeven }; 3534077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_mux[] = { 3535077365a9SGeert Uytterhoeven SCIFA4_RXD_MARK, SCIFA4_TXD_MARK, 3536077365a9SGeert Uytterhoeven }; 3537077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_b_pins[] = { 3538077365a9SGeert Uytterhoeven /* RXD, TXD */ 3539077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 0), 3540077365a9SGeert Uytterhoeven }; 3541077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_b_mux[] = { 3542077365a9SGeert Uytterhoeven SCIFA4_RXD_B_MARK, SCIFA4_TXD_B_MARK, 3543077365a9SGeert Uytterhoeven }; 3544077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_c_pins[] = { 3545077365a9SGeert Uytterhoeven /* RXD, TXD */ 3546077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 22), RCAR_GP_PIN(7, 21), 3547077365a9SGeert Uytterhoeven }; 3548077365a9SGeert Uytterhoeven static const unsigned int scifa4_data_c_mux[] = { 3549077365a9SGeert Uytterhoeven SCIFA4_RXD_C_MARK, SCIFA4_TXD_C_MARK, 3550077365a9SGeert Uytterhoeven }; 3551077365a9SGeert Uytterhoeven /* - SCIFA5 ----------------------------------------------------------------- */ 3552077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_pins[] = { 3553077365a9SGeert Uytterhoeven /* RXD, TXD */ 3554077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 3), 3555077365a9SGeert Uytterhoeven }; 3556077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_mux[] = { 3557077365a9SGeert Uytterhoeven SCIFA5_RXD_MARK, SCIFA5_TXD_MARK, 3558077365a9SGeert Uytterhoeven }; 3559077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_b_pins[] = { 3560077365a9SGeert Uytterhoeven /* RXD, TXD */ 3561077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), 3562077365a9SGeert Uytterhoeven }; 3563077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_b_mux[] = { 3564077365a9SGeert Uytterhoeven SCIFA5_RXD_B_MARK, SCIFA5_TXD_B_MARK, 3565077365a9SGeert Uytterhoeven }; 3566077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_c_pins[] = { 3567077365a9SGeert Uytterhoeven /* RXD, TXD */ 3568077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 23), RCAR_GP_PIN(6, 22), 3569077365a9SGeert Uytterhoeven }; 3570077365a9SGeert Uytterhoeven static const unsigned int scifa5_data_c_mux[] = { 3571077365a9SGeert Uytterhoeven SCIFA5_RXD_C_MARK, SCIFA5_TXD_C_MARK, 3572077365a9SGeert Uytterhoeven }; 3573077365a9SGeert Uytterhoeven /* - SCIFB0 ----------------------------------------------------------------- */ 3574077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_pins[] = { 3575077365a9SGeert Uytterhoeven /* RXD, TXD */ 3576077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4), 3577077365a9SGeert Uytterhoeven }; 3578077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_mux[] = { 3579077365a9SGeert Uytterhoeven SCIFB0_RXD_MARK, SCIFB0_TXD_MARK, 3580077365a9SGeert Uytterhoeven }; 3581077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_pins[] = { 3582077365a9SGeert Uytterhoeven /* SCK */ 3583077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 2), 3584077365a9SGeert Uytterhoeven }; 3585077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_mux[] = { 3586077365a9SGeert Uytterhoeven SCIFB0_SCK_MARK, 3587077365a9SGeert Uytterhoeven }; 3588077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_pins[] = { 3589077365a9SGeert Uytterhoeven /* RTS, CTS */ 3590077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 0), 3591077365a9SGeert Uytterhoeven }; 3592077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_mux[] = { 3593077365a9SGeert Uytterhoeven SCIFB0_RTS_N_MARK, SCIFB0_CTS_N_MARK, 3594077365a9SGeert Uytterhoeven }; 3595077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_b_pins[] = { 3596077365a9SGeert Uytterhoeven /* RXD, TXD */ 3597077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21), 3598077365a9SGeert Uytterhoeven }; 3599077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_b_mux[] = { 3600077365a9SGeert Uytterhoeven SCIFB0_RXD_B_MARK, SCIFB0_TXD_B_MARK, 3601077365a9SGeert Uytterhoeven }; 3602077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_b_pins[] = { 3603077365a9SGeert Uytterhoeven /* SCK */ 3604077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), 3605077365a9SGeert Uytterhoeven }; 3606077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_b_mux[] = { 3607077365a9SGeert Uytterhoeven SCIFB0_SCK_B_MARK, 3608077365a9SGeert Uytterhoeven }; 3609077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_b_pins[] = { 3610077365a9SGeert Uytterhoeven /* RTS, CTS */ 3611077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 23), 3612077365a9SGeert Uytterhoeven }; 3613077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_b_mux[] = { 3614077365a9SGeert Uytterhoeven SCIFB0_RTS_N_B_MARK, SCIFB0_CTS_N_B_MARK, 3615077365a9SGeert Uytterhoeven }; 3616077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_c_pins[] = { 3617077365a9SGeert Uytterhoeven /* RXD, TXD */ 3618077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 3619077365a9SGeert Uytterhoeven }; 3620077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_c_mux[] = { 3621077365a9SGeert Uytterhoeven SCIFB0_RXD_C_MARK, SCIFB0_TXD_C_MARK, 3622077365a9SGeert Uytterhoeven }; 3623077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_c_pins[] = { 3624077365a9SGeert Uytterhoeven /* SCK */ 3625077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), 3626077365a9SGeert Uytterhoeven }; 3627077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_c_mux[] = { 3628077365a9SGeert Uytterhoeven SCIFB0_SCK_C_MARK, 3629077365a9SGeert Uytterhoeven }; 3630077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_d_pins[] = { 3631077365a9SGeert Uytterhoeven /* RXD, TXD */ 3632077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 18), 3633077365a9SGeert Uytterhoeven }; 3634077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_d_mux[] = { 3635077365a9SGeert Uytterhoeven SCIFB0_RXD_D_MARK, SCIFB0_TXD_D_MARK, 3636077365a9SGeert Uytterhoeven }; 3637077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_d_pins[] = { 3638077365a9SGeert Uytterhoeven /* SCK */ 3639077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), 3640077365a9SGeert Uytterhoeven }; 3641077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_d_mux[] = { 3642077365a9SGeert Uytterhoeven SCIFB0_SCK_D_MARK, 3643077365a9SGeert Uytterhoeven }; 3644077365a9SGeert Uytterhoeven /* - SCIFB1 ----------------------------------------------------------------- */ 3645077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_pins[] = { 3646077365a9SGeert Uytterhoeven /* RXD, TXD */ 3647077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 6), 3648077365a9SGeert Uytterhoeven }; 3649077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_mux[] = { 3650077365a9SGeert Uytterhoeven SCIFB1_RXD_MARK, SCIFB1_TXD_MARK, 3651077365a9SGeert Uytterhoeven }; 3652077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_pins[] = { 3653077365a9SGeert Uytterhoeven /* SCK */ 3654077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 7), 3655077365a9SGeert Uytterhoeven }; 3656077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_mux[] = { 3657077365a9SGeert Uytterhoeven SCIFB1_SCK_MARK, 3658077365a9SGeert Uytterhoeven }; 3659077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_pins[] = { 3660077365a9SGeert Uytterhoeven /* RTS, CTS */ 3661077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 9), RCAR_GP_PIN(7, 8), 3662077365a9SGeert Uytterhoeven }; 3663077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_mux[] = { 3664077365a9SGeert Uytterhoeven SCIFB1_RTS_N_MARK, SCIFB1_CTS_N_MARK, 3665077365a9SGeert Uytterhoeven }; 3666077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_b_pins[] = { 3667077365a9SGeert Uytterhoeven /* RXD, TXD */ 3668077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18), 3669077365a9SGeert Uytterhoeven }; 3670077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_b_mux[] = { 3671077365a9SGeert Uytterhoeven SCIFB1_RXD_B_MARK, SCIFB1_TXD_B_MARK, 3672077365a9SGeert Uytterhoeven }; 3673077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_b_pins[] = { 3674077365a9SGeert Uytterhoeven /* SCK */ 3675077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 3), 3676077365a9SGeert Uytterhoeven }; 3677077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_b_mux[] = { 3678077365a9SGeert Uytterhoeven SCIFB1_SCK_B_MARK, 3679077365a9SGeert Uytterhoeven }; 3680077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_c_pins[] = { 3681077365a9SGeert Uytterhoeven /* RXD, TXD */ 3682077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), 3683077365a9SGeert Uytterhoeven }; 3684077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_c_mux[] = { 3685077365a9SGeert Uytterhoeven SCIFB1_RXD_C_MARK, SCIFB1_TXD_C_MARK, 3686077365a9SGeert Uytterhoeven }; 3687077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_c_pins[] = { 3688077365a9SGeert Uytterhoeven /* SCK */ 3689077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 11), 3690077365a9SGeert Uytterhoeven }; 3691077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_c_mux[] = { 3692077365a9SGeert Uytterhoeven SCIFB1_SCK_C_MARK, 3693077365a9SGeert Uytterhoeven }; 3694077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_d_pins[] = { 3695077365a9SGeert Uytterhoeven /* RXD, TXD */ 3696077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 10), RCAR_GP_PIN(7, 12), 3697077365a9SGeert Uytterhoeven }; 3698077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_d_mux[] = { 3699077365a9SGeert Uytterhoeven SCIFB1_RXD_D_MARK, SCIFB1_TXD_D_MARK, 3700077365a9SGeert Uytterhoeven }; 3701077365a9SGeert Uytterhoeven /* - SCIFB2 ----------------------------------------------------------------- */ 3702077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_pins[] = { 3703077365a9SGeert Uytterhoeven /* RXD, TXD */ 3704077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17), 3705077365a9SGeert Uytterhoeven }; 3706077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_mux[] = { 3707077365a9SGeert Uytterhoeven SCIFB2_RXD_MARK, SCIFB2_TXD_MARK, 3708077365a9SGeert Uytterhoeven }; 3709077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_pins[] = { 3710077365a9SGeert Uytterhoeven /* SCK */ 3711077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), 3712077365a9SGeert Uytterhoeven }; 3713077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_mux[] = { 3714077365a9SGeert Uytterhoeven SCIFB2_SCK_MARK, 3715077365a9SGeert Uytterhoeven }; 3716077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_pins[] = { 3717077365a9SGeert Uytterhoeven /* RTS, CTS */ 3718077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13), 3719077365a9SGeert Uytterhoeven }; 3720077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_mux[] = { 3721077365a9SGeert Uytterhoeven SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK, 3722077365a9SGeert Uytterhoeven }; 3723077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_b_pins[] = { 3724077365a9SGeert Uytterhoeven /* RXD, TXD */ 3725077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), 3726077365a9SGeert Uytterhoeven }; 3727077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_b_mux[] = { 3728077365a9SGeert Uytterhoeven SCIFB2_RXD_B_MARK, SCIFB2_TXD_B_MARK, 3729077365a9SGeert Uytterhoeven }; 3730077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_b_pins[] = { 3731077365a9SGeert Uytterhoeven /* SCK */ 3732077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), 3733077365a9SGeert Uytterhoeven }; 3734077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_b_mux[] = { 3735077365a9SGeert Uytterhoeven SCIFB2_SCK_B_MARK, 3736077365a9SGeert Uytterhoeven }; 3737077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_b_pins[] = { 3738077365a9SGeert Uytterhoeven /* RTS, CTS */ 3739077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14), 3740077365a9SGeert Uytterhoeven }; 3741077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_b_mux[] = { 3742077365a9SGeert Uytterhoeven SCIFB2_RTS_N_B_MARK, SCIFB2_CTS_N_B_MARK, 3743077365a9SGeert Uytterhoeven }; 3744077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_c_pins[] = { 3745077365a9SGeert Uytterhoeven /* RXD, TXD */ 3746077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 3747077365a9SGeert Uytterhoeven }; 3748077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_c_mux[] = { 3749077365a9SGeert Uytterhoeven SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK, 3750077365a9SGeert Uytterhoeven }; 3751077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_c_pins[] = { 3752077365a9SGeert Uytterhoeven /* SCK */ 3753077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 3754077365a9SGeert Uytterhoeven }; 3755077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_c_mux[] = { 3756077365a9SGeert Uytterhoeven SCIFB2_SCK_C_MARK, 3757077365a9SGeert Uytterhoeven }; 3758077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_d_pins[] = { 3759077365a9SGeert Uytterhoeven /* RXD, TXD */ 3760077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 25), 3761077365a9SGeert Uytterhoeven }; 3762077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_d_mux[] = { 3763077365a9SGeert Uytterhoeven SCIFB2_RXD_D_MARK, SCIFB2_TXD_D_MARK, 3764077365a9SGeert Uytterhoeven }; 3765077365a9SGeert Uytterhoeven 3766077365a9SGeert Uytterhoeven /* - SCIF Clock ------------------------------------------------------------- */ 3767077365a9SGeert Uytterhoeven static const unsigned int scif_clk_pins[] = { 3768077365a9SGeert Uytterhoeven /* SCIF_CLK */ 3769077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 29), 3770077365a9SGeert Uytterhoeven }; 3771077365a9SGeert Uytterhoeven static const unsigned int scif_clk_mux[] = { 3772077365a9SGeert Uytterhoeven SCIF_CLK_MARK, 3773077365a9SGeert Uytterhoeven }; 3774077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_pins[] = { 3775077365a9SGeert Uytterhoeven /* SCIF_CLK */ 3776077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 19), 3777077365a9SGeert Uytterhoeven }; 3778077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_mux[] = { 3779077365a9SGeert Uytterhoeven SCIF_CLK_B_MARK, 3780077365a9SGeert Uytterhoeven }; 3781077365a9SGeert Uytterhoeven 3782077365a9SGeert Uytterhoeven /* - SDHI0 ------------------------------------------------------------------ */ 378359916e93SGeert Uytterhoeven static const unsigned int sdhi0_data_pins[] = { 3784077365a9SGeert Uytterhoeven /* D[0:3] */ 3785077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), 3786077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 5), 3787077365a9SGeert Uytterhoeven }; 378859916e93SGeert Uytterhoeven static const unsigned int sdhi0_data_mux[] = { 3789077365a9SGeert Uytterhoeven SD0_DATA0_MARK, SD0_DATA1_MARK, SD0_DATA2_MARK, SD0_DATA3_MARK, 3790077365a9SGeert Uytterhoeven }; 3791077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_pins[] = { 3792077365a9SGeert Uytterhoeven /* CLK, CMD */ 3793077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), 3794077365a9SGeert Uytterhoeven }; 3795077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_mux[] = { 3796077365a9SGeert Uytterhoeven SD0_CLK_MARK, SD0_CMD_MARK, 3797077365a9SGeert Uytterhoeven }; 3798077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_pins[] = { 3799077365a9SGeert Uytterhoeven /* CD */ 3800077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 6), 3801077365a9SGeert Uytterhoeven }; 3802077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_mux[] = { 3803077365a9SGeert Uytterhoeven SD0_CD_MARK, 3804077365a9SGeert Uytterhoeven }; 3805077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_pins[] = { 3806077365a9SGeert Uytterhoeven /* WP */ 3807077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 7), 3808077365a9SGeert Uytterhoeven }; 3809077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_mux[] = { 3810077365a9SGeert Uytterhoeven SD0_WP_MARK, 3811077365a9SGeert Uytterhoeven }; 3812077365a9SGeert Uytterhoeven /* - SDHI1 ------------------------------------------------------------------ */ 381359916e93SGeert Uytterhoeven static const unsigned int sdhi1_data_pins[] = { 3814077365a9SGeert Uytterhoeven /* D[0:3] */ 3815077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 11), 3816077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 12), RCAR_GP_PIN(6, 13), 3817077365a9SGeert Uytterhoeven }; 381859916e93SGeert Uytterhoeven static const unsigned int sdhi1_data_mux[] = { 3819077365a9SGeert Uytterhoeven SD1_DATA0_MARK, SD1_DATA1_MARK, SD1_DATA2_MARK, SD1_DATA3_MARK, 3820077365a9SGeert Uytterhoeven }; 3821077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_pins[] = { 3822077365a9SGeert Uytterhoeven /* CLK, CMD */ 3823077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), 3824077365a9SGeert Uytterhoeven }; 3825077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_mux[] = { 3826077365a9SGeert Uytterhoeven SD1_CLK_MARK, SD1_CMD_MARK, 3827077365a9SGeert Uytterhoeven }; 3828077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_pins[] = { 3829077365a9SGeert Uytterhoeven /* CD */ 3830077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 14), 3831077365a9SGeert Uytterhoeven }; 3832077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_mux[] = { 3833077365a9SGeert Uytterhoeven SD1_CD_MARK, 3834077365a9SGeert Uytterhoeven }; 3835077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_pins[] = { 3836077365a9SGeert Uytterhoeven /* WP */ 3837077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 15), 3838077365a9SGeert Uytterhoeven }; 3839077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_mux[] = { 3840077365a9SGeert Uytterhoeven SD1_WP_MARK, 3841077365a9SGeert Uytterhoeven }; 3842077365a9SGeert Uytterhoeven /* - SDHI2 ------------------------------------------------------------------ */ 384359916e93SGeert Uytterhoeven static const unsigned int sdhi2_data_pins[] = { 3844077365a9SGeert Uytterhoeven /* D[0:3] */ 3845077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19), 3846077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21), 3847077365a9SGeert Uytterhoeven }; 384859916e93SGeert Uytterhoeven static const unsigned int sdhi2_data_mux[] = { 3849077365a9SGeert Uytterhoeven SD2_DATA0_MARK, SD2_DATA1_MARK, SD2_DATA2_MARK, SD2_DATA3_MARK, 3850077365a9SGeert Uytterhoeven }; 3851077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_pins[] = { 3852077365a9SGeert Uytterhoeven /* CLK, CMD */ 3853077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17), 3854077365a9SGeert Uytterhoeven }; 3855077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_mux[] = { 3856077365a9SGeert Uytterhoeven SD2_CLK_MARK, SD2_CMD_MARK, 3857077365a9SGeert Uytterhoeven }; 3858077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_pins[] = { 3859077365a9SGeert Uytterhoeven /* CD */ 3860077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 22), 3861077365a9SGeert Uytterhoeven }; 3862077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_mux[] = { 3863077365a9SGeert Uytterhoeven SD2_CD_MARK, 3864077365a9SGeert Uytterhoeven }; 3865077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_pins[] = { 3866077365a9SGeert Uytterhoeven /* WP */ 3867077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 23), 3868077365a9SGeert Uytterhoeven }; 3869077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_mux[] = { 3870077365a9SGeert Uytterhoeven SD2_WP_MARK, 3871077365a9SGeert Uytterhoeven }; 3872077365a9SGeert Uytterhoeven 3873077365a9SGeert Uytterhoeven /* - SSI -------------------------------------------------------------------- */ 3874077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_pins[] = { 3875077365a9SGeert Uytterhoeven /* SDATA */ 3876077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), 3877077365a9SGeert Uytterhoeven }; 3878077365a9SGeert Uytterhoeven 3879077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_mux[] = { 3880077365a9SGeert Uytterhoeven SSI_SDATA0_MARK, 3881077365a9SGeert Uytterhoeven }; 3882077365a9SGeert Uytterhoeven 3883077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_b_pins[] = { 3884077365a9SGeert Uytterhoeven /* SDATA */ 3885077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), 3886077365a9SGeert Uytterhoeven }; 3887077365a9SGeert Uytterhoeven 3888077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_b_mux[] = { 3889077365a9SGeert Uytterhoeven SSI_SDATA0_B_MARK, 3890077365a9SGeert Uytterhoeven }; 3891077365a9SGeert Uytterhoeven 3892077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_pins[] = { 3893077365a9SGeert Uytterhoeven /* SCK, WS */ 3894077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 3895077365a9SGeert Uytterhoeven }; 3896077365a9SGeert Uytterhoeven 3897077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_mux[] = { 3898077365a9SGeert Uytterhoeven SSI_SCK0129_MARK, SSI_WS0129_MARK, 3899077365a9SGeert Uytterhoeven }; 3900077365a9SGeert Uytterhoeven 3901077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_b_pins[] = { 3902077365a9SGeert Uytterhoeven /* SCK, WS */ 3903077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 3904077365a9SGeert Uytterhoeven }; 3905077365a9SGeert Uytterhoeven 3906077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_b_mux[] = { 3907077365a9SGeert Uytterhoeven SSI_SCK0129_B_MARK, SSI_WS0129_B_MARK, 3908077365a9SGeert Uytterhoeven }; 3909077365a9SGeert Uytterhoeven 3910077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_pins[] = { 3911077365a9SGeert Uytterhoeven /* SDATA */ 3912077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5), 3913077365a9SGeert Uytterhoeven }; 3914077365a9SGeert Uytterhoeven 3915077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_mux[] = { 3916077365a9SGeert Uytterhoeven SSI_SDATA1_MARK, 3917077365a9SGeert Uytterhoeven }; 3918077365a9SGeert Uytterhoeven 3919077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_b_pins[] = { 3920077365a9SGeert Uytterhoeven /* SDATA */ 3921077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), 3922077365a9SGeert Uytterhoeven }; 3923077365a9SGeert Uytterhoeven 3924077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_b_mux[] = { 3925077365a9SGeert Uytterhoeven SSI_SDATA1_B_MARK, 3926077365a9SGeert Uytterhoeven }; 3927077365a9SGeert Uytterhoeven 3928077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_pins[] = { 3929077365a9SGeert Uytterhoeven /* SCK, WS */ 3930077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), 3931077365a9SGeert Uytterhoeven }; 3932077365a9SGeert Uytterhoeven 3933077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_mux[] = { 3934077365a9SGeert Uytterhoeven SSI_SCK1_MARK, SSI_WS1_MARK, 3935077365a9SGeert Uytterhoeven }; 3936077365a9SGeert Uytterhoeven 3937077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_b_pins[] = { 3938077365a9SGeert Uytterhoeven /* SCK, WS */ 3939077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), 3940077365a9SGeert Uytterhoeven }; 3941077365a9SGeert Uytterhoeven 3942077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_b_mux[] = { 3943077365a9SGeert Uytterhoeven SSI_SCK1_B_MARK, SSI_WS1_B_MARK, 3944077365a9SGeert Uytterhoeven }; 3945077365a9SGeert Uytterhoeven 3946077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_pins[] = { 3947077365a9SGeert Uytterhoeven /* SDATA */ 3948077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), 3949077365a9SGeert Uytterhoeven }; 3950077365a9SGeert Uytterhoeven 3951077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_mux[] = { 3952077365a9SGeert Uytterhoeven SSI_SDATA2_MARK, 3953077365a9SGeert Uytterhoeven }; 3954077365a9SGeert Uytterhoeven 3955077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_pins[] = { 3956077365a9SGeert Uytterhoeven /* SCK, WS */ 3957077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), 3958077365a9SGeert Uytterhoeven }; 3959077365a9SGeert Uytterhoeven 3960077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_mux[] = { 3961077365a9SGeert Uytterhoeven SSI_SCK2_MARK, SSI_WS2_MARK, 3962077365a9SGeert Uytterhoeven }; 3963077365a9SGeert Uytterhoeven 3964077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_pins[] = { 3965077365a9SGeert Uytterhoeven /* SDATA */ 3966077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 11), 3967077365a9SGeert Uytterhoeven }; 3968077365a9SGeert Uytterhoeven 3969077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_mux[] = { 3970077365a9SGeert Uytterhoeven SSI_SDATA3_MARK, 3971077365a9SGeert Uytterhoeven }; 3972077365a9SGeert Uytterhoeven 3973077365a9SGeert Uytterhoeven static const unsigned int ssi34_ctrl_pins[] = { 3974077365a9SGeert Uytterhoeven /* SCK, WS */ 3975077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10), 3976077365a9SGeert Uytterhoeven }; 3977077365a9SGeert Uytterhoeven 3978077365a9SGeert Uytterhoeven static const unsigned int ssi34_ctrl_mux[] = { 3979077365a9SGeert Uytterhoeven SSI_SCK34_MARK, SSI_WS34_MARK, 3980077365a9SGeert Uytterhoeven }; 3981077365a9SGeert Uytterhoeven 3982077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_pins[] = { 3983077365a9SGeert Uytterhoeven /* SDATA */ 3984077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), 3985077365a9SGeert Uytterhoeven }; 3986077365a9SGeert Uytterhoeven 3987077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_mux[] = { 3988077365a9SGeert Uytterhoeven SSI_SDATA4_MARK, 3989077365a9SGeert Uytterhoeven }; 3990077365a9SGeert Uytterhoeven 3991077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_pins[] = { 3992077365a9SGeert Uytterhoeven /* SCK, WS */ 3993077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), 3994077365a9SGeert Uytterhoeven }; 3995077365a9SGeert Uytterhoeven 3996077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_mux[] = { 3997077365a9SGeert Uytterhoeven SSI_SCK4_MARK, SSI_WS4_MARK, 3998077365a9SGeert Uytterhoeven }; 3999077365a9SGeert Uytterhoeven 4000077365a9SGeert Uytterhoeven static const unsigned int ssi5_data_pins[] = { 4001077365a9SGeert Uytterhoeven /* SDATA */ 4002077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), 4003077365a9SGeert Uytterhoeven }; 4004077365a9SGeert Uytterhoeven 4005077365a9SGeert Uytterhoeven static const unsigned int ssi5_data_mux[] = { 4006077365a9SGeert Uytterhoeven SSI_SDATA5_MARK, 4007077365a9SGeert Uytterhoeven }; 4008077365a9SGeert Uytterhoeven 4009077365a9SGeert Uytterhoeven static const unsigned int ssi5_ctrl_pins[] = { 4010077365a9SGeert Uytterhoeven /* SCK, WS */ 4011077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), 4012077365a9SGeert Uytterhoeven }; 4013077365a9SGeert Uytterhoeven 4014077365a9SGeert Uytterhoeven static const unsigned int ssi5_ctrl_mux[] = { 4015077365a9SGeert Uytterhoeven SSI_SCK5_MARK, SSI_WS5_MARK, 4016077365a9SGeert Uytterhoeven }; 4017077365a9SGeert Uytterhoeven 4018077365a9SGeert Uytterhoeven static const unsigned int ssi6_data_pins[] = { 4019077365a9SGeert Uytterhoeven /* SDATA */ 4020077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), 4021077365a9SGeert Uytterhoeven }; 4022077365a9SGeert Uytterhoeven 4023077365a9SGeert Uytterhoeven static const unsigned int ssi6_data_mux[] = { 4024077365a9SGeert Uytterhoeven SSI_SDATA6_MARK, 4025077365a9SGeert Uytterhoeven }; 4026077365a9SGeert Uytterhoeven 4027077365a9SGeert Uytterhoeven static const unsigned int ssi6_ctrl_pins[] = { 4028077365a9SGeert Uytterhoeven /* SCK, WS */ 4029077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), 4030077365a9SGeert Uytterhoeven }; 4031077365a9SGeert Uytterhoeven 4032077365a9SGeert Uytterhoeven static const unsigned int ssi6_ctrl_mux[] = { 4033077365a9SGeert Uytterhoeven SSI_SCK6_MARK, SSI_WS6_MARK, 4034077365a9SGeert Uytterhoeven }; 4035077365a9SGeert Uytterhoeven 4036077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_pins[] = { 4037077365a9SGeert Uytterhoeven /* SDATA */ 4038077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 23), 4039077365a9SGeert Uytterhoeven }; 4040077365a9SGeert Uytterhoeven 4041077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_mux[] = { 4042077365a9SGeert Uytterhoeven SSI_SDATA7_MARK, 4043077365a9SGeert Uytterhoeven }; 4044077365a9SGeert Uytterhoeven 4045077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_b_pins[] = { 4046077365a9SGeert Uytterhoeven /* SDATA */ 4047077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), 4048077365a9SGeert Uytterhoeven }; 4049077365a9SGeert Uytterhoeven 4050077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_b_mux[] = { 4051077365a9SGeert Uytterhoeven SSI_SDATA7_B_MARK, 4052077365a9SGeert Uytterhoeven }; 4053077365a9SGeert Uytterhoeven 4054077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_pins[] = { 4055077365a9SGeert Uytterhoeven /* SCK, WS */ 4056077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), 4057077365a9SGeert Uytterhoeven }; 4058077365a9SGeert Uytterhoeven 4059077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_mux[] = { 4060077365a9SGeert Uytterhoeven SSI_SCK78_MARK, SSI_WS78_MARK, 4061077365a9SGeert Uytterhoeven }; 4062077365a9SGeert Uytterhoeven 4063077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_b_pins[] = { 4064077365a9SGeert Uytterhoeven /* SCK, WS */ 4065077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), 4066077365a9SGeert Uytterhoeven }; 4067077365a9SGeert Uytterhoeven 4068077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_b_mux[] = { 4069077365a9SGeert Uytterhoeven SSI_SCK78_B_MARK, SSI_WS78_B_MARK, 4070077365a9SGeert Uytterhoeven }; 4071077365a9SGeert Uytterhoeven 4072077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_pins[] = { 4073077365a9SGeert Uytterhoeven /* SDATA */ 4074077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 24), 4075077365a9SGeert Uytterhoeven }; 4076077365a9SGeert Uytterhoeven 4077077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_mux[] = { 4078077365a9SGeert Uytterhoeven SSI_SDATA8_MARK, 4079077365a9SGeert Uytterhoeven }; 4080077365a9SGeert Uytterhoeven 4081077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_b_pins[] = { 4082077365a9SGeert Uytterhoeven /* SDATA */ 4083077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), 4084077365a9SGeert Uytterhoeven }; 4085077365a9SGeert Uytterhoeven 4086077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_b_mux[] = { 4087077365a9SGeert Uytterhoeven SSI_SDATA8_B_MARK, 4088077365a9SGeert Uytterhoeven }; 4089077365a9SGeert Uytterhoeven 4090077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_pins[] = { 4091077365a9SGeert Uytterhoeven /* SDATA */ 4092077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 27), 4093077365a9SGeert Uytterhoeven }; 4094077365a9SGeert Uytterhoeven 4095077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_mux[] = { 4096077365a9SGeert Uytterhoeven SSI_SDATA9_MARK, 4097077365a9SGeert Uytterhoeven }; 4098077365a9SGeert Uytterhoeven 4099077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_b_pins[] = { 4100077365a9SGeert Uytterhoeven /* SDATA */ 4101077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), 4102077365a9SGeert Uytterhoeven }; 4103077365a9SGeert Uytterhoeven 4104077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_b_mux[] = { 4105077365a9SGeert Uytterhoeven SSI_SDATA9_B_MARK, 4106077365a9SGeert Uytterhoeven }; 4107077365a9SGeert Uytterhoeven 4108077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_pins[] = { 4109077365a9SGeert Uytterhoeven /* SCK, WS */ 4110077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 26), 4111077365a9SGeert Uytterhoeven }; 4112077365a9SGeert Uytterhoeven 4113077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_mux[] = { 4114077365a9SGeert Uytterhoeven SSI_SCK9_MARK, SSI_WS9_MARK, 4115077365a9SGeert Uytterhoeven }; 4116077365a9SGeert Uytterhoeven 4117077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_b_pins[] = { 4118077365a9SGeert Uytterhoeven /* SCK, WS */ 4119077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), 4120077365a9SGeert Uytterhoeven }; 4121077365a9SGeert Uytterhoeven 4122077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_b_mux[] = { 4123077365a9SGeert Uytterhoeven SSI_SCK9_B_MARK, SSI_WS9_B_MARK, 4124077365a9SGeert Uytterhoeven }; 4125077365a9SGeert Uytterhoeven 4126077365a9SGeert Uytterhoeven /* - TPU -------------------------------------------------------------------- */ 4127077365a9SGeert Uytterhoeven static const unsigned int tpu_to0_pins[] = { 4128077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 14), 4129077365a9SGeert Uytterhoeven }; 4130077365a9SGeert Uytterhoeven static const unsigned int tpu_to0_mux[] = { 4131077365a9SGeert Uytterhoeven TPU_TO0_MARK, 4132077365a9SGeert Uytterhoeven }; 4133077365a9SGeert Uytterhoeven static const unsigned int tpu_to1_pins[] = { 4134077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), 4135077365a9SGeert Uytterhoeven }; 4136077365a9SGeert Uytterhoeven static const unsigned int tpu_to1_mux[] = { 4137077365a9SGeert Uytterhoeven TPU_TO1_MARK, 4138077365a9SGeert Uytterhoeven }; 4139077365a9SGeert Uytterhoeven static const unsigned int tpu_to2_pins[] = { 4140077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 18), 4141077365a9SGeert Uytterhoeven }; 4142077365a9SGeert Uytterhoeven static const unsigned int tpu_to2_mux[] = { 4143077365a9SGeert Uytterhoeven TPU_TO2_MARK, 4144077365a9SGeert Uytterhoeven }; 4145077365a9SGeert Uytterhoeven static const unsigned int tpu_to3_pins[] = { 4146077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24), 4147077365a9SGeert Uytterhoeven }; 4148077365a9SGeert Uytterhoeven static const unsigned int tpu_to3_mux[] = { 4149077365a9SGeert Uytterhoeven TPU_TO3_MARK, 4150077365a9SGeert Uytterhoeven }; 4151077365a9SGeert Uytterhoeven 4152077365a9SGeert Uytterhoeven /* - USB0 ------------------------------------------------------------------- */ 4153077365a9SGeert Uytterhoeven static const unsigned int usb0_pins[] = { 4154077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 23), /* PWEN */ 4155077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 24), /* OVC */ 4156077365a9SGeert Uytterhoeven }; 4157077365a9SGeert Uytterhoeven static const unsigned int usb0_mux[] = { 4158077365a9SGeert Uytterhoeven USB0_PWEN_MARK, 4159077365a9SGeert Uytterhoeven USB0_OVC_MARK, 4160077365a9SGeert Uytterhoeven }; 4161077365a9SGeert Uytterhoeven /* - USB1 ------------------------------------------------------------------- */ 4162077365a9SGeert Uytterhoeven static const unsigned int usb1_pins[] = { 4163077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 25), /* PWEN */ 4164077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 30), /* OVC */ 4165077365a9SGeert Uytterhoeven }; 4166077365a9SGeert Uytterhoeven static const unsigned int usb1_mux[] = { 4167077365a9SGeert Uytterhoeven USB1_PWEN_MARK, 4168077365a9SGeert Uytterhoeven USB1_OVC_MARK, 4169077365a9SGeert Uytterhoeven }; 4170077365a9SGeert Uytterhoeven /* - VIN0 ------------------------------------------------------------------- */ 4171496da100SGeert Uytterhoeven static const unsigned int vin0_data_pins[] = { 4172077365a9SGeert Uytterhoeven /* B */ 4173077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 6), 4174077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), 4175077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), 4176077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), 4177077365a9SGeert Uytterhoeven /* G */ 4178077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), 4179077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), 4180077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18), 4181077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 20), 4182077365a9SGeert Uytterhoeven /* R */ 4183077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 22), 4184077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 24), 4185077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), 4186077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), 4187077365a9SGeert Uytterhoeven }; 4188496da100SGeert Uytterhoeven static const unsigned int vin0_data_mux[] = { 4189077365a9SGeert Uytterhoeven /* B */ 4190077365a9SGeert Uytterhoeven VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, 4191077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 4192077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 4193077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 4194077365a9SGeert Uytterhoeven /* G */ 4195077365a9SGeert Uytterhoeven VI0_G0_MARK, VI0_G1_MARK, 4196077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 4197077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 4198077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 4199077365a9SGeert Uytterhoeven /* R */ 4200077365a9SGeert Uytterhoeven VI0_R0_MARK, VI0_R1_MARK, 4201077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 4202077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 4203077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 4204077365a9SGeert Uytterhoeven }; 4205077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_pins[] = { 4206077365a9SGeert Uytterhoeven /* B */ 4207077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), 4208077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), 4209077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), 4210077365a9SGeert Uytterhoeven /* G */ 4211077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), 4212077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18), 4213077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 20), 4214077365a9SGeert Uytterhoeven /* R */ 4215077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 24), 4216077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), 4217077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), 4218077365a9SGeert Uytterhoeven }; 4219077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_mux[] = { 4220077365a9SGeert Uytterhoeven /* B */ 4221077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 4222077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 4223077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 4224077365a9SGeert Uytterhoeven /* G */ 4225077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 4226077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 4227077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 4228077365a9SGeert Uytterhoeven /* R */ 4229077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 4230077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 4231077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 4232077365a9SGeert Uytterhoeven }; 4233077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_pins[] = { 4234077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), /* HSYNC */ 4235077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), /* VSYNC */ 4236077365a9SGeert Uytterhoeven }; 4237077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_mux[] = { 4238077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, 4239077365a9SGeert Uytterhoeven VI0_VSYNC_N_MARK, 4240077365a9SGeert Uytterhoeven }; 4241077365a9SGeert Uytterhoeven static const unsigned int vin0_field_pins[] = { 4242077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), 4243077365a9SGeert Uytterhoeven }; 4244077365a9SGeert Uytterhoeven static const unsigned int vin0_field_mux[] = { 4245077365a9SGeert Uytterhoeven VI0_FIELD_MARK, 4246077365a9SGeert Uytterhoeven }; 4247077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_pins[] = { 4248077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1), 4249077365a9SGeert Uytterhoeven }; 4250077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_mux[] = { 4251077365a9SGeert Uytterhoeven VI0_CLKENB_MARK, 4252077365a9SGeert Uytterhoeven }; 4253077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_pins[] = { 4254077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), 4255077365a9SGeert Uytterhoeven }; 4256077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_mux[] = { 4257077365a9SGeert Uytterhoeven VI0_CLK_MARK, 4258077365a9SGeert Uytterhoeven }; 4259077365a9SGeert Uytterhoeven /* - VIN1 ----------------------------------------------------------------- */ 4260077365a9SGeert Uytterhoeven static const unsigned int vin1_data8_pins[] = { 4261077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), 4262077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), 4263077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), 4264077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 12), 4265077365a9SGeert Uytterhoeven }; 4266077365a9SGeert Uytterhoeven static const unsigned int vin1_data8_mux[] = { 4267077365a9SGeert Uytterhoeven VI1_DATA0_MARK, VI1_DATA1_MARK, 4268077365a9SGeert Uytterhoeven VI1_DATA2_MARK, VI1_DATA3_MARK, 4269077365a9SGeert Uytterhoeven VI1_DATA4_MARK, VI1_DATA5_MARK, 4270077365a9SGeert Uytterhoeven VI1_DATA6_MARK, VI1_DATA7_MARK, 4271077365a9SGeert Uytterhoeven }; 4272077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_pins[] = { 4273077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), /* HSYNC */ 4274077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), /* VSYNC */ 4275077365a9SGeert Uytterhoeven }; 4276077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_mux[] = { 4277077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, 4278077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, 4279077365a9SGeert Uytterhoeven }; 4280077365a9SGeert Uytterhoeven static const unsigned int vin1_field_pins[] = { 4281077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), 4282077365a9SGeert Uytterhoeven }; 4283077365a9SGeert Uytterhoeven static const unsigned int vin1_field_mux[] = { 4284077365a9SGeert Uytterhoeven VI1_FIELD_MARK, 4285077365a9SGeert Uytterhoeven }; 4286077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_pins[] = { 4287077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 2), 4288077365a9SGeert Uytterhoeven }; 4289077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_mux[] = { 4290077365a9SGeert Uytterhoeven VI1_CLKENB_MARK, 4291077365a9SGeert Uytterhoeven }; 4292077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_pins[] = { 4293077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), 4294077365a9SGeert Uytterhoeven }; 4295077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_mux[] = { 4296077365a9SGeert Uytterhoeven VI1_CLK_MARK, 4297077365a9SGeert Uytterhoeven }; 4298496da100SGeert Uytterhoeven static const unsigned int vin1_data_b_pins[] = { 4299077365a9SGeert Uytterhoeven /* B */ 4300077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 4301077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), 4302077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), 4303077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), 4304077365a9SGeert Uytterhoeven /* G */ 4305077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), 4306077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), 4307077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), 4308077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 22), 4309077365a9SGeert Uytterhoeven /* R */ 4310077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 6), 4311077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), 4312077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 18), 4313077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), 4314077365a9SGeert Uytterhoeven }; 4315496da100SGeert Uytterhoeven static const unsigned int vin1_data_b_mux[] = { 4316077365a9SGeert Uytterhoeven /* B */ 4317077365a9SGeert Uytterhoeven VI1_DATA0_B_MARK, VI1_DATA1_B_MARK, 4318077365a9SGeert Uytterhoeven VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, 4319077365a9SGeert Uytterhoeven VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, 4320077365a9SGeert Uytterhoeven VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, 4321077365a9SGeert Uytterhoeven /* G */ 4322077365a9SGeert Uytterhoeven VI1_G0_B_MARK, VI1_G1_B_MARK, 4323077365a9SGeert Uytterhoeven VI1_G2_B_MARK, VI1_G3_B_MARK, 4324077365a9SGeert Uytterhoeven VI1_G4_B_MARK, VI1_G5_B_MARK, 4325077365a9SGeert Uytterhoeven VI1_G6_B_MARK, VI1_G7_B_MARK, 4326077365a9SGeert Uytterhoeven /* R */ 4327077365a9SGeert Uytterhoeven VI1_R0_B_MARK, VI1_R1_B_MARK, 4328077365a9SGeert Uytterhoeven VI1_R2_B_MARK, VI1_R3_B_MARK, 4329077365a9SGeert Uytterhoeven VI1_R4_B_MARK, VI1_R5_B_MARK, 4330077365a9SGeert Uytterhoeven VI1_R6_B_MARK, VI1_R7_B_MARK, 4331077365a9SGeert Uytterhoeven }; 4332077365a9SGeert Uytterhoeven static const unsigned int vin1_data18_b_pins[] = { 4333077365a9SGeert Uytterhoeven /* B */ 4334077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), 4335077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), 4336077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), 4337077365a9SGeert Uytterhoeven /* G */ 4338077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), 4339077365a9SGeert Uytterhoeven RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), 4340077365a9SGeert Uytterhoeven RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 22), 4341077365a9SGeert Uytterhoeven /* R */ 4342077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), 4343077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 18), 4344077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), 4345077365a9SGeert Uytterhoeven }; 4346077365a9SGeert Uytterhoeven static const unsigned int vin1_data18_b_mux[] = { 4347077365a9SGeert Uytterhoeven /* B */ 4348077365a9SGeert Uytterhoeven VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, 4349077365a9SGeert Uytterhoeven VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, 4350077365a9SGeert Uytterhoeven VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, 4351077365a9SGeert Uytterhoeven /* G */ 4352077365a9SGeert Uytterhoeven VI1_G2_B_MARK, VI1_G3_B_MARK, 4353077365a9SGeert Uytterhoeven VI1_G4_B_MARK, VI1_G5_B_MARK, 4354077365a9SGeert Uytterhoeven VI1_G6_B_MARK, VI1_G7_B_MARK, 4355077365a9SGeert Uytterhoeven /* R */ 4356077365a9SGeert Uytterhoeven VI1_R2_B_MARK, VI1_R3_B_MARK, 4357077365a9SGeert Uytterhoeven VI1_R4_B_MARK, VI1_R5_B_MARK, 4358077365a9SGeert Uytterhoeven VI1_R6_B_MARK, VI1_R7_B_MARK, 4359077365a9SGeert Uytterhoeven }; 4360077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_b_pins[] = { 4361077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), /* HSYNC */ 4362077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), /* VSYNC */ 4363077365a9SGeert Uytterhoeven }; 4364077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_b_mux[] = { 4365077365a9SGeert Uytterhoeven VI1_HSYNC_N_B_MARK, 4366077365a9SGeert Uytterhoeven VI1_VSYNC_N_B_MARK, 4367077365a9SGeert Uytterhoeven }; 4368077365a9SGeert Uytterhoeven static const unsigned int vin1_field_b_pins[] = { 4369077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), 4370077365a9SGeert Uytterhoeven }; 4371077365a9SGeert Uytterhoeven static const unsigned int vin1_field_b_mux[] = { 4372077365a9SGeert Uytterhoeven VI1_FIELD_B_MARK, 4373077365a9SGeert Uytterhoeven }; 4374077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_b_pins[] = { 4375077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 19), 4376077365a9SGeert Uytterhoeven }; 4377077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_b_mux[] = { 4378077365a9SGeert Uytterhoeven VI1_CLKENB_B_MARK, 4379077365a9SGeert Uytterhoeven }; 4380077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_b_pins[] = { 4381077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), 4382077365a9SGeert Uytterhoeven }; 4383077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_b_mux[] = { 4384077365a9SGeert Uytterhoeven VI1_CLK_B_MARK, 4385077365a9SGeert Uytterhoeven }; 4386077365a9SGeert Uytterhoeven /* - VIN2 ----------------------------------------------------------------- */ 4387077365a9SGeert Uytterhoeven static const unsigned int vin2_data8_pins[] = { 4388077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 21), 4389077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), 4390077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 25), 4391077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), RCAR_GP_PIN(4, 27), 4392077365a9SGeert Uytterhoeven }; 4393077365a9SGeert Uytterhoeven static const unsigned int vin2_data8_mux[] = { 4394077365a9SGeert Uytterhoeven VI2_DATA0_MARK, VI2_DATA1_MARK, 4395077365a9SGeert Uytterhoeven VI2_DATA2_MARK, VI2_DATA3_MARK, 4396077365a9SGeert Uytterhoeven VI2_DATA4_MARK, VI2_DATA5_MARK, 4397077365a9SGeert Uytterhoeven VI2_DATA6_MARK, VI2_DATA7_MARK, 4398077365a9SGeert Uytterhoeven }; 4399077365a9SGeert Uytterhoeven static const unsigned int vin2_sync_pins[] = { 4400077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), /* HSYNC */ 4401077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), /* VSYNC */ 4402077365a9SGeert Uytterhoeven }; 4403077365a9SGeert Uytterhoeven static const unsigned int vin2_sync_mux[] = { 4404077365a9SGeert Uytterhoeven VI2_HSYNC_N_MARK, 4405077365a9SGeert Uytterhoeven VI2_VSYNC_N_MARK, 4406077365a9SGeert Uytterhoeven }; 4407077365a9SGeert Uytterhoeven static const unsigned int vin2_field_pins[] = { 4408077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), 4409077365a9SGeert Uytterhoeven }; 4410077365a9SGeert Uytterhoeven static const unsigned int vin2_field_mux[] = { 4411077365a9SGeert Uytterhoeven VI2_FIELD_MARK, 4412077365a9SGeert Uytterhoeven }; 4413077365a9SGeert Uytterhoeven static const unsigned int vin2_clkenb_pins[] = { 4414077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), 4415077365a9SGeert Uytterhoeven }; 4416077365a9SGeert Uytterhoeven static const unsigned int vin2_clkenb_mux[] = { 4417077365a9SGeert Uytterhoeven VI2_CLKENB_MARK, 4418077365a9SGeert Uytterhoeven }; 4419077365a9SGeert Uytterhoeven static const unsigned int vin2_clk_pins[] = { 4420077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 19), 4421077365a9SGeert Uytterhoeven }; 4422077365a9SGeert Uytterhoeven static const unsigned int vin2_clk_mux[] = { 4423077365a9SGeert Uytterhoeven VI2_CLK_MARK, 4424077365a9SGeert Uytterhoeven }; 4425077365a9SGeert Uytterhoeven 4426077365a9SGeert Uytterhoeven static const struct { 4427077365a9SGeert Uytterhoeven struct sh_pfc_pin_group common[346]; 44288d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 4429077365a9SGeert Uytterhoeven struct sh_pfc_pin_group automotive[9]; 44308d3b2e3dSBiju Das #endif 4431077365a9SGeert Uytterhoeven } pinmux_groups = { 4432077365a9SGeert Uytterhoeven .common = { 4433077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_a), 4434077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_b), 4435077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_b_b), 4436077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_c), 4437077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clkout), 4438077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_link), 4439077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_magic), 4440077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_phy_int), 4441077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mdio), 4442077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mii), 4443077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_gmii), 4444077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data), 4445077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_b), 4446077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_c), 4447077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_d), 4448077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_e), 4449077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_f), 4450077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data), 4451077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data_b), 4452077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data_c), 4453077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data_d), 4454077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk), 4455077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk_b), 4456077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk_c), 4457077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk_d), 4458077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_rgb666), 4459077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_rgb888), 4460077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_clk_out_0), 4461077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_clk_out_1), 4462077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_sync), 4463077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_oddf), 4464077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_cde), 4465077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_disp), 4466077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_clk_in), 4467077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk_in), 4468077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk_in_b), 4469077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk_in_c), 4470077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_link), 4471077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_magic), 4472077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_mdio), 4473077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_rmii), 4474077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data), 4475077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_clk), 4476077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl), 4477077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_b), 4478077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_b), 4479077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_c), 4480077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_clk_c), 4481077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data), 4482077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk), 4483077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl), 4484077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data_b), 4485077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data_c), 4486077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk_c), 4487077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl_c), 4488077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data_d), 44897a2b3782SGeert Uytterhoeven SH_PFC_PIN_GROUP_ALIAS(hscif1_data_e, hscif1_data_c), 4490077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk_e), 4491077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl_e), 4492077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_data), 4493077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_clk), 4494077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_ctrl), 4495077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_data_b), 4496077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_ctrl_b), 4497077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_data_c), 4498077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_clk_c), 4499077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_data_d), 4500077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0), 4501077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_b), 4502077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_c), 4503077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1), 4504077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_b), 4505077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_c), 4506077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_d), 4507077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_e), 4508077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2), 4509077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_b), 4510077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_c), 4511077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_d), 4512077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3), 4513077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_b), 4514077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_c), 4515077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_d), 4516077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4), 4517077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_b), 4518077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_c), 4519077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c7), 4520077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c7_b), 4521077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c7_c), 4522077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c8), 4523077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c8_b), 4524077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c8_c), 4525077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq0), 4526077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq1), 4527077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq2), 4528077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq3), 45291f38e713SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 1), 45301f38e713SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 4), 45311f38e713SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 8), 45321f38e713SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 8, _b), 4533077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc_ctrl), 4534077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk), 4535077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_sync), 4536077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1), 4537077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2), 4538077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rx), 4539077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_tx), 4540077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk_b), 4541077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_sync_b), 4542077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1_b), 4543077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2_b), 4544077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rx_b), 4545077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_tx_b), 4546077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk_c), 4547077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_sync_c), 4548077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1_c), 4549077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2_c), 4550077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rx_c), 4551077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_tx_c), 4552077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk), 4553077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync), 4554077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1), 4555077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss2), 4556077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx), 4557077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx), 4558077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk_b), 4559077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync_b), 4560077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1_b), 4561077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss2_b), 4562077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx_b), 4563077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx_b), 4564077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk_c), 4565077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync_c), 4566077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx_c), 4567077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx_c), 4568077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk_d), 4569077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync_d), 4570077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1_d), 4571077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx_d), 4572077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx_d), 4573077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk_e), 4574077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync_e), 4575077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx_e), 4576077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx_e), 4577077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk), 4578077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync), 4579077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss1), 4580077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss2), 4581077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx), 4582077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx), 4583077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk_b), 4584077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync_b), 4585077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss1_b), 4586077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss2_b), 4587077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx_b), 4588077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx_b), 4589077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk_c), 4590077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync_c), 4591077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx_c), 4592077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx_c), 4593077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk_d), 4594077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync_d), 4595077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss1_d), 4596077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss2_d), 4597077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx_d), 4598077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx_d), 4599077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk_e), 4600077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync_e), 4601077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx_e), 4602077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx_e), 4603077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0), 4604077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0_b), 4605077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1), 4606077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1_b), 4607077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm2), 4608077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm2_b), 4609077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm3), 4610077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm4), 4611077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm4_b), 4612077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm5), 4613077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm5_b), 4614077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm6), 4615077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi_ctrl), 46167cba3cbcSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi_data, 2), 46177cba3cbcSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi_data, 4), 4618077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi_ctrl_b), 46197cba3cbcSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi_data, 2, _b), 46207cba3cbcSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi_data, 4, _b), 4621077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data), 4622077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_b), 4623077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_c), 4624077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_d), 4625077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_e), 4626077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data), 4627077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_b), 4628077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_b), 4629077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_c), 4630077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_d), 4631077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data), 4632077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_b), 4633077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_clk_b), 4634077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_c), 4635077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_e), 4636077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data), 4637077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_clk), 4638077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_b), 4639077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_clk_b), 4640077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_c), 4641077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_d), 4642077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data), 4643077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_b), 4644077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_c), 4645077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data), 4646077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_b), 4647077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_data), 4648077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_data_b), 4649077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data), 4650077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk), 4651077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data_b), 4652077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk_b), 4653077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data_c), 4654077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_data), 4655077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_clk), 4656077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_data_b), 4657077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_data), 4658077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_clk), 4659077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_data_b), 4660077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_clk_b), 4661077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_data_c), 4662077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa3_clk_c), 4663077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa4_data), 4664077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa4_data_b), 4665077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa4_data_c), 4666077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa5_data), 4667077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa5_data_b), 4668077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa5_data_c), 4669077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data), 4670077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk), 4671077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_ctrl), 4672077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data_b), 4673077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk_b), 4674077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_ctrl_b), 4675077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data_c), 4676077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk_c), 4677077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data_d), 4678077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk_d), 4679077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data), 4680077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk), 4681077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_ctrl), 4682077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_b), 4683077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk_b), 4684077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_c), 4685077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk_c), 4686077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_d), 4687077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data), 4688077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_clk), 4689077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_ctrl), 4690077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data_b), 4691077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_clk_b), 4692077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_ctrl_b), 4693077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data_c), 4694077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_clk_c), 4695077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data_d), 4696077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk), 4697077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_b), 469859916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi0_data, 1), 469959916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi0_data, 4), 4700077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_ctrl), 4701077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_cd), 4702077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_wp), 470359916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi1_data, 1), 470459916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi1_data, 4), 4705077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_ctrl), 4706077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_cd), 4707077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_wp), 470859916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi2_data, 1), 470959916e93SGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi2_data, 4), 4710077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_ctrl), 4711077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_cd), 4712077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_wp), 4713077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0_data), 4714077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0_data_b), 4715077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0129_ctrl), 4716077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0129_ctrl_b), 4717077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_data), 4718077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_data_b), 4719077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_ctrl), 4720077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_ctrl_b), 4721077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi2_data), 4722077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi2_ctrl), 4723077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi3_data), 4724077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi34_ctrl), 4725077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi4_data), 4726077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi4_ctrl), 4727077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi5_data), 4728077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi5_ctrl), 4729077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi6_data), 4730077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi6_ctrl), 4731077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi7_data), 4732077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi7_data_b), 4733077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi78_ctrl), 4734077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi78_ctrl_b), 4735077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi8_data), 4736077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi8_data_b), 4737077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_data), 4738077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_data_b), 4739077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_ctrl), 4740077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_ctrl_b), 4741077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu_to0), 4742077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu_to1), 4743077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu_to2), 4744077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu_to3), 4745077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb0), 4746077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb1), 4747496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 24), 4748496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 20), 4749077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_data18), 4750496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 16), 4751496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 12), 4752496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 10), 4753496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 8), 4754077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_sync), 4755077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_field), 4756077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clkenb), 4757077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clk), 4758077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_data8), 4759077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_sync), 4760077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_field), 4761077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clkenb), 4762077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clk), 4763496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 24, _b), 4764496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 20, _b), 4765077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_data18_b), 4766496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 16, _b), 4767496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 12, _b), 4768496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 10, _b), 4769496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 8, _b), 4770077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_sync_b), 4771077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_field_b), 4772077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clkenb_b), 4773077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clk_b), 4774077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_data8), 4775077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_sync), 4776077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_field), 4777077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_clkenb), 4778077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_clk), 4779077365a9SGeert Uytterhoeven }, 47808d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 4781077365a9SGeert Uytterhoeven .automotive = { 4782077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_common), 4783077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel0), 4784077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel1), 4785077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel2), 4786077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_common_b), 4787077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel0_b), 4788077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel1_b), 4789077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(adi_chsel2_b), 4790077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mlb_3pin), 4791077365a9SGeert Uytterhoeven } 47928d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 4793077365a9SGeert Uytterhoeven }; 4794077365a9SGeert Uytterhoeven 47958d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 4796077365a9SGeert Uytterhoeven static const char * const adi_groups[] = { 4797077365a9SGeert Uytterhoeven "adi_common", 4798077365a9SGeert Uytterhoeven "adi_chsel0", 4799077365a9SGeert Uytterhoeven "adi_chsel1", 4800077365a9SGeert Uytterhoeven "adi_chsel2", 4801077365a9SGeert Uytterhoeven "adi_common_b", 4802077365a9SGeert Uytterhoeven "adi_chsel0_b", 4803077365a9SGeert Uytterhoeven "adi_chsel1_b", 4804077365a9SGeert Uytterhoeven "adi_chsel2_b", 4805077365a9SGeert Uytterhoeven }; 48068d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 4807077365a9SGeert Uytterhoeven 4808077365a9SGeert Uytterhoeven static const char * const audio_clk_groups[] = { 4809077365a9SGeert Uytterhoeven "audio_clk_a", 4810077365a9SGeert Uytterhoeven "audio_clk_b", 4811077365a9SGeert Uytterhoeven "audio_clk_b_b", 4812077365a9SGeert Uytterhoeven "audio_clk_c", 4813077365a9SGeert Uytterhoeven "audio_clkout", 4814077365a9SGeert Uytterhoeven }; 4815077365a9SGeert Uytterhoeven 4816077365a9SGeert Uytterhoeven static const char * const avb_groups[] = { 4817077365a9SGeert Uytterhoeven "avb_link", 4818077365a9SGeert Uytterhoeven "avb_magic", 4819077365a9SGeert Uytterhoeven "avb_phy_int", 4820077365a9SGeert Uytterhoeven "avb_mdio", 4821077365a9SGeert Uytterhoeven "avb_mii", 4822077365a9SGeert Uytterhoeven "avb_gmii", 4823077365a9SGeert Uytterhoeven }; 4824077365a9SGeert Uytterhoeven 4825077365a9SGeert Uytterhoeven static const char * const can0_groups[] = { 4826077365a9SGeert Uytterhoeven "can0_data", 4827077365a9SGeert Uytterhoeven "can0_data_b", 4828077365a9SGeert Uytterhoeven "can0_data_c", 4829077365a9SGeert Uytterhoeven "can0_data_d", 4830077365a9SGeert Uytterhoeven "can0_data_e", 4831077365a9SGeert Uytterhoeven "can0_data_f", 4832077365a9SGeert Uytterhoeven /* 4833077365a9SGeert Uytterhoeven * Retained for backwards compatibility, use can_clk_groups in new 4834077365a9SGeert Uytterhoeven * designs. 4835077365a9SGeert Uytterhoeven */ 4836077365a9SGeert Uytterhoeven "can_clk", 4837077365a9SGeert Uytterhoeven "can_clk_b", 4838077365a9SGeert Uytterhoeven "can_clk_c", 4839077365a9SGeert Uytterhoeven "can_clk_d", 4840077365a9SGeert Uytterhoeven }; 4841077365a9SGeert Uytterhoeven 4842077365a9SGeert Uytterhoeven static const char * const can1_groups[] = { 4843077365a9SGeert Uytterhoeven "can1_data", 4844077365a9SGeert Uytterhoeven "can1_data_b", 4845077365a9SGeert Uytterhoeven "can1_data_c", 4846077365a9SGeert Uytterhoeven "can1_data_d", 4847077365a9SGeert Uytterhoeven /* 4848077365a9SGeert Uytterhoeven * Retained for backwards compatibility, use can_clk_groups in new 4849077365a9SGeert Uytterhoeven * designs. 4850077365a9SGeert Uytterhoeven */ 4851077365a9SGeert Uytterhoeven "can_clk", 4852077365a9SGeert Uytterhoeven "can_clk_b", 4853077365a9SGeert Uytterhoeven "can_clk_c", 4854077365a9SGeert Uytterhoeven "can_clk_d", 4855077365a9SGeert Uytterhoeven }; 4856077365a9SGeert Uytterhoeven 4857077365a9SGeert Uytterhoeven /* 4858077365a9SGeert Uytterhoeven * can_clk_groups allows for independent configuration, use can_clk function 4859077365a9SGeert Uytterhoeven * in new designs. 4860077365a9SGeert Uytterhoeven */ 4861077365a9SGeert Uytterhoeven static const char * const can_clk_groups[] = { 4862077365a9SGeert Uytterhoeven "can_clk", 4863077365a9SGeert Uytterhoeven "can_clk_b", 4864077365a9SGeert Uytterhoeven "can_clk_c", 4865077365a9SGeert Uytterhoeven "can_clk_d", 4866077365a9SGeert Uytterhoeven }; 4867077365a9SGeert Uytterhoeven 4868077365a9SGeert Uytterhoeven static const char * const du_groups[] = { 4869077365a9SGeert Uytterhoeven "du_rgb666", 4870077365a9SGeert Uytterhoeven "du_rgb888", 4871077365a9SGeert Uytterhoeven "du_clk_out_0", 4872077365a9SGeert Uytterhoeven "du_clk_out_1", 4873077365a9SGeert Uytterhoeven "du_sync", 4874077365a9SGeert Uytterhoeven "du_oddf", 4875077365a9SGeert Uytterhoeven "du_cde", 4876077365a9SGeert Uytterhoeven "du_disp", 4877077365a9SGeert Uytterhoeven }; 4878077365a9SGeert Uytterhoeven 4879077365a9SGeert Uytterhoeven static const char * const du0_groups[] = { 4880077365a9SGeert Uytterhoeven "du0_clk_in", 4881077365a9SGeert Uytterhoeven }; 4882077365a9SGeert Uytterhoeven 4883077365a9SGeert Uytterhoeven static const char * const du1_groups[] = { 4884077365a9SGeert Uytterhoeven "du1_clk_in", 4885077365a9SGeert Uytterhoeven "du1_clk_in_b", 4886077365a9SGeert Uytterhoeven "du1_clk_in_c", 4887077365a9SGeert Uytterhoeven }; 4888077365a9SGeert Uytterhoeven 4889077365a9SGeert Uytterhoeven static const char * const eth_groups[] = { 4890077365a9SGeert Uytterhoeven "eth_link", 4891077365a9SGeert Uytterhoeven "eth_magic", 4892077365a9SGeert Uytterhoeven "eth_mdio", 4893077365a9SGeert Uytterhoeven "eth_rmii", 4894077365a9SGeert Uytterhoeven }; 4895077365a9SGeert Uytterhoeven 4896077365a9SGeert Uytterhoeven static const char * const hscif0_groups[] = { 4897077365a9SGeert Uytterhoeven "hscif0_data", 4898077365a9SGeert Uytterhoeven "hscif0_clk", 4899077365a9SGeert Uytterhoeven "hscif0_ctrl", 4900077365a9SGeert Uytterhoeven "hscif0_data_b", 4901077365a9SGeert Uytterhoeven "hscif0_ctrl_b", 4902077365a9SGeert Uytterhoeven "hscif0_data_c", 4903077365a9SGeert Uytterhoeven "hscif0_clk_c", 4904077365a9SGeert Uytterhoeven }; 4905077365a9SGeert Uytterhoeven 4906077365a9SGeert Uytterhoeven static const char * const hscif1_groups[] = { 4907077365a9SGeert Uytterhoeven "hscif1_data", 4908077365a9SGeert Uytterhoeven "hscif1_clk", 4909077365a9SGeert Uytterhoeven "hscif1_ctrl", 4910077365a9SGeert Uytterhoeven "hscif1_data_b", 4911077365a9SGeert Uytterhoeven "hscif1_data_c", 4912077365a9SGeert Uytterhoeven "hscif1_clk_c", 4913077365a9SGeert Uytterhoeven "hscif1_ctrl_c", 4914077365a9SGeert Uytterhoeven "hscif1_data_d", 4915077365a9SGeert Uytterhoeven "hscif1_data_e", 4916077365a9SGeert Uytterhoeven "hscif1_clk_e", 4917077365a9SGeert Uytterhoeven "hscif1_ctrl_e", 4918077365a9SGeert Uytterhoeven }; 4919077365a9SGeert Uytterhoeven 4920077365a9SGeert Uytterhoeven static const char * const hscif2_groups[] = { 4921077365a9SGeert Uytterhoeven "hscif2_data", 4922077365a9SGeert Uytterhoeven "hscif2_clk", 4923077365a9SGeert Uytterhoeven "hscif2_ctrl", 4924077365a9SGeert Uytterhoeven "hscif2_data_b", 4925077365a9SGeert Uytterhoeven "hscif2_ctrl_b", 4926077365a9SGeert Uytterhoeven "hscif2_data_c", 4927077365a9SGeert Uytterhoeven "hscif2_clk_c", 4928077365a9SGeert Uytterhoeven "hscif2_data_d", 4929077365a9SGeert Uytterhoeven }; 4930077365a9SGeert Uytterhoeven 4931077365a9SGeert Uytterhoeven static const char * const i2c0_groups[] = { 4932077365a9SGeert Uytterhoeven "i2c0", 4933077365a9SGeert Uytterhoeven "i2c0_b", 4934077365a9SGeert Uytterhoeven "i2c0_c", 4935077365a9SGeert Uytterhoeven }; 4936077365a9SGeert Uytterhoeven 4937077365a9SGeert Uytterhoeven static const char * const i2c1_groups[] = { 4938077365a9SGeert Uytterhoeven "i2c1", 4939077365a9SGeert Uytterhoeven "i2c1_b", 4940077365a9SGeert Uytterhoeven "i2c1_c", 4941077365a9SGeert Uytterhoeven "i2c1_d", 4942077365a9SGeert Uytterhoeven "i2c1_e", 4943077365a9SGeert Uytterhoeven }; 4944077365a9SGeert Uytterhoeven 4945077365a9SGeert Uytterhoeven static const char * const i2c2_groups[] = { 4946077365a9SGeert Uytterhoeven "i2c2", 4947077365a9SGeert Uytterhoeven "i2c2_b", 4948077365a9SGeert Uytterhoeven "i2c2_c", 4949077365a9SGeert Uytterhoeven "i2c2_d", 4950077365a9SGeert Uytterhoeven }; 4951077365a9SGeert Uytterhoeven 4952077365a9SGeert Uytterhoeven static const char * const i2c3_groups[] = { 4953077365a9SGeert Uytterhoeven "i2c3", 4954077365a9SGeert Uytterhoeven "i2c3_b", 4955077365a9SGeert Uytterhoeven "i2c3_c", 4956077365a9SGeert Uytterhoeven "i2c3_d", 4957077365a9SGeert Uytterhoeven }; 4958077365a9SGeert Uytterhoeven 4959077365a9SGeert Uytterhoeven static const char * const i2c4_groups[] = { 4960077365a9SGeert Uytterhoeven "i2c4", 4961077365a9SGeert Uytterhoeven "i2c4_b", 4962077365a9SGeert Uytterhoeven "i2c4_c", 4963077365a9SGeert Uytterhoeven }; 4964077365a9SGeert Uytterhoeven 4965077365a9SGeert Uytterhoeven static const char * const i2c7_groups[] = { 4966077365a9SGeert Uytterhoeven "i2c7", 4967077365a9SGeert Uytterhoeven "i2c7_b", 4968077365a9SGeert Uytterhoeven "i2c7_c", 4969077365a9SGeert Uytterhoeven }; 4970077365a9SGeert Uytterhoeven 4971077365a9SGeert Uytterhoeven static const char * const i2c8_groups[] = { 4972077365a9SGeert Uytterhoeven "i2c8", 4973077365a9SGeert Uytterhoeven "i2c8_b", 4974077365a9SGeert Uytterhoeven "i2c8_c", 4975077365a9SGeert Uytterhoeven }; 4976077365a9SGeert Uytterhoeven 4977077365a9SGeert Uytterhoeven static const char * const intc_groups[] = { 4978077365a9SGeert Uytterhoeven "intc_irq0", 4979077365a9SGeert Uytterhoeven "intc_irq1", 4980077365a9SGeert Uytterhoeven "intc_irq2", 4981077365a9SGeert Uytterhoeven "intc_irq3", 4982077365a9SGeert Uytterhoeven }; 4983077365a9SGeert Uytterhoeven 49848d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 4985077365a9SGeert Uytterhoeven static const char * const mlb_groups[] = { 4986077365a9SGeert Uytterhoeven "mlb_3pin", 4987077365a9SGeert Uytterhoeven }; 49888d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 4989077365a9SGeert Uytterhoeven 4990077365a9SGeert Uytterhoeven static const char * const mmc_groups[] = { 4991077365a9SGeert Uytterhoeven "mmc_data1", 4992077365a9SGeert Uytterhoeven "mmc_data4", 4993077365a9SGeert Uytterhoeven "mmc_data8", 4994077365a9SGeert Uytterhoeven "mmc_data8_b", 4995077365a9SGeert Uytterhoeven "mmc_ctrl", 4996077365a9SGeert Uytterhoeven }; 4997077365a9SGeert Uytterhoeven 4998077365a9SGeert Uytterhoeven static const char * const msiof0_groups[] = { 4999077365a9SGeert Uytterhoeven "msiof0_clk", 5000077365a9SGeert Uytterhoeven "msiof0_sync", 5001077365a9SGeert Uytterhoeven "msiof0_ss1", 5002077365a9SGeert Uytterhoeven "msiof0_ss2", 5003077365a9SGeert Uytterhoeven "msiof0_rx", 5004077365a9SGeert Uytterhoeven "msiof0_tx", 5005077365a9SGeert Uytterhoeven "msiof0_clk_b", 5006077365a9SGeert Uytterhoeven "msiof0_sync_b", 5007077365a9SGeert Uytterhoeven "msiof0_ss1_b", 5008077365a9SGeert Uytterhoeven "msiof0_ss2_b", 5009077365a9SGeert Uytterhoeven "msiof0_rx_b", 5010077365a9SGeert Uytterhoeven "msiof0_tx_b", 5011077365a9SGeert Uytterhoeven "msiof0_clk_c", 5012077365a9SGeert Uytterhoeven "msiof0_sync_c", 5013077365a9SGeert Uytterhoeven "msiof0_ss1_c", 5014077365a9SGeert Uytterhoeven "msiof0_ss2_c", 5015077365a9SGeert Uytterhoeven "msiof0_rx_c", 5016077365a9SGeert Uytterhoeven "msiof0_tx_c", 5017077365a9SGeert Uytterhoeven }; 5018077365a9SGeert Uytterhoeven 5019077365a9SGeert Uytterhoeven static const char * const msiof1_groups[] = { 5020077365a9SGeert Uytterhoeven "msiof1_clk", 5021077365a9SGeert Uytterhoeven "msiof1_sync", 5022077365a9SGeert Uytterhoeven "msiof1_ss1", 5023077365a9SGeert Uytterhoeven "msiof1_ss2", 5024077365a9SGeert Uytterhoeven "msiof1_rx", 5025077365a9SGeert Uytterhoeven "msiof1_tx", 5026077365a9SGeert Uytterhoeven "msiof1_clk_b", 5027077365a9SGeert Uytterhoeven "msiof1_sync_b", 5028077365a9SGeert Uytterhoeven "msiof1_ss1_b", 5029077365a9SGeert Uytterhoeven "msiof1_ss2_b", 5030077365a9SGeert Uytterhoeven "msiof1_rx_b", 5031077365a9SGeert Uytterhoeven "msiof1_tx_b", 5032077365a9SGeert Uytterhoeven "msiof1_clk_c", 5033077365a9SGeert Uytterhoeven "msiof1_sync_c", 5034077365a9SGeert Uytterhoeven "msiof1_rx_c", 5035077365a9SGeert Uytterhoeven "msiof1_tx_c", 5036077365a9SGeert Uytterhoeven "msiof1_clk_d", 5037077365a9SGeert Uytterhoeven "msiof1_sync_d", 5038077365a9SGeert Uytterhoeven "msiof1_ss1_d", 5039077365a9SGeert Uytterhoeven "msiof1_rx_d", 5040077365a9SGeert Uytterhoeven "msiof1_tx_d", 5041077365a9SGeert Uytterhoeven "msiof1_clk_e", 5042077365a9SGeert Uytterhoeven "msiof1_sync_e", 5043077365a9SGeert Uytterhoeven "msiof1_rx_e", 5044077365a9SGeert Uytterhoeven "msiof1_tx_e", 5045077365a9SGeert Uytterhoeven }; 5046077365a9SGeert Uytterhoeven 5047077365a9SGeert Uytterhoeven static const char * const msiof2_groups[] = { 5048077365a9SGeert Uytterhoeven "msiof2_clk", 5049077365a9SGeert Uytterhoeven "msiof2_sync", 5050077365a9SGeert Uytterhoeven "msiof2_ss1", 5051077365a9SGeert Uytterhoeven "msiof2_ss2", 5052077365a9SGeert Uytterhoeven "msiof2_rx", 5053077365a9SGeert Uytterhoeven "msiof2_tx", 5054077365a9SGeert Uytterhoeven "msiof2_clk_b", 5055077365a9SGeert Uytterhoeven "msiof2_sync_b", 5056077365a9SGeert Uytterhoeven "msiof2_ss1_b", 5057077365a9SGeert Uytterhoeven "msiof2_ss2_b", 5058077365a9SGeert Uytterhoeven "msiof2_rx_b", 5059077365a9SGeert Uytterhoeven "msiof2_tx_b", 5060077365a9SGeert Uytterhoeven "msiof2_clk_c", 5061077365a9SGeert Uytterhoeven "msiof2_sync_c", 5062077365a9SGeert Uytterhoeven "msiof2_rx_c", 5063077365a9SGeert Uytterhoeven "msiof2_tx_c", 5064077365a9SGeert Uytterhoeven "msiof2_clk_d", 5065077365a9SGeert Uytterhoeven "msiof2_sync_d", 5066077365a9SGeert Uytterhoeven "msiof2_ss1_d", 5067077365a9SGeert Uytterhoeven "msiof2_ss2_d", 5068077365a9SGeert Uytterhoeven "msiof2_rx_d", 5069077365a9SGeert Uytterhoeven "msiof2_tx_d", 5070077365a9SGeert Uytterhoeven "msiof2_clk_e", 5071077365a9SGeert Uytterhoeven "msiof2_sync_e", 5072077365a9SGeert Uytterhoeven "msiof2_rx_e", 5073077365a9SGeert Uytterhoeven "msiof2_tx_e", 5074077365a9SGeert Uytterhoeven }; 5075077365a9SGeert Uytterhoeven 5076077365a9SGeert Uytterhoeven static const char * const pwm0_groups[] = { 5077077365a9SGeert Uytterhoeven "pwm0", 5078077365a9SGeert Uytterhoeven "pwm0_b", 5079077365a9SGeert Uytterhoeven }; 5080077365a9SGeert Uytterhoeven 5081077365a9SGeert Uytterhoeven static const char * const pwm1_groups[] = { 5082077365a9SGeert Uytterhoeven "pwm1", 5083077365a9SGeert Uytterhoeven "pwm1_b", 5084077365a9SGeert Uytterhoeven }; 5085077365a9SGeert Uytterhoeven 5086077365a9SGeert Uytterhoeven static const char * const pwm2_groups[] = { 5087077365a9SGeert Uytterhoeven "pwm2", 5088077365a9SGeert Uytterhoeven "pwm2_b", 5089077365a9SGeert Uytterhoeven }; 5090077365a9SGeert Uytterhoeven 5091077365a9SGeert Uytterhoeven static const char * const pwm3_groups[] = { 5092077365a9SGeert Uytterhoeven "pwm3", 5093077365a9SGeert Uytterhoeven }; 5094077365a9SGeert Uytterhoeven 5095077365a9SGeert Uytterhoeven static const char * const pwm4_groups[] = { 5096077365a9SGeert Uytterhoeven "pwm4", 5097077365a9SGeert Uytterhoeven "pwm4_b", 5098077365a9SGeert Uytterhoeven }; 5099077365a9SGeert Uytterhoeven 5100077365a9SGeert Uytterhoeven static const char * const pwm5_groups[] = { 5101077365a9SGeert Uytterhoeven "pwm5", 5102077365a9SGeert Uytterhoeven "pwm5_b", 5103077365a9SGeert Uytterhoeven }; 5104077365a9SGeert Uytterhoeven 5105077365a9SGeert Uytterhoeven static const char * const pwm6_groups[] = { 5106077365a9SGeert Uytterhoeven "pwm6", 5107077365a9SGeert Uytterhoeven }; 5108077365a9SGeert Uytterhoeven 5109077365a9SGeert Uytterhoeven static const char * const qspi_groups[] = { 5110077365a9SGeert Uytterhoeven "qspi_ctrl", 5111077365a9SGeert Uytterhoeven "qspi_data2", 5112077365a9SGeert Uytterhoeven "qspi_data4", 5113077365a9SGeert Uytterhoeven "qspi_ctrl_b", 5114077365a9SGeert Uytterhoeven "qspi_data2_b", 5115077365a9SGeert Uytterhoeven "qspi_data4_b", 5116077365a9SGeert Uytterhoeven }; 5117077365a9SGeert Uytterhoeven 5118077365a9SGeert Uytterhoeven static const char * const scif0_groups[] = { 5119077365a9SGeert Uytterhoeven "scif0_data", 5120077365a9SGeert Uytterhoeven "scif0_data_b", 5121077365a9SGeert Uytterhoeven "scif0_data_c", 5122077365a9SGeert Uytterhoeven "scif0_data_d", 5123077365a9SGeert Uytterhoeven "scif0_data_e", 5124077365a9SGeert Uytterhoeven }; 5125077365a9SGeert Uytterhoeven 5126077365a9SGeert Uytterhoeven static const char * const scif1_groups[] = { 5127077365a9SGeert Uytterhoeven "scif1_data", 5128077365a9SGeert Uytterhoeven "scif1_data_b", 5129077365a9SGeert Uytterhoeven "scif1_clk_b", 5130077365a9SGeert Uytterhoeven "scif1_data_c", 5131077365a9SGeert Uytterhoeven "scif1_data_d", 5132077365a9SGeert Uytterhoeven }; 5133077365a9SGeert Uytterhoeven 5134077365a9SGeert Uytterhoeven static const char * const scif2_groups[] = { 5135077365a9SGeert Uytterhoeven "scif2_data", 5136077365a9SGeert Uytterhoeven "scif2_data_b", 5137077365a9SGeert Uytterhoeven "scif2_clk_b", 5138077365a9SGeert Uytterhoeven "scif2_data_c", 5139077365a9SGeert Uytterhoeven "scif2_data_e", 5140077365a9SGeert Uytterhoeven }; 5141077365a9SGeert Uytterhoeven static const char * const scif3_groups[] = { 5142077365a9SGeert Uytterhoeven "scif3_data", 5143077365a9SGeert Uytterhoeven "scif3_clk", 5144077365a9SGeert Uytterhoeven "scif3_data_b", 5145077365a9SGeert Uytterhoeven "scif3_clk_b", 5146077365a9SGeert Uytterhoeven "scif3_data_c", 5147077365a9SGeert Uytterhoeven "scif3_data_d", 5148077365a9SGeert Uytterhoeven }; 5149077365a9SGeert Uytterhoeven static const char * const scif4_groups[] = { 5150077365a9SGeert Uytterhoeven "scif4_data", 5151077365a9SGeert Uytterhoeven "scif4_data_b", 5152077365a9SGeert Uytterhoeven "scif4_data_c", 5153077365a9SGeert Uytterhoeven }; 5154077365a9SGeert Uytterhoeven static const char * const scif5_groups[] = { 5155077365a9SGeert Uytterhoeven "scif5_data", 5156077365a9SGeert Uytterhoeven "scif5_data_b", 5157077365a9SGeert Uytterhoeven }; 5158077365a9SGeert Uytterhoeven static const char * const scifa0_groups[] = { 5159077365a9SGeert Uytterhoeven "scifa0_data", 5160077365a9SGeert Uytterhoeven "scifa0_data_b", 5161077365a9SGeert Uytterhoeven }; 5162077365a9SGeert Uytterhoeven static const char * const scifa1_groups[] = { 5163077365a9SGeert Uytterhoeven "scifa1_data", 5164077365a9SGeert Uytterhoeven "scifa1_clk", 5165077365a9SGeert Uytterhoeven "scifa1_data_b", 5166077365a9SGeert Uytterhoeven "scifa1_clk_b", 5167077365a9SGeert Uytterhoeven "scifa1_data_c", 5168077365a9SGeert Uytterhoeven }; 5169077365a9SGeert Uytterhoeven static const char * const scifa2_groups[] = { 5170077365a9SGeert Uytterhoeven "scifa2_data", 5171077365a9SGeert Uytterhoeven "scifa2_clk", 5172077365a9SGeert Uytterhoeven "scifa2_data_b", 5173077365a9SGeert Uytterhoeven }; 5174077365a9SGeert Uytterhoeven static const char * const scifa3_groups[] = { 5175077365a9SGeert Uytterhoeven "scifa3_data", 5176077365a9SGeert Uytterhoeven "scifa3_clk", 5177077365a9SGeert Uytterhoeven "scifa3_data_b", 5178077365a9SGeert Uytterhoeven "scifa3_clk_b", 5179077365a9SGeert Uytterhoeven "scifa3_data_c", 5180077365a9SGeert Uytterhoeven "scifa3_clk_c", 5181077365a9SGeert Uytterhoeven }; 5182077365a9SGeert Uytterhoeven static const char * const scifa4_groups[] = { 5183077365a9SGeert Uytterhoeven "scifa4_data", 5184077365a9SGeert Uytterhoeven "scifa4_data_b", 5185077365a9SGeert Uytterhoeven "scifa4_data_c", 5186077365a9SGeert Uytterhoeven }; 5187077365a9SGeert Uytterhoeven static const char * const scifa5_groups[] = { 5188077365a9SGeert Uytterhoeven "scifa5_data", 5189077365a9SGeert Uytterhoeven "scifa5_data_b", 5190077365a9SGeert Uytterhoeven "scifa5_data_c", 5191077365a9SGeert Uytterhoeven }; 5192077365a9SGeert Uytterhoeven static const char * const scifb0_groups[] = { 5193077365a9SGeert Uytterhoeven "scifb0_data", 5194077365a9SGeert Uytterhoeven "scifb0_clk", 5195077365a9SGeert Uytterhoeven "scifb0_ctrl", 5196077365a9SGeert Uytterhoeven "scifb0_data_b", 5197077365a9SGeert Uytterhoeven "scifb0_clk_b", 5198077365a9SGeert Uytterhoeven "scifb0_ctrl_b", 5199077365a9SGeert Uytterhoeven "scifb0_data_c", 5200077365a9SGeert Uytterhoeven "scifb0_clk_c", 5201077365a9SGeert Uytterhoeven "scifb0_data_d", 5202077365a9SGeert Uytterhoeven "scifb0_clk_d", 5203077365a9SGeert Uytterhoeven }; 5204077365a9SGeert Uytterhoeven static const char * const scifb1_groups[] = { 5205077365a9SGeert Uytterhoeven "scifb1_data", 5206077365a9SGeert Uytterhoeven "scifb1_clk", 5207077365a9SGeert Uytterhoeven "scifb1_ctrl", 5208077365a9SGeert Uytterhoeven "scifb1_data_b", 5209077365a9SGeert Uytterhoeven "scifb1_clk_b", 5210077365a9SGeert Uytterhoeven "scifb1_data_c", 5211077365a9SGeert Uytterhoeven "scifb1_clk_c", 5212077365a9SGeert Uytterhoeven "scifb1_data_d", 5213077365a9SGeert Uytterhoeven }; 5214077365a9SGeert Uytterhoeven static const char * const scifb2_groups[] = { 5215077365a9SGeert Uytterhoeven "scifb2_data", 5216077365a9SGeert Uytterhoeven "scifb2_clk", 5217077365a9SGeert Uytterhoeven "scifb2_ctrl", 5218077365a9SGeert Uytterhoeven "scifb2_data_b", 5219077365a9SGeert Uytterhoeven "scifb2_clk_b", 5220077365a9SGeert Uytterhoeven "scifb2_ctrl_b", 5221077365a9SGeert Uytterhoeven "scifb2_data_c", 5222077365a9SGeert Uytterhoeven "scifb2_clk_c", 5223077365a9SGeert Uytterhoeven "scifb2_data_d", 5224077365a9SGeert Uytterhoeven }; 5225077365a9SGeert Uytterhoeven 5226077365a9SGeert Uytterhoeven static const char * const scif_clk_groups[] = { 5227077365a9SGeert Uytterhoeven "scif_clk", 5228077365a9SGeert Uytterhoeven "scif_clk_b", 5229077365a9SGeert Uytterhoeven }; 5230077365a9SGeert Uytterhoeven 5231077365a9SGeert Uytterhoeven static const char * const sdhi0_groups[] = { 5232077365a9SGeert Uytterhoeven "sdhi0_data1", 5233077365a9SGeert Uytterhoeven "sdhi0_data4", 5234077365a9SGeert Uytterhoeven "sdhi0_ctrl", 5235077365a9SGeert Uytterhoeven "sdhi0_cd", 5236077365a9SGeert Uytterhoeven "sdhi0_wp", 5237077365a9SGeert Uytterhoeven }; 5238077365a9SGeert Uytterhoeven 5239077365a9SGeert Uytterhoeven static const char * const sdhi1_groups[] = { 5240077365a9SGeert Uytterhoeven "sdhi1_data1", 5241077365a9SGeert Uytterhoeven "sdhi1_data4", 5242077365a9SGeert Uytterhoeven "sdhi1_ctrl", 5243077365a9SGeert Uytterhoeven "sdhi1_cd", 5244077365a9SGeert Uytterhoeven "sdhi1_wp", 5245077365a9SGeert Uytterhoeven }; 5246077365a9SGeert Uytterhoeven 5247077365a9SGeert Uytterhoeven static const char * const sdhi2_groups[] = { 5248077365a9SGeert Uytterhoeven "sdhi2_data1", 5249077365a9SGeert Uytterhoeven "sdhi2_data4", 5250077365a9SGeert Uytterhoeven "sdhi2_ctrl", 5251077365a9SGeert Uytterhoeven "sdhi2_cd", 5252077365a9SGeert Uytterhoeven "sdhi2_wp", 5253077365a9SGeert Uytterhoeven }; 5254077365a9SGeert Uytterhoeven 5255077365a9SGeert Uytterhoeven static const char * const ssi_groups[] = { 5256077365a9SGeert Uytterhoeven "ssi0_data", 5257077365a9SGeert Uytterhoeven "ssi0_data_b", 5258077365a9SGeert Uytterhoeven "ssi0129_ctrl", 5259077365a9SGeert Uytterhoeven "ssi0129_ctrl_b", 5260077365a9SGeert Uytterhoeven "ssi1_data", 5261077365a9SGeert Uytterhoeven "ssi1_data_b", 5262077365a9SGeert Uytterhoeven "ssi1_ctrl", 5263077365a9SGeert Uytterhoeven "ssi1_ctrl_b", 5264077365a9SGeert Uytterhoeven "ssi2_data", 5265077365a9SGeert Uytterhoeven "ssi2_ctrl", 5266077365a9SGeert Uytterhoeven "ssi3_data", 5267077365a9SGeert Uytterhoeven "ssi34_ctrl", 5268077365a9SGeert Uytterhoeven "ssi4_data", 5269077365a9SGeert Uytterhoeven "ssi4_ctrl", 5270077365a9SGeert Uytterhoeven "ssi5_data", 5271077365a9SGeert Uytterhoeven "ssi5_ctrl", 5272077365a9SGeert Uytterhoeven "ssi6_data", 5273077365a9SGeert Uytterhoeven "ssi6_ctrl", 5274077365a9SGeert Uytterhoeven "ssi7_data", 5275077365a9SGeert Uytterhoeven "ssi7_data_b", 5276077365a9SGeert Uytterhoeven "ssi78_ctrl", 5277077365a9SGeert Uytterhoeven "ssi78_ctrl_b", 5278077365a9SGeert Uytterhoeven "ssi8_data", 5279077365a9SGeert Uytterhoeven "ssi8_data_b", 5280077365a9SGeert Uytterhoeven "ssi9_data", 5281077365a9SGeert Uytterhoeven "ssi9_data_b", 5282077365a9SGeert Uytterhoeven "ssi9_ctrl", 5283077365a9SGeert Uytterhoeven "ssi9_ctrl_b", 5284077365a9SGeert Uytterhoeven }; 5285077365a9SGeert Uytterhoeven 5286077365a9SGeert Uytterhoeven static const char * const tpu_groups[] = { 5287077365a9SGeert Uytterhoeven "tpu_to0", 5288077365a9SGeert Uytterhoeven "tpu_to1", 5289077365a9SGeert Uytterhoeven "tpu_to2", 5290077365a9SGeert Uytterhoeven "tpu_to3", 5291077365a9SGeert Uytterhoeven }; 5292077365a9SGeert Uytterhoeven 5293077365a9SGeert Uytterhoeven static const char * const usb0_groups[] = { 5294077365a9SGeert Uytterhoeven "usb0", 5295077365a9SGeert Uytterhoeven }; 5296077365a9SGeert Uytterhoeven static const char * const usb1_groups[] = { 5297077365a9SGeert Uytterhoeven "usb1", 5298077365a9SGeert Uytterhoeven }; 5299077365a9SGeert Uytterhoeven 5300077365a9SGeert Uytterhoeven static const char * const vin0_groups[] = { 5301077365a9SGeert Uytterhoeven "vin0_data24", 5302077365a9SGeert Uytterhoeven "vin0_data20", 5303077365a9SGeert Uytterhoeven "vin0_data18", 5304077365a9SGeert Uytterhoeven "vin0_data16", 5305077365a9SGeert Uytterhoeven "vin0_data12", 5306077365a9SGeert Uytterhoeven "vin0_data10", 5307077365a9SGeert Uytterhoeven "vin0_data8", 5308077365a9SGeert Uytterhoeven "vin0_sync", 5309077365a9SGeert Uytterhoeven "vin0_field", 5310077365a9SGeert Uytterhoeven "vin0_clkenb", 5311077365a9SGeert Uytterhoeven "vin0_clk", 5312077365a9SGeert Uytterhoeven }; 5313077365a9SGeert Uytterhoeven 5314077365a9SGeert Uytterhoeven static const char * const vin1_groups[] = { 5315077365a9SGeert Uytterhoeven "vin1_data8", 5316077365a9SGeert Uytterhoeven "vin1_sync", 5317077365a9SGeert Uytterhoeven "vin1_field", 5318077365a9SGeert Uytterhoeven "vin1_clkenb", 5319077365a9SGeert Uytterhoeven "vin1_clk", 5320077365a9SGeert Uytterhoeven "vin1_data24_b", 5321077365a9SGeert Uytterhoeven "vin1_data20_b", 5322077365a9SGeert Uytterhoeven "vin1_data18_b", 5323077365a9SGeert Uytterhoeven "vin1_data16_b", 5324077365a9SGeert Uytterhoeven "vin1_data12_b", 5325077365a9SGeert Uytterhoeven "vin1_data10_b", 5326077365a9SGeert Uytterhoeven "vin1_data8_b", 5327077365a9SGeert Uytterhoeven "vin1_sync_b", 5328077365a9SGeert Uytterhoeven "vin1_field_b", 5329077365a9SGeert Uytterhoeven "vin1_clkenb_b", 5330077365a9SGeert Uytterhoeven "vin1_clk_b", 5331077365a9SGeert Uytterhoeven }; 5332077365a9SGeert Uytterhoeven 5333077365a9SGeert Uytterhoeven static const char * const vin2_groups[] = { 5334077365a9SGeert Uytterhoeven "vin2_data8", 5335077365a9SGeert Uytterhoeven "vin2_sync", 5336077365a9SGeert Uytterhoeven "vin2_field", 5337077365a9SGeert Uytterhoeven "vin2_clkenb", 5338077365a9SGeert Uytterhoeven "vin2_clk", 5339077365a9SGeert Uytterhoeven }; 5340077365a9SGeert Uytterhoeven 5341077365a9SGeert Uytterhoeven static const struct { 5342077365a9SGeert Uytterhoeven struct sh_pfc_function common[58]; 53438d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 5344077365a9SGeert Uytterhoeven struct sh_pfc_function automotive[2]; 53458d3b2e3dSBiju Das #endif 5346077365a9SGeert Uytterhoeven } pinmux_functions = { 5347077365a9SGeert Uytterhoeven .common = { 5348077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(audio_clk), 5349077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(avb), 5350077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can0), 5351077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can1), 5352077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can_clk), 5353077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du), 5354077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du0), 5355077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du1), 5356077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(eth), 5357077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif0), 5358077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif1), 5359077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif2), 5360077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c0), 5361077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c1), 5362077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c2), 5363077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c3), 5364077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c4), 5365077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c7), 5366077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c8), 5367077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(intc), 5368077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mmc), 5369077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof0), 5370077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof1), 5371077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof2), 5372077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm0), 5373077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm1), 5374077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm2), 5375077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm3), 5376077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm4), 5377077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm5), 5378077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm6), 5379077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi), 5380077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif0), 5381077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif1), 5382077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif2), 5383077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif3), 5384077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif4), 5385077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif5), 5386077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa0), 5387077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa1), 5388077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa2), 5389077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa3), 5390077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa4), 5391077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa5), 5392077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb0), 5393077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb1), 5394077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb2), 5395077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif_clk), 5396077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi0), 5397077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi1), 5398077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi2), 5399077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(ssi), 5400077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(tpu), 5401077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb0), 5402077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb1), 5403077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin0), 5404077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin1), 5405077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin2), 5406077365a9SGeert Uytterhoeven }, 54078d3b2e3dSBiju Das #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) 5408077365a9SGeert Uytterhoeven .automotive = { 5409077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(adi), 5410077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mlb), 5411077365a9SGeert Uytterhoeven } 54128d3b2e3dSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ 5413077365a9SGeert Uytterhoeven }; 5414077365a9SGeert Uytterhoeven 5415077365a9SGeert Uytterhoeven static const struct pinmux_cfg_reg pinmux_config_regs[] = { 5416077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP( 5417077365a9SGeert Uytterhoeven GP_0_31_FN, FN_IP1_22_20, 5418077365a9SGeert Uytterhoeven GP_0_30_FN, FN_IP1_19_17, 5419077365a9SGeert Uytterhoeven GP_0_29_FN, FN_IP1_16_14, 5420077365a9SGeert Uytterhoeven GP_0_28_FN, FN_IP1_13_11, 5421077365a9SGeert Uytterhoeven GP_0_27_FN, FN_IP1_10_8, 5422077365a9SGeert Uytterhoeven GP_0_26_FN, FN_IP1_7_6, 5423077365a9SGeert Uytterhoeven GP_0_25_FN, FN_IP1_5_4, 5424077365a9SGeert Uytterhoeven GP_0_24_FN, FN_IP1_3_2, 5425077365a9SGeert Uytterhoeven GP_0_23_FN, FN_IP1_1_0, 5426077365a9SGeert Uytterhoeven GP_0_22_FN, FN_IP0_30_29, 5427077365a9SGeert Uytterhoeven GP_0_21_FN, FN_IP0_28_27, 5428077365a9SGeert Uytterhoeven GP_0_20_FN, FN_IP0_26_25, 5429077365a9SGeert Uytterhoeven GP_0_19_FN, FN_IP0_24_23, 5430077365a9SGeert Uytterhoeven GP_0_18_FN, FN_IP0_22_21, 5431077365a9SGeert Uytterhoeven GP_0_17_FN, FN_IP0_20_19, 5432077365a9SGeert Uytterhoeven GP_0_16_FN, FN_IP0_18_16, 5433077365a9SGeert Uytterhoeven GP_0_15_FN, FN_IP0_15, 5434077365a9SGeert Uytterhoeven GP_0_14_FN, FN_IP0_14, 5435077365a9SGeert Uytterhoeven GP_0_13_FN, FN_IP0_13, 5436077365a9SGeert Uytterhoeven GP_0_12_FN, FN_IP0_12, 5437077365a9SGeert Uytterhoeven GP_0_11_FN, FN_IP0_11, 5438077365a9SGeert Uytterhoeven GP_0_10_FN, FN_IP0_10, 5439077365a9SGeert Uytterhoeven GP_0_9_FN, FN_IP0_9, 5440077365a9SGeert Uytterhoeven GP_0_8_FN, FN_IP0_8, 5441077365a9SGeert Uytterhoeven GP_0_7_FN, FN_IP0_7, 5442077365a9SGeert Uytterhoeven GP_0_6_FN, FN_IP0_6, 5443077365a9SGeert Uytterhoeven GP_0_5_FN, FN_IP0_5, 5444077365a9SGeert Uytterhoeven GP_0_4_FN, FN_IP0_4, 5445077365a9SGeert Uytterhoeven GP_0_3_FN, FN_IP0_3, 5446077365a9SGeert Uytterhoeven GP_0_2_FN, FN_IP0_2, 5447077365a9SGeert Uytterhoeven GP_0_1_FN, FN_IP0_1, 5448077365a9SGeert Uytterhoeven GP_0_0_FN, FN_IP0_0, )) 5449077365a9SGeert Uytterhoeven }, 5450077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP( 5451077365a9SGeert Uytterhoeven 0, 0, 5452077365a9SGeert Uytterhoeven 0, 0, 5453077365a9SGeert Uytterhoeven 0, 0, 5454077365a9SGeert Uytterhoeven 0, 0, 5455077365a9SGeert Uytterhoeven 0, 0, 5456077365a9SGeert Uytterhoeven 0, 0, 5457077365a9SGeert Uytterhoeven GP_1_25_FN, FN_IP3_21_20, 5458077365a9SGeert Uytterhoeven GP_1_24_FN, FN_IP3_19_18, 5459077365a9SGeert Uytterhoeven GP_1_23_FN, FN_IP3_17_16, 5460077365a9SGeert Uytterhoeven GP_1_22_FN, FN_IP3_15_14, 5461077365a9SGeert Uytterhoeven GP_1_21_FN, FN_IP3_13_12, 5462077365a9SGeert Uytterhoeven GP_1_20_FN, FN_IP3_11_9, 5463077365a9SGeert Uytterhoeven GP_1_19_FN, FN_RD_N, 5464077365a9SGeert Uytterhoeven GP_1_18_FN, FN_IP3_8_6, 5465077365a9SGeert Uytterhoeven GP_1_17_FN, FN_IP3_5_3, 5466077365a9SGeert Uytterhoeven GP_1_16_FN, FN_IP3_2_0, 5467077365a9SGeert Uytterhoeven GP_1_15_FN, FN_IP2_29_27, 5468077365a9SGeert Uytterhoeven GP_1_14_FN, FN_IP2_26_25, 5469077365a9SGeert Uytterhoeven GP_1_13_FN, FN_IP2_24_23, 5470077365a9SGeert Uytterhoeven GP_1_12_FN, FN_EX_CS0_N, 5471077365a9SGeert Uytterhoeven GP_1_11_FN, FN_IP2_22_21, 5472077365a9SGeert Uytterhoeven GP_1_10_FN, FN_IP2_20_19, 5473077365a9SGeert Uytterhoeven GP_1_9_FN, FN_IP2_18_16, 5474077365a9SGeert Uytterhoeven GP_1_8_FN, FN_IP2_15_13, 5475077365a9SGeert Uytterhoeven GP_1_7_FN, FN_IP2_12_10, 5476077365a9SGeert Uytterhoeven GP_1_6_FN, FN_IP2_9_7, 5477077365a9SGeert Uytterhoeven GP_1_5_FN, FN_IP2_6_5, 5478077365a9SGeert Uytterhoeven GP_1_4_FN, FN_IP2_4_3, 5479077365a9SGeert Uytterhoeven GP_1_3_FN, FN_IP2_2_0, 5480077365a9SGeert Uytterhoeven GP_1_2_FN, FN_IP1_31_29, 5481077365a9SGeert Uytterhoeven GP_1_1_FN, FN_IP1_28_26, 5482077365a9SGeert Uytterhoeven GP_1_0_FN, FN_IP1_25_23, )) 5483077365a9SGeert Uytterhoeven }, 5484077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP( 5485077365a9SGeert Uytterhoeven GP_2_31_FN, FN_IP6_7_6, 5486077365a9SGeert Uytterhoeven GP_2_30_FN, FN_IP6_5_3, 5487077365a9SGeert Uytterhoeven GP_2_29_FN, FN_IP6_2_0, 5488077365a9SGeert Uytterhoeven GP_2_28_FN, FN_AUDIO_CLKA, 5489077365a9SGeert Uytterhoeven GP_2_27_FN, FN_IP5_31_29, 5490077365a9SGeert Uytterhoeven GP_2_26_FN, FN_IP5_28_26, 5491077365a9SGeert Uytterhoeven GP_2_25_FN, FN_IP5_25_24, 5492077365a9SGeert Uytterhoeven GP_2_24_FN, FN_IP5_23_22, 5493077365a9SGeert Uytterhoeven GP_2_23_FN, FN_IP5_21_20, 5494077365a9SGeert Uytterhoeven GP_2_22_FN, FN_IP5_19_17, 5495077365a9SGeert Uytterhoeven GP_2_21_FN, FN_IP5_16_15, 5496077365a9SGeert Uytterhoeven GP_2_20_FN, FN_IP5_14_12, 5497077365a9SGeert Uytterhoeven GP_2_19_FN, FN_IP5_11_9, 5498077365a9SGeert Uytterhoeven GP_2_18_FN, FN_IP5_8_6, 5499077365a9SGeert Uytterhoeven GP_2_17_FN, FN_IP5_5_3, 5500077365a9SGeert Uytterhoeven GP_2_16_FN, FN_IP5_2_0, 5501077365a9SGeert Uytterhoeven GP_2_15_FN, FN_IP4_30_28, 5502077365a9SGeert Uytterhoeven GP_2_14_FN, FN_IP4_27_26, 5503077365a9SGeert Uytterhoeven GP_2_13_FN, FN_IP4_25_24, 5504077365a9SGeert Uytterhoeven GP_2_12_FN, FN_IP4_23_22, 5505077365a9SGeert Uytterhoeven GP_2_11_FN, FN_IP4_21, 5506077365a9SGeert Uytterhoeven GP_2_10_FN, FN_IP4_20, 5507077365a9SGeert Uytterhoeven GP_2_9_FN, FN_IP4_19, 5508077365a9SGeert Uytterhoeven GP_2_8_FN, FN_IP4_18_16, 5509077365a9SGeert Uytterhoeven GP_2_7_FN, FN_IP4_15_13, 5510077365a9SGeert Uytterhoeven GP_2_6_FN, FN_IP4_12_10, 5511077365a9SGeert Uytterhoeven GP_2_5_FN, FN_IP4_9_8, 5512077365a9SGeert Uytterhoeven GP_2_4_FN, FN_IP4_7_5, 5513077365a9SGeert Uytterhoeven GP_2_3_FN, FN_IP4_4_2, 5514077365a9SGeert Uytterhoeven GP_2_2_FN, FN_IP4_1_0, 5515077365a9SGeert Uytterhoeven GP_2_1_FN, FN_IP3_30_28, 5516077365a9SGeert Uytterhoeven GP_2_0_FN, FN_IP3_27_25 )) 5517077365a9SGeert Uytterhoeven }, 5518077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP( 5519077365a9SGeert Uytterhoeven GP_3_31_FN, FN_IP9_18_17, 5520077365a9SGeert Uytterhoeven GP_3_30_FN, FN_IP9_16, 5521077365a9SGeert Uytterhoeven GP_3_29_FN, FN_IP9_15_13, 5522077365a9SGeert Uytterhoeven GP_3_28_FN, FN_IP9_12, 5523077365a9SGeert Uytterhoeven GP_3_27_FN, FN_IP9_11, 5524077365a9SGeert Uytterhoeven GP_3_26_FN, FN_IP9_10_8, 5525077365a9SGeert Uytterhoeven GP_3_25_FN, FN_IP9_7, 5526077365a9SGeert Uytterhoeven GP_3_24_FN, FN_IP9_6, 5527077365a9SGeert Uytterhoeven GP_3_23_FN, FN_IP9_5_3, 5528077365a9SGeert Uytterhoeven GP_3_22_FN, FN_IP9_2_0, 5529077365a9SGeert Uytterhoeven GP_3_21_FN, FN_IP8_30_28, 5530077365a9SGeert Uytterhoeven GP_3_20_FN, FN_IP8_27_26, 5531077365a9SGeert Uytterhoeven GP_3_19_FN, FN_IP8_25_24, 5532077365a9SGeert Uytterhoeven GP_3_18_FN, FN_IP8_23_21, 5533077365a9SGeert Uytterhoeven GP_3_17_FN, FN_IP8_20_18, 5534077365a9SGeert Uytterhoeven GP_3_16_FN, FN_IP8_17_15, 5535077365a9SGeert Uytterhoeven GP_3_15_FN, FN_IP8_14_12, 5536077365a9SGeert Uytterhoeven GP_3_14_FN, FN_IP8_11_9, 5537077365a9SGeert Uytterhoeven GP_3_13_FN, FN_IP8_8_6, 5538077365a9SGeert Uytterhoeven GP_3_12_FN, FN_IP8_5_3, 5539077365a9SGeert Uytterhoeven GP_3_11_FN, FN_IP8_2_0, 5540077365a9SGeert Uytterhoeven GP_3_10_FN, FN_IP7_29_27, 5541077365a9SGeert Uytterhoeven GP_3_9_FN, FN_IP7_26_24, 5542077365a9SGeert Uytterhoeven GP_3_8_FN, FN_IP7_23_21, 5543077365a9SGeert Uytterhoeven GP_3_7_FN, FN_IP7_20_19, 5544077365a9SGeert Uytterhoeven GP_3_6_FN, FN_IP7_18_17, 5545077365a9SGeert Uytterhoeven GP_3_5_FN, FN_IP7_16_15, 5546077365a9SGeert Uytterhoeven GP_3_4_FN, FN_IP7_14_13, 5547077365a9SGeert Uytterhoeven GP_3_3_FN, FN_IP7_12_11, 5548077365a9SGeert Uytterhoeven GP_3_2_FN, FN_IP7_10_9, 5549077365a9SGeert Uytterhoeven GP_3_1_FN, FN_IP7_8_6, 5550077365a9SGeert Uytterhoeven GP_3_0_FN, FN_IP7_5_3 )) 5551077365a9SGeert Uytterhoeven }, 5552077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP( 5553077365a9SGeert Uytterhoeven GP_4_31_FN, FN_IP15_5_4, 5554077365a9SGeert Uytterhoeven GP_4_30_FN, FN_IP15_3_2, 5555077365a9SGeert Uytterhoeven GP_4_29_FN, FN_IP15_1_0, 5556077365a9SGeert Uytterhoeven GP_4_28_FN, FN_IP11_8_6, 5557077365a9SGeert Uytterhoeven GP_4_27_FN, FN_IP11_5_3, 5558077365a9SGeert Uytterhoeven GP_4_26_FN, FN_IP11_2_0, 5559077365a9SGeert Uytterhoeven GP_4_25_FN, FN_IP10_31_29, 5560077365a9SGeert Uytterhoeven GP_4_24_FN, FN_IP10_28_27, 5561077365a9SGeert Uytterhoeven GP_4_23_FN, FN_IP10_26_25, 5562077365a9SGeert Uytterhoeven GP_4_22_FN, FN_IP10_24_22, 5563077365a9SGeert Uytterhoeven GP_4_21_FN, FN_IP10_21_19, 5564077365a9SGeert Uytterhoeven GP_4_20_FN, FN_IP10_18_17, 5565077365a9SGeert Uytterhoeven GP_4_19_FN, FN_IP10_16_15, 5566077365a9SGeert Uytterhoeven GP_4_18_FN, FN_IP10_14_12, 5567077365a9SGeert Uytterhoeven GP_4_17_FN, FN_IP10_11_9, 5568077365a9SGeert Uytterhoeven GP_4_16_FN, FN_IP10_8_6, 5569077365a9SGeert Uytterhoeven GP_4_15_FN, FN_IP10_5_3, 5570077365a9SGeert Uytterhoeven GP_4_14_FN, FN_IP10_2_0, 5571077365a9SGeert Uytterhoeven GP_4_13_FN, FN_IP9_31_29, 5572077365a9SGeert Uytterhoeven GP_4_12_FN, FN_VI0_DATA7_VI0_B7, 5573077365a9SGeert Uytterhoeven GP_4_11_FN, FN_VI0_DATA6_VI0_B6, 5574077365a9SGeert Uytterhoeven GP_4_10_FN, FN_VI0_DATA5_VI0_B5, 5575077365a9SGeert Uytterhoeven GP_4_9_FN, FN_VI0_DATA4_VI0_B4, 5576077365a9SGeert Uytterhoeven GP_4_8_FN, FN_IP9_28_27, 5577077365a9SGeert Uytterhoeven GP_4_7_FN, FN_VI0_DATA2_VI0_B2, 5578077365a9SGeert Uytterhoeven GP_4_6_FN, FN_VI0_DATA1_VI0_B1, 5579077365a9SGeert Uytterhoeven GP_4_5_FN, FN_VI0_DATA0_VI0_B0, 5580077365a9SGeert Uytterhoeven GP_4_4_FN, FN_IP9_26_25, 5581077365a9SGeert Uytterhoeven GP_4_3_FN, FN_IP9_24_23, 5582077365a9SGeert Uytterhoeven GP_4_2_FN, FN_IP9_22_21, 5583077365a9SGeert Uytterhoeven GP_4_1_FN, FN_IP9_20_19, 5584077365a9SGeert Uytterhoeven GP_4_0_FN, FN_VI0_CLK )) 5585077365a9SGeert Uytterhoeven }, 5586077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP( 5587077365a9SGeert Uytterhoeven GP_5_31_FN, FN_IP3_24_22, 5588077365a9SGeert Uytterhoeven GP_5_30_FN, FN_IP13_9_7, 5589077365a9SGeert Uytterhoeven GP_5_29_FN, FN_IP13_6_5, 5590077365a9SGeert Uytterhoeven GP_5_28_FN, FN_IP13_4_3, 5591077365a9SGeert Uytterhoeven GP_5_27_FN, FN_IP13_2_0, 5592077365a9SGeert Uytterhoeven GP_5_26_FN, FN_IP12_29_27, 5593077365a9SGeert Uytterhoeven GP_5_25_FN, FN_IP12_26_24, 5594077365a9SGeert Uytterhoeven GP_5_24_FN, FN_IP12_23_22, 5595077365a9SGeert Uytterhoeven GP_5_23_FN, FN_IP12_21_20, 5596077365a9SGeert Uytterhoeven GP_5_22_FN, FN_IP12_19_18, 5597077365a9SGeert Uytterhoeven GP_5_21_FN, FN_IP12_17_16, 5598077365a9SGeert Uytterhoeven GP_5_20_FN, FN_IP12_15_13, 5599077365a9SGeert Uytterhoeven GP_5_19_FN, FN_IP12_12_10, 5600077365a9SGeert Uytterhoeven GP_5_18_FN, FN_IP12_9_7, 5601077365a9SGeert Uytterhoeven GP_5_17_FN, FN_IP12_6_4, 5602077365a9SGeert Uytterhoeven GP_5_16_FN, FN_IP12_3_2, 5603077365a9SGeert Uytterhoeven GP_5_15_FN, FN_IP12_1_0, 5604077365a9SGeert Uytterhoeven GP_5_14_FN, FN_IP11_31_30, 5605077365a9SGeert Uytterhoeven GP_5_13_FN, FN_IP11_29_28, 5606077365a9SGeert Uytterhoeven GP_5_12_FN, FN_IP11_27, 5607077365a9SGeert Uytterhoeven GP_5_11_FN, FN_IP11_26, 5608077365a9SGeert Uytterhoeven GP_5_10_FN, FN_IP11_25, 5609077365a9SGeert Uytterhoeven GP_5_9_FN, FN_IP11_24, 5610077365a9SGeert Uytterhoeven GP_5_8_FN, FN_IP11_23, 5611077365a9SGeert Uytterhoeven GP_5_7_FN, FN_IP11_22, 5612077365a9SGeert Uytterhoeven GP_5_6_FN, FN_IP11_21, 5613077365a9SGeert Uytterhoeven GP_5_5_FN, FN_IP11_20, 5614077365a9SGeert Uytterhoeven GP_5_4_FN, FN_IP11_19, 5615077365a9SGeert Uytterhoeven GP_5_3_FN, FN_IP11_18_17, 5616077365a9SGeert Uytterhoeven GP_5_2_FN, FN_IP11_16_15, 5617077365a9SGeert Uytterhoeven GP_5_1_FN, FN_IP11_14_12, 5618077365a9SGeert Uytterhoeven GP_5_0_FN, FN_IP11_11_9 )) 5619077365a9SGeert Uytterhoeven }, 5620077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP( 5621077365a9SGeert Uytterhoeven GP_6_31_FN, FN_DU0_DOTCLKIN, 5622077365a9SGeert Uytterhoeven GP_6_30_FN, FN_USB1_OVC, 5623077365a9SGeert Uytterhoeven GP_6_29_FN, FN_IP14_31_29, 5624077365a9SGeert Uytterhoeven GP_6_28_FN, FN_IP14_28_26, 5625077365a9SGeert Uytterhoeven GP_6_27_FN, FN_IP14_25_23, 5626077365a9SGeert Uytterhoeven GP_6_26_FN, FN_IP14_22_20, 5627077365a9SGeert Uytterhoeven GP_6_25_FN, FN_IP14_19_17, 5628077365a9SGeert Uytterhoeven GP_6_24_FN, FN_IP14_16_14, 5629077365a9SGeert Uytterhoeven GP_6_23_FN, FN_IP14_13_11, 5630077365a9SGeert Uytterhoeven GP_6_22_FN, FN_IP14_10_8, 5631077365a9SGeert Uytterhoeven GP_6_21_FN, FN_IP14_7, 5632077365a9SGeert Uytterhoeven GP_6_20_FN, FN_IP14_6, 5633077365a9SGeert Uytterhoeven GP_6_19_FN, FN_IP14_5, 5634077365a9SGeert Uytterhoeven GP_6_18_FN, FN_IP14_4, 5635077365a9SGeert Uytterhoeven GP_6_17_FN, FN_IP14_3, 5636077365a9SGeert Uytterhoeven GP_6_16_FN, FN_IP14_2, 5637077365a9SGeert Uytterhoeven GP_6_15_FN, FN_IP14_1_0, 5638077365a9SGeert Uytterhoeven GP_6_14_FN, FN_IP13_30_28, 5639077365a9SGeert Uytterhoeven GP_6_13_FN, FN_IP13_27, 5640077365a9SGeert Uytterhoeven GP_6_12_FN, FN_IP13_26, 5641077365a9SGeert Uytterhoeven GP_6_11_FN, FN_IP13_25, 5642077365a9SGeert Uytterhoeven GP_6_10_FN, FN_IP13_24_23, 5643077365a9SGeert Uytterhoeven GP_6_9_FN, FN_IP13_22, 5644077365a9SGeert Uytterhoeven GP_6_8_FN, FN_SD1_CLK, 5645077365a9SGeert Uytterhoeven GP_6_7_FN, FN_IP13_21_19, 5646077365a9SGeert Uytterhoeven GP_6_6_FN, FN_IP13_18_16, 5647077365a9SGeert Uytterhoeven GP_6_5_FN, FN_IP13_15, 5648077365a9SGeert Uytterhoeven GP_6_4_FN, FN_IP13_14, 5649077365a9SGeert Uytterhoeven GP_6_3_FN, FN_IP13_13, 5650077365a9SGeert Uytterhoeven GP_6_2_FN, FN_IP13_12, 5651077365a9SGeert Uytterhoeven GP_6_1_FN, FN_IP13_11, 5652077365a9SGeert Uytterhoeven GP_6_0_FN, FN_IP13_10 )) 5653077365a9SGeert Uytterhoeven }, 5654077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1, GROUP( 5655077365a9SGeert Uytterhoeven 0, 0, 5656077365a9SGeert Uytterhoeven 0, 0, 5657077365a9SGeert Uytterhoeven 0, 0, 5658077365a9SGeert Uytterhoeven 0, 0, 5659077365a9SGeert Uytterhoeven 0, 0, 5660077365a9SGeert Uytterhoeven 0, 0, 5661077365a9SGeert Uytterhoeven GP_7_25_FN, FN_USB1_PWEN, 5662077365a9SGeert Uytterhoeven GP_7_24_FN, FN_USB0_OVC, 5663077365a9SGeert Uytterhoeven GP_7_23_FN, FN_USB0_PWEN, 5664077365a9SGeert Uytterhoeven GP_7_22_FN, FN_IP15_14_12, 5665077365a9SGeert Uytterhoeven GP_7_21_FN, FN_IP15_11_9, 5666077365a9SGeert Uytterhoeven GP_7_20_FN, FN_IP15_8_6, 5667077365a9SGeert Uytterhoeven GP_7_19_FN, FN_IP7_2_0, 5668077365a9SGeert Uytterhoeven GP_7_18_FN, FN_IP6_29_27, 5669077365a9SGeert Uytterhoeven GP_7_17_FN, FN_IP6_26_24, 5670077365a9SGeert Uytterhoeven GP_7_16_FN, FN_IP6_23_21, 5671077365a9SGeert Uytterhoeven GP_7_15_FN, FN_IP6_20_19, 5672077365a9SGeert Uytterhoeven GP_7_14_FN, FN_IP6_18_16, 5673077365a9SGeert Uytterhoeven GP_7_13_FN, FN_IP6_15_14, 5674077365a9SGeert Uytterhoeven GP_7_12_FN, FN_IP6_13_12, 5675077365a9SGeert Uytterhoeven GP_7_11_FN, FN_IP6_11_10, 5676077365a9SGeert Uytterhoeven GP_7_10_FN, FN_IP6_9_8, 5677077365a9SGeert Uytterhoeven GP_7_9_FN, FN_IP16_11_10, 5678077365a9SGeert Uytterhoeven GP_7_8_FN, FN_IP16_9_8, 5679077365a9SGeert Uytterhoeven GP_7_7_FN, FN_IP16_7_6, 5680077365a9SGeert Uytterhoeven GP_7_6_FN, FN_IP16_5_3, 5681077365a9SGeert Uytterhoeven GP_7_5_FN, FN_IP16_2_0, 5682077365a9SGeert Uytterhoeven GP_7_4_FN, FN_IP15_29_27, 5683077365a9SGeert Uytterhoeven GP_7_3_FN, FN_IP15_26_24, 5684077365a9SGeert Uytterhoeven GP_7_2_FN, FN_IP15_23_21, 5685077365a9SGeert Uytterhoeven GP_7_1_FN, FN_IP15_20_18, 5686077365a9SGeert Uytterhoeven GP_7_0_FN, FN_IP15_17_15 )) 5687077365a9SGeert Uytterhoeven }, 5688077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32, 5689*d3fcaad6SGeert Uytterhoeven GROUP(-1, 2, 2, 2, 2, 2, 2, 3, 1, 1, 1, 1, 5690077365a9SGeert Uytterhoeven 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1), 5691077365a9SGeert Uytterhoeven GROUP( 5692*d3fcaad6SGeert Uytterhoeven /* IP0_31 [1] RESERVED */ 5693077365a9SGeert Uytterhoeven /* IP0_30_29 [2] */ 5694077365a9SGeert Uytterhoeven FN_A6, FN_MSIOF1_SCK, 5695077365a9SGeert Uytterhoeven 0, 0, 5696077365a9SGeert Uytterhoeven /* IP0_28_27 [2] */ 5697077365a9SGeert Uytterhoeven FN_A5, FN_MSIOF0_RXD_B, 5698077365a9SGeert Uytterhoeven 0, 0, 5699077365a9SGeert Uytterhoeven /* IP0_26_25 [2] */ 5700077365a9SGeert Uytterhoeven FN_A4, FN_MSIOF0_TXD_B, 5701077365a9SGeert Uytterhoeven 0, 0, 5702077365a9SGeert Uytterhoeven /* IP0_24_23 [2] */ 5703077365a9SGeert Uytterhoeven FN_A3, FN_MSIOF0_SS2_B, 5704077365a9SGeert Uytterhoeven 0, 0, 5705077365a9SGeert Uytterhoeven /* IP0_22_21 [2] */ 5706077365a9SGeert Uytterhoeven FN_A2, FN_MSIOF0_SS1_B, 5707077365a9SGeert Uytterhoeven 0, 0, 5708077365a9SGeert Uytterhoeven /* IP0_20_19 [2] */ 5709077365a9SGeert Uytterhoeven FN_A1, FN_MSIOF0_SYNC_B, 5710077365a9SGeert Uytterhoeven 0, 0, 5711077365a9SGeert Uytterhoeven /* IP0_18_16 [3] */ 5712077365a9SGeert Uytterhoeven FN_A0, FN_ATAWR0_N_C, FN_MSIOF0_SCK_B, FN_I2C0_SCL_C, FN_PWM2_B, 5713077365a9SGeert Uytterhoeven 0, 0, 0, 5714077365a9SGeert Uytterhoeven /* IP0_15 [1] */ 5715077365a9SGeert Uytterhoeven FN_D15, 0, 5716077365a9SGeert Uytterhoeven /* IP0_14 [1] */ 5717077365a9SGeert Uytterhoeven FN_D14, 0, 5718077365a9SGeert Uytterhoeven /* IP0_13 [1] */ 5719077365a9SGeert Uytterhoeven FN_D13, 0, 5720077365a9SGeert Uytterhoeven /* IP0_12 [1] */ 5721077365a9SGeert Uytterhoeven FN_D12, 0, 5722077365a9SGeert Uytterhoeven /* IP0_11 [1] */ 5723077365a9SGeert Uytterhoeven FN_D11, 0, 5724077365a9SGeert Uytterhoeven /* IP0_10 [1] */ 5725077365a9SGeert Uytterhoeven FN_D10, 0, 5726077365a9SGeert Uytterhoeven /* IP0_9 [1] */ 5727077365a9SGeert Uytterhoeven FN_D9, 0, 5728077365a9SGeert Uytterhoeven /* IP0_8 [1] */ 5729077365a9SGeert Uytterhoeven FN_D8, 0, 5730077365a9SGeert Uytterhoeven /* IP0_7 [1] */ 5731077365a9SGeert Uytterhoeven FN_D7, 0, 5732077365a9SGeert Uytterhoeven /* IP0_6 [1] */ 5733077365a9SGeert Uytterhoeven FN_D6, 0, 5734077365a9SGeert Uytterhoeven /* IP0_5 [1] */ 5735077365a9SGeert Uytterhoeven FN_D5, 0, 5736077365a9SGeert Uytterhoeven /* IP0_4 [1] */ 5737077365a9SGeert Uytterhoeven FN_D4, 0, 5738077365a9SGeert Uytterhoeven /* IP0_3 [1] */ 5739077365a9SGeert Uytterhoeven FN_D3, 0, 5740077365a9SGeert Uytterhoeven /* IP0_2 [1] */ 5741077365a9SGeert Uytterhoeven FN_D2, 0, 5742077365a9SGeert Uytterhoeven /* IP0_1 [1] */ 5743077365a9SGeert Uytterhoeven FN_D1, 0, 5744077365a9SGeert Uytterhoeven /* IP0_0 [1] */ 5745077365a9SGeert Uytterhoeven FN_D0, 0, )) 5746077365a9SGeert Uytterhoeven }, 5747077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32, 5748077365a9SGeert Uytterhoeven GROUP(3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2), 5749077365a9SGeert Uytterhoeven GROUP( 5750077365a9SGeert Uytterhoeven /* IP1_31_29 [3] */ 5751077365a9SGeert Uytterhoeven FN_A18, FN_DREQ1, FN_SCIFA1_RXD_C, 0, FN_SCIFB1_RXD_C, 5752077365a9SGeert Uytterhoeven 0, 0, 0, 5753077365a9SGeert Uytterhoeven /* IP1_28_26 [3] */ 5754077365a9SGeert Uytterhoeven FN_A17, FN_DACK2_B, 0, FN_I2C0_SDA_C, 5755077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5756077365a9SGeert Uytterhoeven /* IP1_25_23 [3] */ 5757077365a9SGeert Uytterhoeven FN_A16, FN_DREQ2_B, FN_FMCLK_C, 0, FN_SCIFA1_SCK_B, 5758077365a9SGeert Uytterhoeven 0, 0, 0, 5759077365a9SGeert Uytterhoeven /* IP1_22_20 [3] */ 5760077365a9SGeert Uytterhoeven FN_A15, FN_BPFCLK_C, 5761077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 5762077365a9SGeert Uytterhoeven /* IP1_19_17 [3] */ 5763077365a9SGeert Uytterhoeven FN_A14, FN_ATADIR0_N_C, FN_FMIN, FN_FMIN_C, FN_MSIOF1_SYNC_D, 5764077365a9SGeert Uytterhoeven 0, 0, 0, 5765077365a9SGeert Uytterhoeven /* IP1_16_14 [3] */ 5766077365a9SGeert Uytterhoeven FN_A13, FN_ATAG0_N_C, FN_BPFCLK, FN_MSIOF1_SS1_D, 5767077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5768077365a9SGeert Uytterhoeven /* IP1_13_11 [3] */ 5769077365a9SGeert Uytterhoeven FN_A12, FN_FMCLK, FN_I2C3_SDA_D, FN_MSIOF1_SCK_D, 5770077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5771077365a9SGeert Uytterhoeven /* IP1_10_8 [3] */ 5772077365a9SGeert Uytterhoeven FN_A11, FN_MSIOF1_RXD, FN_I2C3_SCL_D, FN_MSIOF1_RXD_D, 5773077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5774077365a9SGeert Uytterhoeven /* IP1_7_6 [2] */ 5775077365a9SGeert Uytterhoeven FN_A10, FN_MSIOF1_TXD, 0, FN_MSIOF1_TXD_D, 5776077365a9SGeert Uytterhoeven /* IP1_5_4 [2] */ 5777077365a9SGeert Uytterhoeven FN_A9, FN_MSIOF1_SS2, FN_I2C0_SDA, 0, 5778077365a9SGeert Uytterhoeven /* IP1_3_2 [2] */ 5779077365a9SGeert Uytterhoeven FN_A8, FN_MSIOF1_SS1, FN_I2C0_SCL, 0, 5780077365a9SGeert Uytterhoeven /* IP1_1_0 [2] */ 5781077365a9SGeert Uytterhoeven FN_A7, FN_MSIOF1_SYNC, 5782077365a9SGeert Uytterhoeven 0, 0, )) 5783077365a9SGeert Uytterhoeven }, 5784077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32, 5785*d3fcaad6SGeert Uytterhoeven GROUP(-2, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 3), 5786077365a9SGeert Uytterhoeven GROUP( 5787*d3fcaad6SGeert Uytterhoeven /* IP2_31_30 [2] RESERVED */ 5788077365a9SGeert Uytterhoeven /* IP2_29_27 [3] */ 5789077365a9SGeert Uytterhoeven FN_EX_CS3_N, FN_ATADIR0_N, FN_MSIOF2_TXD, 5790077365a9SGeert Uytterhoeven FN_ATAG0_N, 0, FN_EX_WAIT1, 5791077365a9SGeert Uytterhoeven 0, 0, 5792077365a9SGeert Uytterhoeven /* IP2_26_25 [2] */ 5793077365a9SGeert Uytterhoeven FN_EX_CS2_N, FN_ATAWR0_N, FN_MSIOF2_SYNC, 0, 5794077365a9SGeert Uytterhoeven /* IP2_24_23 [2] */ 5795077365a9SGeert Uytterhoeven FN_EX_CS1_N, FN_MSIOF2_SCK, 0, 0, 5796077365a9SGeert Uytterhoeven /* IP2_22_21 [2] */ 5797077365a9SGeert Uytterhoeven FN_CS1_N_A26, FN_ATADIR0_N_B, FN_I2C1_SDA, 0, 5798077365a9SGeert Uytterhoeven /* IP2_20_19 [2] */ 5799077365a9SGeert Uytterhoeven FN_CS0_N, FN_ATAG0_N_B, FN_I2C1_SCL, 0, 5800077365a9SGeert Uytterhoeven /* IP2_18_16 [3] */ 5801077365a9SGeert Uytterhoeven FN_A25, FN_DACK2, FN_SSL, FN_DREQ1_C, FN_RX1, FN_SCIFA1_RXD, 5802077365a9SGeert Uytterhoeven 0, 0, 5803077365a9SGeert Uytterhoeven /* IP2_15_13 [3] */ 5804077365a9SGeert Uytterhoeven FN_A24, FN_DREQ2, FN_IO3, FN_TX1, FN_SCIFA1_TXD, 5805077365a9SGeert Uytterhoeven 0, 0, 0, 5806077365a9SGeert Uytterhoeven /* IP2_12_10 [3] */ 5807077365a9SGeert Uytterhoeven FN_A23, FN_IO2, FN_BPFCLK_B, FN_RX0, FN_SCIFA0_RXD, 5808077365a9SGeert Uytterhoeven 0, 0, 0, 5809077365a9SGeert Uytterhoeven /* IP2_9_7 [3] */ 5810077365a9SGeert Uytterhoeven FN_A22, FN_MISO_IO1, FN_FMCLK_B, FN_TX0, FN_SCIFA0_TXD, 5811077365a9SGeert Uytterhoeven 0, 0, 0, 5812077365a9SGeert Uytterhoeven /* IP2_6_5 [2] */ 5813077365a9SGeert Uytterhoeven FN_A21, FN_ATAWR0_N_B, FN_MOSI_IO0, 0, 5814077365a9SGeert Uytterhoeven /* IP2_4_3 [2] */ 5815077365a9SGeert Uytterhoeven FN_A20, FN_SPCLK, 0, 0, 5816077365a9SGeert Uytterhoeven /* IP2_2_0 [3] */ 5817077365a9SGeert Uytterhoeven FN_A19, FN_DACK1, FN_SCIFA1_TXD_C, 0, 5818077365a9SGeert Uytterhoeven FN_SCIFB1_TXD_C, 0, FN_SCIFB1_SCK_B, 0, )) 5819077365a9SGeert Uytterhoeven }, 5820077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32, 5821*d3fcaad6SGeert Uytterhoeven GROUP(-1, 3, 3, 3, 2, 2, 2, 2, 2, 3, 3, 3, 3), 5822077365a9SGeert Uytterhoeven GROUP( 5823*d3fcaad6SGeert Uytterhoeven /* IP3_31 [1] RESERVED */ 5824077365a9SGeert Uytterhoeven /* IP3_30_28 [3] */ 5825077365a9SGeert Uytterhoeven FN_SSI_WS0129, FN_HTX0_C, FN_HTX2_C, 5826077365a9SGeert Uytterhoeven FN_SCIFB0_TXD_C, FN_SCIFB2_TXD_C, 5827077365a9SGeert Uytterhoeven 0, 0, 0, 5828077365a9SGeert Uytterhoeven /* IP3_27_25 [3] */ 5829077365a9SGeert Uytterhoeven FN_SSI_SCK0129, FN_HRX0_C, FN_HRX2_C, 5830077365a9SGeert Uytterhoeven FN_SCIFB0_RXD_C, FN_SCIFB2_RXD_C, 5831077365a9SGeert Uytterhoeven 0, 0, 0, 5832077365a9SGeert Uytterhoeven /* IP3_24_22 [3] */ 5833077365a9SGeert Uytterhoeven FN_SPEEDIN, 0, FN_HSCK0_C, FN_HSCK2_C, FN_SCIFB0_SCK_B, 5834077365a9SGeert Uytterhoeven FN_SCIFB2_SCK_B, FN_DREQ2_C, FN_HTX2_D, 5835077365a9SGeert Uytterhoeven /* IP3_21_20 [2] */ 5836077365a9SGeert Uytterhoeven FN_DACK0, FN_DRACK0, FN_REMOCON, 0, 5837077365a9SGeert Uytterhoeven /* IP3_19_18 [2] */ 5838077365a9SGeert Uytterhoeven FN_DREQ0, FN_PWM3, FN_TPU_TO3, 0, 5839077365a9SGeert Uytterhoeven /* IP3_17_16 [2] */ 5840077365a9SGeert Uytterhoeven FN_EX_WAIT0, FN_HRTS2_N_B, FN_SCIFB0_CTS_N_B, 0, 5841077365a9SGeert Uytterhoeven /* IP3_15_14 [2] */ 5842077365a9SGeert Uytterhoeven FN_WE1_N, FN_ATARD0_N_B, FN_HTX2_B, FN_SCIFB0_RTS_N_B, 5843077365a9SGeert Uytterhoeven /* IP3_13_12 [2] */ 5844077365a9SGeert Uytterhoeven FN_WE0_N, FN_HCTS2_N_B, FN_SCIFB0_TXD_B, 0, 5845077365a9SGeert Uytterhoeven /* IP3_11_9 [3] */ 5846077365a9SGeert Uytterhoeven FN_RD_WR_N, FN_HRX2_B, FN_FMIN_B, FN_SCIFB0_RXD_B, FN_DREQ1_D, 5847077365a9SGeert Uytterhoeven 0, 0, 0, 5848077365a9SGeert Uytterhoeven /* IP3_8_6 [3] */ 5849077365a9SGeert Uytterhoeven FN_BS_N, FN_ATACS10_N, FN_MSIOF2_SS2, FN_HTX1_B, 5850077365a9SGeert Uytterhoeven FN_SCIFB1_TXD_B, FN_PWM2, FN_TPU_TO2, 0, 5851077365a9SGeert Uytterhoeven /* IP3_5_3 [3] */ 5852077365a9SGeert Uytterhoeven FN_EX_CS5_N, FN_ATACS00_N, FN_MSIOF2_SS1, FN_HRX1_B, 5853077365a9SGeert Uytterhoeven FN_SCIFB1_RXD_B, FN_PWM1, FN_TPU_TO1, 0, 5854077365a9SGeert Uytterhoeven /* IP3_2_0 [3] */ 5855077365a9SGeert Uytterhoeven FN_EX_CS4_N, FN_ATARD0_N, FN_MSIOF2_RXD, 0, FN_EX_WAIT2, 5856077365a9SGeert Uytterhoeven 0, 0, 0, )) 5857077365a9SGeert Uytterhoeven }, 5858077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32, 5859*d3fcaad6SGeert Uytterhoeven GROUP(-1, 3, 2, 2, 2, 1, 1, 1, 3, 3, 3, 2, 5860077365a9SGeert Uytterhoeven 3, 3, 2), 5861077365a9SGeert Uytterhoeven GROUP( 5862*d3fcaad6SGeert Uytterhoeven /* IP4_31 [1] RESERVED */ 5863077365a9SGeert Uytterhoeven /* IP4_30_28 [3] */ 5864077365a9SGeert Uytterhoeven FN_SSI_SCK5, FN_MSIOF1_SCK_C, FN_TS_SDATA0, FN_GLO_I0, 5865077365a9SGeert Uytterhoeven FN_MSIOF2_SYNC_D, FN_VI1_R2_B, 5866077365a9SGeert Uytterhoeven 0, 0, 5867077365a9SGeert Uytterhoeven /* IP4_27_26 [2] */ 5868077365a9SGeert Uytterhoeven FN_SSI_SDATA4, FN_MSIOF2_SCK_D, 0, 0, 5869077365a9SGeert Uytterhoeven /* IP4_25_24 [2] */ 5870077365a9SGeert Uytterhoeven FN_SSI_WS4, FN_GLO_RFON_D, 0, 0, 5871077365a9SGeert Uytterhoeven /* IP4_23_22 [2] */ 5872077365a9SGeert Uytterhoeven FN_SSI_SCK4, FN_GLO_SS_D, 0, 0, 5873077365a9SGeert Uytterhoeven /* IP4_21 [1] */ 5874077365a9SGeert Uytterhoeven FN_SSI_SDATA3, 0, 5875077365a9SGeert Uytterhoeven /* IP4_20 [1] */ 5876077365a9SGeert Uytterhoeven FN_SSI_WS34, 0, 5877077365a9SGeert Uytterhoeven /* IP4_19 [1] */ 5878077365a9SGeert Uytterhoeven FN_SSI_SCK34, 0, 5879077365a9SGeert Uytterhoeven /* IP4_18_16 [3] */ 5880077365a9SGeert Uytterhoeven FN_SSI_SDATA2, FN_GPS_MAG_B, FN_TX2_E, FN_HRTS1_N_E, 5881077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5882077365a9SGeert Uytterhoeven /* IP4_15_13 [3] */ 5883077365a9SGeert Uytterhoeven FN_SSI_WS2, FN_I2C2_SDA, FN_GPS_SIGN_B, FN_RX2_E, 5884077365a9SGeert Uytterhoeven FN_GLO_Q1_D, FN_HCTS1_N_E, 5885077365a9SGeert Uytterhoeven 0, 0, 5886077365a9SGeert Uytterhoeven /* IP4_12_10 [3] */ 5887077365a9SGeert Uytterhoeven FN_SSI_SCK2, FN_I2C2_SCL, FN_GPS_CLK_B, FN_GLO_Q0_D, FN_HSCK1_E, 5888077365a9SGeert Uytterhoeven 0, 0, 0, 5889077365a9SGeert Uytterhoeven /* IP4_9_8 [2] */ 5890077365a9SGeert Uytterhoeven FN_SSI_SDATA1, FN_I2C1_SDA_B, FN_IIC1_SDA_B, FN_MSIOF2_RXD_C, 5891077365a9SGeert Uytterhoeven /* IP4_7_5 [3] */ 5892077365a9SGeert Uytterhoeven FN_SSI_WS1, FN_I2C1_SCL_B, FN_IIC1_SCL_B, FN_MSIOF2_TXD_C, 5893077365a9SGeert Uytterhoeven FN_GLO_I1_D, 0, 0, 0, 5894077365a9SGeert Uytterhoeven /* IP4_4_2 [3] */ 5895077365a9SGeert Uytterhoeven FN_SSI_SCK1, FN_I2C0_SDA_B, FN_IIC0_SDA_B, 5896077365a9SGeert Uytterhoeven FN_MSIOF2_SYNC_C, FN_GLO_I0_D, 5897077365a9SGeert Uytterhoeven 0, 0, 0, 5898077365a9SGeert Uytterhoeven /* IP4_1_0 [2] */ 5899077365a9SGeert Uytterhoeven FN_SSI_SDATA0, FN_I2C0_SCL_B, FN_IIC0_SCL_B, FN_MSIOF2_SCK_C, 5900077365a9SGeert Uytterhoeven )) 5901077365a9SGeert Uytterhoeven }, 5902077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32, 5903077365a9SGeert Uytterhoeven GROUP(3, 3, 2, 2, 2, 3, 2, 3, 3, 3, 3, 3), 5904077365a9SGeert Uytterhoeven GROUP( 5905077365a9SGeert Uytterhoeven /* IP5_31_29 [3] */ 5906077365a9SGeert Uytterhoeven FN_SSI_SDATA9, FN_RX3_D, FN_CAN0_RX_D, 5907077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 5908077365a9SGeert Uytterhoeven /* IP5_28_26 [3] */ 5909077365a9SGeert Uytterhoeven FN_SSI_WS9, FN_TX3_D, FN_CAN0_TX_D, FN_GLO_SDATA_D, 5910077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5911077365a9SGeert Uytterhoeven /* IP5_25_24 [2] */ 5912077365a9SGeert Uytterhoeven FN_SSI_SCK9, FN_RX1_D, FN_GLO_SCLK_D, 0, 5913077365a9SGeert Uytterhoeven /* IP5_23_22 [2] */ 5914077365a9SGeert Uytterhoeven FN_SSI_SDATA8, FN_TX1_D, FN_STP_ISSYNC_0_B, 0, 5915077365a9SGeert Uytterhoeven /* IP5_21_20 [2] */ 5916077365a9SGeert Uytterhoeven FN_SSI_SDATA7, FN_RX0_D, FN_STP_ISEN_0_B, 0, 5917077365a9SGeert Uytterhoeven /* IP5_19_17 [3] */ 5918077365a9SGeert Uytterhoeven FN_SSI_WS78, FN_TX0_D, FN_STP_ISD_0_B, FN_GLO_RFON, 5919077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5920077365a9SGeert Uytterhoeven /* IP5_16_15 [2] */ 5921077365a9SGeert Uytterhoeven FN_SSI_SCK78, FN_STP_ISCLK_0_B, FN_GLO_SS, 0, 5922077365a9SGeert Uytterhoeven /* IP5_14_12 [3] */ 5923077365a9SGeert Uytterhoeven FN_SSI_SDATA6, FN_STP_IVCXO27_0_B, FN_GLO_SDATA, FN_VI1_R7_B, 5924077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5925077365a9SGeert Uytterhoeven /* IP5_11_9 [3] */ 5926077365a9SGeert Uytterhoeven FN_SSI_WS6, FN_GLO_SCLK, FN_MSIOF2_SS2_D, FN_VI1_R6_B, 5927077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5928077365a9SGeert Uytterhoeven /* IP5_8_6 [3] */ 5929077365a9SGeert Uytterhoeven FN_SSI_SCK6, FN_MSIOF1_RXD_C, FN_TS_SPSYNC0, FN_GLO_Q1, 5930077365a9SGeert Uytterhoeven FN_MSIOF2_RXD_D, FN_VI1_R5_B, 5931077365a9SGeert Uytterhoeven 0, 0, 5932077365a9SGeert Uytterhoeven /* IP5_5_3 [3] */ 5933077365a9SGeert Uytterhoeven FN_SSI_SDATA5, FN_MSIOF1_TXD_C, FN_TS_SDEN0, FN_GLO_Q0, 5934077365a9SGeert Uytterhoeven FN_MSIOF2_SS1_D, FN_VI1_R4_B, 5935077365a9SGeert Uytterhoeven 0, 0, 5936077365a9SGeert Uytterhoeven /* IP5_2_0 [3] */ 5937077365a9SGeert Uytterhoeven FN_SSI_WS5, FN_MSIOF1_SYNC_C, FN_TS_SCK0, FN_GLO_I1, 5938077365a9SGeert Uytterhoeven FN_MSIOF2_TXD_D, FN_VI1_R3_B, 5939077365a9SGeert Uytterhoeven 0, 0, )) 5940077365a9SGeert Uytterhoeven }, 5941077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32, 5942*d3fcaad6SGeert Uytterhoeven GROUP(-2, 3, 3, 3, 2, 3, 2, 2, 2, 2, 2, 3, 3), 5943077365a9SGeert Uytterhoeven GROUP( 5944*d3fcaad6SGeert Uytterhoeven /* IP6_31_30 [2] RESERVED */ 5945077365a9SGeert Uytterhoeven /* IP6_29_27 [3] */ 5946077365a9SGeert Uytterhoeven FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, 5947077365a9SGeert Uytterhoeven FN_GPS_SIGN_C, FN_GPS_SIGN_D, 5948077365a9SGeert Uytterhoeven 0, 0, 0, 5949077365a9SGeert Uytterhoeven /* IP6_26_24 [3] */ 5950077365a9SGeert Uytterhoeven FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, 5951077365a9SGeert Uytterhoeven FN_GPS_CLK_C, FN_GPS_CLK_D, 5952077365a9SGeert Uytterhoeven 0, 0, 0, 5953077365a9SGeert Uytterhoeven /* IP6_23_21 [3] */ 5954077365a9SGeert Uytterhoeven FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, 5955077365a9SGeert Uytterhoeven FN_I2C1_SDA_E, FN_MSIOF2_SYNC_E, 5956077365a9SGeert Uytterhoeven 0, 0, 0, 5957077365a9SGeert Uytterhoeven /* IP6_20_19 [2] */ 5958077365a9SGeert Uytterhoeven FN_IRQ5, FN_HTX1_C, FN_I2C1_SCL_E, FN_MSIOF2_SCK_E, 5959077365a9SGeert Uytterhoeven /* IP6_18_16 [3] */ 5960077365a9SGeert Uytterhoeven FN_IRQ4, FN_HRX1_C, FN_I2C4_SDA_C, FN_MSIOF2_RXD_E, 596130d36999SGeert Uytterhoeven 0, 0, 0, 0, 5962077365a9SGeert Uytterhoeven /* IP6_15_14 [2] */ 596330d36999SGeert Uytterhoeven FN_IRQ3, FN_I2C4_SCL_C, FN_MSIOF2_TXD_E, 0, 5964077365a9SGeert Uytterhoeven /* IP6_13_12 [2] */ 596530d36999SGeert Uytterhoeven FN_IRQ2, FN_SCIFB1_TXD_D, 0, 0, 5966077365a9SGeert Uytterhoeven /* IP6_11_10 [2] */ 596730d36999SGeert Uytterhoeven FN_IRQ1, FN_SCIFB1_SCK_C, 0, 0, 5968077365a9SGeert Uytterhoeven /* IP6_9_8 [2] */ 596930d36999SGeert Uytterhoeven FN_IRQ0, FN_SCIFB1_RXD_D, 0, 0, 5970077365a9SGeert Uytterhoeven /* IP6_7_6 [2] */ 5971077365a9SGeert Uytterhoeven FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD, 5972077365a9SGeert Uytterhoeven /* IP6_5_3 [3] */ 5973077365a9SGeert Uytterhoeven FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2, 5974077365a9SGeert Uytterhoeven FN_SCIFA2_RXD, FN_FMIN_E, 5975077365a9SGeert Uytterhoeven 0, 0, 5976077365a9SGeert Uytterhoeven /* IP6_2_0 [3] */ 5977077365a9SGeert Uytterhoeven FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B, 5978077365a9SGeert Uytterhoeven FN_SCIF_CLK, FN_DVC_MUTE, FN_BPFCLK_E, 5979077365a9SGeert Uytterhoeven 0, 0, )) 5980077365a9SGeert Uytterhoeven }, 5981077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32, 5982*d3fcaad6SGeert Uytterhoeven GROUP(-2, 3, 3, 3, 2, 2, 2, 2, 2, 2, 3, 3, 3), 5983077365a9SGeert Uytterhoeven GROUP( 5984*d3fcaad6SGeert Uytterhoeven /* IP7_31_30 [2] RESERVED */ 5985077365a9SGeert Uytterhoeven /* IP7_29_27 [3] */ 5986077365a9SGeert Uytterhoeven FN_DU1_DG2, FN_LCDOUT10, FN_VI1_DATA4_B, FN_SCIF1_SCK_B, 5987077365a9SGeert Uytterhoeven FN_SCIFA1_SCK, FN_SSI_SCK78_B, 5988077365a9SGeert Uytterhoeven 0, 0, 5989077365a9SGeert Uytterhoeven /* IP7_26_24 [3] */ 5990077365a9SGeert Uytterhoeven FN_DU1_DG1, FN_LCDOUT9, FN_VI1_DATA3_B, FN_RX1_B, 5991077365a9SGeert Uytterhoeven FN_SCIFA1_RXD_B, FN_MSIOF2_SS2_B, 5992077365a9SGeert Uytterhoeven 0, 0, 5993077365a9SGeert Uytterhoeven /* IP7_23_21 [3] */ 5994077365a9SGeert Uytterhoeven FN_DU1_DG0, FN_LCDOUT8, FN_VI1_DATA2_B, FN_TX1_B, 5995077365a9SGeert Uytterhoeven FN_SCIFA1_TXD_B, FN_MSIOF2_SS1_B, 5996077365a9SGeert Uytterhoeven 0, 0, 5997077365a9SGeert Uytterhoeven /* IP7_20_19 [2] */ 5998077365a9SGeert Uytterhoeven FN_DU1_DR7, FN_LCDOUT7, FN_SSI_SDATA1_B, 0, 5999077365a9SGeert Uytterhoeven /* IP7_18_17 [2] */ 6000077365a9SGeert Uytterhoeven FN_DU1_DR6, FN_LCDOUT6, FN_SSI_WS1_B, 0, 6001077365a9SGeert Uytterhoeven /* IP7_16_15 [2] */ 6002077365a9SGeert Uytterhoeven FN_DU1_DR5, FN_LCDOUT5, FN_SSI_SCK1_B, 0, 6003077365a9SGeert Uytterhoeven /* IP7_14_13 [2] */ 6004077365a9SGeert Uytterhoeven FN_DU1_DR4, FN_LCDOUT4, FN_SSI_SDATA0_B, 0, 6005077365a9SGeert Uytterhoeven /* IP7_12_11 [2] */ 6006077365a9SGeert Uytterhoeven FN_DU1_DR3, FN_LCDOUT3, FN_SSI_WS0129_B, 0, 6007077365a9SGeert Uytterhoeven /* IP7_10_9 [2] */ 6008077365a9SGeert Uytterhoeven FN_DU1_DR2, FN_LCDOUT2, FN_SSI_SCK0129_B, 0, 6009077365a9SGeert Uytterhoeven /* IP7_8_6 [3] */ 6010077365a9SGeert Uytterhoeven FN_DU1_DR1, FN_LCDOUT1, FN_VI1_DATA1_B, FN_RX0_B, 6011077365a9SGeert Uytterhoeven FN_SCIFA0_RXD_B, FN_MSIOF2_SYNC_B, 6012077365a9SGeert Uytterhoeven 0, 0, 6013077365a9SGeert Uytterhoeven /* IP7_5_3 [3] */ 6014077365a9SGeert Uytterhoeven FN_DU1_DR0, FN_LCDOUT0, FN_VI1_DATA0_B, FN_TX0_B, 6015077365a9SGeert Uytterhoeven FN_SCIFA0_TXD_B, FN_MSIOF2_SCK_B, 6016077365a9SGeert Uytterhoeven 0, 0, 6017077365a9SGeert Uytterhoeven /* IP7_2_0 [3] */ 6018077365a9SGeert Uytterhoeven FN_IRQ9, FN_DU1_DOTCLKIN_B, FN_CAN_CLK_D, FN_GPS_MAG_C, 6019077365a9SGeert Uytterhoeven FN_SCIF_CLK_B, FN_GPS_MAG_D, 6020077365a9SGeert Uytterhoeven 0, 0, )) 6021077365a9SGeert Uytterhoeven }, 6022077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32, 6023*d3fcaad6SGeert Uytterhoeven GROUP(-1, 3, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3), 6024077365a9SGeert Uytterhoeven GROUP( 6025*d3fcaad6SGeert Uytterhoeven /* IP8_31 [1] RESERVED */ 6026077365a9SGeert Uytterhoeven /* IP8_30_28 [3] */ 6027077365a9SGeert Uytterhoeven FN_DU1_DB5, FN_LCDOUT21, FN_TX3, FN_SCIFA3_TXD, FN_CAN1_TX, 6028077365a9SGeert Uytterhoeven 0, 0, 0, 6029077365a9SGeert Uytterhoeven /* IP8_27_26 [2] */ 6030077365a9SGeert Uytterhoeven FN_DU1_DB4, FN_LCDOUT20, FN_VI1_FIELD_B, FN_CAN1_RX, 6031077365a9SGeert Uytterhoeven /* IP8_25_24 [2] */ 6032077365a9SGeert Uytterhoeven FN_DU1_DB3, FN_LCDOUT19, FN_VI1_CLKENB_B, 0, 6033077365a9SGeert Uytterhoeven /* IP8_23_21 [3] */ 6034077365a9SGeert Uytterhoeven FN_DU1_DB2, FN_LCDOUT18, FN_VI1_VSYNC_N_B, FN_SCIF2_SCK_B, 6035077365a9SGeert Uytterhoeven FN_SCIFA2_SCK, FN_SSI_SDATA9_B, 6036077365a9SGeert Uytterhoeven 0, 0, 6037077365a9SGeert Uytterhoeven /* IP8_20_18 [3] */ 6038077365a9SGeert Uytterhoeven FN_DU1_DB1, FN_LCDOUT17, FN_VI1_HSYNC_N_B, FN_RX2_B, 6039077365a9SGeert Uytterhoeven FN_SCIFA2_RXD_B, FN_MSIOF2_RXD_B, 6040077365a9SGeert Uytterhoeven 0, 0, 6041077365a9SGeert Uytterhoeven /* IP8_17_15 [3] */ 6042077365a9SGeert Uytterhoeven FN_DU1_DB0, FN_LCDOUT16, FN_VI1_CLK_B, FN_TX2_B, 6043077365a9SGeert Uytterhoeven FN_SCIFA2_TXD_B, FN_MSIOF2_TXD_B, 6044077365a9SGeert Uytterhoeven 0, 0, 6045077365a9SGeert Uytterhoeven /* IP8_14_12 [3] */ 6046077365a9SGeert Uytterhoeven FN_DU1_DG7, FN_LCDOUT15, FN_HTX0_B, 6047077365a9SGeert Uytterhoeven FN_SCIFB2_RTS_N_B, FN_SSI_WS9_B, 6048077365a9SGeert Uytterhoeven 0, 0, 0, 6049077365a9SGeert Uytterhoeven /* IP8_11_9 [3] */ 6050077365a9SGeert Uytterhoeven FN_DU1_DG6, FN_LCDOUT14, FN_HRTS0_N_B, 6051077365a9SGeert Uytterhoeven FN_SCIFB2_CTS_N_B, FN_SSI_SCK9_B, 6052077365a9SGeert Uytterhoeven 0, 0, 0, 6053077365a9SGeert Uytterhoeven /* IP8_8_6 [3] */ 6054077365a9SGeert Uytterhoeven FN_DU1_DG5, FN_LCDOUT13, FN_VI1_DATA7_B, FN_HCTS0_N_B, 6055077365a9SGeert Uytterhoeven FN_SCIFB2_TXD_B, FN_SSI_SDATA8_B, 6056077365a9SGeert Uytterhoeven 0, 0, 6057077365a9SGeert Uytterhoeven /* IP8_5_3 [3] */ 6058077365a9SGeert Uytterhoeven FN_DU1_DG4, FN_LCDOUT12, FN_VI1_DATA6_B, FN_HRX0_B, 6059077365a9SGeert Uytterhoeven FN_SCIFB2_RXD_B, FN_SSI_SDATA7_B, 6060077365a9SGeert Uytterhoeven 0, 0, 6061077365a9SGeert Uytterhoeven /* IP8_2_0 [3] */ 6062077365a9SGeert Uytterhoeven FN_DU1_DG3, FN_LCDOUT11, FN_VI1_DATA5_B, 0, FN_SSI_WS78_B, 6063077365a9SGeert Uytterhoeven 0, 0, 0, )) 6064077365a9SGeert Uytterhoeven }, 6065077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32, 6066077365a9SGeert Uytterhoeven GROUP(3, 2, 2, 2, 2, 2, 2, 1, 3, 1, 1, 3, 6067077365a9SGeert Uytterhoeven 1, 1, 3, 3), 6068077365a9SGeert Uytterhoeven GROUP( 6069077365a9SGeert Uytterhoeven /* IP9_31_29 [3] */ 6070077365a9SGeert Uytterhoeven FN_VI0_G0, FN_IIC1_SCL, FN_STP_IVCXO27_0_C, FN_I2C4_SCL, 6071077365a9SGeert Uytterhoeven FN_HCTS2_N, FN_SCIFB2_CTS_N, FN_ATAWR1_N, 0, 6072077365a9SGeert Uytterhoeven /* IP9_28_27 [2] */ 6073077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3, FN_SCIF3_SCK_B, FN_SCIFA3_SCK_B, 0, 6074077365a9SGeert Uytterhoeven /* IP9_26_25 [2] */ 6075077365a9SGeert Uytterhoeven FN_VI0_VSYNC_N, FN_RX5, FN_SCIFA5_RXD, FN_TS_SPSYNC0_D, 6076077365a9SGeert Uytterhoeven /* IP9_24_23 [2] */ 6077077365a9SGeert Uytterhoeven FN_VI0_HSYNC_N, FN_TX5, FN_SCIFA5_TXD, FN_TS_SDEN0_D, 6078077365a9SGeert Uytterhoeven /* IP9_22_21 [2] */ 6079077365a9SGeert Uytterhoeven FN_VI0_FIELD, FN_RX4, FN_SCIFA4_RXD, FN_TS_SCK0_D, 6080077365a9SGeert Uytterhoeven /* IP9_20_19 [2] */ 6081077365a9SGeert Uytterhoeven FN_VI0_CLKENB, FN_TX4, FN_SCIFA4_TXD, FN_TS_SDATA0_D, 6082077365a9SGeert Uytterhoeven /* IP9_18_17 [2] */ 6083077365a9SGeert Uytterhoeven FN_DU1_CDE, FN_QPOLB, FN_PWM4_B, 0, 6084077365a9SGeert Uytterhoeven /* IP9_16 [1] */ 6085077365a9SGeert Uytterhoeven FN_DU1_DISP, FN_QPOLA, 6086077365a9SGeert Uytterhoeven /* IP9_15_13 [3] */ 6087077365a9SGeert Uytterhoeven FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_QCPV_QDE, 6088077365a9SGeert Uytterhoeven FN_CAN0_RX, FN_RX3_B, FN_I2C2_SDA_B, 6089077365a9SGeert Uytterhoeven 0, 0, 0, 6090077365a9SGeert Uytterhoeven /* IP9_12 [1] */ 6091077365a9SGeert Uytterhoeven FN_DU1_EXVSYNC_DU1_VSYNC, FN_QSTB_QHE, 6092077365a9SGeert Uytterhoeven /* IP9_11 [1] */ 6093077365a9SGeert Uytterhoeven FN_DU1_EXHSYNC_DU1_HSYNC, FN_QSTH_QHS, 6094077365a9SGeert Uytterhoeven /* IP9_10_8 [3] */ 6095077365a9SGeert Uytterhoeven FN_DU1_DOTCLKOUT1, FN_QSTVB_QVE, FN_CAN0_TX, 6096077365a9SGeert Uytterhoeven FN_TX3_B, FN_I2C2_SCL_B, FN_PWM4, 6097077365a9SGeert Uytterhoeven 0, 0, 6098077365a9SGeert Uytterhoeven /* IP9_7 [1] */ 6099077365a9SGeert Uytterhoeven FN_DU1_DOTCLKOUT0, FN_QCLK, 6100077365a9SGeert Uytterhoeven /* IP9_6 [1] */ 6101077365a9SGeert Uytterhoeven FN_DU1_DOTCLKIN, FN_QSTVA_QVS, 6102077365a9SGeert Uytterhoeven /* IP9_5_3 [3] */ 6103077365a9SGeert Uytterhoeven FN_DU1_DB7, FN_LCDOUT23, FN_I2C3_SDA_C, 6104077365a9SGeert Uytterhoeven FN_SCIF3_SCK, FN_SCIFA3_SCK, 6105077365a9SGeert Uytterhoeven 0, 0, 0, 6106077365a9SGeert Uytterhoeven /* IP9_2_0 [3] */ 6107077365a9SGeert Uytterhoeven FN_DU1_DB6, FN_LCDOUT22, FN_I2C3_SCL_C, FN_RX3, FN_SCIFA3_RXD, 6108077365a9SGeert Uytterhoeven 0, 0, 0, )) 6109077365a9SGeert Uytterhoeven }, 6110077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32, 6111077365a9SGeert Uytterhoeven GROUP(3, 2, 2, 3, 3, 2, 2, 3, 3, 3, 3, 3), 6112077365a9SGeert Uytterhoeven GROUP( 6113077365a9SGeert Uytterhoeven /* IP10_31_29 [3] */ 6114077365a9SGeert Uytterhoeven FN_VI0_R4, FN_VI2_DATA5, FN_GLO_SCLK_B, FN_TX0_C, FN_I2C1_SCL_D, 6115077365a9SGeert Uytterhoeven 0, 0, 0, 6116077365a9SGeert Uytterhoeven /* IP10_28_27 [2] */ 6117077365a9SGeert Uytterhoeven FN_VI0_R3, FN_VI2_DATA4, FN_GLO_Q1_B, FN_TS_SPSYNC0_C, 6118077365a9SGeert Uytterhoeven /* IP10_26_25 [2] */ 6119077365a9SGeert Uytterhoeven FN_VI0_R2, FN_VI2_DATA3, FN_GLO_Q0_B, FN_TS_SDEN0_C, 6120077365a9SGeert Uytterhoeven /* IP10_24_22 [3] */ 6121077365a9SGeert Uytterhoeven FN_VI0_R1, FN_VI2_DATA2, FN_GLO_I1_B, FN_TS_SCK0_C, FN_ATAG1_N, 6122077365a9SGeert Uytterhoeven 0, 0, 0, 6123077365a9SGeert Uytterhoeven /* IP10_21_19 [3] */ 6124077365a9SGeert Uytterhoeven FN_VI0_R0, FN_VI2_DATA1, FN_GLO_I0_B, 6125077365a9SGeert Uytterhoeven FN_TS_SDATA0_C, FN_ATACS11_N, 6126077365a9SGeert Uytterhoeven 0, 0, 0, 6127077365a9SGeert Uytterhoeven /* IP10_18_17 [2] */ 6128077365a9SGeert Uytterhoeven FN_VI0_G7, FN_VI2_DATA0, FN_FMIN_D, 0, 6129077365a9SGeert Uytterhoeven /* IP10_16_15 [2] */ 6130077365a9SGeert Uytterhoeven FN_VI0_G6, FN_VI2_CLK, FN_BPFCLK_D, 0, 6131077365a9SGeert Uytterhoeven /* IP10_14_12 [3] */ 6132077365a9SGeert Uytterhoeven FN_VI0_G5, FN_VI2_FIELD, FN_STP_OPWM_0_C, FN_FMCLK_D, 6133077365a9SGeert Uytterhoeven FN_CAN0_TX_E, FN_HTX1_D, FN_SCIFB0_TXD_D, 0, 6134077365a9SGeert Uytterhoeven /* IP10_11_9 [3] */ 6135077365a9SGeert Uytterhoeven FN_VI0_G4, FN_VI2_CLKENB, FN_STP_ISSYNC_0_C, 6136077365a9SGeert Uytterhoeven FN_HTX2, FN_SCIFB2_TXD, FN_SCIFB0_SCK_D, 6137077365a9SGeert Uytterhoeven 0, 0, 6138077365a9SGeert Uytterhoeven /* IP10_8_6 [3] */ 6139077365a9SGeert Uytterhoeven FN_VI0_G3, FN_VI2_VSYNC_N, FN_STP_ISEN_0_C, FN_I2C3_SDA_B, 6140077365a9SGeert Uytterhoeven FN_HRX2, FN_SCIFB2_RXD, FN_ATACS01_N, 0, 6141077365a9SGeert Uytterhoeven /* IP10_5_3 [3] */ 6142077365a9SGeert Uytterhoeven FN_VI0_G2, FN_VI2_HSYNC_N, FN_STP_ISD_0_C, FN_I2C3_SCL_B, 6143077365a9SGeert Uytterhoeven FN_HSCK2, FN_SCIFB2_SCK, FN_ATARD1_N, 0, 6144077365a9SGeert Uytterhoeven /* IP10_2_0 [3] */ 6145077365a9SGeert Uytterhoeven FN_VI0_G1, FN_IIC1_SDA, FN_STP_ISCLK_0_C, FN_I2C4_SDA, 6146077365a9SGeert Uytterhoeven FN_HRTS2_N, FN_SCIFB2_RTS_N, FN_ATADIR1_N, 0, )) 6147077365a9SGeert Uytterhoeven }, 6148077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, 6149077365a9SGeert Uytterhoeven GROUP(2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 6150077365a9SGeert Uytterhoeven 2, 3, 3, 3, 3, 3), 6151077365a9SGeert Uytterhoeven GROUP( 6152077365a9SGeert Uytterhoeven /* IP11_31_30 [2] */ 6153077365a9SGeert Uytterhoeven FN_ETH_CRS_DV, FN_AVB_LINK, FN_I2C2_SDA_C, 0, 6154077365a9SGeert Uytterhoeven /* IP11_29_28 [2] */ 6155077365a9SGeert Uytterhoeven FN_ETH_MDIO, FN_AVB_RX_CLK, FN_I2C2_SCL_C, 0, 6156077365a9SGeert Uytterhoeven /* IP11_27 [1] */ 6157077365a9SGeert Uytterhoeven FN_VI1_DATA7, FN_AVB_MDC, 6158077365a9SGeert Uytterhoeven /* IP11_26 [1] */ 6159077365a9SGeert Uytterhoeven FN_VI1_DATA6, FN_AVB_MAGIC, 6160077365a9SGeert Uytterhoeven /* IP11_25 [1] */ 6161077365a9SGeert Uytterhoeven FN_VI1_DATA5, FN_AVB_RX_DV, 6162077365a9SGeert Uytterhoeven /* IP11_24 [1] */ 6163077365a9SGeert Uytterhoeven FN_VI1_DATA4, FN_AVB_MDIO, 6164077365a9SGeert Uytterhoeven /* IP11_23 [1] */ 6165077365a9SGeert Uytterhoeven FN_VI1_DATA3, FN_AVB_RX_ER, 6166077365a9SGeert Uytterhoeven /* IP11_22 [1] */ 6167077365a9SGeert Uytterhoeven FN_VI1_DATA2, FN_AVB_RXD7, 6168077365a9SGeert Uytterhoeven /* IP11_21 [1] */ 6169077365a9SGeert Uytterhoeven FN_VI1_DATA1, FN_AVB_RXD6, 6170077365a9SGeert Uytterhoeven /* IP11_20 [1] */ 6171077365a9SGeert Uytterhoeven FN_VI1_DATA0, FN_AVB_RXD5, 6172077365a9SGeert Uytterhoeven /* IP11_19 [1] */ 6173077365a9SGeert Uytterhoeven FN_VI1_CLK, FN_AVB_RXD4, 6174077365a9SGeert Uytterhoeven /* IP11_18_17 [2] */ 6175077365a9SGeert Uytterhoeven FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0, 6176077365a9SGeert Uytterhoeven /* IP11_16_15 [2] */ 6177077365a9SGeert Uytterhoeven FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0, 6178077365a9SGeert Uytterhoeven /* IP11_14_12 [3] */ 6179077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, 6180077365a9SGeert Uytterhoeven FN_RX4_B, FN_SCIFA4_RXD_B, 6181077365a9SGeert Uytterhoeven 0, 0, 0, 6182077365a9SGeert Uytterhoeven /* IP11_11_9 [3] */ 6183077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, 6184077365a9SGeert Uytterhoeven FN_TX4_B, FN_SCIFA4_TXD_B, 6185077365a9SGeert Uytterhoeven 0, 0, 0, 6186077365a9SGeert Uytterhoeven /* IP11_8_6 [3] */ 6187077365a9SGeert Uytterhoeven FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, 6188077365a9SGeert Uytterhoeven FN_I2C4_SDA_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0, 6189077365a9SGeert Uytterhoeven /* IP11_5_3 [3] */ 6190077365a9SGeert Uytterhoeven FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_I2C4_SCL_B, 6191077365a9SGeert Uytterhoeven 0, 0, 0, 6192077365a9SGeert Uytterhoeven /* IP11_2_0 [3] */ 6193077365a9SGeert Uytterhoeven FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, 6194077365a9SGeert Uytterhoeven FN_I2C1_SDA_D, 0, 0, 0, )) 6195077365a9SGeert Uytterhoeven }, 6196077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32, 6197*d3fcaad6SGeert Uytterhoeven GROUP(-2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2), 6198077365a9SGeert Uytterhoeven GROUP( 6199*d3fcaad6SGeert Uytterhoeven /* IP12_31_30 [2] RESERVED */ 6200077365a9SGeert Uytterhoeven /* IP12_29_27 [3] */ 6201077365a9SGeert Uytterhoeven FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, 6202077365a9SGeert Uytterhoeven FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, 6203077365a9SGeert Uytterhoeven 0, 0, 0, 6204077365a9SGeert Uytterhoeven /* IP12_26_24 [3] */ 6205077365a9SGeert Uytterhoeven FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, 6206077365a9SGeert Uytterhoeven FN_ADIDATA_B, FN_MSIOF0_SYNC_C, 6207077365a9SGeert Uytterhoeven 0, 0, 0, 6208077365a9SGeert Uytterhoeven /* IP12_23_22 [2] */ 6209077365a9SGeert Uytterhoeven FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0, 6210077365a9SGeert Uytterhoeven /* IP12_21_20 [2] */ 6211077365a9SGeert Uytterhoeven FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0, 6212077365a9SGeert Uytterhoeven /* IP12_19_18 [2] */ 6213077365a9SGeert Uytterhoeven FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0, 6214077365a9SGeert Uytterhoeven /* IP12_17_16 [2] */ 6215077365a9SGeert Uytterhoeven FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, 6216077365a9SGeert Uytterhoeven /* IP12_15_13 [3] */ 6217077365a9SGeert Uytterhoeven FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, 6218077365a9SGeert Uytterhoeven FN_CAN1_TX_C, FN_MSIOF1_TXD_E, 6219077365a9SGeert Uytterhoeven 0, 0, 0, 6220077365a9SGeert Uytterhoeven /* IP12_12_10 [3] */ 6221077365a9SGeert Uytterhoeven FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, 6222077365a9SGeert Uytterhoeven FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, 6223077365a9SGeert Uytterhoeven 0, 0, 0, 6224077365a9SGeert Uytterhoeven /* IP12_9_7 [3] */ 6225077365a9SGeert Uytterhoeven FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, 6226077365a9SGeert Uytterhoeven FN_I2C2_SDA_D, FN_MSIOF1_SCK_E, 6227077365a9SGeert Uytterhoeven 0, 0, 0, 6228077365a9SGeert Uytterhoeven /* IP12_6_4 [3] */ 6229077365a9SGeert Uytterhoeven FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, 6230077365a9SGeert Uytterhoeven FN_I2C2_SCL_D, FN_MSIOF1_RXD_E, 6231077365a9SGeert Uytterhoeven 0, 0, 0, 6232077365a9SGeert Uytterhoeven /* IP12_3_2 [2] */ 6233077365a9SGeert Uytterhoeven FN_ETH_RXD0, FN_AVB_PHY_INT, FN_I2C3_SDA, FN_IIC0_SDA, 6234077365a9SGeert Uytterhoeven /* IP12_1_0 [2] */ 6235077365a9SGeert Uytterhoeven FN_ETH_RX_ER, FN_AVB_CRS, FN_I2C3_SCL, FN_IIC0_SCL, )) 6236077365a9SGeert Uytterhoeven }, 6237077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32, 6238*d3fcaad6SGeert Uytterhoeven GROUP(-1, 3, 1, 1, 1, 2, 1, 3, 3, 1, 1, 1, 6239077365a9SGeert Uytterhoeven 1, 1, 1, 3, 2, 2, 3), 6240077365a9SGeert Uytterhoeven GROUP( 6241*d3fcaad6SGeert Uytterhoeven /* IP13_31 [1] RESERVED */ 6242077365a9SGeert Uytterhoeven /* IP13_30_28 [3] */ 6243077365a9SGeert Uytterhoeven FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_I2C1_SCL_C, 6244077365a9SGeert Uytterhoeven 0, 0, 0, 0, 6245077365a9SGeert Uytterhoeven /* IP13_27 [1] */ 6246077365a9SGeert Uytterhoeven FN_SD1_DATA3, FN_IERX_B, 6247077365a9SGeert Uytterhoeven /* IP13_26 [1] */ 6248077365a9SGeert Uytterhoeven FN_SD1_DATA2, FN_IECLK_B, 6249077365a9SGeert Uytterhoeven /* IP13_25 [1] */ 6250077365a9SGeert Uytterhoeven FN_SD1_DATA1, FN_IETX_B, 6251077365a9SGeert Uytterhoeven /* IP13_24_23 [2] */ 6252077365a9SGeert Uytterhoeven FN_SD1_DATA0, FN_SPEEDIN_B, 0, 0, 6253077365a9SGeert Uytterhoeven /* IP13_22 [1] */ 6254077365a9SGeert Uytterhoeven FN_SD1_CMD, FN_REMOCON_B, 6255077365a9SGeert Uytterhoeven /* IP13_21_19 [3] */ 6256077365a9SGeert Uytterhoeven FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F, 6257077365a9SGeert Uytterhoeven FN_SCIFA5_RXD_B, FN_RX3_C, 6258077365a9SGeert Uytterhoeven 0, 0, 6259077365a9SGeert Uytterhoeven /* IP13_18_16 [3] */ 6260077365a9SGeert Uytterhoeven FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F, 6261077365a9SGeert Uytterhoeven FN_SCIFA5_TXD_B, FN_TX3_C, 6262077365a9SGeert Uytterhoeven 0, 0, 6263077365a9SGeert Uytterhoeven /* IP13_15 [1] */ 6264077365a9SGeert Uytterhoeven FN_SD0_DATA3, FN_SSL_B, 6265077365a9SGeert Uytterhoeven /* IP13_14 [1] */ 6266077365a9SGeert Uytterhoeven FN_SD0_DATA2, FN_IO3_B, 6267077365a9SGeert Uytterhoeven /* IP13_13 [1] */ 6268077365a9SGeert Uytterhoeven FN_SD0_DATA1, FN_IO2_B, 6269077365a9SGeert Uytterhoeven /* IP13_12 [1] */ 6270077365a9SGeert Uytterhoeven FN_SD0_DATA0, FN_MISO_IO1_B, 6271077365a9SGeert Uytterhoeven /* IP13_11 [1] */ 6272077365a9SGeert Uytterhoeven FN_SD0_CMD, FN_MOSI_IO0_B, 6273077365a9SGeert Uytterhoeven /* IP13_10 [1] */ 6274077365a9SGeert Uytterhoeven FN_SD0_CLK, FN_SPCLK_B, 6275077365a9SGeert Uytterhoeven /* IP13_9_7 [3] */ 6276077365a9SGeert Uytterhoeven FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B, 6277077365a9SGeert Uytterhoeven FN_ADICHS2_B, FN_MSIOF0_TXD_C, 6278077365a9SGeert Uytterhoeven 0, 0, 0, 6279077365a9SGeert Uytterhoeven /* IP13_6_5 [2] */ 6280077365a9SGeert Uytterhoeven FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C, 6281077365a9SGeert Uytterhoeven /* IP13_4_3 [2] */ 6282077365a9SGeert Uytterhoeven FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C, 6283077365a9SGeert Uytterhoeven /* IP13_2_0 [3] */ 6284077365a9SGeert Uytterhoeven FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C, 6285077365a9SGeert Uytterhoeven FN_ADICLK_B, FN_MSIOF0_SS1_C, 6286077365a9SGeert Uytterhoeven 0, 0, 0, )) 6287077365a9SGeert Uytterhoeven }, 6288077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32, 6289077365a9SGeert Uytterhoeven GROUP(3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 6290077365a9SGeert Uytterhoeven 1, 1, 2), 6291077365a9SGeert Uytterhoeven GROUP( 6292077365a9SGeert Uytterhoeven /* IP14_31_29 [3] */ 6293077365a9SGeert Uytterhoeven FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E, 6294077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N_C, FN_IIC0_SDA_C, FN_VI1_G5_B, 0, 6295077365a9SGeert Uytterhoeven /* IP14_28_26 [3] */ 6296077365a9SGeert Uytterhoeven FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E, 6297077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N_C, FN_IIC0_SCL_C, FN_VI1_G4_B, 0, 6298077365a9SGeert Uytterhoeven /* IP14_25_23 [3] */ 6299077365a9SGeert Uytterhoeven FN_MSIOF0_RXD, FN_ADICHS0, 0, FN_VI1_DATA0_C, FN_VI1_G3_B, 6300077365a9SGeert Uytterhoeven 0, 0, 0, 6301077365a9SGeert Uytterhoeven /* IP14_22_20 [3] */ 6302077365a9SGeert Uytterhoeven FN_MSIOF0_TXD, FN_ADICLK, 0, FN_VI1_FIELD_C, FN_VI1_G2_B, 6303077365a9SGeert Uytterhoeven 0, 0, 0, 6304077365a9SGeert Uytterhoeven /* IP14_19_17 [3] */ 6305077365a9SGeert Uytterhoeven FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, 0, 6306077365a9SGeert Uytterhoeven FN_VI1_CLKENB_C, FN_VI1_G1_B, 6307077365a9SGeert Uytterhoeven 0, 0, 6308077365a9SGeert Uytterhoeven /* IP14_16_14 [3] */ 6309077365a9SGeert Uytterhoeven FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, 0, 6310077365a9SGeert Uytterhoeven FN_VI1_CLK_C, FN_VI1_G0_B, 6311077365a9SGeert Uytterhoeven 0, 0, 6312077365a9SGeert Uytterhoeven /* IP14_13_11 [3] */ 6313077365a9SGeert Uytterhoeven FN_SD2_WP, FN_MMC_D5, FN_IIC1_SDA_C, FN_RX5_B, FN_SCIFA5_RXD_C, 6314077365a9SGeert Uytterhoeven 0, 0, 0, 6315077365a9SGeert Uytterhoeven /* IP14_10_8 [3] */ 6316077365a9SGeert Uytterhoeven FN_SD2_CD, FN_MMC_D4, FN_IIC1_SCL_C, FN_TX5_B, FN_SCIFA5_TXD_C, 6317077365a9SGeert Uytterhoeven 0, 0, 0, 6318077365a9SGeert Uytterhoeven /* IP14_7 [1] */ 6319077365a9SGeert Uytterhoeven FN_SD2_DATA3, FN_MMC_D3, 6320077365a9SGeert Uytterhoeven /* IP14_6 [1] */ 6321077365a9SGeert Uytterhoeven FN_SD2_DATA2, FN_MMC_D2, 6322077365a9SGeert Uytterhoeven /* IP14_5 [1] */ 6323077365a9SGeert Uytterhoeven FN_SD2_DATA1, FN_MMC_D1, 6324077365a9SGeert Uytterhoeven /* IP14_4 [1] */ 6325077365a9SGeert Uytterhoeven FN_SD2_DATA0, FN_MMC_D0, 6326077365a9SGeert Uytterhoeven /* IP14_3 [1] */ 6327077365a9SGeert Uytterhoeven FN_SD2_CMD, FN_MMC_CMD, 6328077365a9SGeert Uytterhoeven /* IP14_2 [1] */ 6329077365a9SGeert Uytterhoeven FN_SD2_CLK, FN_MMC_CLK, 6330077365a9SGeert Uytterhoeven /* IP14_1_0 [2] */ 6331077365a9SGeert Uytterhoeven FN_SD1_WP, FN_PWM1_B, FN_I2C1_SDA_C, 0, )) 6332077365a9SGeert Uytterhoeven }, 6333077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32, 6334*d3fcaad6SGeert Uytterhoeven GROUP(-2, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2), 6335077365a9SGeert Uytterhoeven GROUP( 6336*d3fcaad6SGeert Uytterhoeven /* IP15_31_30 [2] RESERVED */ 6337077365a9SGeert Uytterhoeven /* IP15_29_27 [3] */ 6338077365a9SGeert Uytterhoeven FN_HTX0, FN_SCIFB0_TXD, 0, FN_GLO_SCLK_C, 6339077365a9SGeert Uytterhoeven FN_CAN0_TX_B, FN_VI1_DATA5_C, 6340077365a9SGeert Uytterhoeven 0, 0, 6341077365a9SGeert Uytterhoeven /* IP15_26_24 [3] */ 6342077365a9SGeert Uytterhoeven FN_HRX0, FN_SCIFB0_RXD, 0, FN_GLO_Q1_C, 6343077365a9SGeert Uytterhoeven FN_CAN0_RX_B, FN_VI1_DATA4_C, 6344077365a9SGeert Uytterhoeven 0, 0, 6345077365a9SGeert Uytterhoeven /* IP15_23_21 [3] */ 6346077365a9SGeert Uytterhoeven FN_HSCK0, FN_SCIFB0_SCK, 0, FN_GLO_Q0_C, FN_CAN_CLK, 6347077365a9SGeert Uytterhoeven FN_TCLK2, FN_VI1_DATA3_C, 0, 6348077365a9SGeert Uytterhoeven /* IP15_20_18 [3] */ 6349077365a9SGeert Uytterhoeven FN_HRTS0_N, FN_SCIFB0_RTS_N, 0, FN_GLO_I1_C, FN_VI1_DATA2_C, 6350077365a9SGeert Uytterhoeven 0, 0, 0, 6351077365a9SGeert Uytterhoeven /* IP15_17_15 [3] */ 6352077365a9SGeert Uytterhoeven FN_HCTS0_N, FN_SCIFB0_CTS_N, 0, FN_GLO_I0_C, 6353077365a9SGeert Uytterhoeven FN_TCLK1, FN_VI1_DATA1_C, 6354077365a9SGeert Uytterhoeven 0, 0, 6355077365a9SGeert Uytterhoeven /* IP15_14_12 [3] */ 6356077365a9SGeert Uytterhoeven FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6, 6357077365a9SGeert Uytterhoeven FN_VI1_G7_B, FN_SCIFA3_SCK_C, 6358077365a9SGeert Uytterhoeven 0, 0, 6359077365a9SGeert Uytterhoeven /* IP15_11_9 [3] */ 6360077365a9SGeert Uytterhoeven FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5, 6361077365a9SGeert Uytterhoeven FN_VI1_G6_B, FN_SCIFA3_RXD_C, 6362077365a9SGeert Uytterhoeven 0, 0, 6363077365a9SGeert Uytterhoeven /* IP15_8_6 [3] */ 6364077365a9SGeert Uytterhoeven FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B, 6365077365a9SGeert Uytterhoeven FN_PWM5_B, FN_SCIFA3_TXD_C, 6366077365a9SGeert Uytterhoeven 0, 0, 0, 6367077365a9SGeert Uytterhoeven /* IP15_5_4 [2] */ 6368077365a9SGeert Uytterhoeven FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, 0, 6369077365a9SGeert Uytterhoeven /* IP15_3_2 [2] */ 6370077365a9SGeert Uytterhoeven FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, 0, 6371077365a9SGeert Uytterhoeven /* IP15_1_0 [2] */ 6372077365a9SGeert Uytterhoeven FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, 0, )) 6373077365a9SGeert Uytterhoeven }, 6374077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32, 6375*d3fcaad6SGeert Uytterhoeven GROUP(-20, 2, 2, 2, 3, 3), 6376077365a9SGeert Uytterhoeven GROUP( 6377*d3fcaad6SGeert Uytterhoeven /* RESERVED [20] */ 6378077365a9SGeert Uytterhoeven /* IP16_11_10 [2] */ 6379077365a9SGeert Uytterhoeven FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B, 6380077365a9SGeert Uytterhoeven /* IP16_9_8 [2] */ 6381077365a9SGeert Uytterhoeven FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B, 6382077365a9SGeert Uytterhoeven /* IP16_7_6 [2] */ 6383077365a9SGeert Uytterhoeven FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CLK, FN_GLO_RFON_C, 6384077365a9SGeert Uytterhoeven /* IP16_5_3 [3] */ 6385077365a9SGeert Uytterhoeven FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, 6386077365a9SGeert Uytterhoeven FN_GLO_SS_C, FN_VI1_DATA7_C, 6387077365a9SGeert Uytterhoeven 0, 0, 0, 6388077365a9SGeert Uytterhoeven /* IP16_2_0 [3] */ 6389077365a9SGeert Uytterhoeven FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, 6390077365a9SGeert Uytterhoeven FN_GLO_SDATA_C, FN_VI1_DATA6_C, 6391077365a9SGeert Uytterhoeven 0, 0, 0, )) 6392077365a9SGeert Uytterhoeven }, 6393077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, 6394*d3fcaad6SGeert Uytterhoeven GROUP(-1, 2, 2, 2, 3, 2, 1, 1, 1, 1, 3, -2, 6395*d3fcaad6SGeert Uytterhoeven 2, -2, 1, 2, 2, 2), 6396077365a9SGeert Uytterhoeven GROUP( 6397077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6398077365a9SGeert Uytterhoeven /* SEL_SCIF1 [2] */ 6399077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 6400077365a9SGeert Uytterhoeven /* SEL_SCIFB [2] */ 6401077365a9SGeert Uytterhoeven FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, 6402077365a9SGeert Uytterhoeven /* SEL_SCIFB2 [2] */ 6403077365a9SGeert Uytterhoeven FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, 6404077365a9SGeert Uytterhoeven FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, 6405077365a9SGeert Uytterhoeven /* SEL_SCIFB1 [3] */ 6406077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, 6407077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, 6408077365a9SGeert Uytterhoeven 0, 0, 0, 0, 6409077365a9SGeert Uytterhoeven /* SEL_SCIFA1 [2] */ 6410077365a9SGeert Uytterhoeven FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0, 6411077365a9SGeert Uytterhoeven /* SEL_SSI9 [1] */ 6412077365a9SGeert Uytterhoeven FN_SEL_SSI9_0, FN_SEL_SSI9_1, 6413077365a9SGeert Uytterhoeven /* SEL_SCFA [1] */ 6414077365a9SGeert Uytterhoeven FN_SEL_SCFA_0, FN_SEL_SCFA_1, 6415077365a9SGeert Uytterhoeven /* SEL_QSP [1] */ 6416077365a9SGeert Uytterhoeven FN_SEL_QSP_0, FN_SEL_QSP_1, 6417077365a9SGeert Uytterhoeven /* SEL_SSI7 [1] */ 6418077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, 6419077365a9SGeert Uytterhoeven /* SEL_HSCIF1 [3] */ 6420077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, 6421077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4, 6422077365a9SGeert Uytterhoeven 0, 0, 0, 6423077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6424077365a9SGeert Uytterhoeven /* SEL_VI1 [2] */ 6425077365a9SGeert Uytterhoeven FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0, 6426077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6427077365a9SGeert Uytterhoeven /* SEL_TMU [1] */ 6428077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 6429077365a9SGeert Uytterhoeven /* SEL_LBS [2] */ 6430077365a9SGeert Uytterhoeven FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, 6431077365a9SGeert Uytterhoeven /* SEL_TSIF0 [2] */ 6432077365a9SGeert Uytterhoeven FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, 6433077365a9SGeert Uytterhoeven /* SEL_SOF0 [2] */ 6434077365a9SGeert Uytterhoeven FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, )) 6435077365a9SGeert Uytterhoeven }, 6436077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, 6437*d3fcaad6SGeert Uytterhoeven GROUP(3, -1, 1, 3, 2, -1, 1, 2, -2, 1, 3, 2, 6438*d3fcaad6SGeert Uytterhoeven -1, 2, 2, 2, 1, -1, 1), 6439077365a9SGeert Uytterhoeven GROUP( 6440077365a9SGeert Uytterhoeven /* SEL_SCIF0 [3] */ 6441077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, 6442077365a9SGeert Uytterhoeven FN_SEL_SCIF0_3, FN_SEL_SCIF0_4, 6443077365a9SGeert Uytterhoeven 0, 0, 0, 6444077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6445077365a9SGeert Uytterhoeven /* SEL_SCIF [1] */ 6446077365a9SGeert Uytterhoeven FN_SEL_SCIF_0, FN_SEL_SCIF_1, 6447077365a9SGeert Uytterhoeven /* SEL_CAN0 [3] */ 6448077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 6449077365a9SGeert Uytterhoeven FN_SEL_CAN0_4, FN_SEL_CAN0_5, 6450077365a9SGeert Uytterhoeven 0, 0, 6451077365a9SGeert Uytterhoeven /* SEL_CAN1 [2] */ 6452077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, 6453077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6454077365a9SGeert Uytterhoeven /* SEL_SCIFA2 [1] */ 6455077365a9SGeert Uytterhoeven FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, 6456077365a9SGeert Uytterhoeven /* SEL_SCIF4 [2] */ 6457077365a9SGeert Uytterhoeven FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0, 6458077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6459077365a9SGeert Uytterhoeven /* SEL_ADG [1] */ 6460077365a9SGeert Uytterhoeven FN_SEL_ADG_0, FN_SEL_ADG_1, 6461077365a9SGeert Uytterhoeven /* SEL_FM [3] */ 6462077365a9SGeert Uytterhoeven FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, 6463077365a9SGeert Uytterhoeven FN_SEL_FM_3, FN_SEL_FM_4, 6464077365a9SGeert Uytterhoeven 0, 0, 0, 6465077365a9SGeert Uytterhoeven /* SEL_SCIFA5 [2] */ 6466077365a9SGeert Uytterhoeven FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0, 6467077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6468077365a9SGeert Uytterhoeven /* SEL_GPS [2] */ 6469077365a9SGeert Uytterhoeven FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, 6470077365a9SGeert Uytterhoeven /* SEL_SCIFA4 [2] */ 6471077365a9SGeert Uytterhoeven FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0, 6472077365a9SGeert Uytterhoeven /* SEL_SCIFA3 [2] */ 6473077365a9SGeert Uytterhoeven FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0, 6474077365a9SGeert Uytterhoeven /* SEL_SIM [1] */ 6475077365a9SGeert Uytterhoeven FN_SEL_SIM_0, FN_SEL_SIM_1, 6476077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6477077365a9SGeert Uytterhoeven /* SEL_SSI8 [1] */ 6478077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, )) 6479077365a9SGeert Uytterhoeven }, 6480077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, 6481*d3fcaad6SGeert Uytterhoeven GROUP(2, 2, 2, 2, 2, 2, 2, 2, 1, 1, -2, 2, 6482*d3fcaad6SGeert Uytterhoeven 3, 2, -5), 6483077365a9SGeert Uytterhoeven GROUP( 6484077365a9SGeert Uytterhoeven /* SEL_HSCIF2 [2] */ 6485077365a9SGeert Uytterhoeven FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, 6486077365a9SGeert Uytterhoeven FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, 6487077365a9SGeert Uytterhoeven /* SEL_CANCLK [2] */ 6488077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, 6489077365a9SGeert Uytterhoeven FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, 6490077365a9SGeert Uytterhoeven /* SEL_IIC1 [2] */ 6491077365a9SGeert Uytterhoeven FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0, 6492077365a9SGeert Uytterhoeven /* SEL_IIC0 [2] */ 6493077365a9SGeert Uytterhoeven FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0, 6494077365a9SGeert Uytterhoeven /* SEL_I2C4 [2] */ 6495077365a9SGeert Uytterhoeven FN_SEL_I2C4_0, FN_SEL_I2C4_1, FN_SEL_I2C4_2, 0, 6496077365a9SGeert Uytterhoeven /* SEL_I2C3 [2] */ 6497077365a9SGeert Uytterhoeven FN_SEL_I2C3_0, FN_SEL_I2C3_1, FN_SEL_I2C3_2, FN_SEL_I2C3_3, 6498077365a9SGeert Uytterhoeven /* SEL_SCIF3 [2] */ 6499077365a9SGeert Uytterhoeven FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, 6500077365a9SGeert Uytterhoeven /* SEL_IEB [2] */ 6501077365a9SGeert Uytterhoeven FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, 6502077365a9SGeert Uytterhoeven /* SEL_MMC [1] */ 6503077365a9SGeert Uytterhoeven FN_SEL_MMC_0, FN_SEL_MMC_1, 6504077365a9SGeert Uytterhoeven /* SEL_SCIF5 [1] */ 6505077365a9SGeert Uytterhoeven FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, 6506077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6507077365a9SGeert Uytterhoeven /* SEL_I2C2 [2] */ 6508077365a9SGeert Uytterhoeven FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, 6509077365a9SGeert Uytterhoeven /* SEL_I2C1 [3] */ 6510077365a9SGeert Uytterhoeven FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3, 6511077365a9SGeert Uytterhoeven FN_SEL_I2C1_4, 6512077365a9SGeert Uytterhoeven 0, 0, 0, 6513077365a9SGeert Uytterhoeven /* SEL_I2C0 [2] */ 6514077365a9SGeert Uytterhoeven FN_SEL_I2C0_0, FN_SEL_I2C0_1, FN_SEL_I2C0_2, 0, 6515*d3fcaad6SGeert Uytterhoeven /* RESERVED [5] */ )) 6516077365a9SGeert Uytterhoeven }, 6517077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32, 6518*d3fcaad6SGeert Uytterhoeven GROUP(3, 2, 2, -1, 1, 1, 1, 3, -4, 3, -1, 6519*d3fcaad6SGeert Uytterhoeven 1, 1, 2, -6), 6520077365a9SGeert Uytterhoeven GROUP( 6521077365a9SGeert Uytterhoeven /* SEL_SOF1 [3] */ 6522077365a9SGeert Uytterhoeven FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, 6523077365a9SGeert Uytterhoeven FN_SEL_SOF1_4, 6524077365a9SGeert Uytterhoeven 0, 0, 0, 6525077365a9SGeert Uytterhoeven /* SEL_HSCIF0 [2] */ 6526077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0, 6527077365a9SGeert Uytterhoeven /* SEL_DIS [2] */ 6528077365a9SGeert Uytterhoeven FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0, 6529077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6530077365a9SGeert Uytterhoeven /* SEL_RAD [1] */ 6531077365a9SGeert Uytterhoeven FN_SEL_RAD_0, FN_SEL_RAD_1, 6532077365a9SGeert Uytterhoeven /* SEL_RCN [1] */ 6533077365a9SGeert Uytterhoeven FN_SEL_RCN_0, FN_SEL_RCN_1, 6534077365a9SGeert Uytterhoeven /* SEL_RSP [1] */ 6535077365a9SGeert Uytterhoeven FN_SEL_RSP_0, FN_SEL_RSP_1, 6536077365a9SGeert Uytterhoeven /* SEL_SCIF2 [3] */ 6537077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 6538077365a9SGeert Uytterhoeven FN_SEL_SCIF2_3, FN_SEL_SCIF2_4, 6539077365a9SGeert Uytterhoeven 0, 0, 0, 6540077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6541077365a9SGeert Uytterhoeven /* RESERVED [2] */ 6542077365a9SGeert Uytterhoeven /* SEL_SOF2 [3] */ 6543077365a9SGeert Uytterhoeven FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, 6544077365a9SGeert Uytterhoeven FN_SEL_SOF2_3, FN_SEL_SOF2_4, 6545077365a9SGeert Uytterhoeven 0, 0, 0, 6546077365a9SGeert Uytterhoeven /* RESERVED [1] */ 6547077365a9SGeert Uytterhoeven /* SEL_SSI1 [1] */ 6548077365a9SGeert Uytterhoeven FN_SEL_SSI1_0, FN_SEL_SSI1_1, 6549077365a9SGeert Uytterhoeven /* SEL_SSI0 [1] */ 6550077365a9SGeert Uytterhoeven FN_SEL_SSI0_0, FN_SEL_SSI0_1, 6551077365a9SGeert Uytterhoeven /* SEL_SSP [2] */ 6552077365a9SGeert Uytterhoeven FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0, 6553*d3fcaad6SGeert Uytterhoeven /* RESERVED [6] */ )) 6554077365a9SGeert Uytterhoeven }, 6555077365a9SGeert Uytterhoeven { }, 6556077365a9SGeert Uytterhoeven }; 6557077365a9SGeert Uytterhoeven 6558b67fc1c6SGeert Uytterhoeven static int r8a7791_pin_to_pocctrl(unsigned int pin, u32 *pocctrl) 6559077365a9SGeert Uytterhoeven { 6560077365a9SGeert Uytterhoeven if (pin < RCAR_GP_PIN(6, 0) || pin > RCAR_GP_PIN(6, 23)) 6561077365a9SGeert Uytterhoeven return -EINVAL; 6562077365a9SGeert Uytterhoeven 6563077365a9SGeert Uytterhoeven *pocctrl = 0xe606008c; 6564077365a9SGeert Uytterhoeven 6565077365a9SGeert Uytterhoeven return 31 - (pin & 0x1f); 6566077365a9SGeert Uytterhoeven } 6567077365a9SGeert Uytterhoeven 656861232cd6SGeert Uytterhoeven static const struct pinmux_bias_reg pinmux_bias_regs[] = { 656961232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR0", 0xe6060100, "N/A", 0) { 657061232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(1, 4), /* A20 */ 657161232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(1, 5), /* A21 */ 657261232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(1, 6), /* A22 */ 657361232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(1, 7), /* A23 */ 657461232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(1, 8), /* A24 */ 657561232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(6, 31), /* DU0_DOTCLKIN */ 657661232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(0, 0), /* D0 */ 657761232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(0, 1), /* D1 */ 657861232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(0, 2), /* D2 */ 657961232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(0, 3), /* D3 */ 658061232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(0, 4), /* D4 */ 658161232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(0, 5), /* D5 */ 658261232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(0, 6), /* D6 */ 658361232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(0, 7), /* D7 */ 658461232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(0, 8), /* D8 */ 658561232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(0, 9), /* D9 */ 658661232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(0, 10), /* D10 */ 658761232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(0, 11), /* D11 */ 658861232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(0, 12), /* D12 */ 658961232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(0, 13), /* D13 */ 659061232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(0, 14), /* D14 */ 659161232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(0, 15), /* D15 */ 659261232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(0, 16), /* A0 */ 659361232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(0, 17), /* A1 */ 659461232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(0, 18), /* A2 */ 659561232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(0, 19), /* A3 */ 659661232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(0, 20), /* A4 */ 659761232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(0, 21), /* A5 */ 659861232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(0, 22), /* A6 */ 659961232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(0, 23), /* A7 */ 660061232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(0, 24), /* A8 */ 660161232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(0, 25), /* A9 */ 660261232cd6SGeert Uytterhoeven } }, 660361232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR1", 0xe6060104, "N/A", 0) { 660461232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(0, 26), /* A10 */ 660561232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(0, 27), /* A11 */ 660661232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(0, 28), /* A12 */ 660761232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(0, 29), /* A13 */ 660861232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(0, 30), /* A14 */ 660961232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(0, 31), /* A15 */ 661061232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(1, 0), /* A16 */ 661161232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(1, 1), /* A17 */ 661261232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(1, 2), /* A18 */ 661361232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(1, 3), /* A19 */ 661461232cd6SGeert Uytterhoeven [10] = PIN_TRST_N, /* TRST# */ 661561232cd6SGeert Uytterhoeven [11] = PIN_TCK, /* TCK */ 661661232cd6SGeert Uytterhoeven [12] = PIN_TMS, /* TMS */ 661761232cd6SGeert Uytterhoeven [13] = PIN_TDI, /* TDI */ 661861232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(1, 11), /* CS1#/A26 */ 661961232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(1, 12), /* EX_CS0# */ 662061232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(1, 13), /* EX_CS1# */ 662161232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(1, 14), /* EX_CS2# */ 662261232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(1, 15), /* EX_CS3# */ 662361232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(1, 16), /* EX_CS4# */ 662461232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(1, 17), /* EX_CS5# */ 662561232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(1, 18), /* BS# */ 662661232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(1, 19), /* RD# */ 662761232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(1, 20), /* RD/WR# */ 662861232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(1, 21), /* WE0# */ 662961232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(1, 22), /* WE1# */ 663061232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 23), /* EX_WAIT0 */ 663161232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(1, 24), /* DREQ0 */ 663261232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(1, 25), /* DACK0 */ 663361232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(5, 31), /* SPEEDIN */ 663461232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(2, 0), /* SSI_SCK0129 */ 663561232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(2, 1), /* SSI_WS0129 */ 663661232cd6SGeert Uytterhoeven } }, 663761232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR2", 0xe6060108, "N/A", 0) { 663861232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(2, 2), /* SSI_SDATA0 */ 663961232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(2, 3), /* SSI_SCK1 */ 664061232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(2, 4), /* SSI_WS1 */ 664161232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(2, 5), /* SSI_SDATA1 */ 664261232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(2, 6), /* SSI_SCK2 */ 664361232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(2, 7), /* SSI_WS2 */ 664461232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(2, 8), /* SSI_SDATA2 */ 664561232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(2, 9), /* SSI_SCK34 */ 664661232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(2, 10), /* SSI_WS34 */ 664761232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(2, 11), /* SSI_SDATA3 */ 664861232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(2, 12), /* SSI_SCK4 */ 664961232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(2, 13), /* SSI_WS4 */ 665061232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(2, 14), /* SSI_SDATA4 */ 665161232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(2, 15), /* SSI_SCK5 */ 665261232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(2, 16), /* SSI_WS5 */ 665361232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(2, 17), /* SSI_SDATA5 */ 665461232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(2, 18), /* SSI_SCK6 */ 665561232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(2, 19), /* SSI_WS6 */ 665661232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(2, 20), /* SSI_SDATA6 */ 665761232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(2, 21), /* SSI_SCK78 */ 665861232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(2, 22), /* SSI_WS78 */ 665961232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(2, 23), /* SSI_SDATA7 */ 666061232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(2, 24), /* SSI_SDATA8 */ 666161232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(2, 25), /* SSI_SCK9 */ 666261232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(2, 26), /* SSI_WS9 */ 666361232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(2, 27), /* SSI_SDATA9 */ 666461232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(2, 28), /* AUDIO_CLKA */ 666561232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(2, 29), /* AUDIO_CLKB */ 666661232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(2, 30), /* AUDIO_CLKC */ 666761232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(2, 31), /* AUDIO_CLKOUT */ 666861232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(7, 10), /* IRQ0 */ 666961232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(7, 11), /* IRQ1 */ 667061232cd6SGeert Uytterhoeven } }, 667161232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR3", 0xe606010c, "N/A", 0) { 667261232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(7, 12), /* IRQ2 */ 667361232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(7, 13), /* IRQ3 */ 667461232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(7, 14), /* IRQ4 */ 667561232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(7, 15), /* IRQ5 */ 667661232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(7, 16), /* IRQ6 */ 667761232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(7, 17), /* IRQ7 */ 667861232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(7, 18), /* IRQ8 */ 667961232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(7, 19), /* IRQ9 */ 668061232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(3, 0), /* DU1_DR0 */ 668161232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(3, 1), /* DU1_DR1 */ 668261232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(3, 2), /* DU1_DR2 */ 668361232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(3, 3), /* DU1_DR3 */ 668461232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(3, 4), /* DU1_DR4 */ 668561232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(3, 5), /* DU1_DR5 */ 668661232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(3, 6), /* DU1_DR6 */ 668761232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(3, 7), /* DU1_DR7 */ 668861232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(3, 8), /* DU1_DG0 */ 668961232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(3, 9), /* DU1_DG1 */ 669061232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(3, 10), /* DU1_DG2 */ 669161232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(3, 11), /* DU1_DG3 */ 669261232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(3, 12), /* DU1_DG4 */ 669361232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(3, 13), /* DU1_DG5 */ 669461232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(3, 14), /* DU1_DG6 */ 669561232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(3, 15), /* DU1_DG7 */ 669661232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(3, 16), /* DU1_DB0 */ 669761232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(3, 17), /* DU1_DB1 */ 669861232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(3, 18), /* DU1_DB2 */ 669961232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(3, 19), /* DU1_DB3 */ 670061232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(3, 20), /* DU1_DB4 */ 670161232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(3, 21), /* DU1_DB5 */ 670261232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(3, 22), /* DU1_DB6 */ 670361232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(3, 23), /* DU1_DB7 */ 670461232cd6SGeert Uytterhoeven } }, 670561232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR4", 0xe6060110, "N/A", 0) { 670661232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(3, 24), /* DU1_DOTCLKIN */ 670761232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(3, 25), /* DU1_DOTCLKOUT0 */ 670861232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(3, 26), /* DU1_DOTCLKOUT1 */ 670961232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(3, 27), /* DU1_EXHSYNC_DU1_HSYNC */ 671061232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(3, 28), /* DU1_EXVSYNC_DU1_VSYNC */ 671161232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(3, 29), /* DU1_EXODDF_DU1_ODDF_DISP_CDE */ 671261232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(3, 30), /* DU1_DISP */ 671361232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(3, 31), /* DU1_CDE */ 671461232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(4, 0), /* VI0_CLK */ 671561232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(4, 1), /* VI0_CLKENB */ 671661232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(4, 2), /* VI0_FIELD */ 671761232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(4, 3), /* VI0_HSYNC# */ 671861232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(4, 4), /* VI0_VSYNC# */ 671961232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(4, 5), /* VI0_DATA0_VI0_B0 */ 672061232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(4, 6), /* VI0_DATA1_VI0_B1 */ 672161232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(4, 7), /* VI0_DATA2_VI0_B2 */ 672261232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(4, 8), /* VI0_DATA3_VI0_B3 */ 672361232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(4, 9), /* VI0_DATA4_VI0_B4 */ 672461232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(4, 10), /* VI0_DATA5_VI0_B5 */ 672561232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(4, 11), /* VI0_DATA6_VI0_B6 */ 672661232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(4, 12), /* VI0_DATA7_VI0_B7 */ 672761232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(4, 13), /* VI0_G0 */ 672861232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(4, 14), /* VI0_G1 */ 672961232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(4, 15), /* VI0_G2 */ 673061232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(4, 16), /* VI0_G3 */ 673161232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(4, 17), /* VI0_G4 */ 673261232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(4, 18), /* VI0_G5 */ 673361232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(4, 19), /* VI0_G6 */ 673461232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(4, 20), /* VI0_G7 */ 673561232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(4, 21), /* VI0_R0 */ 673661232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(4, 22), /* VI0_R1 */ 673761232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(4, 23), /* VI0_R2 */ 673861232cd6SGeert Uytterhoeven } }, 673961232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR5", 0xe6060114, "N/A", 0) { 674061232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(4, 24), /* VI0_R3 */ 674161232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(4, 25), /* VI0_R4 */ 674261232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 26), /* VI0_R5 */ 674361232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 27), /* VI0_R6 */ 674461232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 28), /* VI0_R7 */ 674561232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(5, 0), /* VI1_HSYNC# */ 674661232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(5, 1), /* VI1_VSYNC# */ 674761232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 2), /* VI1_CLKENB */ 674861232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(5, 3), /* VI1_FIELD */ 674961232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(5, 4), /* VI1_CLK */ 675061232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(5, 5), /* VI1_DATA0 */ 675161232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(5, 6), /* VI1_DATA1 */ 675261232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(5, 7), /* VI1_DATA2 */ 675361232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(5, 8), /* VI1_DATA3 */ 675461232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(5, 9), /* VI1_DATA4 */ 675561232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(5, 10), /* VI1_DATA5 */ 675661232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(5, 11), /* VI1_DATA6 */ 675761232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(5, 12), /* VI1_DATA7 */ 675861232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(5, 13), /* ETH_MDIO */ 675961232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(5, 14), /* ETH_CRS_DV */ 676061232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(5, 15), /* ETH_RX_ER */ 676161232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(5, 16), /* ETH_RXD0 */ 676261232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(5, 17), /* ETH_RXD1 */ 676361232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(5, 18), /* ETH_LINK */ 676461232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(5, 19), /* ETH_REFCLK */ 676561232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(5, 20), /* ETH_TXD1 */ 676661232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(5, 21), /* ETH_TX_EN */ 676761232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(5, 22), /* ETH_MAGIC */ 676861232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(5, 23), /* ETH_TXD0 */ 676961232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(5, 24), /* ETH_MDC */ 677061232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(5, 25), /* STP_IVCXO27_0 */ 677161232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(5, 26), /* STP_ISCLK_0 */ 677261232cd6SGeert Uytterhoeven } }, 677361232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR6", 0xe6060118, "N/A", 0) { 677461232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(5, 27), /* STP_ISD_0 */ 677561232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(5, 28), /* STP_ISEN_0 */ 677661232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(5, 29), /* STP_ISSYNC_0 */ 677761232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(5, 30), /* STP_OPWM_0 */ 677861232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(6, 0), /* SD0_CLK */ 677961232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(6, 1), /* SD0_CMD */ 678061232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(6, 2), /* SD0_DATA0 */ 678161232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(6, 3), /* SD0_DATA1 */ 678261232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(6, 4), /* SD0_DATA2 */ 678361232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(6, 5), /* SD0_DATA3 */ 678461232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(6, 6), /* SD0_CD */ 678561232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(6, 7), /* SD0_WP */ 678661232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(6, 8), /* SD2_CLK */ 678761232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(6, 9), /* SD2_CMD */ 678861232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(6, 10), /* SD2_DATA0 */ 678961232cd6SGeert Uytterhoeven [15] = RCAR_GP_PIN(6, 11), /* SD2_DATA1 */ 679061232cd6SGeert Uytterhoeven [16] = RCAR_GP_PIN(6, 12), /* SD2_DATA2 */ 679161232cd6SGeert Uytterhoeven [17] = RCAR_GP_PIN(6, 13), /* SD2_DATA3 */ 679261232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(6, 14), /* SD2_CD */ 679361232cd6SGeert Uytterhoeven [19] = RCAR_GP_PIN(6, 15), /* SD2_WP */ 679461232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(6, 16), /* SD3_CLK */ 679561232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(6, 17), /* SD3_CMD */ 679661232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(6, 18), /* SD3_DATA0 */ 679761232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(6, 19), /* SD3_DATA1 */ 679861232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(6, 20), /* SD3_DATA2 */ 679961232cd6SGeert Uytterhoeven [25] = RCAR_GP_PIN(6, 21), /* SD3_DATA3 */ 680061232cd6SGeert Uytterhoeven [26] = RCAR_GP_PIN(6, 22), /* SD3_CD */ 680161232cd6SGeert Uytterhoeven [27] = RCAR_GP_PIN(6, 23), /* SD3_WP */ 680261232cd6SGeert Uytterhoeven [28] = RCAR_GP_PIN(6, 24), /* MSIOF0_SCK */ 680361232cd6SGeert Uytterhoeven [29] = RCAR_GP_PIN(6, 25), /* MSIOF0_SYNC */ 680461232cd6SGeert Uytterhoeven [30] = RCAR_GP_PIN(6, 26), /* MSIOF0_TXD */ 680561232cd6SGeert Uytterhoeven [31] = RCAR_GP_PIN(6, 27), /* MSIOF0_RXD */ 680661232cd6SGeert Uytterhoeven } }, 680761232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR7", 0xe606011c, "N/A", 0) { 680861232cd6SGeert Uytterhoeven /* PUPR7 pull-up pins */ 680961232cd6SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(6, 28), /* MSIOF0_SS1 */ 681061232cd6SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(6, 29), /* MSIOF0_SS2 */ 681161232cd6SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 29), /* SIM0_RST */ 681261232cd6SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 30), /* SIM0_CLK */ 681361232cd6SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 31), /* SIM0_D */ 681461232cd6SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(7, 20), /* GPS_CLK */ 681561232cd6SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(7, 21), /* GPS_SIGN */ 681661232cd6SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(7, 22), /* GPS_MAG */ 681761232cd6SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(7, 0), /* HCTS0# */ 681861232cd6SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(7, 1), /* HRTS0# */ 681961232cd6SGeert Uytterhoeven [10] = RCAR_GP_PIN(7, 2), /* HSCK0 */ 682061232cd6SGeert Uytterhoeven [11] = RCAR_GP_PIN(7, 3), /* HRX0 */ 682161232cd6SGeert Uytterhoeven [12] = RCAR_GP_PIN(7, 4), /* HTX0 */ 682261232cd6SGeert Uytterhoeven [13] = RCAR_GP_PIN(7, 5), /* HRX1 */ 682361232cd6SGeert Uytterhoeven [14] = RCAR_GP_PIN(7, 6), /* HTX1 */ 682461232cd6SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 682561232cd6SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 682661232cd6SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 682761232cd6SGeert Uytterhoeven [18] = RCAR_GP_PIN(1, 9), /* A25 */ 682861232cd6SGeert Uytterhoeven [19] = SH_PFC_PIN_NONE, 682961232cd6SGeert Uytterhoeven [20] = RCAR_GP_PIN(1, 10), /* CS0# */ 683061232cd6SGeert Uytterhoeven [21] = RCAR_GP_PIN(7, 23), /* USB0_PWEN */ 683161232cd6SGeert Uytterhoeven [22] = RCAR_GP_PIN(7, 24), /* USB0_OVC */ 683261232cd6SGeert Uytterhoeven [23] = RCAR_GP_PIN(7, 25), /* USB1_PWEN */ 683361232cd6SGeert Uytterhoeven [24] = RCAR_GP_PIN(6, 30), /* USB1_OVC */ 683461232cd6SGeert Uytterhoeven [25] = PIN_AVS1, /* AVS1 */ 683561232cd6SGeert Uytterhoeven [26] = PIN_AVS2, /* AVS2 */ 683661232cd6SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 683761232cd6SGeert Uytterhoeven [28] = SH_PFC_PIN_NONE, 683861232cd6SGeert Uytterhoeven [29] = SH_PFC_PIN_NONE, 683961232cd6SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 684061232cd6SGeert Uytterhoeven [31] = SH_PFC_PIN_NONE, 684161232cd6SGeert Uytterhoeven } }, 684261232cd6SGeert Uytterhoeven { PINMUX_BIAS_REG("N/A", 0, "PUPR7", 0xe606011c) { 684361232cd6SGeert Uytterhoeven /* PUPR7 pull-down pins */ 684461232cd6SGeert Uytterhoeven [ 0] = SH_PFC_PIN_NONE, 684561232cd6SGeert Uytterhoeven [ 1] = SH_PFC_PIN_NONE, 684661232cd6SGeert Uytterhoeven [ 2] = SH_PFC_PIN_NONE, 684761232cd6SGeert Uytterhoeven [ 3] = SH_PFC_PIN_NONE, 684861232cd6SGeert Uytterhoeven [ 4] = SH_PFC_PIN_NONE, 684961232cd6SGeert Uytterhoeven [ 5] = SH_PFC_PIN_NONE, 685061232cd6SGeert Uytterhoeven [ 6] = SH_PFC_PIN_NONE, 685161232cd6SGeert Uytterhoeven [ 7] = SH_PFC_PIN_NONE, 685261232cd6SGeert Uytterhoeven [ 8] = SH_PFC_PIN_NONE, 685361232cd6SGeert Uytterhoeven [ 9] = SH_PFC_PIN_NONE, 685461232cd6SGeert Uytterhoeven [10] = SH_PFC_PIN_NONE, 685561232cd6SGeert Uytterhoeven [11] = SH_PFC_PIN_NONE, 685661232cd6SGeert Uytterhoeven [12] = SH_PFC_PIN_NONE, 685761232cd6SGeert Uytterhoeven [13] = SH_PFC_PIN_NONE, 685861232cd6SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 685961232cd6SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 686061232cd6SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 686161232cd6SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 686261232cd6SGeert Uytterhoeven [18] = SH_PFC_PIN_NONE, 686361232cd6SGeert Uytterhoeven [19] = PIN_ASEBRK_N_ACK, /* ASEBRK#/ACK */ 686461232cd6SGeert Uytterhoeven [20] = SH_PFC_PIN_NONE, 686561232cd6SGeert Uytterhoeven [21] = SH_PFC_PIN_NONE, 686661232cd6SGeert Uytterhoeven [22] = SH_PFC_PIN_NONE, 686761232cd6SGeert Uytterhoeven [23] = SH_PFC_PIN_NONE, 686861232cd6SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 686961232cd6SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 687061232cd6SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 687161232cd6SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 687261232cd6SGeert Uytterhoeven [28] = SH_PFC_PIN_NONE, 687361232cd6SGeert Uytterhoeven [29] = SH_PFC_PIN_NONE, 687461232cd6SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 687561232cd6SGeert Uytterhoeven [31] = SH_PFC_PIN_NONE, 687661232cd6SGeert Uytterhoeven } }, 687761232cd6SGeert Uytterhoeven { /* sentinel */ }, 687861232cd6SGeert Uytterhoeven }; 687961232cd6SGeert Uytterhoeven 6880c614d12cSGeert Uytterhoeven static const struct sh_pfc_soc_operations r8a7791_pfc_ops = { 6881077365a9SGeert Uytterhoeven .pin_to_pocctrl = r8a7791_pin_to_pocctrl, 688261232cd6SGeert Uytterhoeven .get_bias = rcar_pinmux_get_bias, 688361232cd6SGeert Uytterhoeven .set_bias = rcar_pinmux_set_bias, 6884077365a9SGeert Uytterhoeven }; 6885077365a9SGeert Uytterhoeven 6886077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7743 6887077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7743_pinmux_info = { 6888077365a9SGeert Uytterhoeven .name = "r8a77430_pfc", 6889c614d12cSGeert Uytterhoeven .ops = &r8a7791_pfc_ops, 6890077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6891077365a9SGeert Uytterhoeven 6892077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6893077365a9SGeert Uytterhoeven 6894077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6895077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6896077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6897077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common), 6898077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6899077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common), 6900077365a9SGeert Uytterhoeven 6901077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 690261232cd6SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6903077365a9SGeert Uytterhoeven 6904077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6905077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6906077365a9SGeert Uytterhoeven }; 6907077365a9SGeert Uytterhoeven #endif 6908077365a9SGeert Uytterhoeven 6909077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7744 6910077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7744_pinmux_info = { 6911077365a9SGeert Uytterhoeven .name = "r8a77440_pfc", 6912c614d12cSGeert Uytterhoeven .ops = &r8a7791_pfc_ops, 6913077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6914077365a9SGeert Uytterhoeven 6915077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6916077365a9SGeert Uytterhoeven 6917077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6918077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6919077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6920077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common), 6921077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6922077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common), 6923077365a9SGeert Uytterhoeven 6924077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 692561232cd6SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6926077365a9SGeert Uytterhoeven 6927077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6928077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6929077365a9SGeert Uytterhoeven }; 6930077365a9SGeert Uytterhoeven #endif 6931077365a9SGeert Uytterhoeven 6932077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7791 6933077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7791_pinmux_info = { 6934077365a9SGeert Uytterhoeven .name = "r8a77910_pfc", 6935c614d12cSGeert Uytterhoeven .ops = &r8a7791_pfc_ops, 6936077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6937077365a9SGeert Uytterhoeven 6938077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6939077365a9SGeert Uytterhoeven 6940077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6941077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6942077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6943077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common) + 6944077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_groups.automotive), 6945077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6946077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common) + 6947077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_functions.automotive), 6948077365a9SGeert Uytterhoeven 6949077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 695061232cd6SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6951077365a9SGeert Uytterhoeven 6952077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6953077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6954077365a9SGeert Uytterhoeven }; 6955077365a9SGeert Uytterhoeven #endif 6956077365a9SGeert Uytterhoeven 6957077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7793 6958077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7793_pinmux_info = { 6959077365a9SGeert Uytterhoeven .name = "r8a77930_pfc", 6960c614d12cSGeert Uytterhoeven .ops = &r8a7791_pfc_ops, 6961077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6962077365a9SGeert Uytterhoeven 6963077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6964077365a9SGeert Uytterhoeven 6965077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6966077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6967077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6968077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common) + 6969077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_groups.automotive), 6970077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6971077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common) + 6972077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_functions.automotive), 6973077365a9SGeert Uytterhoeven 6974077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 697561232cd6SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6976077365a9SGeert Uytterhoeven 6977077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6978077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6979077365a9SGeert Uytterhoeven }; 6980077365a9SGeert Uytterhoeven #endif 6981