1077365a9SGeert Uytterhoeven // SPDX-License-Identifier: GPL-2.0 2077365a9SGeert Uytterhoeven /* 3077365a9SGeert Uytterhoeven * R8A77470 processor support - PFC hardware block. 4077365a9SGeert Uytterhoeven * 5077365a9SGeert Uytterhoeven * Copyright (C) 2018 Renesas Electronics Corp. 6077365a9SGeert Uytterhoeven */ 7077365a9SGeert Uytterhoeven 8077365a9SGeert Uytterhoeven #include <linux/errno.h> 9077365a9SGeert Uytterhoeven #include <linux/kernel.h> 10077365a9SGeert Uytterhoeven 11077365a9SGeert Uytterhoeven #include "sh_pfc.h" 12077365a9SGeert Uytterhoeven 13077365a9SGeert Uytterhoeven #define CPU_ALL_GP(fn, sfx) \ 14fd685013SGeert Uytterhoeven PORT_GP_CFG_4(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 15fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 16fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 5, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 17fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 18fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 7, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 19fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 8, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 20fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 9, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 21fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 10, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 22fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 11, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 23fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 12, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 24fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 13, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 25fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 14, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 26fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 15, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 27fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 16, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 28fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 17, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 29fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 18, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 30fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 19, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 31fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 20, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 32fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 21, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 33fd685013SGeert Uytterhoeven PORT_GP_CFG_1(0, 22, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 34fd685013SGeert Uytterhoeven PORT_GP_CFG_23(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 35fd685013SGeert Uytterhoeven PORT_GP_CFG_32(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 36fd685013SGeert Uytterhoeven PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 37fd685013SGeert Uytterhoeven PORT_GP_CFG_1(3, 27, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 38fd685013SGeert Uytterhoeven PORT_GP_CFG_1(3, 28, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 39fd685013SGeert Uytterhoeven PORT_GP_CFG_1(3, 29, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 40fd685013SGeert Uytterhoeven PORT_GP_CFG_14(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 41fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 14, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 42fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 15, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 43fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 16, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 44fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 17, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 45fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 18, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 46fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 19, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 47fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 20, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 48fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 21, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 49fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 22, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 50fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 23, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 51fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 24, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 52fd685013SGeert Uytterhoeven PORT_GP_CFG_1(4, 25, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 53fd685013SGeert Uytterhoeven PORT_GP_CFG_32(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP) 54fd685013SGeert Uytterhoeven 55fd685013SGeert Uytterhoeven #define CPU_ALL_NOGP(fn) \ 56fd685013SGeert Uytterhoeven PIN_NOGP_CFG(ASEBRK_N_ACK, "ASEBRK#/ACK", fn, SH_PFC_PIN_CFG_PULL_DOWN), \ 57fd685013SGeert Uytterhoeven PIN_NOGP_CFG(NMI, "NMI", fn, SH_PFC_PIN_CFG_PULL_UP), \ 58fd685013SGeert Uytterhoeven PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, SH_PFC_PIN_CFG_PULL_UP), \ 59fd685013SGeert Uytterhoeven PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP), \ 60fd685013SGeert Uytterhoeven PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP), \ 61fd685013SGeert Uytterhoeven PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_PULL_UP), \ 62fd685013SGeert Uytterhoeven PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP), \ 63fd685013SGeert Uytterhoeven PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP) 64077365a9SGeert Uytterhoeven 65077365a9SGeert Uytterhoeven enum { 66077365a9SGeert Uytterhoeven PINMUX_RESERVED = 0, 67077365a9SGeert Uytterhoeven 68077365a9SGeert Uytterhoeven PINMUX_DATA_BEGIN, 69077365a9SGeert Uytterhoeven GP_ALL(DATA), 70077365a9SGeert Uytterhoeven PINMUX_DATA_END, 71077365a9SGeert Uytterhoeven 72077365a9SGeert Uytterhoeven PINMUX_FUNCTION_BEGIN, 73077365a9SGeert Uytterhoeven GP_ALL(FN), 74077365a9SGeert Uytterhoeven 75077365a9SGeert Uytterhoeven /* GPSR0 */ 76077365a9SGeert Uytterhoeven FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC, FN_CLKOUT, 77077365a9SGeert Uytterhoeven FN_IP0_3_0, FN_IP0_7_4, FN_IP0_11_8, FN_IP0_15_12, FN_IP0_19_16, 78077365a9SGeert Uytterhoeven FN_IP0_23_20, FN_IP0_27_24, FN_IP0_31_28, FN_MMC0_CLK_SDHI1_CLK, 79077365a9SGeert Uytterhoeven FN_MMC0_CMD_SDHI1_CMD, FN_MMC0_D0_SDHI1_D0, FN_MMC0_D1_SDHI1_D1, 80077365a9SGeert Uytterhoeven FN_MMC0_D2_SDHI1_D2, FN_MMC0_D3_SDHI1_D3, FN_IP1_3_0, 81077365a9SGeert Uytterhoeven FN_IP1_7_4, FN_MMC0_D6, FN_MMC0_D7, 82077365a9SGeert Uytterhoeven 83077365a9SGeert Uytterhoeven /* GPSR1 */ 84077365a9SGeert Uytterhoeven FN_IP1_11_8, FN_IP1_15_12, FN_IP1_19_16, FN_IP1_23_20, FN_IP1_27_24, 85077365a9SGeert Uytterhoeven FN_IP1_31_28, FN_IP2_3_0, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, 86077365a9SGeert Uytterhoeven FN_IP2_19_16, FN_IP2_23_20, FN_IP2_27_24, FN_IP2_31_28, FN_IP3_3_0, 87077365a9SGeert Uytterhoeven FN_IP3_7_4, FN_IP3_11_8, FN_IP3_15_12, FN_IP3_19_16, FN_IP3_23_20, 88077365a9SGeert Uytterhoeven FN_IP3_27_24, FN_IP3_31_28, FN_IP4_3_0, 89077365a9SGeert Uytterhoeven 90077365a9SGeert Uytterhoeven /* GPSR2 */ 91077365a9SGeert Uytterhoeven FN_IP4_7_4, FN_IP4_11_8, FN_IP4_15_12, FN_IP4_19_16, FN_IP4_23_20, 92077365a9SGeert Uytterhoeven FN_IP4_27_24, FN_IP4_31_28, FN_IP5_3_0, FN_IP5_7_4, FN_IP5_11_8, 93077365a9SGeert Uytterhoeven FN_IP5_15_12, FN_IP5_19_16, FN_IP5_23_20, FN_IP5_27_24, FN_IP5_31_28, 94077365a9SGeert Uytterhoeven FN_IP6_3_0, FN_IP6_7_4, FN_IP6_11_8, FN_IP6_15_12, FN_IP6_19_16, 95077365a9SGeert Uytterhoeven FN_IP6_23_20, FN_IP6_27_24, FN_IP6_31_28, FN_IP7_3_0, FN_IP7_7_4, 96077365a9SGeert Uytterhoeven FN_IP7_11_8, FN_IP7_15_12, FN_IP7_19_16, FN_IP7_23_20, FN_IP7_27_24, 97077365a9SGeert Uytterhoeven FN_IP7_31_28, FN_IP8_3_0, 98077365a9SGeert Uytterhoeven 99077365a9SGeert Uytterhoeven /* GPSR3 */ 100077365a9SGeert Uytterhoeven FN_IP8_7_4, FN_IP8_11_8, FN_IP8_15_12, FN_IP8_19_16, FN_IP8_23_20, 101077365a9SGeert Uytterhoeven FN_IP8_27_24, FN_IP8_31_28, FN_IP9_3_0, FN_IP9_7_4, FN_IP9_11_8, 102077365a9SGeert Uytterhoeven FN_IP9_15_12, FN_IP9_19_16, FN_IP9_23_20, FN_IP9_27_24, FN_IP9_31_28, 103077365a9SGeert Uytterhoeven FN_IP10_3_0, FN_IP10_7_4, FN_IP10_11_8, FN_IP10_15_12, FN_IP10_19_16, 104077365a9SGeert Uytterhoeven 105077365a9SGeert Uytterhoeven /* GPSR4 */ 106077365a9SGeert Uytterhoeven FN_IP10_23_20, FN_IP10_27_24, FN_IP10_31_28, FN_IP11_3_0, FN_IP11_7_4, 107077365a9SGeert Uytterhoeven FN_IP11_11_8, FN_IP11_15_12, FN_IP11_19_16, FN_IP11_23_20, 108077365a9SGeert Uytterhoeven FN_IP11_27_24, FN_IP11_31_28, FN_IP12_3_0, FN_IP12_7_4, FN_IP12_11_8, 109077365a9SGeert Uytterhoeven FN_IP12_15_12, FN_IP12_19_16, FN_IP12_23_20, FN_IP12_27_24, 110077365a9SGeert Uytterhoeven FN_IP12_31_28, FN_IP13_3_0, FN_IP13_7_4, FN_IP13_11_8, FN_IP13_15_12, 111077365a9SGeert Uytterhoeven FN_IP13_19_16, FN_IP13_23_20, FN_IP13_27_24, 112077365a9SGeert Uytterhoeven 113077365a9SGeert Uytterhoeven /* GPSR5 */ 114077365a9SGeert Uytterhoeven FN_IP13_31_28, FN_IP14_3_0, FN_IP14_7_4, FN_IP14_11_8, FN_IP14_15_12, 115077365a9SGeert Uytterhoeven FN_IP14_19_16, FN_IP14_23_20, FN_IP14_27_24, FN_IP14_31_28, 116077365a9SGeert Uytterhoeven FN_IP15_3_0, FN_IP15_7_4, FN_IP15_11_8, FN_IP15_15_12, FN_IP15_19_16, 117077365a9SGeert Uytterhoeven FN_IP15_23_20, FN_IP15_27_24, FN_IP15_31_28, FN_IP16_3_0, FN_IP16_7_4, 118077365a9SGeert Uytterhoeven FN_IP16_11_8, FN_IP16_15_12, FN_IP16_19_16, FN_IP16_23_20, 119077365a9SGeert Uytterhoeven FN_IP16_27_24, FN_IP16_31_28, FN_IP17_3_0, FN_IP17_7_4, FN_IP17_11_8, 120077365a9SGeert Uytterhoeven FN_IP17_15_12, FN_IP17_19_16, FN_IP17_23_20, FN_IP17_27_24, 121077365a9SGeert Uytterhoeven 122077365a9SGeert Uytterhoeven /* IPSR0 */ 123077365a9SGeert Uytterhoeven FN_SD0_CLK, FN_SSI_SCK1_C, FN_RX3_C, 124077365a9SGeert Uytterhoeven FN_SD0_CMD, FN_SSI_WS1_C, FN_TX3_C, 125077365a9SGeert Uytterhoeven FN_SD0_DAT0, FN_SSI_SDATA1_C, FN_RX4_E, 126077365a9SGeert Uytterhoeven FN_SD0_DAT1, FN_SSI_SCK0129_B, FN_TX4_E, 127077365a9SGeert Uytterhoeven FN_SD0_DAT2, FN_SSI_WS0129_B, FN_RX5_E, 128077365a9SGeert Uytterhoeven FN_SD0_DAT3, FN_SSI_SDATA0_B, FN_TX5_E, 129077365a9SGeert Uytterhoeven FN_SD0_CD, FN_CAN0_RX_A, 130077365a9SGeert Uytterhoeven FN_SD0_WP, FN_IRQ7, FN_CAN0_TX_A, 131077365a9SGeert Uytterhoeven 132077365a9SGeert Uytterhoeven /* IPSR1 */ 133077365a9SGeert Uytterhoeven FN_MMC0_D4, FN_SD1_CD, 134077365a9SGeert Uytterhoeven FN_MMC0_D5, FN_SD1_WP, 135077365a9SGeert Uytterhoeven FN_D0, FN_SCL3_B, FN_RX5_B, FN_IRQ4, FN_MSIOF2_RXD_C, FN_SSI_SDATA5_B, 136077365a9SGeert Uytterhoeven FN_D1, FN_SDA3_B, FN_TX5_B, FN_MSIOF2_TXD_C, FN_SSI_WS5_B, 137077365a9SGeert Uytterhoeven FN_D2, FN_RX4_B, FN_SCL0_D, FN_PWM1_C, FN_MSIOF2_SCK_C, FN_SSI_SCK5_B, 138077365a9SGeert Uytterhoeven FN_D3, FN_TX4_B, FN_SDA0_D, FN_PWM0_A, FN_MSIOF2_SYNC_C, 139077365a9SGeert Uytterhoeven FN_D4, FN_IRQ3, FN_TCLK1_A, FN_PWM6_C, 140077365a9SGeert Uytterhoeven FN_D5, FN_HRX2, FN_SCL1_B, FN_PWM2_C, FN_TCLK2_B, 141077365a9SGeert Uytterhoeven 142077365a9SGeert Uytterhoeven /* IPSR2 */ 143077365a9SGeert Uytterhoeven FN_D6, FN_HTX2, FN_SDA1_B, FN_PWM4_C, 144077365a9SGeert Uytterhoeven FN_D7, FN_HSCK2, FN_SCIF1_SCK_C, FN_IRQ6, FN_PWM5_C, 145077365a9SGeert Uytterhoeven FN_D8, FN_HCTS2_N, FN_RX1_C, FN_SCL1_D, FN_PWM3_C, 146077365a9SGeert Uytterhoeven FN_D9, FN_HRTS2_N, FN_TX1_C, FN_SDA1_D, 147077365a9SGeert Uytterhoeven FN_D10, FN_MSIOF2_RXD_A, FN_HRX0_B, 148077365a9SGeert Uytterhoeven FN_D11, FN_MSIOF2_TXD_A, FN_HTX0_B, 149077365a9SGeert Uytterhoeven FN_D12, FN_MSIOF2_SCK_A, FN_HSCK0, FN_CAN_CLK_C, 150077365a9SGeert Uytterhoeven FN_D13, FN_MSIOF2_SYNC_A, FN_RX4_C, 151077365a9SGeert Uytterhoeven 152077365a9SGeert Uytterhoeven /* IPSR3 */ 153077365a9SGeert Uytterhoeven FN_D14, FN_MSIOF2_SS1, FN_TX4_C, FN_CAN1_RX_B, FN_AVB_AVTP_CAPTURE_A, 154077365a9SGeert Uytterhoeven FN_D15, FN_MSIOF2_SS2, FN_PWM4_A, FN_CAN1_TX_B, FN_IRQ2, FN_AVB_AVTP_MATCH_A, 155077365a9SGeert Uytterhoeven FN_QSPI0_SPCLK, FN_WE0_N, 156077365a9SGeert Uytterhoeven FN_QSPI0_MOSI_QSPI0_IO0, FN_BS_N, 157077365a9SGeert Uytterhoeven FN_QSPI0_MISO_QSPI0_IO1, FN_RD_WR_N, 158077365a9SGeert Uytterhoeven FN_QSPI0_IO2, FN_CS0_N, 159077365a9SGeert Uytterhoeven FN_QSPI0_IO3, FN_RD_N, 160077365a9SGeert Uytterhoeven FN_QSPI0_SSL, FN_WE1_N, 161077365a9SGeert Uytterhoeven 162077365a9SGeert Uytterhoeven /* IPSR4 */ 163077365a9SGeert Uytterhoeven FN_EX_WAIT0, FN_CAN_CLK_B, FN_SCIF_CLK_A, 164077365a9SGeert Uytterhoeven FN_DU0_DR0, FN_RX5_C, FN_SCL2_D, FN_A0, 165077365a9SGeert Uytterhoeven FN_DU0_DR1, FN_TX5_C, FN_SDA2_D, FN_A1, 166077365a9SGeert Uytterhoeven FN_DU0_DR2, FN_RX0_D, FN_SCL0_E, FN_A2, 167077365a9SGeert Uytterhoeven FN_DU0_DR3, FN_TX0_D, FN_SDA0_E, FN_PWM0_B, FN_A3, 168077365a9SGeert Uytterhoeven FN_DU0_DR4, FN_RX1_D, FN_A4, 169077365a9SGeert Uytterhoeven FN_DU0_DR5, FN_TX1_D, FN_PWM1_B, FN_A5, 170077365a9SGeert Uytterhoeven FN_DU0_DR6, FN_RX2_C, FN_A6, 171077365a9SGeert Uytterhoeven 172077365a9SGeert Uytterhoeven /* IPSR5 */ 173077365a9SGeert Uytterhoeven FN_DU0_DR7, FN_TX2_C, FN_PWM2_B, FN_A7, 174077365a9SGeert Uytterhoeven FN_DU0_DG0, FN_RX3_B, FN_SCL3_D, FN_A8, 175077365a9SGeert Uytterhoeven FN_DU0_DG1, FN_TX3_B, FN_SDA3_D, FN_PWM3_B, FN_A9, 176077365a9SGeert Uytterhoeven FN_DU0_DG2, FN_RX4_D, FN_A10, 177077365a9SGeert Uytterhoeven FN_DU0_DG3, FN_TX4_D, FN_PWM4_B, FN_A11, 178077365a9SGeert Uytterhoeven FN_DU0_DG4, FN_HRX0_A, FN_A12, 179077365a9SGeert Uytterhoeven FN_DU0_DG5, FN_HTX0_A, FN_PWM5_B, FN_A13, 180077365a9SGeert Uytterhoeven FN_DU0_DG6, FN_HRX1_C, FN_A14, 181077365a9SGeert Uytterhoeven 182077365a9SGeert Uytterhoeven /* IPSR6 */ 183077365a9SGeert Uytterhoeven FN_DU0_DG7, FN_HTX1_C, FN_PWM6_B, FN_A15, 184077365a9SGeert Uytterhoeven FN_DU0_DB0, FN_SCL4_D, FN_CAN0_RX_C, FN_A16, 185077365a9SGeert Uytterhoeven FN_DU0_DB1, FN_SDA4_D, FN_CAN0_TX_C, FN_A17, 186077365a9SGeert Uytterhoeven FN_DU0_DB2, FN_HCTS0_N, FN_A18, 187077365a9SGeert Uytterhoeven FN_DU0_DB3, FN_HRTS0_N, FN_A19, 188077365a9SGeert Uytterhoeven FN_DU0_DB4, FN_HCTS1_N_C, FN_A20, 189077365a9SGeert Uytterhoeven FN_DU0_DB5, FN_HRTS1_N_C, FN_A21, 190077365a9SGeert Uytterhoeven FN_DU0_DB6, FN_A22, 191077365a9SGeert Uytterhoeven 192077365a9SGeert Uytterhoeven /* IPSR7 */ 193077365a9SGeert Uytterhoeven FN_DU0_DB7, FN_A23, 194077365a9SGeert Uytterhoeven FN_DU0_DOTCLKIN, FN_A24, 195077365a9SGeert Uytterhoeven FN_DU0_DOTCLKOUT0, FN_A25, 196077365a9SGeert Uytterhoeven FN_DU0_DOTCLKOUT1, FN_MSIOF2_RXD_B, FN_CS1_N_A26, 197077365a9SGeert Uytterhoeven FN_DU0_EXHSYNC_DU0_HSYNC, FN_MSIOF2_TXD_B, FN_DREQ0_N, 198077365a9SGeert Uytterhoeven FN_DU0_EXVSYNC_DU0_VSYNC, FN_MSIOF2_SYNC_B, FN_DACK0, 199077365a9SGeert Uytterhoeven FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_MSIOF2_SCK_B, FN_DRACK0, 200077365a9SGeert Uytterhoeven FN_DU0_DISP, FN_CAN1_RX_C, 201077365a9SGeert Uytterhoeven 202077365a9SGeert Uytterhoeven /* IPSR8 */ 203077365a9SGeert Uytterhoeven FN_DU0_CDE, FN_CAN1_TX_C, 204077365a9SGeert Uytterhoeven FN_VI1_CLK, FN_AVB_RX_CLK, FN_ETH_REF_CLK, 205077365a9SGeert Uytterhoeven FN_VI1_DATA0, FN_AVB_RX_DV, FN_ETH_CRS_DV, 206077365a9SGeert Uytterhoeven FN_VI1_DATA1, FN_AVB_RXD0, FN_ETH_RXD0, 207077365a9SGeert Uytterhoeven FN_VI1_DATA2, FN_AVB_RXD1, FN_ETH_RXD1, 208077365a9SGeert Uytterhoeven FN_VI1_DATA3, FN_AVB_RXD2, FN_ETH_MDIO, 209077365a9SGeert Uytterhoeven FN_VI1_DATA4, FN_AVB_RXD3, FN_ETH_RX_ER, 210077365a9SGeert Uytterhoeven FN_VI1_DATA5, FN_AVB_RXD4, FN_ETH_LINK, 211077365a9SGeert Uytterhoeven 212077365a9SGeert Uytterhoeven /* IPSR9 */ 213077365a9SGeert Uytterhoeven FN_VI1_DATA6, FN_AVB_RXD5, FN_ETH_TXD1, 214077365a9SGeert Uytterhoeven FN_VI1_DATA7, FN_AVB_RXD6, FN_ETH_TX_EN, 215077365a9SGeert Uytterhoeven FN_VI1_CLKENB, FN_SCL3_A, FN_AVB_RXD7, FN_ETH_MAGIC, 216077365a9SGeert Uytterhoeven FN_VI1_FIELD, FN_SDA3_A, FN_AVB_RX_ER, FN_ETH_TXD0, 217077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N, FN_RX0_B, FN_SCL0_C, FN_AVB_GTXREFCLK, FN_ETH_MDC, 218077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N, FN_TX0_B, FN_SDA0_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_CLK, 219077365a9SGeert Uytterhoeven FN_VI1_DATA8, FN_SCL2_B, FN_AVB_TX_EN, 220077365a9SGeert Uytterhoeven FN_VI1_DATA9, FN_SDA2_B, FN_AVB_TXD0, 221077365a9SGeert Uytterhoeven 222077365a9SGeert Uytterhoeven /* IPSR10 */ 223077365a9SGeert Uytterhoeven FN_VI1_DATA10, FN_CAN0_RX_B, FN_AVB_TXD1, 224077365a9SGeert Uytterhoeven FN_VI1_DATA11, FN_CAN0_TX_B, FN_AVB_TXD2, 225077365a9SGeert Uytterhoeven FN_AVB_TXD3, FN_AUDIO_CLKA_B, FN_SSI_SCK1_D, FN_RX5_F, FN_MSIOF0_RXD_B, 226077365a9SGeert Uytterhoeven FN_AVB_TXD4, FN_AUDIO_CLKB_B, FN_SSI_WS1_D, FN_TX5_F, FN_MSIOF0_TXD_B, 227077365a9SGeert Uytterhoeven FN_AVB_TXD5, FN_SCIF_CLK_B, FN_AUDIO_CLKC_B, FN_SSI_SDATA1_D, FN_MSIOF0_SCK_B, 228077365a9SGeert Uytterhoeven FN_SCL0_A, FN_RX0_C, FN_PWM5_A, FN_TCLK1_B, FN_AVB_TXD6, FN_CAN1_RX_D, FN_MSIOF0_SYNC_B, 229077365a9SGeert Uytterhoeven FN_SDA0_A, FN_TX0_C, FN_IRQ5, FN_CAN_CLK_A, FN_AVB_GTX_CLK, FN_CAN1_TX_D, FN_DVC_MUTE, 230077365a9SGeert Uytterhoeven FN_SCL1_A, FN_RX4_A, FN_PWM5_D, FN_DU1_DR0, FN_SSI_SCK6_B, FN_VI0_G0, 231077365a9SGeert Uytterhoeven 232077365a9SGeert Uytterhoeven /* IPSR11 */ 233077365a9SGeert Uytterhoeven FN_SDA1_A, FN_TX4_A, FN_DU1_DR1, FN_SSI_WS6_B, FN_VI0_G1, 234077365a9SGeert Uytterhoeven FN_MSIOF0_RXD_A, FN_RX5_A, FN_SCL2_C, FN_DU1_DR2, FN_QSPI1_MOSI_QSPI1_IO0, FN_SSI_SDATA6_B, FN_VI0_G2, 235077365a9SGeert Uytterhoeven FN_MSIOF0_TXD_A, FN_TX5_A, FN_SDA2_C, FN_DU1_DR3, FN_QSPI1_MISO_QSPI1_IO1, FN_SSI_WS78_B, FN_VI0_G3, 236077365a9SGeert Uytterhoeven FN_MSIOF0_SCK_A, FN_IRQ0, FN_DU1_DR4, FN_QSPI1_SPCLK, FN_SSI_SCK78_B, FN_VI0_G4, 237077365a9SGeert Uytterhoeven FN_MSIOF0_SYNC_A, FN_PWM1_A, FN_DU1_DR5, FN_QSPI1_IO2, FN_SSI_SDATA7_B, 238077365a9SGeert Uytterhoeven FN_MSIOF0_SS1_A, FN_DU1_DR6, FN_QSPI1_IO3, FN_SSI_SDATA8_B, 239077365a9SGeert Uytterhoeven FN_MSIOF0_SS2_A, FN_DU1_DR7, FN_QSPI1_SSL, 240077365a9SGeert Uytterhoeven FN_HRX1_A, FN_SCL4_A, FN_PWM6_A, FN_DU1_DG0, FN_RX0_A, 241077365a9SGeert Uytterhoeven 242077365a9SGeert Uytterhoeven /* IPSR12 */ 243077365a9SGeert Uytterhoeven FN_HTX1_A, FN_SDA4_A, FN_DU1_DG1, FN_TX0_A, 244077365a9SGeert Uytterhoeven FN_HCTS1_N_A, FN_PWM2_A, FN_DU1_DG2, FN_REMOCON_B, 245077365a9SGeert Uytterhoeven FN_HRTS1_N_A, FN_DU1_DG3, FN_SSI_WS1_B, FN_IRQ1, 246077365a9SGeert Uytterhoeven FN_SD2_CLK, FN_HSCK1, FN_DU1_DG4, FN_SSI_SCK1_B, 247077365a9SGeert Uytterhoeven FN_SD2_CMD, FN_SCIF1_SCK_A, FN_TCLK2_A, FN_DU1_DG5, FN_SSI_SCK2_B, FN_PWM3_A, 248077365a9SGeert Uytterhoeven FN_SD2_DAT0, FN_RX1_A, FN_SCL1_E, FN_DU1_DG6, FN_SSI_SDATA1_B, 249077365a9SGeert Uytterhoeven FN_SD2_DAT1, FN_TX1_A, FN_SDA1_E, FN_DU1_DG7, FN_SSI_WS2_B, 250077365a9SGeert Uytterhoeven FN_SD2_DAT2, FN_RX2_A, FN_DU1_DB0, FN_SSI_SDATA2_B, 251077365a9SGeert Uytterhoeven 252077365a9SGeert Uytterhoeven /* IPSR13 */ 253077365a9SGeert Uytterhoeven FN_SD2_DAT3, FN_TX2_A, FN_DU1_DB1, FN_SSI_WS9_B, 254077365a9SGeert Uytterhoeven FN_SD2_CD, FN_SCIF2_SCK_A, FN_DU1_DB2, FN_SSI_SCK9_B, 255077365a9SGeert Uytterhoeven FN_SD2_WP, FN_SCIF3_SCK, FN_DU1_DB3, FN_SSI_SDATA9_B, 256077365a9SGeert Uytterhoeven FN_RX3_A, FN_SCL1_C, FN_MSIOF1_RXD_B, FN_DU1_DB4, FN_AUDIO_CLKA_C, FN_SSI_SDATA4_B, 257077365a9SGeert Uytterhoeven FN_TX3_A, FN_SDA1_C, FN_MSIOF1_TXD_B, FN_DU1_DB5, FN_AUDIO_CLKB_C, FN_SSI_WS4_B, 258077365a9SGeert Uytterhoeven FN_SCL2_A, FN_MSIOF1_SCK_B, FN_DU1_DB6, FN_AUDIO_CLKC_C, FN_SSI_SCK4_B, 259077365a9SGeert Uytterhoeven FN_SDA2_A, FN_MSIOF1_SYNC_B, FN_DU1_DB7, FN_AUDIO_CLKOUT_C, 260077365a9SGeert Uytterhoeven FN_SSI_SCK5_A, FN_DU1_DOTCLKOUT1, 261077365a9SGeert Uytterhoeven 262077365a9SGeert Uytterhoeven /* IPSR14 */ 263077365a9SGeert Uytterhoeven FN_SSI_WS5_A, FN_SCL3_C, FN_DU1_DOTCLKIN, 264077365a9SGeert Uytterhoeven FN_SSI_SDATA5_A, FN_SDA3_C, FN_DU1_DOTCLKOUT0, 265077365a9SGeert Uytterhoeven FN_SSI_SCK6_A, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, 266077365a9SGeert Uytterhoeven FN_SSI_WS6_A, FN_SCL4_C, FN_DU1_EXHSYNC_DU1_HSYNC, 267077365a9SGeert Uytterhoeven FN_SSI_SDATA6_A, FN_SDA4_C, FN_DU1_EXVSYNC_DU1_VSYNC, 268077365a9SGeert Uytterhoeven FN_SSI_SCK78_A, FN_SDA4_E, FN_DU1_DISP, 269077365a9SGeert Uytterhoeven FN_SSI_WS78_A, FN_SCL4_E, FN_DU1_CDE, 270077365a9SGeert Uytterhoeven FN_SSI_SDATA7_A, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_VI0_G5, 271077365a9SGeert Uytterhoeven 272077365a9SGeert Uytterhoeven /* IPSR15 */ 273077365a9SGeert Uytterhoeven FN_SSI_SCK0129_A, FN_MSIOF1_RXD_A, FN_RX5_D, FN_VI0_G6, 274077365a9SGeert Uytterhoeven FN_SSI_WS0129_A, FN_MSIOF1_TXD_A, FN_TX5_D, FN_VI0_G7, 275077365a9SGeert Uytterhoeven FN_SSI_SDATA0_A, FN_MSIOF1_SYNC_A, FN_PWM0_C, FN_VI0_R0, 276077365a9SGeert Uytterhoeven FN_SSI_SCK34, FN_MSIOF1_SCK_A, FN_AVB_MDC, FN_DACK1, FN_VI0_R1, 277077365a9SGeert Uytterhoeven FN_SSI_WS34, FN_MSIOF1_SS1_A, FN_AVB_MDIO, FN_CAN1_RX_A, FN_DREQ1_N, FN_VI0_R2, 278077365a9SGeert Uytterhoeven FN_SSI_SDATA3, FN_MSIOF1_SS2_A, FN_AVB_LINK, FN_CAN1_TX_A, FN_DREQ2_N, FN_VI0_R3, 279077365a9SGeert Uytterhoeven FN_SSI_SCK4_A, FN_AVB_MAGIC, FN_VI0_R4, 280077365a9SGeert Uytterhoeven FN_SSI_WS4_A, FN_AVB_PHY_INT, FN_VI0_R5, 281077365a9SGeert Uytterhoeven 282077365a9SGeert Uytterhoeven /* IPSR16 */ 283077365a9SGeert Uytterhoeven FN_SSI_SDATA4_A, FN_AVB_CRS, FN_VI0_R6, 284077365a9SGeert Uytterhoeven FN_SSI_SCK1_A, FN_SCIF1_SCK_B, FN_PWM1_D, FN_IRQ9, FN_REMOCON_A, FN_DACK2, FN_VI0_CLK, FN_AVB_COL, 285077365a9SGeert Uytterhoeven FN_SSI_SDATA8_A, FN_RX1_B, FN_CAN0_RX_D, FN_AVB_AVTP_CAPTURE_B, FN_VI0_R7, 286077365a9SGeert Uytterhoeven FN_SSI_WS1_A, FN_TX1_B, FN_CAN0_TX_D, FN_AVB_AVTP_MATCH_B, FN_VI0_DATA0_VI0_B0, 287077365a9SGeert Uytterhoeven FN_SSI_SDATA1_A, FN_HRX1_B, FN_VI0_DATA1_VI0_B1, 288077365a9SGeert Uytterhoeven FN_SSI_SCK2_A, FN_HTX1_B, FN_AVB_TXD7, FN_VI0_DATA2_VI0_B2, 289077365a9SGeert Uytterhoeven FN_SSI_WS2_A, FN_HCTS1_N_B, FN_AVB_TX_ER, FN_VI0_DATA3_VI0_B3, 290077365a9SGeert Uytterhoeven FN_SSI_SDATA2_A, FN_HRTS1_N_B, FN_VI0_DATA4_VI0_B4, 291077365a9SGeert Uytterhoeven 292077365a9SGeert Uytterhoeven /* IPSR17 */ 293077365a9SGeert Uytterhoeven FN_SSI_SCK9_A, FN_RX2_B, FN_SCL3_E, FN_EX_WAIT1, FN_VI0_DATA5_VI0_B5, 294077365a9SGeert Uytterhoeven FN_SSI_WS9_A, FN_TX2_B, FN_SDA3_E, FN_VI0_DATA6_VI0_B6, 295077365a9SGeert Uytterhoeven FN_SSI_SDATA9_A, FN_SCIF2_SCK_B, FN_PWM2_D, FN_VI0_DATA7_VI0_B7, 296077365a9SGeert Uytterhoeven FN_AUDIO_CLKA_A, FN_SCL0_B, FN_VI0_CLKENB, 297077365a9SGeert Uytterhoeven FN_AUDIO_CLKB_A, FN_SDA0_B, FN_VI0_FIELD, 298077365a9SGeert Uytterhoeven FN_AUDIO_CLKC_A, FN_SCL4_B, FN_VI0_HSYNC_N, 299077365a9SGeert Uytterhoeven FN_AUDIO_CLKOUT_A, FN_SDA4_B, FN_VI0_VSYNC_N, 300077365a9SGeert Uytterhoeven 301077365a9SGeert Uytterhoeven /* MOD_SEL0 */ 302077365a9SGeert Uytterhoeven FN_SEL_ADGA_0, FN_SEL_ADGA_1, FN_SEL_ADGA_2, FN_SEL_ADGA_3, 303077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, 304077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, 305077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 306077365a9SGeert Uytterhoeven FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2, FN_SEL_I2C04_3, FN_SEL_I2C04_4, 307077365a9SGeert Uytterhoeven FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3, FN_SEL_I2C03_4, 308077365a9SGeert Uytterhoeven FN_SEL_I2C02_0, FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, 309077365a9SGeert Uytterhoeven FN_SEL_I2C01_0, FN_SEL_I2C01_1, FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, 310077365a9SGeert Uytterhoeven FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2, FN_SEL_I2C00_3, FN_SEL_I2C00_4, 311077365a9SGeert Uytterhoeven FN_SEL_AVB_0, FN_SEL_AVB_1, 312077365a9SGeert Uytterhoeven 313077365a9SGeert Uytterhoeven /* MOD_SEL1 */ 314077365a9SGeert Uytterhoeven FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, 315077365a9SGeert Uytterhoeven FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, FN_SEL_SCIF5_4, FN_SEL_SCIF5_5, 316077365a9SGeert Uytterhoeven FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, FN_SEL_SCIF4_4, 317077365a9SGeert Uytterhoeven FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, 318077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 319077365a9SGeert Uytterhoeven FN_SEL_SCIF2_CLK_0, FN_SEL_SCIF2_CLK_1, 320077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 321077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, 322077365a9SGeert Uytterhoeven FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, FN_SEL_MSIOF2_2, 323077365a9SGeert Uytterhoeven FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, 324077365a9SGeert Uytterhoeven FN_SEL_MSIOF0_0, FN_SEL_MSIOF0_1, 325077365a9SGeert Uytterhoeven FN_SEL_RCN_0, FN_SEL_RCN_1, 326077365a9SGeert Uytterhoeven FN_SEL_TMU2_0, FN_SEL_TMU2_1, 327077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 328077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, 329077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, 330077365a9SGeert Uytterhoeven 331077365a9SGeert Uytterhoeven /* MOD_SEL2 */ 332077365a9SGeert Uytterhoeven FN_SEL_ADGB_0, FN_SEL_ADGB_1, FN_SEL_ADGB_2, 333077365a9SGeert Uytterhoeven FN_SEL_ADGC_0, FN_SEL_ADGC_1, FN_SEL_ADGC_2, 334077365a9SGeert Uytterhoeven FN_SEL_SSI9_0, FN_SEL_SSI9_1, 335077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, 336077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, 337077365a9SGeert Uytterhoeven FN_SEL_SSI6_0, FN_SEL_SSI6_1, 338077365a9SGeert Uytterhoeven FN_SEL_SSI5_0, FN_SEL_SSI5_1, 339077365a9SGeert Uytterhoeven FN_SEL_SSI4_0, FN_SEL_SSI4_1, 340077365a9SGeert Uytterhoeven FN_SEL_SSI2_0, FN_SEL_SSI2_1, 341077365a9SGeert Uytterhoeven FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI1_2, FN_SEL_SSI1_3, 342077365a9SGeert Uytterhoeven FN_SEL_SSI0_0, FN_SEL_SSI0_1, 343077365a9SGeert Uytterhoeven PINMUX_FUNCTION_END, 344077365a9SGeert Uytterhoeven 345077365a9SGeert Uytterhoeven PINMUX_MARK_BEGIN, 346077365a9SGeert Uytterhoeven 347077365a9SGeert Uytterhoeven USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK, 348077365a9SGeert Uytterhoeven CLKOUT_MARK, MMC0_CLK_SDHI1_CLK_MARK, MMC0_CMD_SDHI1_CMD_MARK, 349077365a9SGeert Uytterhoeven MMC0_D0_SDHI1_D0_MARK, MMC0_D1_SDHI1_D1_MARK, 350077365a9SGeert Uytterhoeven MMC0_D2_SDHI1_D2_MARK, MMC0_D3_SDHI1_D3_MARK, MMC0_D6_MARK, 351077365a9SGeert Uytterhoeven MMC0_D7_MARK, 352077365a9SGeert Uytterhoeven 353077365a9SGeert Uytterhoeven /* IPSR0 */ 354077365a9SGeert Uytterhoeven SD0_CLK_MARK, SSI_SCK1_C_MARK, RX3_C_MARK, 355077365a9SGeert Uytterhoeven SD0_CMD_MARK, SSI_WS1_C_MARK, TX3_C_MARK, 356077365a9SGeert Uytterhoeven SD0_DAT0_MARK, SSI_SDATA1_C_MARK, RX4_E_MARK, 357077365a9SGeert Uytterhoeven SD0_DAT1_MARK, SSI_SCK0129_B_MARK, TX4_E_MARK, 358077365a9SGeert Uytterhoeven SD0_DAT2_MARK, SSI_WS0129_B_MARK, RX5_E_MARK, 359077365a9SGeert Uytterhoeven SD0_DAT3_MARK, SSI_SDATA0_B_MARK, TX5_E_MARK, 360077365a9SGeert Uytterhoeven SD0_CD_MARK, CAN0_RX_A_MARK, 361077365a9SGeert Uytterhoeven SD0_WP_MARK, IRQ7_MARK, CAN0_TX_A_MARK, 362077365a9SGeert Uytterhoeven 363077365a9SGeert Uytterhoeven /* IPSR1 */ 364077365a9SGeert Uytterhoeven MMC0_D4_MARK, SD1_CD_MARK, 365077365a9SGeert Uytterhoeven MMC0_D5_MARK, SD1_WP_MARK, 366077365a9SGeert Uytterhoeven D0_MARK, SCL3_B_MARK, RX5_B_MARK, IRQ4_MARK, MSIOF2_RXD_C_MARK, SSI_SDATA5_B_MARK, 367077365a9SGeert Uytterhoeven D1_MARK, SDA3_B_MARK, TX5_B_MARK, MSIOF2_TXD_C_MARK, SSI_WS5_B_MARK, 368077365a9SGeert Uytterhoeven D2_MARK, RX4_B_MARK, SCL0_D_MARK, PWM1_C_MARK, MSIOF2_SCK_C_MARK, SSI_SCK5_B_MARK, 369077365a9SGeert Uytterhoeven D3_MARK, TX4_B_MARK, SDA0_D_MARK, PWM0_A_MARK, MSIOF2_SYNC_C_MARK, 370077365a9SGeert Uytterhoeven D4_MARK, IRQ3_MARK, TCLK1_A_MARK, PWM6_C_MARK, 371077365a9SGeert Uytterhoeven D5_MARK, HRX2_MARK, SCL1_B_MARK, PWM2_C_MARK, TCLK2_B_MARK, 372077365a9SGeert Uytterhoeven 373077365a9SGeert Uytterhoeven /* IPSR2 */ 374077365a9SGeert Uytterhoeven D6_MARK, HTX2_MARK, SDA1_B_MARK, PWM4_C_MARK, 375077365a9SGeert Uytterhoeven D7_MARK, HSCK2_MARK, SCIF1_SCK_C_MARK, IRQ6_MARK, PWM5_C_MARK, 376077365a9SGeert Uytterhoeven D8_MARK, HCTS2_N_MARK, RX1_C_MARK, SCL1_D_MARK, PWM3_C_MARK, 377077365a9SGeert Uytterhoeven D9_MARK, HRTS2_N_MARK, TX1_C_MARK, SDA1_D_MARK, 378077365a9SGeert Uytterhoeven D10_MARK, MSIOF2_RXD_A_MARK, HRX0_B_MARK, 379077365a9SGeert Uytterhoeven D11_MARK, MSIOF2_TXD_A_MARK, HTX0_B_MARK, 380077365a9SGeert Uytterhoeven D12_MARK, MSIOF2_SCK_A_MARK, HSCK0_MARK, CAN_CLK_C_MARK, 381077365a9SGeert Uytterhoeven D13_MARK, MSIOF2_SYNC_A_MARK, RX4_C_MARK, 382077365a9SGeert Uytterhoeven 383077365a9SGeert Uytterhoeven /* IPSR3 */ 384077365a9SGeert Uytterhoeven D14_MARK, MSIOF2_SS1_MARK, TX4_C_MARK, CAN1_RX_B_MARK, AVB_AVTP_CAPTURE_A_MARK, 385077365a9SGeert Uytterhoeven D15_MARK, MSIOF2_SS2_MARK, PWM4_A_MARK, CAN1_TX_B_MARK, IRQ2_MARK, AVB_AVTP_MATCH_A_MARK, 386077365a9SGeert Uytterhoeven QSPI0_SPCLK_MARK, WE0_N_MARK, 387077365a9SGeert Uytterhoeven QSPI0_MOSI_QSPI0_IO0_MARK, BS_N_MARK, 388077365a9SGeert Uytterhoeven QSPI0_MISO_QSPI0_IO1_MARK, RD_WR_N_MARK, 389077365a9SGeert Uytterhoeven QSPI0_IO2_MARK, CS0_N_MARK, 390077365a9SGeert Uytterhoeven QSPI0_IO3_MARK, RD_N_MARK, 391077365a9SGeert Uytterhoeven QSPI0_SSL_MARK, WE1_N_MARK, 392077365a9SGeert Uytterhoeven 393077365a9SGeert Uytterhoeven /* IPSR4 */ 394077365a9SGeert Uytterhoeven EX_WAIT0_MARK, CAN_CLK_B_MARK, SCIF_CLK_A_MARK, 395077365a9SGeert Uytterhoeven DU0_DR0_MARK, RX5_C_MARK, SCL2_D_MARK, A0_MARK, 396077365a9SGeert Uytterhoeven DU0_DR1_MARK, TX5_C_MARK, SDA2_D_MARK, A1_MARK, 397077365a9SGeert Uytterhoeven DU0_DR2_MARK, RX0_D_MARK, SCL0_E_MARK, A2_MARK, 398077365a9SGeert Uytterhoeven DU0_DR3_MARK, TX0_D_MARK, SDA0_E_MARK, PWM0_B_MARK, A3_MARK, 399077365a9SGeert Uytterhoeven DU0_DR4_MARK, RX1_D_MARK, A4_MARK, 400077365a9SGeert Uytterhoeven DU0_DR5_MARK, TX1_D_MARK, PWM1_B_MARK, A5_MARK, 401077365a9SGeert Uytterhoeven DU0_DR6_MARK, RX2_C_MARK, A6_MARK, 402077365a9SGeert Uytterhoeven 403077365a9SGeert Uytterhoeven /* IPSR5 */ 404077365a9SGeert Uytterhoeven DU0_DR7_MARK, TX2_C_MARK, PWM2_B_MARK, A7_MARK, 405077365a9SGeert Uytterhoeven DU0_DG0_MARK, RX3_B_MARK, SCL3_D_MARK, A8_MARK, 406077365a9SGeert Uytterhoeven DU0_DG1_MARK, TX3_B_MARK, SDA3_D_MARK, PWM3_B_MARK, A9_MARK, 407077365a9SGeert Uytterhoeven DU0_DG2_MARK, RX4_D_MARK, A10_MARK, 408077365a9SGeert Uytterhoeven DU0_DG3_MARK, TX4_D_MARK, PWM4_B_MARK, A11_MARK, 409077365a9SGeert Uytterhoeven DU0_DG4_MARK, HRX0_A_MARK, A12_MARK, 410077365a9SGeert Uytterhoeven DU0_DG5_MARK, HTX0_A_MARK, PWM5_B_MARK, A13_MARK, 411077365a9SGeert Uytterhoeven DU0_DG6_MARK, HRX1_C_MARK, A14_MARK, 412077365a9SGeert Uytterhoeven 413077365a9SGeert Uytterhoeven /* IPSR6 */ 414077365a9SGeert Uytterhoeven DU0_DG7_MARK, HTX1_C_MARK, PWM6_B_MARK, A15_MARK, 415077365a9SGeert Uytterhoeven DU0_DB0_MARK, SCL4_D_MARK, CAN0_RX_C_MARK, A16_MARK, 416077365a9SGeert Uytterhoeven DU0_DB1_MARK, SDA4_D_MARK, CAN0_TX_C_MARK, A17_MARK, 417077365a9SGeert Uytterhoeven DU0_DB2_MARK, HCTS0_N_MARK, A18_MARK, 418077365a9SGeert Uytterhoeven DU0_DB3_MARK, HRTS0_N_MARK, A19_MARK, 419077365a9SGeert Uytterhoeven DU0_DB4_MARK, HCTS1_N_C_MARK, A20_MARK, 420077365a9SGeert Uytterhoeven DU0_DB5_MARK, HRTS1_N_C_MARK, A21_MARK, 421077365a9SGeert Uytterhoeven DU0_DB6_MARK, A22_MARK, 422077365a9SGeert Uytterhoeven 423077365a9SGeert Uytterhoeven /* IPSR7 */ 424077365a9SGeert Uytterhoeven DU0_DB7_MARK, A23_MARK, 425077365a9SGeert Uytterhoeven DU0_DOTCLKIN_MARK, A24_MARK, 426077365a9SGeert Uytterhoeven DU0_DOTCLKOUT0_MARK, A25_MARK, 427077365a9SGeert Uytterhoeven DU0_DOTCLKOUT1_MARK, MSIOF2_RXD_B_MARK, CS1_N_A26_MARK, 428077365a9SGeert Uytterhoeven DU0_EXHSYNC_DU0_HSYNC_MARK, MSIOF2_TXD_B_MARK, DREQ0_N_MARK, 429077365a9SGeert Uytterhoeven DU0_EXVSYNC_DU0_VSYNC_MARK, MSIOF2_SYNC_B_MARK, DACK0_MARK, 430077365a9SGeert Uytterhoeven DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, MSIOF2_SCK_B_MARK, DRACK0_MARK, 431077365a9SGeert Uytterhoeven DU0_DISP_MARK, CAN1_RX_C_MARK, 432077365a9SGeert Uytterhoeven 433077365a9SGeert Uytterhoeven /* IPSR8 */ 434077365a9SGeert Uytterhoeven DU0_CDE_MARK, CAN1_TX_C_MARK, 435077365a9SGeert Uytterhoeven VI1_CLK_MARK, AVB_RX_CLK_MARK, ETH_REF_CLK_MARK, 436077365a9SGeert Uytterhoeven VI1_DATA0_MARK, AVB_RX_DV_MARK, ETH_CRS_DV_MARK, 437077365a9SGeert Uytterhoeven VI1_DATA1_MARK, AVB_RXD0_MARK, ETH_RXD0_MARK, 438077365a9SGeert Uytterhoeven VI1_DATA2_MARK, AVB_RXD1_MARK, ETH_RXD1_MARK, 439077365a9SGeert Uytterhoeven VI1_DATA3_MARK, AVB_RXD2_MARK, ETH_MDIO_MARK, 440077365a9SGeert Uytterhoeven VI1_DATA4_MARK, AVB_RXD3_MARK, ETH_RX_ER_MARK, 441077365a9SGeert Uytterhoeven VI1_DATA5_MARK, AVB_RXD4_MARK, ETH_LINK_MARK, 442077365a9SGeert Uytterhoeven 443077365a9SGeert Uytterhoeven /* IPSR9 */ 444077365a9SGeert Uytterhoeven VI1_DATA6_MARK, AVB_RXD5_MARK, ETH_TXD1_MARK, 445077365a9SGeert Uytterhoeven VI1_DATA7_MARK, AVB_RXD6_MARK, ETH_TX_EN_MARK, 446077365a9SGeert Uytterhoeven VI1_CLKENB_MARK, SCL3_A_MARK, AVB_RXD7_MARK, ETH_MAGIC_MARK, 447077365a9SGeert Uytterhoeven VI1_FIELD_MARK, SDA3_A_MARK, AVB_RX_ER_MARK, ETH_TXD0_MARK, 448077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, RX0_B_MARK, SCL0_C_MARK, AVB_GTXREFCLK_MARK, ETH_MDC_MARK, 449077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, TX0_B_MARK, SDA0_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_CLK_MARK, 450077365a9SGeert Uytterhoeven VI1_DATA8_MARK, SCL2_B_MARK, AVB_TX_EN_MARK, 451077365a9SGeert Uytterhoeven VI1_DATA9_MARK, SDA2_B_MARK, AVB_TXD0_MARK, 452077365a9SGeert Uytterhoeven 453077365a9SGeert Uytterhoeven /* IPSR10 */ 454077365a9SGeert Uytterhoeven VI1_DATA10_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, 455077365a9SGeert Uytterhoeven VI1_DATA11_MARK, CAN0_TX_B_MARK, AVB_TXD2_MARK, 456077365a9SGeert Uytterhoeven AVB_TXD3_MARK, AUDIO_CLKA_B_MARK, SSI_SCK1_D_MARK, RX5_F_MARK, MSIOF0_RXD_B_MARK, 457077365a9SGeert Uytterhoeven AVB_TXD4_MARK, AUDIO_CLKB_B_MARK, SSI_WS1_D_MARK, TX5_F_MARK, MSIOF0_TXD_B_MARK, 458077365a9SGeert Uytterhoeven AVB_TXD5_MARK, SCIF_CLK_B_MARK, AUDIO_CLKC_B_MARK, SSI_SDATA1_D_MARK, MSIOF0_SCK_B_MARK, 459077365a9SGeert Uytterhoeven SCL0_A_MARK, RX0_C_MARK, PWM5_A_MARK, TCLK1_B_MARK, AVB_TXD6_MARK, CAN1_RX_D_MARK, MSIOF0_SYNC_B_MARK, 460077365a9SGeert Uytterhoeven SDA0_A_MARK, TX0_C_MARK, IRQ5_MARK, CAN_CLK_A_MARK, AVB_GTX_CLK_MARK, CAN1_TX_D_MARK, DVC_MUTE_MARK, 461077365a9SGeert Uytterhoeven SCL1_A_MARK, RX4_A_MARK, PWM5_D_MARK, DU1_DR0_MARK, SSI_SCK6_B_MARK, VI0_G0_MARK, 462077365a9SGeert Uytterhoeven 463077365a9SGeert Uytterhoeven /* IPSR11 */ 464077365a9SGeert Uytterhoeven SDA1_A_MARK, TX4_A_MARK, DU1_DR1_MARK, SSI_WS6_B_MARK, VI0_G1_MARK, 465077365a9SGeert Uytterhoeven MSIOF0_RXD_A_MARK, RX5_A_MARK, SCL2_C_MARK, DU1_DR2_MARK, QSPI1_MOSI_QSPI1_IO0_MARK, SSI_SDATA6_B_MARK, VI0_G2_MARK, 466077365a9SGeert Uytterhoeven MSIOF0_TXD_A_MARK, TX5_A_MARK, SDA2_C_MARK, DU1_DR3_MARK, QSPI1_MISO_QSPI1_IO1_MARK, SSI_WS78_B_MARK, VI0_G3_MARK, 467077365a9SGeert Uytterhoeven MSIOF0_SCK_A_MARK, IRQ0_MARK, DU1_DR4_MARK, QSPI1_SPCLK_MARK, SSI_SCK78_B_MARK, VI0_G4_MARK, 468077365a9SGeert Uytterhoeven MSIOF0_SYNC_A_MARK, PWM1_A_MARK, DU1_DR5_MARK, QSPI1_IO2_MARK, SSI_SDATA7_B_MARK, 469077365a9SGeert Uytterhoeven MSIOF0_SS1_A_MARK, DU1_DR6_MARK, QSPI1_IO3_MARK, SSI_SDATA8_B_MARK, 470077365a9SGeert Uytterhoeven MSIOF0_SS2_A_MARK, DU1_DR7_MARK, QSPI1_SSL_MARK, 471077365a9SGeert Uytterhoeven HRX1_A_MARK, SCL4_A_MARK, PWM6_A_MARK, DU1_DG0_MARK, RX0_A_MARK, 472077365a9SGeert Uytterhoeven 473077365a9SGeert Uytterhoeven /* IPSR12 */ 474077365a9SGeert Uytterhoeven HTX1_A_MARK, SDA4_A_MARK, DU1_DG1_MARK, TX0_A_MARK, 475077365a9SGeert Uytterhoeven HCTS1_N_A_MARK, PWM2_A_MARK, DU1_DG2_MARK, REMOCON_B_MARK, 476077365a9SGeert Uytterhoeven HRTS1_N_A_MARK, DU1_DG3_MARK, SSI_WS1_B_MARK, IRQ1_MARK, 477077365a9SGeert Uytterhoeven SD2_CLK_MARK, HSCK1_MARK, DU1_DG4_MARK, SSI_SCK1_B_MARK, 478077365a9SGeert Uytterhoeven SD2_CMD_MARK, SCIF1_SCK_A_MARK, TCLK2_A_MARK, DU1_DG5_MARK, SSI_SCK2_B_MARK, PWM3_A_MARK, 479077365a9SGeert Uytterhoeven SD2_DAT0_MARK, RX1_A_MARK, SCL1_E_MARK, DU1_DG6_MARK, SSI_SDATA1_B_MARK, 480077365a9SGeert Uytterhoeven SD2_DAT1_MARK, TX1_A_MARK, SDA1_E_MARK, DU1_DG7_MARK, SSI_WS2_B_MARK, 481077365a9SGeert Uytterhoeven SD2_DAT2_MARK, RX2_A_MARK, DU1_DB0_MARK, SSI_SDATA2_B_MARK, 482077365a9SGeert Uytterhoeven 483077365a9SGeert Uytterhoeven /* IPSR13 */ 484077365a9SGeert Uytterhoeven SD2_DAT3_MARK, TX2_A_MARK, DU1_DB1_MARK, SSI_WS9_B_MARK, 485077365a9SGeert Uytterhoeven SD2_CD_MARK, SCIF2_SCK_A_MARK, DU1_DB2_MARK, SSI_SCK9_B_MARK, 486077365a9SGeert Uytterhoeven SD2_WP_MARK, SCIF3_SCK_MARK, DU1_DB3_MARK, SSI_SDATA9_B_MARK, 487077365a9SGeert Uytterhoeven RX3_A_MARK, SCL1_C_MARK, MSIOF1_RXD_B_MARK, DU1_DB4_MARK, AUDIO_CLKA_C_MARK, SSI_SDATA4_B_MARK, 488077365a9SGeert Uytterhoeven TX3_A_MARK, SDA1_C_MARK, MSIOF1_TXD_B_MARK, DU1_DB5_MARK, AUDIO_CLKB_C_MARK, SSI_WS4_B_MARK, 489077365a9SGeert Uytterhoeven SCL2_A_MARK, MSIOF1_SCK_B_MARK, DU1_DB6_MARK, AUDIO_CLKC_C_MARK, SSI_SCK4_B_MARK, 490077365a9SGeert Uytterhoeven SDA2_A_MARK, MSIOF1_SYNC_B_MARK, DU1_DB7_MARK, AUDIO_CLKOUT_C_MARK, 491077365a9SGeert Uytterhoeven SSI_SCK5_A_MARK, DU1_DOTCLKOUT1_MARK, 492077365a9SGeert Uytterhoeven 493077365a9SGeert Uytterhoeven /* IPSR14 */ 494077365a9SGeert Uytterhoeven SSI_WS5_A_MARK, SCL3_C_MARK, DU1_DOTCLKIN_MARK, 495077365a9SGeert Uytterhoeven SSI_SDATA5_A_MARK, SDA3_C_MARK, DU1_DOTCLKOUT0_MARK, 496077365a9SGeert Uytterhoeven SSI_SCK6_A_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, 497077365a9SGeert Uytterhoeven SSI_WS6_A_MARK, SCL4_C_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, 498077365a9SGeert Uytterhoeven SSI_SDATA6_A_MARK, SDA4_C_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK, 499077365a9SGeert Uytterhoeven SSI_SCK78_A_MARK, SDA4_E_MARK, DU1_DISP_MARK, 500077365a9SGeert Uytterhoeven SSI_WS78_A_MARK, SCL4_E_MARK, DU1_CDE_MARK, 501077365a9SGeert Uytterhoeven SSI_SDATA7_A_MARK, IRQ8_MARK, AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, VI0_G5_MARK, 502077365a9SGeert Uytterhoeven 503077365a9SGeert Uytterhoeven /* IPSR15 */ 504077365a9SGeert Uytterhoeven SSI_SCK0129_A_MARK, MSIOF1_RXD_A_MARK, RX5_D_MARK, VI0_G6_MARK, 505077365a9SGeert Uytterhoeven SSI_WS0129_A_MARK, MSIOF1_TXD_A_MARK, TX5_D_MARK, VI0_G7_MARK, 506077365a9SGeert Uytterhoeven SSI_SDATA0_A_MARK, MSIOF1_SYNC_A_MARK, PWM0_C_MARK, VI0_R0_MARK, 507077365a9SGeert Uytterhoeven SSI_SCK34_MARK, MSIOF1_SCK_A_MARK, AVB_MDC_MARK, DACK1_MARK, VI0_R1_MARK, 508077365a9SGeert Uytterhoeven SSI_WS34_MARK, MSIOF1_SS1_A_MARK, AVB_MDIO_MARK, CAN1_RX_A_MARK, DREQ1_N_MARK, VI0_R2_MARK, 509077365a9SGeert Uytterhoeven SSI_SDATA3_MARK, MSIOF1_SS2_A_MARK, AVB_LINK_MARK, CAN1_TX_A_MARK, DREQ2_N_MARK, VI0_R3_MARK, 510077365a9SGeert Uytterhoeven SSI_SCK4_A_MARK, AVB_MAGIC_MARK, VI0_R4_MARK, 511077365a9SGeert Uytterhoeven SSI_WS4_A_MARK, AVB_PHY_INT_MARK, VI0_R5_MARK, 512077365a9SGeert Uytterhoeven 513077365a9SGeert Uytterhoeven /* IPSR16 */ 514077365a9SGeert Uytterhoeven SSI_SDATA4_A_MARK, AVB_CRS_MARK, VI0_R6_MARK, 515077365a9SGeert Uytterhoeven SSI_SCK1_A_MARK, SCIF1_SCK_B_MARK, PWM1_D_MARK, IRQ9_MARK, REMOCON_A_MARK, DACK2_MARK, VI0_CLK_MARK, AVB_COL_MARK, 516077365a9SGeert Uytterhoeven SSI_SDATA8_A_MARK, RX1_B_MARK, CAN0_RX_D_MARK, AVB_AVTP_CAPTURE_B_MARK, VI0_R7_MARK, 517077365a9SGeert Uytterhoeven SSI_WS1_A_MARK, TX1_B_MARK, CAN0_TX_D_MARK, AVB_AVTP_MATCH_B_MARK, VI0_DATA0_VI0_B0_MARK, 518077365a9SGeert Uytterhoeven SSI_SDATA1_A_MARK, HRX1_B_MARK, VI0_DATA1_VI0_B1_MARK, 519077365a9SGeert Uytterhoeven SSI_SCK2_A_MARK, HTX1_B_MARK, AVB_TXD7_MARK, VI0_DATA2_VI0_B2_MARK, 520077365a9SGeert Uytterhoeven SSI_WS2_A_MARK, HCTS1_N_B_MARK, AVB_TX_ER_MARK, VI0_DATA3_VI0_B3_MARK, 521077365a9SGeert Uytterhoeven SSI_SDATA2_A_MARK, HRTS1_N_B_MARK, VI0_DATA4_VI0_B4_MARK, 522077365a9SGeert Uytterhoeven 523077365a9SGeert Uytterhoeven /* IPSR17 */ 524077365a9SGeert Uytterhoeven SSI_SCK9_A_MARK, RX2_B_MARK, SCL3_E_MARK, EX_WAIT1_MARK, VI0_DATA5_VI0_B5_MARK, 525077365a9SGeert Uytterhoeven SSI_WS9_A_MARK, TX2_B_MARK, SDA3_E_MARK, VI0_DATA6_VI0_B6_MARK, 526077365a9SGeert Uytterhoeven SSI_SDATA9_A_MARK, SCIF2_SCK_B_MARK, PWM2_D_MARK, VI0_DATA7_VI0_B7_MARK, 527077365a9SGeert Uytterhoeven AUDIO_CLKA_A_MARK, SCL0_B_MARK, VI0_CLKENB_MARK, 528077365a9SGeert Uytterhoeven AUDIO_CLKB_A_MARK, SDA0_B_MARK, VI0_FIELD_MARK, 529077365a9SGeert Uytterhoeven AUDIO_CLKC_A_MARK, SCL4_B_MARK, VI0_HSYNC_N_MARK, 530077365a9SGeert Uytterhoeven AUDIO_CLKOUT_A_MARK, SDA4_B_MARK, VI0_VSYNC_N_MARK, 531077365a9SGeert Uytterhoeven 532077365a9SGeert Uytterhoeven PINMUX_MARK_END, 533077365a9SGeert Uytterhoeven }; 534077365a9SGeert Uytterhoeven 535077365a9SGeert Uytterhoeven static const u16 pinmux_data[] = { 536077365a9SGeert Uytterhoeven PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ 537077365a9SGeert Uytterhoeven 538077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_PWEN), 539077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_OVC), 540077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB1_PWEN), 541077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB1_OVC), 542077365a9SGeert Uytterhoeven PINMUX_SINGLE(CLKOUT), 543077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_CLK_SDHI1_CLK), 544077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_CMD_SDHI1_CMD), 545077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D0_SDHI1_D0), 546077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D1_SDHI1_D1), 547077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D2_SDHI1_D2), 548077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D3_SDHI1_D3), 549077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D6), 550077365a9SGeert Uytterhoeven PINMUX_SINGLE(MMC0_D7), 551077365a9SGeert Uytterhoeven 552077365a9SGeert Uytterhoeven /* IPSR0 */ 553077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_3_0, SD0_CLK), 554077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_3_0, SSI_SCK1_C, SEL_SSI1_2), 555077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_3_0, RX3_C, SEL_SCIF3_2), 556077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_7_4, SD0_CMD), 557077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_7_4, SSI_WS1_C, SEL_SSI1_2), 558077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_7_4, TX3_C, SEL_SCIF3_2), 559077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11_8, SD0_DAT0), 560077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_8, SSI_SDATA1_C, SEL_SSI1_2), 561077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_8, RX4_E, SEL_SCIF4_4), 562077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15_12, SD0_DAT1), 563077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, SSI_SCK0129_B, SEL_SSI0_1), 564077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, TX4_E, SEL_SCIF4_4), 565077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_19_16, SD0_DAT2), 566077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, SSI_WS0129_B, SEL_SSI0_1), 567077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, RX5_E, SEL_SCIF5_4), 568077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_23_20, SD0_DAT3), 569077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_23_20, SSI_SDATA0_B, SEL_SSI0_1), 570077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_23_20, TX5_E, SEL_SCIF5_4), 571077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_27_24, SD0_CD), 572077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_27_24, CAN0_RX_A, SEL_CAN0_0), 573077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, SD0_WP), 574077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, IRQ7), 575077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_31_28, CAN0_TX_A, SEL_CAN0_0), 576077365a9SGeert Uytterhoeven 577077365a9SGeert Uytterhoeven /* IPSR1 */ 578077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, MMC0_D4), 579077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, SD1_CD), 580077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, MMC0_D5), 581077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, SD1_WP), 582077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, D0), 583077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, SCL3_B, SEL_I2C03_1), 584077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, RX5_B, SEL_SCIF5_1), 585077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, IRQ4), 586077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, MSIOF2_RXD_C, SEL_MSIOF2_2), 587077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, SSI_SDATA5_B, SEL_SSI5_1), 588077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_15_12, D1), 589077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_15_12, SDA3_B, SEL_I2C03_1), 590077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_15_12, TX5_B, SEL_SCIF5_1), 591077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_15_12, MSIOF2_TXD_C, SEL_MSIOF2_2), 592077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_15_12, SSI_WS5_B, SEL_SSI5_1), 593077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_16, D2), 594077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_16, RX4_B, SEL_SCIF4_1), 595077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_16, SCL0_D, SEL_I2C00_3), 596077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_16, PWM1_C), 597077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_16, MSIOF2_SCK_C, SEL_MSIOF2_2), 598077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_19_16, SSI_SCK5_B, SEL_SSI5_1), 599077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_23_20, D3), 600077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_23_20, TX4_B, SEL_SCIF4_1), 601077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_23_20, SDA0_D, SEL_I2C00_3), 602077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_23_20, PWM0_A), 603077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_23_20, MSIOF2_SYNC_C, SEL_MSIOF2_2), 604077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, D4), 605077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, IRQ3), 606077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_27_24, TCLK1_A, SEL_TMU1_0), 607077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, PWM6_C), 608077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, D5), 609077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, HRX2), 610077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_31_28, SCL1_B, SEL_I2C01_1), 611077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, PWM2_C), 612077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_31_28, TCLK2_B, SEL_TMU2_1), 613077365a9SGeert Uytterhoeven 614077365a9SGeert Uytterhoeven /* IPSR2 */ 615077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, D6), 616077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, HTX2), 617077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_3_0, SDA1_B, SEL_I2C01_1), 618077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, PWM4_C), 619077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, D7), 620077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, HSCK2), 621077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_7_4, SCIF1_SCK_C, SEL_SCIF1_2), 622077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, IRQ6), 623077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, PWM5_C), 624077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_8, D8), 625077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_8, HCTS2_N), 626077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_11_8, RX1_C, SEL_SCIF1_2), 627077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_11_8, SCL1_D, SEL_I2C01_3), 628077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_8, PWM3_C), 629077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, D9), 630077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, HRTS2_N), 631077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_12, TX1_C, SEL_SCIF1_2), 632077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_15_12, SDA1_D, SEL_I2C01_3), 633077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_19_16, D10), 634077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_19_16, MSIOF2_RXD_A, SEL_MSIOF2_0), 635077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_19_16, HRX0_B, SEL_HSCIF0_1), 636077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_23_20, D11), 637077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_TXD_A, SEL_MSIOF2_0), 638077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_23_20, HTX0_B, SEL_HSCIF0_1), 639077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_27_24, D12), 640077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SCK_A, SEL_MSIOF2_0), 641077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_27_24, HSCK0), 642077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_27_24, CAN_CLK_C, SEL_CANCLK_2), 643077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_31_28, D13), 644077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 645077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_31_28, RX4_C, SEL_SCIF4_2), 646077365a9SGeert Uytterhoeven 647077365a9SGeert Uytterhoeven /* IPSR3 */ 648077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, D14), 649077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SS1), 650077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, TX4_C, SEL_SCIF4_2), 651077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, CAN1_RX_B, SEL_CAN1_1), 652077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, AVB_AVTP_CAPTURE_A, SEL_AVB_0), 653077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, D15), 654077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_SS2), 655077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, PWM4_A), 656077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, CAN1_TX_B, SEL_CAN1_1), 657077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, IRQ2), 658077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, AVB_AVTP_MATCH_A, SEL_AVB_0), 659077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, QSPI0_SPCLK), 660077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, WE0_N), 661077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, QSPI0_MOSI_QSPI0_IO0), 662077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, BS_N), 663077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_16, QSPI0_MISO_QSPI0_IO1), 664077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_16, RD_WR_N), 665077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_23_20, QSPI0_IO2), 666077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_23_20, CS0_N), 667077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_27_24, QSPI0_IO3), 668077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_27_24, RD_N), 669077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_28, QSPI0_SSL), 670077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_28, WE1_N), 671077365a9SGeert Uytterhoeven 672077365a9SGeert Uytterhoeven /* IPSR4 */ 673077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_3_0, EX_WAIT0), 674077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_3_0, CAN_CLK_B, SEL_CANCLK_1), 675077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_3_0, SCIF_CLK_A, SEL_SCIFCLK_0), 676077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_7_4, DU0_DR0), 677077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_4, RX5_C, SEL_SCIF5_2), 678077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_7_4, SCL2_D, SEL_I2C02_3), 679077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_7_4, A0), 680077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_8, DU0_DR1), 681077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_8, TX5_C, SEL_SCIF5_2), 682077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_8, SDA2_D, SEL_I2C02_3), 683077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_8, A1), 684077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_15_12, DU0_DR2), 685077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_12, RX0_D, SEL_SCIF0_3), 686077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_12, SCL0_E, SEL_I2C00_4), 687077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_15_12, A2), 688077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19_16, DU0_DR3), 689077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_19_16, TX0_D, SEL_SCIF0_3), 690077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_19_16, SDA0_E, SEL_I2C00_4), 691077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19_16, PWM0_B), 692077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19_16, A3), 693077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_20, DU0_DR4), 694077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_20, RX1_D, SEL_SCIF1_3), 695077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_20, A4), 696077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_24, DU0_DR5), 697077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_27_24, TX1_D, SEL_SCIF1_3), 698077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_24, PWM1_B), 699077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_24, A5), 700077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, DU0_DR6), 701077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_31_28, RX2_C, SEL_SCIF2_2), 702077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, A6), 703077365a9SGeert Uytterhoeven 704077365a9SGeert Uytterhoeven /* IPSR5 */ 705077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, DU0_DR7), 706077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_3_0, TX2_C, SEL_SCIF2_2), 707077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, PWM2_B), 708077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, A7), 709077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_7_4, DU0_DG0), 710077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_7_4, RX3_B, SEL_SCIF3_1), 711077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_7_4, SCL3_D, SEL_I2C03_3), 712077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_7_4, A8), 713077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, DU0_DG1), 714077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_11_8, TX3_B, SEL_SCIF3_1), 715077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_11_8, SDA3_D, SEL_I2C03_3), 716077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, PWM3_B), 717077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, A9), 718077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_15_12, DU0_DG2), 719077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_15_12, RX4_D, SEL_SCIF4_3), 720077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_15_12, A10), 721077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, DU0_DG3), 722077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_19_16, TX4_D, SEL_SCIF4_3), 723077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, PWM4_B), 724077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, A11), 725077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, DU0_DG4), 726077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_20, HRX0_A, SEL_HSCIF0_0), 727077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, A12), 728077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, DU0_DG5), 729077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_27_24, HTX0_A, SEL_HSCIF0_0), 730077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, PWM5_B), 731077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, A13), 732077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_31_28, DU0_DG6), 733077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_31_28, HRX1_C, SEL_HSCIF1_2), 734077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_31_28, A14), 735077365a9SGeert Uytterhoeven 736077365a9SGeert Uytterhoeven /* IPSR6 */ 737077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, DU0_DG7), 738077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_3_0, HTX1_C, SEL_HSCIF1_2), 739077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, PWM6_B), 740077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, A15), 741077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, DU0_DB0), 742077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_7_4, SCL4_D, SEL_I2C04_3), 743077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_7_4, CAN0_RX_C, SEL_CAN0_2), 744077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, A16), 745077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, DU0_DB1), 746077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_11_8, SDA4_D, SEL_I2C04_3), 747077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_11_8, CAN0_TX_C, SEL_CAN0_2), 748077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, A17), 749077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, DU0_DB2), 750077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, HCTS0_N), 751077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, A18), 752077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, DU0_DB3), 753077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, HRTS0_N), 754077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, A19), 755077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, DU0_DB4), 756077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_20, HCTS1_N_C, SEL_HSCIF1_2), 757077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, A20), 758077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_27_24, DU0_DB5), 759077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_27_24, HRTS1_N_C, SEL_HSCIF1_2), 760077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_27_24, A21), 761077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, DU0_DB6), 762077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, A22), 763077365a9SGeert Uytterhoeven 764077365a9SGeert Uytterhoeven /* IPSR7 */ 765077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, DU0_DB7), 766077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, A23), 767077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, DU0_DOTCLKIN), 768077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, A24), 769077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, DU0_DOTCLKOUT0), 770077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, A25), 771077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, DU0_DOTCLKOUT1), 772077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_15_12, MSIOF2_RXD_B, SEL_MSIOF2_1), 773077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, CS1_N_A26), 774077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, DU0_EXHSYNC_DU0_HSYNC), 775077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_19_16, MSIOF2_TXD_B, SEL_MSIOF2_1), 776077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, DREQ0_N), 777077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, DU0_EXVSYNC_DU0_VSYNC), 778077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_20, MSIOF2_SYNC_B, SEL_MSIOF2_1), 779077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, DACK0), 780077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, DU0_EXODDF_DU0_ODDF_DISP_CDE), 781077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_27_24, MSIOF2_SCK_B, SEL_MSIOF2_1), 782077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, DRACK0), 783077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_31_28, DU0_DISP), 784077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_31_28, CAN1_RX_C, SEL_CAN1_2), 785077365a9SGeert Uytterhoeven 786077365a9SGeert Uytterhoeven /* IPSR8 */ 787077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_0, DU0_CDE), 788077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_3_0, CAN1_TX_C, SEL_CAN1_2), 789077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_4, VI1_CLK), 790077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_4, AVB_RX_CLK), 791077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_4, ETH_REF_CLK), 792077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_8, VI1_DATA0), 793077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_8, AVB_RX_DV), 794077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_8, ETH_CRS_DV), 795077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_12, VI1_DATA1), 796077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_12, AVB_RXD0), 797077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_12, ETH_RXD0), 798077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_19_16, VI1_DATA2), 799077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_19_16, AVB_RXD1), 800077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_19_16, ETH_RXD1), 801077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_20, VI1_DATA3), 802077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_20, AVB_RXD2), 803077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_20, ETH_MDIO), 804077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_24, VI1_DATA4), 805077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_24, AVB_RXD3), 806077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_24, ETH_RX_ER), 807077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_31_28, VI1_DATA5), 808077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_31_28, AVB_RXD4), 809077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_31_28, ETH_LINK), 810077365a9SGeert Uytterhoeven 811077365a9SGeert Uytterhoeven /* IPSR9 */ 812077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_3_0, VI1_DATA6), 813077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_3_0, AVB_RXD5), 814077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_3_0, ETH_TXD1), 815077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7_4, VI1_DATA7), 816077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7_4, AVB_RXD6), 817077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7_4, ETH_TX_EN), 818077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, VI1_CLKENB), 819077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, SCL3_A, SEL_I2C03_0), 820077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, AVB_RXD7), 821077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, ETH_MAGIC), 822077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, VI1_FIELD), 823077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, SDA3_A, SEL_I2C03_0), 824077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, AVB_RX_ER), 825077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, ETH_TXD0), 826077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_19_16, VI1_HSYNC_N), 827077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_19_16, RX0_B, SEL_SCIF0_1), 828077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_19_16, SCL0_C, SEL_I2C00_2), 829077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_19_16, AVB_GTXREFCLK), 830077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_19_16, ETH_MDC), 831077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_23_20, VI1_VSYNC_N), 832077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_23_20, TX0_B, SEL_SCIF0_1), 833077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_23_20, SDA0_C, SEL_I2C00_2), 834077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_23_20, AUDIO_CLKOUT_B), 835077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_23_20, AVB_TX_CLK), 836077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_27_24, VI1_DATA8), 837077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_27_24, SCL2_B, SEL_I2C02_1), 838077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_27_24, AVB_TX_EN), 839077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_28, VI1_DATA9), 840077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, SDA2_B, SEL_I2C02_1), 841077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_28, AVB_TXD0), 842077365a9SGeert Uytterhoeven 843077365a9SGeert Uytterhoeven /* IPSR10 */ 844077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_3_0, VI1_DATA10), 845077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, CAN0_RX_B, SEL_CAN0_1), 846077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_3_0, AVB_TXD1), 847077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_7_4, VI1_DATA11), 848077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_7_4, CAN0_TX_B, SEL_CAN0_1), 849077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_7_4, AVB_TXD2), 850077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_11_8, AVB_TXD3), 851077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_8, AUDIO_CLKA_B, SEL_ADGA_1), 852077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_8, SSI_SCK1_D, SEL_SSI1_3), 853077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_8, RX5_F, SEL_SCIF5_5), 854077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_11_8, MSIOF0_RXD_B, SEL_MSIOF0_1), 855077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_15_12, AVB_TXD4), 856077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_15_12, AUDIO_CLKB_B, SEL_ADGB_1), 857077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_15_12, SSI_WS1_D, SEL_SSI1_3), 858077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_15_12, TX5_F, SEL_SCIF5_5), 859077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_15_12, MSIOF0_TXD_B, SEL_MSIOF0_1), 860077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_19_16, AVB_TXD5), 861077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_19_16, SCIF_CLK_B, SEL_SCIFCLK_1), 862077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_19_16, AUDIO_CLKC_B, SEL_ADGC_1), 863077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_19_16, SSI_SDATA1_D, SEL_SSI1_3), 864077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_19_16, MSIOF0_SCK_B, SEL_MSIOF0_1), 865077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_23_20, SCL0_A, SEL_I2C00_0), 866077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_23_20, RX0_C, SEL_SCIF0_2), 867077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_23_20, PWM5_A), 868077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_23_20, TCLK1_B, SEL_TMU1_1), 869077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_23_20, AVB_TXD6), 870077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_23_20, CAN1_RX_D, SEL_CAN1_3), 871077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_23_20, MSIOF0_SYNC_B, SEL_MSIOF0_1), 872077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_27_24, SDA0_A, SEL_I2C00_0), 873077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_27_24, TX0_C, SEL_SCIF0_2), 874077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_27_24, IRQ5), 875077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_27_24, CAN_CLK_A, SEL_CANCLK_0), 876077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_27_24, AVB_GTX_CLK), 877077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_27_24, CAN1_TX_D, SEL_CAN1_3), 878077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_27_24, DVC_MUTE), 879077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_28, SCL1_A, SEL_I2C01_0), 880077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_28, RX4_A, SEL_SCIF4_0), 881077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_31_28, PWM5_D), 882077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_31_28, DU1_DR0), 883077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_31_28, SSI_SCK6_B, SEL_SSI6_1), 884077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_31_28, VI0_G0), 885077365a9SGeert Uytterhoeven 886077365a9SGeert Uytterhoeven /* IPSR11 */ 887077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, SDA1_A, SEL_I2C01_0), 888077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, TX4_A, SEL_SCIF4_0), 889077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_3_0, DU1_DR1), 890077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, SSI_WS6_B, SEL_SSI6_1), 891077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_3_0, VI0_G1), 892077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_7_4, MSIOF0_RXD_A, SEL_MSIOF0_0), 893077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_7_4, RX5_A, SEL_SCIF5_0), 894077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_7_4, SCL2_C, SEL_I2C02_2), 895077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_7_4, DU1_DR2), 896077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_7_4, QSPI1_MOSI_QSPI1_IO0), 897077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_7_4, SSI_SDATA6_B, SEL_SSI6_1), 898077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_7_4, VI0_G2), 899077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_8, MSIOF0_TXD_A, SEL_MSIOF0_0), 900077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_8, TX5_A, SEL_SCIF5_0), 901077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_8, SDA2_C, SEL_I2C02_2), 902077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_11_8, DU1_DR3), 903077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_11_8, QSPI1_MISO_QSPI1_IO1), 904077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_11_8, SSI_WS78_B, SEL_SSI7_1), 905077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_11_8, VI0_G3), 906077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_15_12, MSIOF0_SCK_A, SEL_MSIOF0_0), 907077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_15_12, IRQ0), 908077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_15_12, DU1_DR4), 909077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_15_12, QSPI1_SPCLK), 910077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_15_12, SSI_SCK78_B, SEL_SSI7_1), 911077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_15_12, VI0_G4), 912077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_19_16, MSIOF0_SYNC_A, SEL_MSIOF0_0), 913077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_19_16, PWM1_A), 914077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_19_16, DU1_DR5), 915077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_19_16, QSPI1_IO2), 916077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_19_16, SSI_SDATA7_B, SEL_SSI7_1), 917077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_23_20, MSIOF0_SS1_A, SEL_MSIOF0_0), 918077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_23_20, DU1_DR6), 919077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_23_20, QSPI1_IO3), 920077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_23_20, SSI_SDATA8_B, SEL_SSI8_1), 921077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_27_24, MSIOF0_SS2_A, SEL_MSIOF0_0), 922077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_27_24, DU1_DR7), 923077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_27_24, QSPI1_SSL), 924077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_31_28, HRX1_A, SEL_HSCIF1_0), 925077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_31_28, SCL4_A, SEL_I2C04_0), 926077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_28, PWM6_A), 927077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_28, DU1_DG0), 928077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_31_28, RX0_A, SEL_SCIF0_0), 929077365a9SGeert Uytterhoeven 930077365a9SGeert Uytterhoeven /* IPSR12 */ 931077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_0, HTX1_A, SEL_HSCIF1_0), 932077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_0, SDA4_A, SEL_I2C04_0), 933077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_3_0, DU1_DG1), 934077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_0, TX0_A, SEL_SCIF0_0), 935077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_7_4, HCTS1_N_A, SEL_HSCIF1_0), 936077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_7_4, PWM2_A), 937077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_7_4, DU1_DG2), 938077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_7_4, REMOCON_B, SEL_RCN_1), 939077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_11_8, HRTS1_N_A, SEL_HSCIF1_0), 940077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_11_8, DU1_DG3), 941077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_11_8, SSI_WS1_B, SEL_SSI1_1), 942077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_11_8, IRQ1), 943077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_15_12, SD2_CLK), 944077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_15_12, HSCK1), 945077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_15_12, DU1_DG4), 946077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_15_12, SSI_SCK1_B, SEL_SSI1_1), 947077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_16, SD2_CMD), 948077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_16, SCIF1_SCK_A, SEL_SCIF1_0), 949077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_16, TCLK2_A, SEL_TMU2_0), 950077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_16, DU1_DG5), 951077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_16, SSI_SCK2_B, SEL_SSI2_1), 952077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_16, PWM3_A), 953077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_23_20, SD2_DAT0), 954077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_23_20, RX1_A, SEL_SCIF1_0), 955077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_23_20, SCL1_E, SEL_I2C01_4), 956077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_23_20, DU1_DG6), 957077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_23_20, SSI_SDATA1_B, SEL_SSI1_1), 958077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_27_24, SD2_DAT1), 959077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_24, TX1_A, SEL_SCIF1_0), 960077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_24, SDA1_E, SEL_I2C01_4), 961077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_27_24, DU1_DG7), 962077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_24, SSI_WS2_B, SEL_SSI2_1), 963077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_31_28, SD2_DAT2), 964077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_31_28, RX2_A, SEL_SCIF2_0), 965077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_31_28, DU1_DB0), 966077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_31_28, SSI_SDATA2_B, SEL_SSI2_1), 967077365a9SGeert Uytterhoeven 968077365a9SGeert Uytterhoeven /* IPSR13 */ 969077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_3_0, SD2_DAT3), 970077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_3_0, TX2_A, SEL_SCIF2_0), 971077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_3_0, DU1_DB1), 972077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_3_0, SSI_WS9_B, SEL_SSI9_1), 973077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_7_4, SD2_CD), 974077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_7_4, SCIF2_SCK_A, SEL_SCIF2_CLK_0), 975077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_7_4, DU1_DB2), 976077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_7_4, SSI_SCK9_B, SEL_SSI9_1), 977077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_11_8, SD2_WP), 978077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_11_8, SCIF3_SCK), 979077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_11_8, DU1_DB3), 980077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA9_B, SEL_SSI9_1), 981077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_12, RX3_A, SEL_SCIF3_0), 982077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_12, SCL1_C, SEL_I2C01_2), 983077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_12, MSIOF1_RXD_B, SEL_MSIOF1_1), 984077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_15_12, DU1_DB4), 985077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_12, AUDIO_CLKA_C, SEL_ADGA_2), 986077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA4_B, SEL_SSI4_1), 987077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_19_16, TX3_A, SEL_SCIF3_0), 988077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_19_16, SDA1_C, SEL_I2C01_2), 989077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_19_16, MSIOF1_TXD_B, SEL_MSIOF1_1), 990077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_19_16, DU1_DB5), 991077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_19_16, AUDIO_CLKB_C, SEL_ADGB_2), 992077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_19_16, SSI_WS4_B, SEL_SSI4_1), 993077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_23_20, SCL2_A, SEL_I2C02_0), 994077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_23_20, MSIOF1_SCK_B, SEL_MSIOF1_1), 995077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_23_20, DU1_DB6), 996077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_23_20, AUDIO_CLKC_C, SEL_ADGC_2), 997077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK4_B, SEL_SSI4_1), 998077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_27_24, SDA2_A, SEL_I2C02_0), 999077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_27_24, MSIOF1_SYNC_B, SEL_MSIOF1_1), 1000077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_27_24, DU1_DB7), 1001077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_27_24, AUDIO_CLKOUT_C), 1002077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_31_28, SSI_SCK5_A, SEL_SSI5_0), 1003077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_31_28, DU1_DOTCLKOUT1), 1004077365a9SGeert Uytterhoeven 1005077365a9SGeert Uytterhoeven /* IPSR14 */ 1006077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_3_0, SSI_WS5_A, SEL_SSI5_0), 1007077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_3_0, SCL3_C, SEL_I2C03_2), 1008077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_3_0, DU1_DOTCLKIN), 1009077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_7_4, SSI_SDATA5_A, SEL_SSI5_0), 1010077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_7_4, SDA3_C, SEL_I2C03_2), 1011077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_7_4, DU1_DOTCLKOUT0), 1012077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_11_8, SSI_SCK6_A, SEL_SSI6_0), 1013077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_11_8, DU1_EXODDF_DU1_ODDF_DISP_CDE), 1014077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, SSI_WS6_A, SEL_SSI6_0), 1015077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, SCL4_C, SEL_I2C04_2), 1016077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_15_12, DU1_EXHSYNC_DU1_HSYNC), 1017077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_16, SSI_SDATA6_A, SEL_SSI6_0), 1018077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_19_16, SDA4_C, SEL_I2C04_2), 1019077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_19_16, DU1_EXVSYNC_DU1_VSYNC), 1020077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_23_20, SSI_SCK78_A, SEL_SSI7_0), 1021077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_23_20, SDA4_E, SEL_I2C04_4), 1022077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_23_20, DU1_DISP), 1023077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_27_24, SSI_WS78_A, SEL_SSI7_0), 1024077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_27_24, SCL4_E, SEL_I2C04_4), 1025077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_27_24, DU1_CDE), 1026077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_28, SSI_SDATA7_A, SEL_SSI7_0), 1027077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_31_28, IRQ8), 1028077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_28, AUDIO_CLKA_D, SEL_ADGA_3), 1029077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_31_28, CAN_CLK_D, SEL_CANCLK_3), 1030077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_31_28, VI0_G5), 1031077365a9SGeert Uytterhoeven 1032077365a9SGeert Uytterhoeven /* IPSR15 */ 1033077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_3_0, SSI_SCK0129_A, SEL_SSI0_0), 1034077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_3_0, MSIOF1_RXD_A, SEL_MSIOF1_0), 1035077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_3_0, RX5_D, SEL_SCIF5_3), 1036077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_3_0, VI0_G6), 1037077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_7_4, SSI_WS0129_A, SEL_SSI0_0), 1038077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_7_4, MSIOF1_TXD_A, SEL_MSIOF1_0), 1039077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_7_4, TX5_D, SEL_SCIF5_3), 1040077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_7_4, VI0_G7), 1041077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_8, SSI_SDATA0_A, SEL_SSI0_0), 1042077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_8, MSIOF1_SYNC_A, SEL_MSIOF1_0), 1043077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_8, PWM0_C), 1044077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_8, VI0_R0), 1045077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_12, SSI_SCK34), 1046077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_15_12, MSIOF1_SCK_A, SEL_MSIOF1_0), 1047077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_12, AVB_MDC), 1048077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_12, DACK1), 1049077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_12, VI0_R1), 1050077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_16, SSI_WS34), 1051077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_19_16, MSIOF1_SS1_A, SEL_MSIOF1_0), 1052077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_16, AVB_MDIO), 1053077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_19_16, CAN1_RX_A, SEL_CAN1_0), 1054077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_16, DREQ1_N), 1055077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_16, VI0_R2), 1056077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_23_20, SSI_SDATA3), 1057077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_20, MSIOF1_SS2_A, SEL_MSIOF1_0), 1058077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_23_20, AVB_LINK), 1059077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_23_20, CAN1_TX_A, SEL_CAN1_0), 1060077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_23_20, DREQ2_N), 1061077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_23_20, VI0_R3), 1062077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_27_24, SSI_SCK4_A, SEL_SSI4_0), 1063077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_27_24, AVB_MAGIC), 1064077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_27_24, VI0_R4), 1065077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_31_28, SSI_WS4_A, SEL_SSI4_0), 1066077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_31_28, AVB_PHY_INT), 1067077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_31_28, VI0_R5), 1068077365a9SGeert Uytterhoeven 1069077365a9SGeert Uytterhoeven /* IPSR16 */ 1070077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_3_0, SSI_SDATA4_A, SEL_SSI4_0), 1071077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_3_0, AVB_CRS), 1072077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_3_0, VI0_R6), 1073077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_4, SSI_SCK1_A, SEL_SSI1_0), 1074077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_4, SCIF1_SCK_B, SEL_SCIF1_1), 1075077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_4, PWM1_D), 1076077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_4, IRQ9), 1077077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7_4, REMOCON_A, SEL_RCN_0), 1078077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_4, DACK2), 1079077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_4, VI0_CLK), 1080077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7_4, AVB_COL), 1081077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_8, SSI_SDATA8_A, SEL_SSI8_0), 1082077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_8, RX1_B, SEL_SCIF1_1), 1083077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_8, CAN0_RX_D, SEL_CAN0_3), 1084077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_11_8, AVB_AVTP_CAPTURE_B, SEL_AVB_1), 1085077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_11_8, VI0_R7), 1086077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_15_12, SSI_WS1_A, SEL_SSI1_0), 1087077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_15_12, TX1_B, SEL_SCIF1_1), 1088077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_15_12, CAN0_TX_D, SEL_CAN0_3), 1089077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_15_12, AVB_AVTP_MATCH_B, SEL_AVB_1), 1090077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_15_12, VI0_DATA0_VI0_B0), 1091077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_19_16, SSI_SDATA1_A, SEL_SSI1_0), 1092077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_19_16, HRX1_B, SEL_HSCIF1_1), 1093077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_19_16, VI0_DATA1_VI0_B1), 1094077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_23_20, SSI_SCK2_A, SEL_SSI2_0), 1095077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_23_20, HTX1_B, SEL_HSCIF1_1), 1096077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_23_20, AVB_TXD7), 1097077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_23_20, VI0_DATA2_VI0_B2), 1098077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_27_24, SSI_WS2_A, SEL_SSI2_0), 1099077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_27_24, HCTS1_N_B, SEL_HSCIF1_1), 1100077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_27_24, AVB_TX_ER), 1101077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_27_24, VI0_DATA3_VI0_B3), 1102077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA2_A, SEL_SSI2_0), 1103077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_31_28, HRTS1_N_B, SEL_HSCIF1_1), 1104077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_31_28, VI0_DATA4_VI0_B4), 1105077365a9SGeert Uytterhoeven 1106077365a9SGeert Uytterhoeven /* IPSR17 */ 1107077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_3_0, SSI_SCK9_A, SEL_SSI9_0), 1108077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_3_0, RX2_B, SEL_SCIF2_1), 1109077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_3_0, SCL3_E, SEL_I2C03_4), 1110077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_3_0, EX_WAIT1), 1111077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_3_0, VI0_DATA5_VI0_B5), 1112077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_7_4, SSI_WS9_A, SEL_SSI9_0), 1113077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_7_4, TX2_B, SEL_SCIF2_1), 1114077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_7_4, SDA3_E, SEL_I2C03_4), 1115077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_7_4, VI0_DATA6_VI0_B6), 1116077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_11_8, SSI_SDATA9_A, SEL_SSI9_0), 1117077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_11_8, SCIF2_SCK_B), 1118077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_11_8, PWM2_D), 1119077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_11_8, VI0_DATA7_VI0_B7), 1120077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_15_12, AUDIO_CLKA_A, SEL_ADGA_0), 1121077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_15_12, SCL0_B, SEL_I2C00_1), 1122077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_15_12, VI0_CLKENB), 1123077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_19_16, AUDIO_CLKB_A, SEL_ADGB_0), 1124077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_19_16, SDA0_B, SEL_I2C00_1), 1125077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_19_16, VI0_FIELD), 1126077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_23_20, AUDIO_CLKC_A, SEL_ADGC_0), 1127077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_23_20, SCL4_B, SEL_I2C04_1), 1128077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_23_20, VI0_HSYNC_N), 1129077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_A), 1130077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP17_27_24, SDA4_B, SEL_I2C04_1), 1131077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP17_27_24, VI0_VSYNC_N), 1132077365a9SGeert Uytterhoeven }; 1133077365a9SGeert Uytterhoeven 1134fd685013SGeert Uytterhoeven /* 1135fd685013SGeert Uytterhoeven * Pins not associated with a GPIO port. 1136fd685013SGeert Uytterhoeven */ 1137fd685013SGeert Uytterhoeven enum { 1138fd685013SGeert Uytterhoeven GP_ASSIGN_LAST(), 1139fd685013SGeert Uytterhoeven NOGP_ALL(), 1140fd685013SGeert Uytterhoeven }; 1141fd685013SGeert Uytterhoeven 1142077365a9SGeert Uytterhoeven static const struct sh_pfc_pin pinmux_pins[] = { 1143077365a9SGeert Uytterhoeven PINMUX_GPIO_GP_ALL(), 1144fd685013SGeert Uytterhoeven PINMUX_NOGP_ALL(), 1145077365a9SGeert Uytterhoeven }; 1146077365a9SGeert Uytterhoeven 1147077365a9SGeert Uytterhoeven /* - AVB -------------------------------------------------------------------- */ 1148077365a9SGeert Uytterhoeven static const unsigned int avb_col_pins[] = { 1149077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), 1150077365a9SGeert Uytterhoeven }; 1151077365a9SGeert Uytterhoeven static const unsigned int avb_col_mux[] = { 1152077365a9SGeert Uytterhoeven AVB_COL_MARK, 1153077365a9SGeert Uytterhoeven }; 1154077365a9SGeert Uytterhoeven static const unsigned int avb_crs_pins[] = { 1155077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), 1156077365a9SGeert Uytterhoeven }; 1157077365a9SGeert Uytterhoeven static const unsigned int avb_crs_mux[] = { 1158077365a9SGeert Uytterhoeven AVB_CRS_MARK, 1159077365a9SGeert Uytterhoeven }; 1160077365a9SGeert Uytterhoeven static const unsigned int avb_link_pins[] = { 1161077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 14), 1162077365a9SGeert Uytterhoeven }; 1163077365a9SGeert Uytterhoeven static const unsigned int avb_link_mux[] = { 1164077365a9SGeert Uytterhoeven AVB_LINK_MARK, 1165077365a9SGeert Uytterhoeven }; 1166077365a9SGeert Uytterhoeven static const unsigned int avb_magic_pins[] = { 1167077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), 1168077365a9SGeert Uytterhoeven }; 1169077365a9SGeert Uytterhoeven static const unsigned int avb_magic_mux[] = { 1170077365a9SGeert Uytterhoeven AVB_MAGIC_MARK, 1171077365a9SGeert Uytterhoeven }; 1172077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_pins[] = { 1173077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 16), 1174077365a9SGeert Uytterhoeven }; 1175077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_mux[] = { 1176077365a9SGeert Uytterhoeven AVB_PHY_INT_MARK, 1177077365a9SGeert Uytterhoeven }; 1178077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_pins[] = { 1179077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), 1180077365a9SGeert Uytterhoeven }; 1181077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_mux[] = { 1182077365a9SGeert Uytterhoeven AVB_MDC_MARK, AVB_MDIO_MARK, 1183077365a9SGeert Uytterhoeven }; 1184077365a9SGeert Uytterhoeven static const unsigned int avb_mii_tx_rx_pins[] = { 1185077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), 1186077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 13), 1187077365a9SGeert Uytterhoeven 1188077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 1189077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 1), 1190077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), 1191077365a9SGeert Uytterhoeven }; 1192077365a9SGeert Uytterhoeven static const unsigned int avb_mii_tx_rx_mux[] = { 1193077365a9SGeert Uytterhoeven AVB_TX_CLK_MARK, AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, 1194077365a9SGeert Uytterhoeven AVB_TXD3_MARK, AVB_TX_EN_MARK, 1195077365a9SGeert Uytterhoeven 1196077365a9SGeert Uytterhoeven AVB_RX_CLK_MARK, AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1197077365a9SGeert Uytterhoeven AVB_RXD3_MARK, AVB_RX_DV_MARK, AVB_RX_ER_MARK, 1198077365a9SGeert Uytterhoeven }; 1199077365a9SGeert Uytterhoeven static const unsigned int avb_mii_tx_er_pins[] = { 1200077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 23), 1201077365a9SGeert Uytterhoeven }; 1202077365a9SGeert Uytterhoeven static const unsigned int avb_mii_tx_er_mux[] = { 1203077365a9SGeert Uytterhoeven AVB_TX_ER_MARK, 1204077365a9SGeert Uytterhoeven }; 1205077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_tx_rx_pins[] = { 1206077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), 1207077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16), 1208077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29), 1209077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(5, 22), RCAR_GP_PIN(3, 13), 1210077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 23), 1211077365a9SGeert Uytterhoeven 1212077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 1213077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), 1214077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), 1215077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 10), 1216077365a9SGeert Uytterhoeven }; 1217077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_tx_rx_mux[] = { 1218077365a9SGeert Uytterhoeven AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, AVB_TX_CLK_MARK, AVB_TXD0_MARK, 1219077365a9SGeert Uytterhoeven AVB_TXD1_MARK, AVB_TXD2_MARK, AVB_TXD3_MARK, AVB_TXD4_MARK, 1220077365a9SGeert Uytterhoeven AVB_TXD5_MARK, AVB_TXD6_MARK, AVB_TXD7_MARK, AVB_TX_EN_MARK, 1221077365a9SGeert Uytterhoeven AVB_TX_ER_MARK, 1222077365a9SGeert Uytterhoeven 1223077365a9SGeert Uytterhoeven AVB_RX_CLK_MARK, AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1224077365a9SGeert Uytterhoeven AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, AVB_RXD6_MARK, 1225077365a9SGeert Uytterhoeven AVB_RXD7_MARK, AVB_RX_DV_MARK, AVB_RX_ER_MARK, 1226077365a9SGeert Uytterhoeven }; 1227077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_a_pins[] = { 1228077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 15), 1229077365a9SGeert Uytterhoeven }; 1230077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_a_mux[] = { 1231077365a9SGeert Uytterhoeven AVB_AVTP_MATCH_A_MARK, 1232077365a9SGeert Uytterhoeven }; 1233077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_a_pins[] = { 1234077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), 1235077365a9SGeert Uytterhoeven }; 1236077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_a_mux[] = { 1237077365a9SGeert Uytterhoeven AVB_AVTP_CAPTURE_A_MARK, 1238077365a9SGeert Uytterhoeven }; 1239077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_b_pins[] = { 1240077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), 1241077365a9SGeert Uytterhoeven }; 1242077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_b_mux[] = { 1243077365a9SGeert Uytterhoeven AVB_AVTP_MATCH_B_MARK, 1244077365a9SGeert Uytterhoeven }; 1245077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_b_pins[] = { 1246077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 19), 1247077365a9SGeert Uytterhoeven }; 1248077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_b_mux[] = { 1249077365a9SGeert Uytterhoeven AVB_AVTP_CAPTURE_B_MARK, 1250077365a9SGeert Uytterhoeven }; 1251077365a9SGeert Uytterhoeven /* - DU --------------------------------------------------------------------- */ 1252077365a9SGeert Uytterhoeven static const unsigned int du0_rgb666_pins[] = { 1253077365a9SGeert Uytterhoeven /* R[7:2], G[7:2], B[7:2] */ 1254077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5), 1255077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2), 1256077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13), 1257077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10), 1258077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21), 1259077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18), 1260077365a9SGeert Uytterhoeven }; 1261077365a9SGeert Uytterhoeven static const unsigned int du0_rgb666_mux[] = { 1262077365a9SGeert Uytterhoeven DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, 1263077365a9SGeert Uytterhoeven DU0_DR3_MARK, DU0_DR2_MARK, 1264077365a9SGeert Uytterhoeven DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, 1265077365a9SGeert Uytterhoeven DU0_DG3_MARK, DU0_DG2_MARK, 1266077365a9SGeert Uytterhoeven DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, 1267077365a9SGeert Uytterhoeven DU0_DB3_MARK, DU0_DB2_MARK, 1268077365a9SGeert Uytterhoeven }; 1269077365a9SGeert Uytterhoeven static const unsigned int du0_rgb888_pins[] = { 1270077365a9SGeert Uytterhoeven /* R[7:0], G[7:0], B[7:0] */ 1271077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 5), 1272077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2), 1273077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 0), 1274077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13), 1275077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10), 1276077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 8), 1277077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22), RCAR_GP_PIN(2, 21), 1278077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 18), 1279077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16), 1280077365a9SGeert Uytterhoeven }; 1281077365a9SGeert Uytterhoeven static const unsigned int du0_rgb888_mux[] = { 1282077365a9SGeert Uytterhoeven DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, 1283077365a9SGeert Uytterhoeven DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK, 1284077365a9SGeert Uytterhoeven DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, 1285077365a9SGeert Uytterhoeven DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK, 1286077365a9SGeert Uytterhoeven DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, 1287077365a9SGeert Uytterhoeven DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK, 1288077365a9SGeert Uytterhoeven }; 1289077365a9SGeert Uytterhoeven static const unsigned int du0_clk0_out_pins[] = { 1290077365a9SGeert Uytterhoeven /* DOTCLKOUT0 */ 1291077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 25), 1292077365a9SGeert Uytterhoeven }; 1293077365a9SGeert Uytterhoeven static const unsigned int du0_clk0_out_mux[] = { 1294077365a9SGeert Uytterhoeven DU0_DOTCLKOUT0_MARK 1295077365a9SGeert Uytterhoeven }; 1296077365a9SGeert Uytterhoeven static const unsigned int du0_clk1_out_pins[] = { 1297077365a9SGeert Uytterhoeven /* DOTCLKOUT1 */ 1298077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 26), 1299077365a9SGeert Uytterhoeven }; 1300077365a9SGeert Uytterhoeven static const unsigned int du0_clk1_out_mux[] = { 1301077365a9SGeert Uytterhoeven DU0_DOTCLKOUT1_MARK 1302077365a9SGeert Uytterhoeven }; 1303077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_pins[] = { 1304077365a9SGeert Uytterhoeven /* CLKIN */ 1305077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 24), 1306077365a9SGeert Uytterhoeven }; 1307077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_mux[] = { 1308077365a9SGeert Uytterhoeven DU0_DOTCLKIN_MARK 1309077365a9SGeert Uytterhoeven }; 1310077365a9SGeert Uytterhoeven static const unsigned int du0_sync_pins[] = { 1311077365a9SGeert Uytterhoeven /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ 1312077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 27), 1313077365a9SGeert Uytterhoeven }; 1314077365a9SGeert Uytterhoeven static const unsigned int du0_sync_mux[] = { 1315077365a9SGeert Uytterhoeven DU0_EXVSYNC_DU0_VSYNC_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK 1316077365a9SGeert Uytterhoeven }; 1317077365a9SGeert Uytterhoeven static const unsigned int du0_oddf_pins[] = { 1318077365a9SGeert Uytterhoeven /* EXODDF/ODDF/DISP/CDE */ 1319077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 29), 1320077365a9SGeert Uytterhoeven }; 1321077365a9SGeert Uytterhoeven static const unsigned int du0_oddf_mux[] = { 1322077365a9SGeert Uytterhoeven DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, 1323077365a9SGeert Uytterhoeven }; 1324077365a9SGeert Uytterhoeven static const unsigned int du0_cde_pins[] = { 1325077365a9SGeert Uytterhoeven /* CDE */ 1326077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 31), 1327077365a9SGeert Uytterhoeven }; 1328077365a9SGeert Uytterhoeven static const unsigned int du0_cde_mux[] = { 1329077365a9SGeert Uytterhoeven DU0_CDE_MARK, 1330077365a9SGeert Uytterhoeven }; 1331077365a9SGeert Uytterhoeven static const unsigned int du0_disp_pins[] = { 1332077365a9SGeert Uytterhoeven /* DISP */ 1333077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 30), 1334077365a9SGeert Uytterhoeven }; 1335077365a9SGeert Uytterhoeven static const unsigned int du0_disp_mux[] = { 1336077365a9SGeert Uytterhoeven DU0_DISP_MARK 1337077365a9SGeert Uytterhoeven }; 1338077365a9SGeert Uytterhoeven static const unsigned int du1_rgb666_pins[] = { 1339077365a9SGeert Uytterhoeven /* R[7:2], G[7:2], B[7:2] */ 1340077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 7), 1341077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 4), 1342077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 15), 1343077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 12), 1344077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 23), 1345077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), 1346077365a9SGeert Uytterhoeven }; 1347077365a9SGeert Uytterhoeven static const unsigned int du1_rgb666_mux[] = { 1348077365a9SGeert Uytterhoeven DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, 1349077365a9SGeert Uytterhoeven DU1_DR3_MARK, DU1_DR2_MARK, 1350077365a9SGeert Uytterhoeven DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, 1351077365a9SGeert Uytterhoeven DU1_DG3_MARK, DU1_DG2_MARK, 1352077365a9SGeert Uytterhoeven DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, 1353077365a9SGeert Uytterhoeven DU1_DB3_MARK, DU1_DB2_MARK, 1354077365a9SGeert Uytterhoeven }; 1355077365a9SGeert Uytterhoeven static const unsigned int du1_rgb888_pins[] = { 1356077365a9SGeert Uytterhoeven /* R[7:0], G[7:0], B[7:0] */ 1357077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 7), 1358077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 4), 1359077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2), 1360077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 15), 1361077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 12), 1362077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 10), 1363077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 23), 1364077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), 1365077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 18), 1366077365a9SGeert Uytterhoeven }; 1367077365a9SGeert Uytterhoeven static const unsigned int du1_rgb888_mux[] = { 1368077365a9SGeert Uytterhoeven DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, 1369077365a9SGeert Uytterhoeven DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK, 1370077365a9SGeert Uytterhoeven DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, 1371077365a9SGeert Uytterhoeven DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK, 1372077365a9SGeert Uytterhoeven DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, 1373077365a9SGeert Uytterhoeven DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK, 1374077365a9SGeert Uytterhoeven }; 1375077365a9SGeert Uytterhoeven static const unsigned int du1_clk0_out_pins[] = { 1376077365a9SGeert Uytterhoeven /* DOTCLKOUT0 */ 1377077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 2), 1378077365a9SGeert Uytterhoeven }; 1379077365a9SGeert Uytterhoeven static const unsigned int du1_clk0_out_mux[] = { 1380077365a9SGeert Uytterhoeven DU1_DOTCLKOUT0_MARK 1381077365a9SGeert Uytterhoeven }; 1382077365a9SGeert Uytterhoeven static const unsigned int du1_clk1_out_pins[] = { 1383077365a9SGeert Uytterhoeven /* DOTCLKOUT1 */ 1384077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), 1385077365a9SGeert Uytterhoeven }; 1386077365a9SGeert Uytterhoeven static const unsigned int du1_clk1_out_mux[] = { 1387077365a9SGeert Uytterhoeven DU1_DOTCLKOUT1_MARK 1388077365a9SGeert Uytterhoeven }; 1389077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_pins[] = { 1390077365a9SGeert Uytterhoeven /* DOTCLKIN */ 1391077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), 1392077365a9SGeert Uytterhoeven }; 1393077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_mux[] = { 1394077365a9SGeert Uytterhoeven DU1_DOTCLKIN_MARK 1395077365a9SGeert Uytterhoeven }; 1396077365a9SGeert Uytterhoeven static const unsigned int du1_sync_pins[] = { 1397077365a9SGeert Uytterhoeven /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ 1398077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 4), 1399077365a9SGeert Uytterhoeven }; 1400077365a9SGeert Uytterhoeven static const unsigned int du1_sync_mux[] = { 1401077365a9SGeert Uytterhoeven DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK 1402077365a9SGeert Uytterhoeven }; 1403077365a9SGeert Uytterhoeven static const unsigned int du1_oddf_pins[] = { 1404077365a9SGeert Uytterhoeven /* EXODDF/ODDF/DISP/CDE */ 1405077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), 1406077365a9SGeert Uytterhoeven }; 1407077365a9SGeert Uytterhoeven static const unsigned int du1_oddf_mux[] = { 1408077365a9SGeert Uytterhoeven DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, 1409077365a9SGeert Uytterhoeven }; 1410077365a9SGeert Uytterhoeven static const unsigned int du1_cde_pins[] = { 1411077365a9SGeert Uytterhoeven /* CDE */ 1412077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), 1413077365a9SGeert Uytterhoeven }; 1414077365a9SGeert Uytterhoeven static const unsigned int du1_cde_mux[] = { 1415077365a9SGeert Uytterhoeven DU1_CDE_MARK 1416077365a9SGeert Uytterhoeven }; 1417077365a9SGeert Uytterhoeven static const unsigned int du1_disp_pins[] = { 1418077365a9SGeert Uytterhoeven /* DISP */ 1419077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 6), 1420077365a9SGeert Uytterhoeven }; 1421077365a9SGeert Uytterhoeven static const unsigned int du1_disp_mux[] = { 1422077365a9SGeert Uytterhoeven DU1_DISP_MARK 1423077365a9SGeert Uytterhoeven }; 1424077365a9SGeert Uytterhoeven /* - I2C0 ------------------------------------------------------------------- */ 1425077365a9SGeert Uytterhoeven static const unsigned int i2c0_a_pins[] = { 1426077365a9SGeert Uytterhoeven /* SCL, SDA */ 1427077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), 1428077365a9SGeert Uytterhoeven }; 1429077365a9SGeert Uytterhoeven static const unsigned int i2c0_a_mux[] = { 1430077365a9SGeert Uytterhoeven SCL0_A_MARK, SDA0_A_MARK, 1431077365a9SGeert Uytterhoeven }; 1432077365a9SGeert Uytterhoeven static const unsigned int i2c0_b_pins[] = { 1433077365a9SGeert Uytterhoeven /* SCL, SDA */ 1434077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 29), 1435077365a9SGeert Uytterhoeven }; 1436077365a9SGeert Uytterhoeven static const unsigned int i2c0_b_mux[] = { 1437077365a9SGeert Uytterhoeven SCL0_B_MARK, SDA0_B_MARK, 1438077365a9SGeert Uytterhoeven }; 1439077365a9SGeert Uytterhoeven static const unsigned int i2c0_c_pins[] = { 1440077365a9SGeert Uytterhoeven /* SCL, SDA */ 1441077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), 1442077365a9SGeert Uytterhoeven }; 1443077365a9SGeert Uytterhoeven static const unsigned int i2c0_c_mux[] = { 1444077365a9SGeert Uytterhoeven SCL0_C_MARK, SDA0_C_MARK, 1445077365a9SGeert Uytterhoeven }; 1446077365a9SGeert Uytterhoeven static const unsigned int i2c0_d_pins[] = { 1447077365a9SGeert Uytterhoeven /* SCL, SDA */ 1448077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), 1449077365a9SGeert Uytterhoeven }; 1450077365a9SGeert Uytterhoeven static const unsigned int i2c0_d_mux[] = { 1451077365a9SGeert Uytterhoeven SCL0_D_MARK, SDA0_D_MARK, 1452077365a9SGeert Uytterhoeven }; 1453077365a9SGeert Uytterhoeven static const unsigned int i2c0_e_pins[] = { 1454077365a9SGeert Uytterhoeven /* SCL, SDA */ 1455077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), 1456077365a9SGeert Uytterhoeven }; 1457077365a9SGeert Uytterhoeven static const unsigned int i2c0_e_mux[] = { 1458077365a9SGeert Uytterhoeven SCL0_E_MARK, SDA0_E_MARK, 1459077365a9SGeert Uytterhoeven }; 1460077365a9SGeert Uytterhoeven /* - I2C1 ------------------------------------------------------------------- */ 1461077365a9SGeert Uytterhoeven static const unsigned int i2c1_a_pins[] = { 1462077365a9SGeert Uytterhoeven /* SCL, SDA */ 1463077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), 1464077365a9SGeert Uytterhoeven }; 1465077365a9SGeert Uytterhoeven static const unsigned int i2c1_a_mux[] = { 1466077365a9SGeert Uytterhoeven SCL1_A_MARK, SDA1_A_MARK, 1467077365a9SGeert Uytterhoeven }; 1468077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_pins[] = { 1469077365a9SGeert Uytterhoeven /* SCL, SDA */ 1470077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 1471077365a9SGeert Uytterhoeven }; 1472077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_mux[] = { 1473077365a9SGeert Uytterhoeven SCL1_B_MARK, SDA1_B_MARK, 1474077365a9SGeert Uytterhoeven }; 1475077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_pins[] = { 1476077365a9SGeert Uytterhoeven /* SCL, SDA */ 1477077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), 1478077365a9SGeert Uytterhoeven }; 1479077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_mux[] = { 1480077365a9SGeert Uytterhoeven SCL1_C_MARK, SDA1_C_MARK, 1481077365a9SGeert Uytterhoeven }; 1482077365a9SGeert Uytterhoeven static const unsigned int i2c1_d_pins[] = { 1483077365a9SGeert Uytterhoeven /* SCL, SDA */ 1484077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9), 1485077365a9SGeert Uytterhoeven }; 1486077365a9SGeert Uytterhoeven static const unsigned int i2c1_d_mux[] = { 1487077365a9SGeert Uytterhoeven SCL1_D_MARK, SDA1_D_MARK, 1488077365a9SGeert Uytterhoeven }; 1489077365a9SGeert Uytterhoeven static const unsigned int i2c1_e_pins[] = { 1490077365a9SGeert Uytterhoeven /* SCL, SDA */ 1491077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17), 1492077365a9SGeert Uytterhoeven }; 1493077365a9SGeert Uytterhoeven static const unsigned int i2c1_e_mux[] = { 1494077365a9SGeert Uytterhoeven SCL1_E_MARK, SDA1_E_MARK, 1495077365a9SGeert Uytterhoeven }; 1496077365a9SGeert Uytterhoeven /* - I2C2 ------------------------------------------------------------------- */ 1497077365a9SGeert Uytterhoeven static const unsigned int i2c2_a_pins[] = { 1498077365a9SGeert Uytterhoeven /* SCL, SDA */ 1499077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 25), 1500077365a9SGeert Uytterhoeven }; 1501077365a9SGeert Uytterhoeven static const unsigned int i2c2_a_mux[] = { 1502077365a9SGeert Uytterhoeven SCL2_A_MARK, SDA2_A_MARK, 1503077365a9SGeert Uytterhoeven }; 1504077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_pins[] = { 1505077365a9SGeert Uytterhoeven /* SCL, SDA */ 1506077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14), 1507077365a9SGeert Uytterhoeven }; 1508077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_mux[] = { 1509077365a9SGeert Uytterhoeven SCL2_B_MARK, SDA2_B_MARK, 1510077365a9SGeert Uytterhoeven }; 1511077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_pins[] = { 1512077365a9SGeert Uytterhoeven /* SCL, SDA */ 1513077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), 1514077365a9SGeert Uytterhoeven }; 1515077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_mux[] = { 1516077365a9SGeert Uytterhoeven SCL2_C_MARK, SDA2_C_MARK, 1517077365a9SGeert Uytterhoeven }; 1518077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_pins[] = { 1519077365a9SGeert Uytterhoeven /* SCL, SDA */ 1520077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1521077365a9SGeert Uytterhoeven }; 1522077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_mux[] = { 1523077365a9SGeert Uytterhoeven SCL2_D_MARK, SDA2_D_MARK, 1524077365a9SGeert Uytterhoeven }; 1525077365a9SGeert Uytterhoeven /* - I2C3 ------------------------------------------------------------------- */ 1526077365a9SGeert Uytterhoeven static const unsigned int i2c3_a_pins[] = { 1527077365a9SGeert Uytterhoeven /* SCL, SDA */ 1528077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 10), 1529077365a9SGeert Uytterhoeven }; 1530077365a9SGeert Uytterhoeven static const unsigned int i2c3_a_mux[] = { 1531077365a9SGeert Uytterhoeven SCL3_A_MARK, SDA3_A_MARK, 1532077365a9SGeert Uytterhoeven }; 1533077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_pins[] = { 1534077365a9SGeert Uytterhoeven /* SCL, SDA */ 1535077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1), 1536077365a9SGeert Uytterhoeven }; 1537077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_mux[] = { 1538077365a9SGeert Uytterhoeven SCL3_B_MARK, SDA3_B_MARK, 1539077365a9SGeert Uytterhoeven }; 1540077365a9SGeert Uytterhoeven static const unsigned int i2c3_c_pins[] = { 1541077365a9SGeert Uytterhoeven /* SCL, SDA */ 1542077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), 1543077365a9SGeert Uytterhoeven }; 1544077365a9SGeert Uytterhoeven static const unsigned int i2c3_c_mux[] = { 1545077365a9SGeert Uytterhoeven SCL3_C_MARK, SDA3_C_MARK, 1546077365a9SGeert Uytterhoeven }; 1547077365a9SGeert Uytterhoeven static const unsigned int i2c3_d_pins[] = { 1548077365a9SGeert Uytterhoeven /* SCL, SDA */ 1549077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), 1550077365a9SGeert Uytterhoeven }; 1551077365a9SGeert Uytterhoeven static const unsigned int i2c3_d_mux[] = { 1552077365a9SGeert Uytterhoeven SCL3_D_MARK, SDA3_D_MARK, 1553077365a9SGeert Uytterhoeven }; 1554077365a9SGeert Uytterhoeven static const unsigned int i2c3_e_pins[] = { 1555077365a9SGeert Uytterhoeven /* SCL, SDA */ 1556077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 26), 1557077365a9SGeert Uytterhoeven }; 1558077365a9SGeert Uytterhoeven static const unsigned int i2c3_e_mux[] = { 1559077365a9SGeert Uytterhoeven SCL3_E_MARK, SDA3_E_MARK, 1560077365a9SGeert Uytterhoeven }; 1561077365a9SGeert Uytterhoeven /* - I2C4 ------------------------------------------------------------------- */ 1562077365a9SGeert Uytterhoeven static const unsigned int i2c4_a_pins[] = { 1563077365a9SGeert Uytterhoeven /* SCL, SDA */ 1564077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11), 1565077365a9SGeert Uytterhoeven }; 1566077365a9SGeert Uytterhoeven static const unsigned int i2c4_a_mux[] = { 1567077365a9SGeert Uytterhoeven SCL4_A_MARK, SDA4_A_MARK, 1568077365a9SGeert Uytterhoeven }; 1569077365a9SGeert Uytterhoeven static const unsigned int i2c4_b_pins[] = { 1570077365a9SGeert Uytterhoeven /* SCL, SDA */ 1571077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 31), 1572077365a9SGeert Uytterhoeven }; 1573077365a9SGeert Uytterhoeven static const unsigned int i2c4_b_mux[] = { 1574077365a9SGeert Uytterhoeven SCL4_B_MARK, SDA4_B_MARK, 1575077365a9SGeert Uytterhoeven }; 1576077365a9SGeert Uytterhoeven static const unsigned int i2c4_c_pins[] = { 1577077365a9SGeert Uytterhoeven /* SCL, SDA */ 1578077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5), 1579077365a9SGeert Uytterhoeven }; 1580077365a9SGeert Uytterhoeven static const unsigned int i2c4_c_mux[] = { 1581077365a9SGeert Uytterhoeven SCL4_C_MARK, SDA4_C_MARK, 1582077365a9SGeert Uytterhoeven }; 1583077365a9SGeert Uytterhoeven static const unsigned int i2c4_d_pins[] = { 1584077365a9SGeert Uytterhoeven /* SCL, SDA */ 1585077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), 1586077365a9SGeert Uytterhoeven }; 1587077365a9SGeert Uytterhoeven static const unsigned int i2c4_d_mux[] = { 1588077365a9SGeert Uytterhoeven SCL4_D_MARK, SDA4_D_MARK, 1589077365a9SGeert Uytterhoeven }; 1590077365a9SGeert Uytterhoeven static const unsigned int i2c4_e_pins[] = { 1591077365a9SGeert Uytterhoeven /* SCL, SDA */ 1592077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 6), 1593077365a9SGeert Uytterhoeven }; 1594077365a9SGeert Uytterhoeven static const unsigned int i2c4_e_mux[] = { 1595077365a9SGeert Uytterhoeven SCL4_E_MARK, SDA4_E_MARK, 1596077365a9SGeert Uytterhoeven }; 1597077365a9SGeert Uytterhoeven /* - MMC -------------------------------------------------------------------- */ 1598b24cf384SGeert Uytterhoeven static const unsigned int mmc_data_pins[] = { 1599077365a9SGeert Uytterhoeven /* D[0:3] */ 1600077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 16), 1601077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 18), 1602077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20), 1603077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 21), RCAR_GP_PIN(0, 22), 1604077365a9SGeert Uytterhoeven }; 1605b24cf384SGeert Uytterhoeven static const unsigned int mmc_data_mux[] = { 1606077365a9SGeert Uytterhoeven MMC0_D0_SDHI1_D0_MARK, MMC0_D1_SDHI1_D1_MARK, 1607077365a9SGeert Uytterhoeven MMC0_D2_SDHI1_D2_MARK, MMC0_D3_SDHI1_D3_MARK, 1608077365a9SGeert Uytterhoeven MMC0_D4_MARK, MMC0_D5_MARK, 1609077365a9SGeert Uytterhoeven MMC0_D6_MARK, MMC0_D7_MARK, 1610077365a9SGeert Uytterhoeven }; 1611077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_pins[] = { 1612077365a9SGeert Uytterhoeven /* CLK, CMD */ 1613077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 13), RCAR_GP_PIN(0, 14), 1614077365a9SGeert Uytterhoeven }; 1615077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_mux[] = { 1616077365a9SGeert Uytterhoeven MMC0_CLK_SDHI1_CLK_MARK, MMC0_CMD_SDHI1_CMD_MARK, 1617077365a9SGeert Uytterhoeven }; 1618077365a9SGeert Uytterhoeven /* - QSPI ------------------------------------------------------------------- */ 1619077365a9SGeert Uytterhoeven static const unsigned int qspi0_ctrl_pins[] = { 1620077365a9SGeert Uytterhoeven /* SPCLK, SSL */ 1621077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 21), 1622077365a9SGeert Uytterhoeven }; 1623077365a9SGeert Uytterhoeven static const unsigned int qspi0_ctrl_mux[] = { 1624077365a9SGeert Uytterhoeven QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, 1625077365a9SGeert Uytterhoeven }; 1626d84e3d4aSGeert Uytterhoeven static const unsigned int qspi0_data_pins[] = { 1627077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1, IO2, IO3 */ 1628077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19), 1629077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20), 1630077365a9SGeert Uytterhoeven }; 1631d84e3d4aSGeert Uytterhoeven static const unsigned int qspi0_data_mux[] = { 1632077365a9SGeert Uytterhoeven QSPI0_MOSI_QSPI0_IO0_MARK, QSPI0_MISO_QSPI0_IO1_MARK, 1633077365a9SGeert Uytterhoeven QSPI0_IO2_MARK, QSPI0_IO3_MARK, 1634077365a9SGeert Uytterhoeven }; 1635077365a9SGeert Uytterhoeven static const unsigned int qspi1_ctrl_pins[] = { 1636077365a9SGeert Uytterhoeven /* SPCLK, SSL */ 1637077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 9), 1638077365a9SGeert Uytterhoeven }; 1639077365a9SGeert Uytterhoeven static const unsigned int qspi1_ctrl_mux[] = { 1640077365a9SGeert Uytterhoeven QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, 1641077365a9SGeert Uytterhoeven }; 1642d84e3d4aSGeert Uytterhoeven static const unsigned int qspi1_data_pins[] = { 1643077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1, IO2, IO3 */ 1644077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 7), 1645077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), 1646077365a9SGeert Uytterhoeven }; 1647d84e3d4aSGeert Uytterhoeven static const unsigned int qspi1_data_mux[] = { 1648077365a9SGeert Uytterhoeven QSPI1_MOSI_QSPI1_IO0_MARK, QSPI1_MISO_QSPI1_IO1_MARK, 1649077365a9SGeert Uytterhoeven QSPI1_IO2_MARK, QSPI1_IO3_MARK, 1650077365a9SGeert Uytterhoeven }; 1651077365a9SGeert Uytterhoeven /* - SCIF0 ------------------------------------------------------------------ */ 1652077365a9SGeert Uytterhoeven static const unsigned int scif0_data_a_pins[] = { 1653077365a9SGeert Uytterhoeven /* RX, TX */ 1654077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11), 1655077365a9SGeert Uytterhoeven }; 1656077365a9SGeert Uytterhoeven static const unsigned int scif0_data_a_mux[] = { 1657077365a9SGeert Uytterhoeven RX0_A_MARK, TX0_A_MARK, 1658077365a9SGeert Uytterhoeven }; 1659077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_pins[] = { 1660077365a9SGeert Uytterhoeven /* RX, TX */ 1661077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), 1662077365a9SGeert Uytterhoeven }; 1663077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_mux[] = { 1664077365a9SGeert Uytterhoeven RX0_B_MARK, TX0_B_MARK, 1665077365a9SGeert Uytterhoeven }; 1666077365a9SGeert Uytterhoeven static const unsigned int scif0_data_c_pins[] = { 1667077365a9SGeert Uytterhoeven /* RX, TX */ 1668077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), 1669077365a9SGeert Uytterhoeven }; 1670077365a9SGeert Uytterhoeven static const unsigned int scif0_data_c_mux[] = { 1671077365a9SGeert Uytterhoeven RX0_C_MARK, TX0_C_MARK, 1672077365a9SGeert Uytterhoeven }; 1673077365a9SGeert Uytterhoeven static const unsigned int scif0_data_d_pins[] = { 1674077365a9SGeert Uytterhoeven /* RX, TX */ 1675077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), 1676077365a9SGeert Uytterhoeven }; 1677077365a9SGeert Uytterhoeven static const unsigned int scif0_data_d_mux[] = { 1678077365a9SGeert Uytterhoeven RX0_D_MARK, TX0_D_MARK, 1679077365a9SGeert Uytterhoeven }; 1680077365a9SGeert Uytterhoeven /* - SCIF1 ------------------------------------------------------------------ */ 1681077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_pins[] = { 1682077365a9SGeert Uytterhoeven /* RX, TX */ 1683077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17), 1684077365a9SGeert Uytterhoeven }; 1685077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_mux[] = { 1686077365a9SGeert Uytterhoeven RX1_A_MARK, TX1_A_MARK, 1687077365a9SGeert Uytterhoeven }; 1688077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_a_pins[] = { 1689077365a9SGeert Uytterhoeven /* SCK */ 1690077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), 1691077365a9SGeert Uytterhoeven }; 1692077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_a_mux[] = { 1693077365a9SGeert Uytterhoeven SCIF1_SCK_A_MARK, 1694077365a9SGeert Uytterhoeven }; 1695077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_pins[] = { 1696077365a9SGeert Uytterhoeven /* RX, TX */ 1697077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20), 1698077365a9SGeert Uytterhoeven }; 1699077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_mux[] = { 1700077365a9SGeert Uytterhoeven RX1_B_MARK, TX1_B_MARK, 1701077365a9SGeert Uytterhoeven }; 1702077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_b_pins[] = { 1703077365a9SGeert Uytterhoeven /* SCK */ 1704077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), 1705077365a9SGeert Uytterhoeven }; 1706077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_b_mux[] = { 1707077365a9SGeert Uytterhoeven SCIF1_SCK_B_MARK, 1708077365a9SGeert Uytterhoeven }; 1709077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_pins[] = { 1710077365a9SGeert Uytterhoeven /* RX, TX */ 1711077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9), 1712077365a9SGeert Uytterhoeven }; 1713077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_mux[] = { 1714077365a9SGeert Uytterhoeven RX1_C_MARK, TX1_C_MARK, 1715077365a9SGeert Uytterhoeven }; 1716077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_c_pins[] = { 1717077365a9SGeert Uytterhoeven /* SCK */ 1718077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 7), 1719077365a9SGeert Uytterhoeven }; 1720077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_c_mux[] = { 1721077365a9SGeert Uytterhoeven SCIF1_SCK_C_MARK, 1722077365a9SGeert Uytterhoeven }; 1723077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_pins[] = { 1724077365a9SGeert Uytterhoeven /* RX, TX */ 1725077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), 1726077365a9SGeert Uytterhoeven }; 1727077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_mux[] = { 1728077365a9SGeert Uytterhoeven RX1_D_MARK, TX1_D_MARK, 1729077365a9SGeert Uytterhoeven }; 1730077365a9SGeert Uytterhoeven /* - SCIF2 ------------------------------------------------------------------ */ 1731077365a9SGeert Uytterhoeven static const unsigned int scif2_data_a_pins[] = { 1732077365a9SGeert Uytterhoeven /* RX, TX */ 1733077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 19), 1734077365a9SGeert Uytterhoeven }; 1735077365a9SGeert Uytterhoeven static const unsigned int scif2_data_a_mux[] = { 1736077365a9SGeert Uytterhoeven RX2_A_MARK, TX2_A_MARK, 1737077365a9SGeert Uytterhoeven }; 1738077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_a_pins[] = { 1739077365a9SGeert Uytterhoeven /* SCK */ 1740077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), 1741077365a9SGeert Uytterhoeven }; 1742077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_a_mux[] = { 1743077365a9SGeert Uytterhoeven SCIF2_SCK_A_MARK, 1744077365a9SGeert Uytterhoeven }; 1745077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_pins[] = { 1746077365a9SGeert Uytterhoeven /* RX, TX */ 1747077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 26), 1748077365a9SGeert Uytterhoeven }; 1749077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_mux[] = { 1750077365a9SGeert Uytterhoeven RX2_B_MARK, TX2_B_MARK, 1751077365a9SGeert Uytterhoeven }; 1752077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_b_pins[] = { 1753077365a9SGeert Uytterhoeven /* SCK */ 1754077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 1755077365a9SGeert Uytterhoeven }; 1756077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_b_mux[] = { 1757077365a9SGeert Uytterhoeven SCIF2_SCK_B_MARK, 1758077365a9SGeert Uytterhoeven }; 1759077365a9SGeert Uytterhoeven static const unsigned int scif2_data_c_pins[] = { 1760077365a9SGeert Uytterhoeven /* RX, TX */ 1761077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), 1762077365a9SGeert Uytterhoeven }; 1763077365a9SGeert Uytterhoeven static const unsigned int scif2_data_c_mux[] = { 1764077365a9SGeert Uytterhoeven RX2_C_MARK, TX2_C_MARK, 1765077365a9SGeert Uytterhoeven }; 1766077365a9SGeert Uytterhoeven /* - SCIF3 ------------------------------------------------------------------ */ 1767077365a9SGeert Uytterhoeven static const unsigned int scif3_data_a_pins[] = { 1768077365a9SGeert Uytterhoeven /* RX, TX */ 1769077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), 1770077365a9SGeert Uytterhoeven }; 1771077365a9SGeert Uytterhoeven static const unsigned int scif3_data_a_mux[] = { 1772077365a9SGeert Uytterhoeven RX3_A_MARK, TX3_A_MARK, 1773077365a9SGeert Uytterhoeven }; 1774077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_pins[] = { 1775077365a9SGeert Uytterhoeven /* SCK */ 1776077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), 1777077365a9SGeert Uytterhoeven }; 1778077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_mux[] = { 1779077365a9SGeert Uytterhoeven SCIF3_SCK_MARK, 1780077365a9SGeert Uytterhoeven }; 1781077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_pins[] = { 1782077365a9SGeert Uytterhoeven /* RX, TX */ 1783077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), 1784077365a9SGeert Uytterhoeven }; 1785077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_mux[] = { 1786077365a9SGeert Uytterhoeven RX3_B_MARK, TX3_B_MARK, 1787077365a9SGeert Uytterhoeven }; 1788077365a9SGeert Uytterhoeven static const unsigned int scif3_data_c_pins[] = { 1789077365a9SGeert Uytterhoeven /* RX, TX */ 1790077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6), 1791077365a9SGeert Uytterhoeven }; 1792077365a9SGeert Uytterhoeven static const unsigned int scif3_data_c_mux[] = { 1793077365a9SGeert Uytterhoeven RX3_C_MARK, TX3_C_MARK, 1794077365a9SGeert Uytterhoeven }; 1795077365a9SGeert Uytterhoeven /* - SCIF4 ------------------------------------------------------------------ */ 1796077365a9SGeert Uytterhoeven static const unsigned int scif4_data_a_pins[] = { 1797077365a9SGeert Uytterhoeven /* RX, TX */ 1798077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), 1799077365a9SGeert Uytterhoeven }; 1800077365a9SGeert Uytterhoeven static const unsigned int scif4_data_a_mux[] = { 1801077365a9SGeert Uytterhoeven RX4_A_MARK, TX4_A_MARK, 1802077365a9SGeert Uytterhoeven }; 1803077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_pins[] = { 1804077365a9SGeert Uytterhoeven /* RX, TX */ 1805077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), 1806077365a9SGeert Uytterhoeven }; 1807077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_mux[] = { 1808077365a9SGeert Uytterhoeven RX4_B_MARK, TX4_B_MARK, 1809077365a9SGeert Uytterhoeven }; 1810077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_pins[] = { 1811077365a9SGeert Uytterhoeven /* RX, TX */ 1812077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 14), 1813077365a9SGeert Uytterhoeven }; 1814077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_mux[] = { 1815077365a9SGeert Uytterhoeven RX4_C_MARK, TX4_C_MARK, 1816077365a9SGeert Uytterhoeven }; 1817077365a9SGeert Uytterhoeven static const unsigned int scif4_data_d_pins[] = { 1818077365a9SGeert Uytterhoeven /* RX, TX */ 1819077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), 1820077365a9SGeert Uytterhoeven }; 1821077365a9SGeert Uytterhoeven static const unsigned int scif4_data_d_mux[] = { 1822077365a9SGeert Uytterhoeven RX4_D_MARK, TX4_D_MARK, 1823077365a9SGeert Uytterhoeven }; 1824077365a9SGeert Uytterhoeven static const unsigned int scif4_data_e_pins[] = { 1825077365a9SGeert Uytterhoeven /* RX, TX */ 1826077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8), 1827077365a9SGeert Uytterhoeven }; 1828077365a9SGeert Uytterhoeven static const unsigned int scif4_data_e_mux[] = { 1829077365a9SGeert Uytterhoeven RX4_E_MARK, TX4_E_MARK, 1830077365a9SGeert Uytterhoeven }; 1831077365a9SGeert Uytterhoeven /* - SCIF5 ------------------------------------------------------------------ */ 1832077365a9SGeert Uytterhoeven static const unsigned int scif5_data_a_pins[] = { 1833077365a9SGeert Uytterhoeven /* RX, TX */ 1834077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), 1835077365a9SGeert Uytterhoeven }; 1836077365a9SGeert Uytterhoeven static const unsigned int scif5_data_a_mux[] = { 1837077365a9SGeert Uytterhoeven RX5_A_MARK, TX5_A_MARK, 1838077365a9SGeert Uytterhoeven }; 1839077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_pins[] = { 1840077365a9SGeert Uytterhoeven /* RX, TX */ 1841077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1), 1842077365a9SGeert Uytterhoeven }; 1843077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_mux[] = { 1844077365a9SGeert Uytterhoeven RX5_B_MARK, TX5_B_MARK, 1845077365a9SGeert Uytterhoeven }; 1846077365a9SGeert Uytterhoeven static const unsigned int scif5_data_c_pins[] = { 1847077365a9SGeert Uytterhoeven /* RX, TX */ 1848077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1849077365a9SGeert Uytterhoeven }; 1850077365a9SGeert Uytterhoeven static const unsigned int scif5_data_c_mux[] = { 1851077365a9SGeert Uytterhoeven RX5_C_MARK, TX5_C_MARK, 1852077365a9SGeert Uytterhoeven }; 1853077365a9SGeert Uytterhoeven static const unsigned int scif5_data_d_pins[] = { 1854077365a9SGeert Uytterhoeven /* RX, TX */ 1855077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), 1856077365a9SGeert Uytterhoeven }; 1857077365a9SGeert Uytterhoeven static const unsigned int scif5_data_d_mux[] = { 1858077365a9SGeert Uytterhoeven RX5_D_MARK, TX5_D_MARK, 1859077365a9SGeert Uytterhoeven }; 1860077365a9SGeert Uytterhoeven static const unsigned int scif5_data_e_pins[] = { 1861077365a9SGeert Uytterhoeven /* RX, TX */ 1862077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1863077365a9SGeert Uytterhoeven }; 1864077365a9SGeert Uytterhoeven static const unsigned int scif5_data_e_mux[] = { 1865077365a9SGeert Uytterhoeven RX5_E_MARK, TX5_E_MARK, 1866077365a9SGeert Uytterhoeven }; 1867077365a9SGeert Uytterhoeven static const unsigned int scif5_data_f_pins[] = { 1868077365a9SGeert Uytterhoeven /* RX, TX */ 1869077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), 1870077365a9SGeert Uytterhoeven }; 1871077365a9SGeert Uytterhoeven static const unsigned int scif5_data_f_mux[] = { 1872077365a9SGeert Uytterhoeven RX5_F_MARK, TX5_F_MARK, 1873077365a9SGeert Uytterhoeven }; 1874077365a9SGeert Uytterhoeven /* - SCIF Clock ------------------------------------------------------------- */ 1875077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_pins[] = { 1876077365a9SGeert Uytterhoeven /* SCIF_CLK */ 1877077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), 1878077365a9SGeert Uytterhoeven }; 1879077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_mux[] = { 1880077365a9SGeert Uytterhoeven SCIF_CLK_A_MARK, 1881077365a9SGeert Uytterhoeven }; 1882077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_pins[] = { 1883077365a9SGeert Uytterhoeven /* SCIF_CLK */ 1884077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 29), 1885077365a9SGeert Uytterhoeven }; 1886077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_mux[] = { 1887077365a9SGeert Uytterhoeven SCIF_CLK_B_MARK, 1888077365a9SGeert Uytterhoeven }; 1889077365a9SGeert Uytterhoeven /* - SDHI0 ------------------------------------------------------------------ */ 18907b6e4e1fSGeert Uytterhoeven static const unsigned int sdhi0_data_pins[] = { 1891077365a9SGeert Uytterhoeven /* D[0:3] */ 1892077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8), 1893077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1894077365a9SGeert Uytterhoeven }; 18957b6e4e1fSGeert Uytterhoeven static const unsigned int sdhi0_data_mux[] = { 1896077365a9SGeert Uytterhoeven SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, 1897077365a9SGeert Uytterhoeven }; 1898077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_pins[] = { 1899077365a9SGeert Uytterhoeven /* CLK, CMD */ 1900077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6), 1901077365a9SGeert Uytterhoeven }; 1902077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_mux[] = { 1903077365a9SGeert Uytterhoeven SD0_CLK_MARK, SD0_CMD_MARK, 1904077365a9SGeert Uytterhoeven }; 1905077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_pins[] = { 1906077365a9SGeert Uytterhoeven /* CD */ 1907077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 11), 1908077365a9SGeert Uytterhoeven }; 1909077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_mux[] = { 1910077365a9SGeert Uytterhoeven SD0_CD_MARK, 1911077365a9SGeert Uytterhoeven }; 1912077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_pins[] = { 1913077365a9SGeert Uytterhoeven /* WP */ 1914077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12), 1915077365a9SGeert Uytterhoeven }; 1916077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_mux[] = { 1917077365a9SGeert Uytterhoeven SD0_WP_MARK, 1918077365a9SGeert Uytterhoeven }; 1919077365a9SGeert Uytterhoeven /* - SDHI1 ------------------------------------------------------------------ */ 1920077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_pins[] = { 1921077365a9SGeert Uytterhoeven /* CD */ 1922077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), 1923077365a9SGeert Uytterhoeven }; 1924077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_mux[] = { 1925077365a9SGeert Uytterhoeven SD1_CD_MARK, 1926077365a9SGeert Uytterhoeven }; 1927077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_pins[] = { 1928077365a9SGeert Uytterhoeven /* WP */ 1929077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20), 1930077365a9SGeert Uytterhoeven }; 1931077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_mux[] = { 1932077365a9SGeert Uytterhoeven SD1_WP_MARK, 1933077365a9SGeert Uytterhoeven }; 1934077365a9SGeert Uytterhoeven /* - SDHI2 ------------------------------------------------------------------ */ 19357b6e4e1fSGeert Uytterhoeven static const unsigned int sdhi2_data_pins[] = { 1936077365a9SGeert Uytterhoeven /* D[0:3] */ 1937077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17), 1938077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 19), 1939077365a9SGeert Uytterhoeven }; 19407b6e4e1fSGeert Uytterhoeven static const unsigned int sdhi2_data_mux[] = { 1941077365a9SGeert Uytterhoeven SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK, 1942077365a9SGeert Uytterhoeven }; 1943077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_pins[] = { 1944077365a9SGeert Uytterhoeven /* CLK, CMD */ 1945077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15), 1946077365a9SGeert Uytterhoeven }; 1947077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_mux[] = { 1948077365a9SGeert Uytterhoeven SD2_CLK_MARK, SD2_CMD_MARK, 1949077365a9SGeert Uytterhoeven }; 1950077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_pins[] = { 1951077365a9SGeert Uytterhoeven /* CD */ 1952077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), 1953077365a9SGeert Uytterhoeven }; 1954077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_mux[] = { 1955077365a9SGeert Uytterhoeven SD2_CD_MARK, 1956077365a9SGeert Uytterhoeven }; 1957077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_pins[] = { 1958077365a9SGeert Uytterhoeven /* WP */ 1959077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), 1960077365a9SGeert Uytterhoeven }; 1961077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_mux[] = { 1962077365a9SGeert Uytterhoeven SD2_WP_MARK, 1963077365a9SGeert Uytterhoeven }; 1964077365a9SGeert Uytterhoeven /* - USB0 ------------------------------------------------------------------- */ 1965077365a9SGeert Uytterhoeven static const unsigned int usb0_pins[] = { 1966077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0), /* PWEN */ 1967077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 1), /* OVC */ 1968077365a9SGeert Uytterhoeven }; 1969077365a9SGeert Uytterhoeven static const unsigned int usb0_mux[] = { 1970077365a9SGeert Uytterhoeven USB0_PWEN_MARK, 1971077365a9SGeert Uytterhoeven USB0_OVC_MARK, 1972077365a9SGeert Uytterhoeven }; 1973077365a9SGeert Uytterhoeven /* - USB1 ------------------------------------------------------------------- */ 1974077365a9SGeert Uytterhoeven static const unsigned int usb1_pins[] = { 1975077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), /* PWEN */ 1976077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 3), /* OVC */ 1977077365a9SGeert Uytterhoeven }; 1978077365a9SGeert Uytterhoeven static const unsigned int usb1_mux[] = { 1979077365a9SGeert Uytterhoeven USB1_PWEN_MARK, 1980077365a9SGeert Uytterhoeven USB1_OVC_MARK, 1981077365a9SGeert Uytterhoeven }; 1982077365a9SGeert Uytterhoeven /* - VIN0 ------------------------------------------------------------------- */ 1983496da100SGeert Uytterhoeven static const unsigned int vin0_data_pins[] = { 1984077365a9SGeert Uytterhoeven /* B */ 1985077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), RCAR_GP_PIN(5, 21), 1986077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23), 1987077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), 1988077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), 1989077365a9SGeert Uytterhoeven /* G */ 1990077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), 1991077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), 1992077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), RCAR_GP_PIN(5, 8), 1993077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), 1994077365a9SGeert Uytterhoeven /* R */ 1995077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 12), 1996077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), 1997077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), 1998077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 19), 1999077365a9SGeert Uytterhoeven }; 2000496da100SGeert Uytterhoeven static const unsigned int vin0_data_mux[] = { 2001077365a9SGeert Uytterhoeven /* B */ 2002077365a9SGeert Uytterhoeven VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, 2003077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 2004077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 2005077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 2006077365a9SGeert Uytterhoeven /* G */ 2007077365a9SGeert Uytterhoeven VI0_G0_MARK, VI0_G1_MARK, 2008077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 2009077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 2010077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 2011077365a9SGeert Uytterhoeven /* R */ 2012077365a9SGeert Uytterhoeven VI0_R0_MARK, VI0_R1_MARK, 2013077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 2014077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 2015077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 2016077365a9SGeert Uytterhoeven }; 2017077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_pins[] = { 2018077365a9SGeert Uytterhoeven /* B */ 2019077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23), 2020077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), 2021077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 27), 2022077365a9SGeert Uytterhoeven /* G */ 2023077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), 2024077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), RCAR_GP_PIN(5, 8), 2025077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), 2026077365a9SGeert Uytterhoeven /* R */ 2027077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), 2028077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), 2029077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 19), 2030077365a9SGeert Uytterhoeven }; 2031077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_mux[] = { 2032077365a9SGeert Uytterhoeven /* B */ 2033077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 2034077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 2035077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 2036077365a9SGeert Uytterhoeven /* G */ 2037077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 2038077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 2039077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 2040077365a9SGeert Uytterhoeven /* R */ 2041077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 2042077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 2043077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 2044077365a9SGeert Uytterhoeven }; 2045077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_pins[] = { 2046077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), /* HSYNC */ 2047077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), /* VSYNC */ 2048077365a9SGeert Uytterhoeven }; 2049077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_mux[] = { 2050077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, 2051077365a9SGeert Uytterhoeven VI0_VSYNC_N_MARK, 2052077365a9SGeert Uytterhoeven }; 2053077365a9SGeert Uytterhoeven static const unsigned int vin0_field_pins[] = { 2054077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 2055077365a9SGeert Uytterhoeven }; 2056077365a9SGeert Uytterhoeven static const unsigned int vin0_field_mux[] = { 2057077365a9SGeert Uytterhoeven VI0_FIELD_MARK, 2058077365a9SGeert Uytterhoeven }; 2059077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_pins[] = { 2060077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), 2061077365a9SGeert Uytterhoeven }; 2062077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_mux[] = { 2063077365a9SGeert Uytterhoeven VI0_CLKENB_MARK, 2064077365a9SGeert Uytterhoeven }; 2065077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_pins[] = { 2066077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), 2067077365a9SGeert Uytterhoeven }; 2068077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_mux[] = { 2069077365a9SGeert Uytterhoeven VI0_CLK_MARK, 2070077365a9SGeert Uytterhoeven }; 2071077365a9SGeert Uytterhoeven /* - VIN1 ------------------------------------------------------------------- */ 2072496da100SGeert Uytterhoeven static const unsigned int vin1_data_pins[] = { 2073077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2), 2074077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), 2075077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), 2076077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8), 2077077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14), 2078077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16), 2079077365a9SGeert Uytterhoeven }; 2080496da100SGeert Uytterhoeven static const unsigned int vin1_data_mux[] = { 2081077365a9SGeert Uytterhoeven VI1_DATA0_MARK, VI1_DATA1_MARK, 2082077365a9SGeert Uytterhoeven VI1_DATA2_MARK, VI1_DATA3_MARK, 2083077365a9SGeert Uytterhoeven VI1_DATA4_MARK, VI1_DATA5_MARK, 2084077365a9SGeert Uytterhoeven VI1_DATA6_MARK, VI1_DATA7_MARK, 2085077365a9SGeert Uytterhoeven VI1_DATA8_MARK, VI1_DATA9_MARK, 2086077365a9SGeert Uytterhoeven VI1_DATA10_MARK, VI1_DATA11_MARK, 2087077365a9SGeert Uytterhoeven }; 2088077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_pins[] = { 2089077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 11), /* HSYNC */ 2090077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), /* VSYNC */ 2091077365a9SGeert Uytterhoeven }; 2092077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_mux[] = { 2093077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, 2094077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, 2095077365a9SGeert Uytterhoeven }; 2096077365a9SGeert Uytterhoeven static const unsigned int vin1_field_pins[] = { 2097077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), 2098077365a9SGeert Uytterhoeven }; 2099077365a9SGeert Uytterhoeven static const unsigned int vin1_field_mux[] = { 2100077365a9SGeert Uytterhoeven VI1_FIELD_MARK, 2101077365a9SGeert Uytterhoeven }; 2102077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_pins[] = { 2103077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), 2104077365a9SGeert Uytterhoeven }; 2105077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_mux[] = { 2106077365a9SGeert Uytterhoeven VI1_CLKENB_MARK, 2107077365a9SGeert Uytterhoeven }; 2108077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_pins[] = { 2109077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), 2110077365a9SGeert Uytterhoeven }; 2111077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_mux[] = { 2112077365a9SGeert Uytterhoeven VI1_CLK_MARK, 2113077365a9SGeert Uytterhoeven }; 2114077365a9SGeert Uytterhoeven 2115077365a9SGeert Uytterhoeven static const struct sh_pfc_pin_group pinmux_groups[] = { 2116077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_col), 2117077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_crs), 2118077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_link), 2119077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_magic), 2120077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_phy_int), 2121077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mdio), 2122077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mii_tx_rx), 2123077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mii_tx_er), 2124077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_gmii_tx_rx), 2125077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_avtp_match_a), 2126077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_avtp_capture_a), 2127077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_avtp_match_b), 2128077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_avtp_capture_b), 2129077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_rgb666), 2130077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_rgb888), 2131077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_clk0_out), 2132077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_clk1_out), 2133077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_clk_in), 2134077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_sync), 2135077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_oddf), 2136077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_cde), 2137077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_disp), 2138077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_rgb666), 2139077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_rgb888), 2140077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk0_out), 2141077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk1_out), 2142077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk_in), 2143077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_sync), 2144077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_oddf), 2145077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_cde), 2146077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_disp), 2147077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_a), 2148077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_b), 2149077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_c), 2150077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_d), 2151077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0_e), 2152077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_a), 2153077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_b), 2154077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_c), 2155077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_d), 2156077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_e), 2157077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_a), 2158077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_b), 2159077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_c), 2160077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_d), 2161077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_a), 2162077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_b), 2163077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_c), 2164077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_d), 2165077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_e), 2166077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_a), 2167077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_b), 2168077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_c), 2169077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_d), 2170077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4_e), 2171b24cf384SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 1), 2172b24cf384SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 4), 2173b24cf384SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 8), 2174077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc_ctrl), 2175077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi0_ctrl), 2176d84e3d4aSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi0_data, 2), 2177d84e3d4aSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi0_data, 4), 2178077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi1_ctrl), 2179d84e3d4aSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi1_data, 2), 2180d84e3d4aSGeert Uytterhoeven BUS_DATA_PIN_GROUP(qspi1_data, 4), 2181077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_a), 2182077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_b), 2183077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_c), 2184077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_d), 2185077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_a), 2186077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_a), 2187077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_b), 2188077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_b), 2189077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_c), 2190077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_c), 2191077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_d), 2192077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_a), 2193077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_clk_a), 2194077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_b), 2195077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_clk_b), 2196077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_c), 2197077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_a), 2198077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_clk), 2199077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_b), 2200077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data_c), 2201077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_a), 2202077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_b), 2203077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_c), 2204077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_d), 2205077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data_e), 2206077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_a), 2207077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_b), 2208077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_c), 2209077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_d), 2210077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_e), 2211077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif5_data_f), 2212077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_a), 2213077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_b), 22147b6e4e1fSGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi0_data, 1), 22157b6e4e1fSGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi0_data, 4), 2216077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_ctrl), 2217077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_cd), 2218077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_wp), 2219b24cf384SGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(sdhi1_data1, mmc_data, 0, 1), 2220b24cf384SGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(sdhi1_data4, mmc_data, 0, 4), 2221b24cf384SGeert Uytterhoeven SH_PFC_PIN_GROUP_ALIAS(sdhi1_ctrl, mmc_ctrl), 2222077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_cd), 2223077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_wp), 22247b6e4e1fSGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi2_data, 1), 22257b6e4e1fSGeert Uytterhoeven BUS_DATA_PIN_GROUP(sdhi2_data, 4), 2226077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_ctrl), 2227077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_cd), 2228077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_wp), 2229077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb0), 2230077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb1), 2231496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 24), 2232496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 20), 2233077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_data18), 2234496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 16), 2235496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 12), 2236496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 10), 2237496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 8), 2238077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_sync), 2239077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_field), 2240077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clkenb), 2241077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clk), 2242496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 12), 2243496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 10), 2244496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 8), 2245077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_sync), 2246077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_field), 2247077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clkenb), 2248077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clk), 2249077365a9SGeert Uytterhoeven }; 2250077365a9SGeert Uytterhoeven 2251077365a9SGeert Uytterhoeven static const char * const avb_groups[] = { 2252077365a9SGeert Uytterhoeven "avb_col", 2253077365a9SGeert Uytterhoeven "avb_crs", 2254077365a9SGeert Uytterhoeven "avb_link", 2255077365a9SGeert Uytterhoeven "avb_magic", 2256077365a9SGeert Uytterhoeven "avb_phy_int", 2257077365a9SGeert Uytterhoeven "avb_mdio", 2258077365a9SGeert Uytterhoeven "avb_mii_tx_rx", 2259077365a9SGeert Uytterhoeven "avb_mii_tx_er", 2260077365a9SGeert Uytterhoeven "avb_gmii_tx_rx", 2261077365a9SGeert Uytterhoeven "avb_avtp_match_a", 2262077365a9SGeert Uytterhoeven "avb_avtp_capture_a", 2263077365a9SGeert Uytterhoeven "avb_avtp_match_b", 2264077365a9SGeert Uytterhoeven "avb_avtp_capture_b", 2265077365a9SGeert Uytterhoeven }; 2266077365a9SGeert Uytterhoeven 2267077365a9SGeert Uytterhoeven static const char * const du0_groups[] = { 2268077365a9SGeert Uytterhoeven "du0_rgb666", 2269077365a9SGeert Uytterhoeven "du0_rgb888", 2270077365a9SGeert Uytterhoeven "du0_clk0_out", 2271077365a9SGeert Uytterhoeven "du0_clk1_out", 2272077365a9SGeert Uytterhoeven "du0_clk_in", 2273077365a9SGeert Uytterhoeven "du0_sync", 2274077365a9SGeert Uytterhoeven "du0_oddf", 2275077365a9SGeert Uytterhoeven "du0_cde", 2276077365a9SGeert Uytterhoeven "du0_disp", 2277077365a9SGeert Uytterhoeven }; 2278077365a9SGeert Uytterhoeven 2279077365a9SGeert Uytterhoeven static const char * const du1_groups[] = { 2280077365a9SGeert Uytterhoeven "du1_rgb666", 2281077365a9SGeert Uytterhoeven "du1_rgb888", 2282077365a9SGeert Uytterhoeven "du1_clk0_out", 2283077365a9SGeert Uytterhoeven "du1_clk1_out", 2284077365a9SGeert Uytterhoeven "du1_clk_in", 2285077365a9SGeert Uytterhoeven "du1_sync", 2286077365a9SGeert Uytterhoeven "du1_oddf", 2287077365a9SGeert Uytterhoeven "du1_cde", 2288077365a9SGeert Uytterhoeven "du1_disp", 2289077365a9SGeert Uytterhoeven }; 2290077365a9SGeert Uytterhoeven 2291077365a9SGeert Uytterhoeven static const char * const i2c0_groups[] = { 2292077365a9SGeert Uytterhoeven "i2c0_a", 2293077365a9SGeert Uytterhoeven "i2c0_b", 2294077365a9SGeert Uytterhoeven "i2c0_c", 2295077365a9SGeert Uytterhoeven "i2c0_d", 2296077365a9SGeert Uytterhoeven "i2c0_e", 2297077365a9SGeert Uytterhoeven }; 2298077365a9SGeert Uytterhoeven 2299077365a9SGeert Uytterhoeven static const char * const i2c1_groups[] = { 2300077365a9SGeert Uytterhoeven "i2c1_a", 2301077365a9SGeert Uytterhoeven "i2c1_b", 2302077365a9SGeert Uytterhoeven "i2c1_c", 2303077365a9SGeert Uytterhoeven "i2c1_d", 2304077365a9SGeert Uytterhoeven "i2c1_e", 2305077365a9SGeert Uytterhoeven }; 2306077365a9SGeert Uytterhoeven 2307077365a9SGeert Uytterhoeven static const char * const i2c2_groups[] = { 2308077365a9SGeert Uytterhoeven "i2c2_a", 2309077365a9SGeert Uytterhoeven "i2c2_b", 2310077365a9SGeert Uytterhoeven "i2c2_c", 2311077365a9SGeert Uytterhoeven "i2c2_d", 2312077365a9SGeert Uytterhoeven }; 2313077365a9SGeert Uytterhoeven 2314077365a9SGeert Uytterhoeven static const char * const i2c3_groups[] = { 2315077365a9SGeert Uytterhoeven "i2c3_a", 2316077365a9SGeert Uytterhoeven "i2c3_b", 2317077365a9SGeert Uytterhoeven "i2c3_c", 2318077365a9SGeert Uytterhoeven "i2c3_d", 2319077365a9SGeert Uytterhoeven "i2c3_e", 2320077365a9SGeert Uytterhoeven }; 2321077365a9SGeert Uytterhoeven 2322077365a9SGeert Uytterhoeven static const char * const i2c4_groups[] = { 2323077365a9SGeert Uytterhoeven "i2c4_a", 2324077365a9SGeert Uytterhoeven "i2c4_b", 2325077365a9SGeert Uytterhoeven "i2c4_c", 2326077365a9SGeert Uytterhoeven "i2c4_d", 2327077365a9SGeert Uytterhoeven "i2c4_e", 2328077365a9SGeert Uytterhoeven }; 2329077365a9SGeert Uytterhoeven 2330077365a9SGeert Uytterhoeven static const char * const mmc_groups[] = { 2331077365a9SGeert Uytterhoeven "mmc_data1", 2332077365a9SGeert Uytterhoeven "mmc_data4", 2333077365a9SGeert Uytterhoeven "mmc_data8", 2334077365a9SGeert Uytterhoeven "mmc_ctrl", 2335077365a9SGeert Uytterhoeven }; 2336077365a9SGeert Uytterhoeven 2337077365a9SGeert Uytterhoeven static const char * const qspi0_groups[] = { 2338077365a9SGeert Uytterhoeven "qspi0_ctrl", 2339077365a9SGeert Uytterhoeven "qspi0_data2", 2340077365a9SGeert Uytterhoeven "qspi0_data4", 2341077365a9SGeert Uytterhoeven }; 2342077365a9SGeert Uytterhoeven 2343077365a9SGeert Uytterhoeven static const char * const qspi1_groups[] = { 2344077365a9SGeert Uytterhoeven "qspi1_ctrl", 2345077365a9SGeert Uytterhoeven "qspi1_data2", 2346077365a9SGeert Uytterhoeven "qspi1_data4", 2347077365a9SGeert Uytterhoeven }; 2348077365a9SGeert Uytterhoeven 2349077365a9SGeert Uytterhoeven static const char * const scif0_groups[] = { 2350077365a9SGeert Uytterhoeven "scif0_data_a", 2351077365a9SGeert Uytterhoeven "scif0_data_b", 2352077365a9SGeert Uytterhoeven "scif0_data_c", 2353077365a9SGeert Uytterhoeven "scif0_data_d", 2354077365a9SGeert Uytterhoeven }; 2355077365a9SGeert Uytterhoeven 2356077365a9SGeert Uytterhoeven static const char * const scif1_groups[] = { 2357077365a9SGeert Uytterhoeven "scif1_data_a", 2358077365a9SGeert Uytterhoeven "scif1_clk_a", 2359077365a9SGeert Uytterhoeven "scif1_data_b", 2360077365a9SGeert Uytterhoeven "scif1_clk_b", 2361077365a9SGeert Uytterhoeven "scif1_data_c", 2362077365a9SGeert Uytterhoeven "scif1_clk_c", 2363077365a9SGeert Uytterhoeven "scif1_data_d", 2364077365a9SGeert Uytterhoeven }; 2365077365a9SGeert Uytterhoeven 2366077365a9SGeert Uytterhoeven static const char * const scif2_groups[] = { 2367077365a9SGeert Uytterhoeven "scif2_data_a", 2368077365a9SGeert Uytterhoeven "scif2_clk_a", 2369077365a9SGeert Uytterhoeven "scif2_data_b", 2370077365a9SGeert Uytterhoeven "scif2_clk_b", 2371077365a9SGeert Uytterhoeven "scif2_data_c", 2372077365a9SGeert Uytterhoeven }; 2373077365a9SGeert Uytterhoeven 2374077365a9SGeert Uytterhoeven static const char * const scif3_groups[] = { 2375077365a9SGeert Uytterhoeven "scif3_data_a", 2376077365a9SGeert Uytterhoeven "scif3_clk", 2377077365a9SGeert Uytterhoeven "scif3_data_b", 2378077365a9SGeert Uytterhoeven "scif3_data_c", 2379077365a9SGeert Uytterhoeven }; 2380077365a9SGeert Uytterhoeven 2381077365a9SGeert Uytterhoeven static const char * const scif4_groups[] = { 2382077365a9SGeert Uytterhoeven "scif4_data_a", 2383077365a9SGeert Uytterhoeven "scif4_data_b", 2384077365a9SGeert Uytterhoeven "scif4_data_c", 2385077365a9SGeert Uytterhoeven "scif4_data_d", 2386077365a9SGeert Uytterhoeven "scif4_data_e", 2387077365a9SGeert Uytterhoeven }; 2388077365a9SGeert Uytterhoeven 2389077365a9SGeert Uytterhoeven static const char * const scif5_groups[] = { 2390077365a9SGeert Uytterhoeven "scif5_data_a", 2391077365a9SGeert Uytterhoeven "scif5_data_b", 2392077365a9SGeert Uytterhoeven "scif5_data_c", 2393077365a9SGeert Uytterhoeven "scif5_data_d", 2394077365a9SGeert Uytterhoeven "scif5_data_e", 2395077365a9SGeert Uytterhoeven "scif5_data_f", 2396077365a9SGeert Uytterhoeven }; 2397077365a9SGeert Uytterhoeven 2398077365a9SGeert Uytterhoeven static const char * const scif_clk_groups[] = { 2399077365a9SGeert Uytterhoeven "scif_clk_a", 2400077365a9SGeert Uytterhoeven "scif_clk_b", 2401077365a9SGeert Uytterhoeven }; 2402077365a9SGeert Uytterhoeven 2403077365a9SGeert Uytterhoeven static const char * const sdhi0_groups[] = { 2404077365a9SGeert Uytterhoeven "sdhi0_data1", 2405077365a9SGeert Uytterhoeven "sdhi0_data4", 2406077365a9SGeert Uytterhoeven "sdhi0_ctrl", 2407077365a9SGeert Uytterhoeven "sdhi0_cd", 2408077365a9SGeert Uytterhoeven "sdhi0_wp", 2409077365a9SGeert Uytterhoeven }; 2410077365a9SGeert Uytterhoeven 2411077365a9SGeert Uytterhoeven static const char * const sdhi1_groups[] = { 2412077365a9SGeert Uytterhoeven "sdhi1_data1", 2413077365a9SGeert Uytterhoeven "sdhi1_data4", 2414077365a9SGeert Uytterhoeven "sdhi1_ctrl", 2415077365a9SGeert Uytterhoeven "sdhi1_cd", 2416077365a9SGeert Uytterhoeven "sdhi1_wp", 2417077365a9SGeert Uytterhoeven }; 2418077365a9SGeert Uytterhoeven 2419077365a9SGeert Uytterhoeven static const char * const sdhi2_groups[] = { 2420077365a9SGeert Uytterhoeven "sdhi2_data1", 2421077365a9SGeert Uytterhoeven "sdhi2_data4", 2422077365a9SGeert Uytterhoeven "sdhi2_ctrl", 2423077365a9SGeert Uytterhoeven "sdhi2_cd", 2424077365a9SGeert Uytterhoeven "sdhi2_wp", 2425077365a9SGeert Uytterhoeven }; 2426077365a9SGeert Uytterhoeven 2427077365a9SGeert Uytterhoeven static const char * const usb0_groups[] = { 2428077365a9SGeert Uytterhoeven "usb0", 2429077365a9SGeert Uytterhoeven }; 2430077365a9SGeert Uytterhoeven 2431077365a9SGeert Uytterhoeven static const char * const usb1_groups[] = { 2432077365a9SGeert Uytterhoeven "usb1", 2433077365a9SGeert Uytterhoeven }; 2434077365a9SGeert Uytterhoeven 2435077365a9SGeert Uytterhoeven static const char * const vin0_groups[] = { 2436077365a9SGeert Uytterhoeven "vin0_data24", 2437077365a9SGeert Uytterhoeven "vin0_data20", 2438077365a9SGeert Uytterhoeven "vin0_data18", 2439077365a9SGeert Uytterhoeven "vin0_data16", 2440077365a9SGeert Uytterhoeven "vin0_data12", 2441077365a9SGeert Uytterhoeven "vin0_data10", 2442077365a9SGeert Uytterhoeven "vin0_data8", 2443077365a9SGeert Uytterhoeven "vin0_sync", 2444077365a9SGeert Uytterhoeven "vin0_field", 2445077365a9SGeert Uytterhoeven "vin0_clkenb", 2446077365a9SGeert Uytterhoeven "vin0_clk", 2447077365a9SGeert Uytterhoeven }; 2448077365a9SGeert Uytterhoeven 2449077365a9SGeert Uytterhoeven static const char * const vin1_groups[] = { 2450077365a9SGeert Uytterhoeven "vin1_data12", 2451077365a9SGeert Uytterhoeven "vin1_data10", 2452077365a9SGeert Uytterhoeven "vin1_data8", 2453077365a9SGeert Uytterhoeven "vin1_sync", 2454077365a9SGeert Uytterhoeven "vin1_field", 2455077365a9SGeert Uytterhoeven "vin1_clkenb", 2456077365a9SGeert Uytterhoeven "vin1_clk", 2457077365a9SGeert Uytterhoeven }; 2458077365a9SGeert Uytterhoeven 2459077365a9SGeert Uytterhoeven static const struct sh_pfc_function pinmux_functions[] = { 2460077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(avb), 2461077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du0), 2462077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du1), 2463077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c0), 2464077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c1), 2465077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c2), 2466077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c3), 2467077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c4), 2468077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mmc), 2469077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi0), 2470077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi1), 2471077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif0), 2472077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif1), 2473077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif2), 2474077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif3), 2475077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif4), 2476077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif5), 2477077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif_clk), 2478077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi0), 2479077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi1), 2480077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi2), 2481077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb0), 2482077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb1), 2483077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin0), 2484077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin1), 2485077365a9SGeert Uytterhoeven }; 2486077365a9SGeert Uytterhoeven 2487077365a9SGeert Uytterhoeven static const struct pinmux_cfg_reg pinmux_config_regs[] = { 2488*ade1ef99SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR0", 0xE6060004, 32, 2489*ade1ef99SGeert Uytterhoeven GROUP(-9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2490*ade1ef99SGeert Uytterhoeven 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1), 2491*ade1ef99SGeert Uytterhoeven GROUP( 2492*ade1ef99SGeert Uytterhoeven /* GP0_31_23 RESERVED */ 2493077365a9SGeert Uytterhoeven GP_0_22_FN, FN_MMC0_D7, 2494077365a9SGeert Uytterhoeven GP_0_21_FN, FN_MMC0_D6, 2495077365a9SGeert Uytterhoeven GP_0_20_FN, FN_IP1_7_4, 2496077365a9SGeert Uytterhoeven GP_0_19_FN, FN_IP1_3_0, 2497077365a9SGeert Uytterhoeven GP_0_18_FN, FN_MMC0_D3_SDHI1_D3, 2498077365a9SGeert Uytterhoeven GP_0_17_FN, FN_MMC0_D2_SDHI1_D2, 2499077365a9SGeert Uytterhoeven GP_0_16_FN, FN_MMC0_D1_SDHI1_D1, 2500077365a9SGeert Uytterhoeven GP_0_15_FN, FN_MMC0_D0_SDHI1_D0, 2501077365a9SGeert Uytterhoeven GP_0_14_FN, FN_MMC0_CMD_SDHI1_CMD, 2502077365a9SGeert Uytterhoeven GP_0_13_FN, FN_MMC0_CLK_SDHI1_CLK, 2503077365a9SGeert Uytterhoeven GP_0_12_FN, FN_IP0_31_28, 2504077365a9SGeert Uytterhoeven GP_0_11_FN, FN_IP0_27_24, 2505077365a9SGeert Uytterhoeven GP_0_10_FN, FN_IP0_23_20, 2506077365a9SGeert Uytterhoeven GP_0_9_FN, FN_IP0_19_16, 2507077365a9SGeert Uytterhoeven GP_0_8_FN, FN_IP0_15_12, 2508077365a9SGeert Uytterhoeven GP_0_7_FN, FN_IP0_11_8, 2509077365a9SGeert Uytterhoeven GP_0_6_FN, FN_IP0_7_4, 2510077365a9SGeert Uytterhoeven GP_0_5_FN, FN_IP0_3_0, 2511077365a9SGeert Uytterhoeven GP_0_4_FN, FN_CLKOUT, 2512077365a9SGeert Uytterhoeven GP_0_3_FN, FN_USB1_OVC, 2513077365a9SGeert Uytterhoeven GP_0_2_FN, FN_USB1_PWEN, 2514077365a9SGeert Uytterhoeven GP_0_1_FN, FN_USB0_OVC, 2515077365a9SGeert Uytterhoeven GP_0_0_FN, FN_USB0_PWEN, )) 2516077365a9SGeert Uytterhoeven }, 2517*ade1ef99SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR1", 0xE6060008, 32, 2518*ade1ef99SGeert Uytterhoeven GROUP(-9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2519*ade1ef99SGeert Uytterhoeven 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1), 2520*ade1ef99SGeert Uytterhoeven GROUP( 2521*ade1ef99SGeert Uytterhoeven /* GP1_31_23 RESERVED */ 2522077365a9SGeert Uytterhoeven GP_1_22_FN, FN_IP4_3_0, 2523077365a9SGeert Uytterhoeven GP_1_21_FN, FN_IP3_31_28, 2524077365a9SGeert Uytterhoeven GP_1_20_FN, FN_IP3_27_24, 2525077365a9SGeert Uytterhoeven GP_1_19_FN, FN_IP3_23_20, 2526077365a9SGeert Uytterhoeven GP_1_18_FN, FN_IP3_19_16, 2527077365a9SGeert Uytterhoeven GP_1_17_FN, FN_IP3_15_12, 2528077365a9SGeert Uytterhoeven GP_1_16_FN, FN_IP3_11_8, 2529077365a9SGeert Uytterhoeven GP_1_15_FN, FN_IP3_7_4, 2530077365a9SGeert Uytterhoeven GP_1_14_FN, FN_IP3_3_0, 2531077365a9SGeert Uytterhoeven GP_1_13_FN, FN_IP2_31_28, 2532077365a9SGeert Uytterhoeven GP_1_12_FN, FN_IP2_27_24, 2533077365a9SGeert Uytterhoeven GP_1_11_FN, FN_IP2_23_20, 2534077365a9SGeert Uytterhoeven GP_1_10_FN, FN_IP2_19_16, 2535077365a9SGeert Uytterhoeven GP_1_9_FN, FN_IP2_15_12, 2536077365a9SGeert Uytterhoeven GP_1_8_FN, FN_IP2_11_8, 2537077365a9SGeert Uytterhoeven GP_1_7_FN, FN_IP2_7_4, 2538077365a9SGeert Uytterhoeven GP_1_6_FN, FN_IP2_3_0, 2539077365a9SGeert Uytterhoeven GP_1_5_FN, FN_IP1_31_28, 2540077365a9SGeert Uytterhoeven GP_1_4_FN, FN_IP1_27_24, 2541077365a9SGeert Uytterhoeven GP_1_3_FN, FN_IP1_23_20, 2542077365a9SGeert Uytterhoeven GP_1_2_FN, FN_IP1_19_16, 2543077365a9SGeert Uytterhoeven GP_1_1_FN, FN_IP1_15_12, 2544077365a9SGeert Uytterhoeven GP_1_0_FN, FN_IP1_11_8, )) 2545077365a9SGeert Uytterhoeven }, 2546077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP( 2547077365a9SGeert Uytterhoeven GP_2_31_FN, FN_IP8_3_0, 2548077365a9SGeert Uytterhoeven GP_2_30_FN, FN_IP7_31_28, 2549077365a9SGeert Uytterhoeven GP_2_29_FN, FN_IP7_27_24, 2550077365a9SGeert Uytterhoeven GP_2_28_FN, FN_IP7_23_20, 2551077365a9SGeert Uytterhoeven GP_2_27_FN, FN_IP7_19_16, 2552077365a9SGeert Uytterhoeven GP_2_26_FN, FN_IP7_15_12, 2553077365a9SGeert Uytterhoeven GP_2_25_FN, FN_IP7_11_8, 2554077365a9SGeert Uytterhoeven GP_2_24_FN, FN_IP7_7_4, 2555077365a9SGeert Uytterhoeven GP_2_23_FN, FN_IP7_3_0, 2556077365a9SGeert Uytterhoeven GP_2_22_FN, FN_IP6_31_28, 2557077365a9SGeert Uytterhoeven GP_2_21_FN, FN_IP6_27_24, 2558077365a9SGeert Uytterhoeven GP_2_20_FN, FN_IP6_23_20, 2559077365a9SGeert Uytterhoeven GP_2_19_FN, FN_IP6_19_16, 2560077365a9SGeert Uytterhoeven GP_2_18_FN, FN_IP6_15_12, 2561077365a9SGeert Uytterhoeven GP_2_17_FN, FN_IP6_11_8, 2562077365a9SGeert Uytterhoeven GP_2_16_FN, FN_IP6_7_4, 2563077365a9SGeert Uytterhoeven GP_2_15_FN, FN_IP6_3_0, 2564077365a9SGeert Uytterhoeven GP_2_14_FN, FN_IP5_31_28, 2565077365a9SGeert Uytterhoeven GP_2_13_FN, FN_IP5_27_24, 2566077365a9SGeert Uytterhoeven GP_2_12_FN, FN_IP5_23_20, 2567077365a9SGeert Uytterhoeven GP_2_11_FN, FN_IP5_19_16, 2568077365a9SGeert Uytterhoeven GP_2_10_FN, FN_IP5_15_12, 2569077365a9SGeert Uytterhoeven GP_2_9_FN, FN_IP5_11_8, 2570077365a9SGeert Uytterhoeven GP_2_8_FN, FN_IP5_7_4, 2571077365a9SGeert Uytterhoeven GP_2_7_FN, FN_IP5_3_0, 2572077365a9SGeert Uytterhoeven GP_2_6_FN, FN_IP4_31_28, 2573077365a9SGeert Uytterhoeven GP_2_5_FN, FN_IP4_27_24, 2574077365a9SGeert Uytterhoeven GP_2_4_FN, FN_IP4_23_20, 2575077365a9SGeert Uytterhoeven GP_2_3_FN, FN_IP4_19_16, 2576077365a9SGeert Uytterhoeven GP_2_2_FN, FN_IP4_15_12, 2577077365a9SGeert Uytterhoeven GP_2_1_FN, FN_IP4_11_8, 2578077365a9SGeert Uytterhoeven GP_2_0_FN, FN_IP4_7_4, )) 2579077365a9SGeert Uytterhoeven }, 2580*ade1ef99SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR3", 0xE6060010, 32, 2581*ade1ef99SGeert Uytterhoeven GROUP(-2, 1, 1, -10, 1, 1, 1, 1, 1, 1, 1, 1, 2582*ade1ef99SGeert Uytterhoeven 1, 1, 1, 1, 1, 1, 1, 1, 1, 1), 2583*ade1ef99SGeert Uytterhoeven GROUP( 2584*ade1ef99SGeert Uytterhoeven /* GP3_31_30 RESERVED */ 2585077365a9SGeert Uytterhoeven GP_3_29_FN, FN_IP10_19_16, 2586077365a9SGeert Uytterhoeven GP_3_28_FN, FN_IP10_15_12, 2587077365a9SGeert Uytterhoeven GP_3_27_FN, FN_IP10_11_8, 2588*ade1ef99SGeert Uytterhoeven /* GP3_26_17 RESERVED */ 2589077365a9SGeert Uytterhoeven GP_3_16_FN, FN_IP10_7_4, 2590077365a9SGeert Uytterhoeven GP_3_15_FN, FN_IP10_3_0, 2591077365a9SGeert Uytterhoeven GP_3_14_FN, FN_IP9_31_28, 2592077365a9SGeert Uytterhoeven GP_3_13_FN, FN_IP9_27_24, 2593077365a9SGeert Uytterhoeven GP_3_12_FN, FN_IP9_23_20, 2594077365a9SGeert Uytterhoeven GP_3_11_FN, FN_IP9_19_16, 2595077365a9SGeert Uytterhoeven GP_3_10_FN, FN_IP9_15_12, 2596077365a9SGeert Uytterhoeven GP_3_9_FN, FN_IP9_11_8, 2597077365a9SGeert Uytterhoeven GP_3_8_FN, FN_IP9_7_4, 2598077365a9SGeert Uytterhoeven GP_3_7_FN, FN_IP9_3_0, 2599077365a9SGeert Uytterhoeven GP_3_6_FN, FN_IP8_31_28, 2600077365a9SGeert Uytterhoeven GP_3_5_FN, FN_IP8_27_24, 2601077365a9SGeert Uytterhoeven GP_3_4_FN, FN_IP8_23_20, 2602077365a9SGeert Uytterhoeven GP_3_3_FN, FN_IP8_19_16, 2603077365a9SGeert Uytterhoeven GP_3_2_FN, FN_IP8_15_12, 2604077365a9SGeert Uytterhoeven GP_3_1_FN, FN_IP8_11_8, 2605077365a9SGeert Uytterhoeven GP_3_0_FN, FN_IP8_7_4, )) 2606077365a9SGeert Uytterhoeven }, 2607077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP( 2608077365a9SGeert Uytterhoeven 0, 0, 2609077365a9SGeert Uytterhoeven 0, 0, 2610077365a9SGeert Uytterhoeven 0, 0, 2611077365a9SGeert Uytterhoeven 0, 0, 2612077365a9SGeert Uytterhoeven 0, 0, 2613077365a9SGeert Uytterhoeven 0, 0, 2614077365a9SGeert Uytterhoeven GP_4_25_FN, FN_IP13_27_24, 2615077365a9SGeert Uytterhoeven GP_4_24_FN, FN_IP13_23_20, 2616077365a9SGeert Uytterhoeven GP_4_23_FN, FN_IP13_19_16, 2617077365a9SGeert Uytterhoeven GP_4_22_FN, FN_IP13_15_12, 2618077365a9SGeert Uytterhoeven GP_4_21_FN, FN_IP13_11_8, 2619077365a9SGeert Uytterhoeven GP_4_20_FN, FN_IP13_7_4, 2620077365a9SGeert Uytterhoeven GP_4_19_FN, FN_IP13_3_0, 2621077365a9SGeert Uytterhoeven GP_4_18_FN, FN_IP12_31_28, 2622077365a9SGeert Uytterhoeven GP_4_17_FN, FN_IP12_27_24, 2623077365a9SGeert Uytterhoeven GP_4_16_FN, FN_IP12_23_20, 2624077365a9SGeert Uytterhoeven GP_4_15_FN, FN_IP12_19_16, 2625077365a9SGeert Uytterhoeven GP_4_14_FN, FN_IP12_15_12, 2626077365a9SGeert Uytterhoeven GP_4_13_FN, FN_IP12_11_8, 2627077365a9SGeert Uytterhoeven GP_4_12_FN, FN_IP12_7_4, 2628077365a9SGeert Uytterhoeven GP_4_11_FN, FN_IP12_3_0, 2629077365a9SGeert Uytterhoeven GP_4_10_FN, FN_IP11_31_28, 2630077365a9SGeert Uytterhoeven GP_4_9_FN, FN_IP11_27_24, 2631077365a9SGeert Uytterhoeven GP_4_8_FN, FN_IP11_23_20, 2632077365a9SGeert Uytterhoeven GP_4_7_FN, FN_IP11_19_16, 2633077365a9SGeert Uytterhoeven GP_4_6_FN, FN_IP11_15_12, 2634077365a9SGeert Uytterhoeven GP_4_5_FN, FN_IP11_11_8, 2635077365a9SGeert Uytterhoeven GP_4_4_FN, FN_IP11_7_4, 2636077365a9SGeert Uytterhoeven GP_4_3_FN, FN_IP11_3_0, 2637077365a9SGeert Uytterhoeven GP_4_2_FN, FN_IP10_31_28, 2638077365a9SGeert Uytterhoeven GP_4_1_FN, FN_IP10_27_24, 2639077365a9SGeert Uytterhoeven GP_4_0_FN, FN_IP10_23_20, )) 2640077365a9SGeert Uytterhoeven }, 2641077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP( 2642077365a9SGeert Uytterhoeven GP_5_31_FN, FN_IP17_27_24, 2643077365a9SGeert Uytterhoeven GP_5_30_FN, FN_IP17_23_20, 2644077365a9SGeert Uytterhoeven GP_5_29_FN, FN_IP17_19_16, 2645077365a9SGeert Uytterhoeven GP_5_28_FN, FN_IP17_15_12, 2646077365a9SGeert Uytterhoeven GP_5_27_FN, FN_IP17_11_8, 2647077365a9SGeert Uytterhoeven GP_5_26_FN, FN_IP17_7_4, 2648077365a9SGeert Uytterhoeven GP_5_25_FN, FN_IP17_3_0, 2649077365a9SGeert Uytterhoeven GP_5_24_FN, FN_IP16_31_28, 2650077365a9SGeert Uytterhoeven GP_5_23_FN, FN_IP16_27_24, 2651077365a9SGeert Uytterhoeven GP_5_22_FN, FN_IP16_23_20, 2652077365a9SGeert Uytterhoeven GP_5_21_FN, FN_IP16_19_16, 2653077365a9SGeert Uytterhoeven GP_5_20_FN, FN_IP16_15_12, 2654077365a9SGeert Uytterhoeven GP_5_19_FN, FN_IP16_11_8, 2655077365a9SGeert Uytterhoeven GP_5_18_FN, FN_IP16_7_4, 2656077365a9SGeert Uytterhoeven GP_5_17_FN, FN_IP16_3_0, 2657077365a9SGeert Uytterhoeven GP_5_16_FN, FN_IP15_31_28, 2658077365a9SGeert Uytterhoeven GP_5_15_FN, FN_IP15_27_24, 2659077365a9SGeert Uytterhoeven GP_5_14_FN, FN_IP15_23_20, 2660077365a9SGeert Uytterhoeven GP_5_13_FN, FN_IP15_19_16, 2661077365a9SGeert Uytterhoeven GP_5_12_FN, FN_IP15_15_12, 2662077365a9SGeert Uytterhoeven GP_5_11_FN, FN_IP15_11_8, 2663077365a9SGeert Uytterhoeven GP_5_10_FN, FN_IP15_7_4, 2664077365a9SGeert Uytterhoeven GP_5_9_FN, FN_IP15_3_0, 2665077365a9SGeert Uytterhoeven GP_5_8_FN, FN_IP14_31_28, 2666077365a9SGeert Uytterhoeven GP_5_7_FN, FN_IP14_27_24, 2667077365a9SGeert Uytterhoeven GP_5_6_FN, FN_IP14_23_20, 2668077365a9SGeert Uytterhoeven GP_5_5_FN, FN_IP14_19_16, 2669077365a9SGeert Uytterhoeven GP_5_4_FN, FN_IP14_15_12, 2670077365a9SGeert Uytterhoeven GP_5_3_FN, FN_IP14_11_8, 2671077365a9SGeert Uytterhoeven GP_5_2_FN, FN_IP14_7_4, 2672077365a9SGeert Uytterhoeven GP_5_1_FN, FN_IP14_3_0, 2673077365a9SGeert Uytterhoeven GP_5_0_FN, FN_IP13_31_28, )) 2674077365a9SGeert Uytterhoeven }, 26757fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32, 4, GROUP( 2676077365a9SGeert Uytterhoeven /* IP0_31_28 [4] */ 2677077365a9SGeert Uytterhoeven FN_SD0_WP, FN_IRQ7, FN_CAN0_TX_A, 0, 0, 0, 0, 0, 2678077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2679077365a9SGeert Uytterhoeven /* IP0_27_24 [4] */ 2680077365a9SGeert Uytterhoeven FN_SD0_CD, 0, FN_CAN0_RX_A, 0, 0, 0, 0, 0, 2681077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2682077365a9SGeert Uytterhoeven /* IP0_23_20 [4] */ 2683077365a9SGeert Uytterhoeven FN_SD0_DAT3, 0, 0, FN_SSI_SDATA0_B, FN_TX5_E, 0, 0, 0, 2684077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2685077365a9SGeert Uytterhoeven /* IP0_19_16 [4] */ 2686077365a9SGeert Uytterhoeven FN_SD0_DAT2, 0, 0, FN_SSI_WS0129_B, FN_RX5_E, 0, 0, 0, 2687077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2688077365a9SGeert Uytterhoeven /* IP0_15_12 [4] */ 2689077365a9SGeert Uytterhoeven FN_SD0_DAT1, 0, 0, FN_SSI_SCK0129_B, FN_TX4_E, 0, 0, 0, 2690077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2691077365a9SGeert Uytterhoeven /* IP0_11_8 [4] */ 2692077365a9SGeert Uytterhoeven FN_SD0_DAT0, 0, 0, FN_SSI_SDATA1_C, FN_RX4_E, 0, 0, 0, 2693077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2694077365a9SGeert Uytterhoeven /* IP0_7_4 [4] */ 2695077365a9SGeert Uytterhoeven FN_SD0_CMD, 0, 0, FN_SSI_WS1_C, FN_TX3_C, 0, 0, 0, 2696077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2697077365a9SGeert Uytterhoeven /* IP0_3_0 [4] */ 2698077365a9SGeert Uytterhoeven FN_SD0_CLK, 0, 0, FN_SSI_SCK1_C, FN_RX3_C, 0, 0, 0, 2699077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 2700077365a9SGeert Uytterhoeven }, 27017fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 4, GROUP( 2702077365a9SGeert Uytterhoeven /* IP1_31_28 [4] */ 2703077365a9SGeert Uytterhoeven FN_D5, FN_HRX2, FN_SCL1_B, FN_PWM2_C, FN_TCLK2_B, 0, 0, 0, 2704077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2705077365a9SGeert Uytterhoeven /* IP1_27_24 [4] */ 2706077365a9SGeert Uytterhoeven FN_D4, 0, FN_IRQ3, FN_TCLK1_A, FN_PWM6_C, 0, 0, 0, 2707077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2708077365a9SGeert Uytterhoeven /* IP1_23_20 [4] */ 2709077365a9SGeert Uytterhoeven FN_D3, 0, FN_TX4_B, FN_SDA0_D, FN_PWM0_A, 2710077365a9SGeert Uytterhoeven FN_MSIOF2_SYNC_C, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2711077365a9SGeert Uytterhoeven /* IP1_19_16 [4] */ 2712077365a9SGeert Uytterhoeven FN_D2, 0, FN_RX4_B, FN_SCL0_D, FN_PWM1_C, 2713077365a9SGeert Uytterhoeven FN_MSIOF2_SCK_C, FN_SSI_SCK5_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2714077365a9SGeert Uytterhoeven /* IP1_15_12 [4] */ 2715077365a9SGeert Uytterhoeven FN_D1, 0, FN_SDA3_B, FN_TX5_B, 0, FN_MSIOF2_TXD_C, 2716077365a9SGeert Uytterhoeven FN_SSI_WS5_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2717077365a9SGeert Uytterhoeven /* IP1_11_8 [4] */ 2718077365a9SGeert Uytterhoeven FN_D0, 0, FN_SCL3_B, FN_RX5_B, FN_IRQ4, 2719077365a9SGeert Uytterhoeven FN_MSIOF2_RXD_C, FN_SSI_SDATA5_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2720077365a9SGeert Uytterhoeven /* IP1_7_4 [4] */ 2721077365a9SGeert Uytterhoeven FN_MMC0_D5, FN_SD1_WP, 0, 0, 0, 0, 0, 0, 2722077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2723077365a9SGeert Uytterhoeven /* IP1_3_0 [4] */ 2724077365a9SGeert Uytterhoeven FN_MMC0_D4, FN_SD1_CD, 0, 0, 0, 0, 0, 0, 2725077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 2726077365a9SGeert Uytterhoeven }, 27277fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 4, GROUP( 2728077365a9SGeert Uytterhoeven /* IP2_31_28 [4] */ 2729077365a9SGeert Uytterhoeven FN_D13, FN_MSIOF2_SYNC_A, 0, FN_RX4_C, 0, 0, 0, 0, 0, 2730077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2731077365a9SGeert Uytterhoeven /* IP2_27_24 [4] */ 2732077365a9SGeert Uytterhoeven FN_D12, FN_MSIOF2_SCK_A, FN_HSCK0, 0, FN_CAN_CLK_C, 2733077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2734077365a9SGeert Uytterhoeven /* IP2_23_20 [4] */ 2735077365a9SGeert Uytterhoeven FN_D11, FN_MSIOF2_TXD_A, FN_HTX0_B, 0, 0, 0, 0, 0, 0, 2736077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2737077365a9SGeert Uytterhoeven /* IP2_19_16 [4] */ 2738077365a9SGeert Uytterhoeven FN_D10, FN_MSIOF2_RXD_A, FN_HRX0_B, 0, 0, 0, 0, 0, 0, 2739077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2740077365a9SGeert Uytterhoeven /* IP2_15_12 [4] */ 2741077365a9SGeert Uytterhoeven FN_D9, FN_HRTS2_N, FN_TX1_C, FN_SDA1_D, 0, 0, 0, 2742077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2743077365a9SGeert Uytterhoeven /* IP2_11_8 [4] */ 2744077365a9SGeert Uytterhoeven FN_D8, FN_HCTS2_N, FN_RX1_C, FN_SCL1_D, FN_PWM3_C, 0, 2745077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2746077365a9SGeert Uytterhoeven /* IP2_7_4 [4] */ 2747077365a9SGeert Uytterhoeven FN_D7, FN_HSCK2, FN_SCIF1_SCK_C, FN_IRQ6, FN_PWM5_C, 2748077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2749077365a9SGeert Uytterhoeven /* IP2_3_0 [4] */ 2750077365a9SGeert Uytterhoeven FN_D6, FN_HTX2, FN_SDA1_B, FN_PWM4_C, 0, 0, 0, 0, 2751077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 2752077365a9SGeert Uytterhoeven }, 27537fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 4, GROUP( 2754077365a9SGeert Uytterhoeven /* IP3_31_28 [4] */ 2755077365a9SGeert Uytterhoeven FN_QSPI0_SSL, FN_WE1_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2756077365a9SGeert Uytterhoeven 0, 0, 2757077365a9SGeert Uytterhoeven /* IP3_27_24 [4] */ 2758077365a9SGeert Uytterhoeven FN_QSPI0_IO3, FN_RD_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2759077365a9SGeert Uytterhoeven 0, 0, 2760077365a9SGeert Uytterhoeven /* IP3_23_20 [4] */ 2761077365a9SGeert Uytterhoeven FN_QSPI0_IO2, FN_CS0_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2762077365a9SGeert Uytterhoeven 0, 0, 2763077365a9SGeert Uytterhoeven /* IP3_19_16 [4] */ 2764077365a9SGeert Uytterhoeven FN_QSPI0_MISO_QSPI0_IO1, FN_RD_WR_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2765077365a9SGeert Uytterhoeven 0, 0, 0, 0, 2766077365a9SGeert Uytterhoeven /* IP3_15_12 [4] */ 2767077365a9SGeert Uytterhoeven FN_QSPI0_MOSI_QSPI0_IO0, FN_BS_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2768077365a9SGeert Uytterhoeven 0, 0, 0, 2769077365a9SGeert Uytterhoeven /* IP3_11_8 [4] */ 2770077365a9SGeert Uytterhoeven FN_QSPI0_SPCLK, FN_WE0_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2771077365a9SGeert Uytterhoeven 0, 0, 2772077365a9SGeert Uytterhoeven /* IP3_7_4 [4] */ 2773077365a9SGeert Uytterhoeven FN_D15, FN_MSIOF2_SS2, FN_PWM4_A, 0, FN_CAN1_TX_B, FN_IRQ2, 2774077365a9SGeert Uytterhoeven FN_AVB_AVTP_MATCH_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2775077365a9SGeert Uytterhoeven /* IP3_3_0 [4] */ 2776077365a9SGeert Uytterhoeven FN_D14, FN_MSIOF2_SS1, 0, FN_TX4_C, FN_CAN1_RX_B, 2777077365a9SGeert Uytterhoeven 0, FN_AVB_AVTP_CAPTURE_A, 2778077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 2779077365a9SGeert Uytterhoeven }, 27807fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR4", 0xE6060050, 32, 4, GROUP( 2781077365a9SGeert Uytterhoeven /* IP4_31_28 [4] */ 2782077365a9SGeert Uytterhoeven FN_DU0_DR6, 0, FN_RX2_C, 0, 0, 0, FN_A6, 0, 2783077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2784077365a9SGeert Uytterhoeven /* IP4_27_24 [4] */ 2785077365a9SGeert Uytterhoeven FN_DU0_DR5, 0, FN_TX1_D, 0, FN_PWM1_B, 0, FN_A5, 0, 2786077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2787077365a9SGeert Uytterhoeven /* IP4_23_20 [4] */ 2788077365a9SGeert Uytterhoeven FN_DU0_DR4, 0, FN_RX1_D, 0, 0, 0, FN_A4, 0, 0, 0, 0, 2789077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 2790077365a9SGeert Uytterhoeven /* IP4_19_16 [4] */ 2791077365a9SGeert Uytterhoeven FN_DU0_DR3, 0, FN_TX0_D, FN_SDA0_E, FN_PWM0_B, 0, 2792077365a9SGeert Uytterhoeven FN_A3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2793077365a9SGeert Uytterhoeven /* IP4_15_12 [4] */ 2794077365a9SGeert Uytterhoeven FN_DU0_DR2, 0, FN_RX0_D, FN_SCL0_E, 0, 0, FN_A2, 0, 2795077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2796077365a9SGeert Uytterhoeven /* IP4_11_8 [4] */ 2797077365a9SGeert Uytterhoeven FN_DU0_DR1, 0, FN_TX5_C, FN_SDA2_D, 0, 0, FN_A1, 0, 2798077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2799077365a9SGeert Uytterhoeven /* IP4_7_4 [4] */ 2800077365a9SGeert Uytterhoeven FN_DU0_DR0, 0, FN_RX5_C, FN_SCL2_D, 0, 0, FN_A0, 0, 2801077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2802077365a9SGeert Uytterhoeven /* IP4_3_0 [4] */ 2803077365a9SGeert Uytterhoeven FN_EX_WAIT0, FN_CAN_CLK_B, FN_SCIF_CLK_A, 0, 0, 0, 0, 2804077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 2805077365a9SGeert Uytterhoeven }, 28067fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 4, GROUP( 2807077365a9SGeert Uytterhoeven /* IP5_31_28 [4] */ 2808077365a9SGeert Uytterhoeven FN_DU0_DG6, 0, FN_HRX1_C, 0, 0, 0, FN_A14, 0, 0, 0, 2809077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2810077365a9SGeert Uytterhoeven /* IP5_27_24 [4] */ 2811077365a9SGeert Uytterhoeven FN_DU0_DG5, 0, FN_HTX0_A, 0, FN_PWM5_B, 0, FN_A13, 2812077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2813077365a9SGeert Uytterhoeven /* IP5_23_20 [4] */ 2814077365a9SGeert Uytterhoeven FN_DU0_DG4, 0, FN_HRX0_A, 0, 0, 0, FN_A12, 0, 0, 0, 2815077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2816077365a9SGeert Uytterhoeven /* IP5_19_16 [4] */ 2817077365a9SGeert Uytterhoeven FN_DU0_DG3, 0, FN_TX4_D, 0, FN_PWM4_B, 0, FN_A11, 0, 2818077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2819077365a9SGeert Uytterhoeven /* IP5_15_12 [4] */ 2820077365a9SGeert Uytterhoeven FN_DU0_DG2, 0, FN_RX4_D, 0, 0, 0, FN_A10, 0, 0, 0, 2821077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2822077365a9SGeert Uytterhoeven /* IP5_11_8 [4] */ 2823077365a9SGeert Uytterhoeven FN_DU0_DG1, 0, FN_TX3_B, FN_SDA3_D, FN_PWM3_B, 0, 2824077365a9SGeert Uytterhoeven FN_A9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2825077365a9SGeert Uytterhoeven /* IP5_7_4 [4] */ 2826077365a9SGeert Uytterhoeven FN_DU0_DG0, 0, FN_RX3_B, FN_SCL3_D, 0, 0, FN_A8, 0, 2827077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2828077365a9SGeert Uytterhoeven /* IP5_3_0 [4] */ 2829077365a9SGeert Uytterhoeven FN_DU0_DR7, 0, FN_TX2_C, 0, FN_PWM2_B, 0, FN_A7, 0, 2830077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 2831077365a9SGeert Uytterhoeven }, 28327fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR6", 0xE6060058, 32, 4, GROUP( 2833077365a9SGeert Uytterhoeven /* IP6_31_28 [4] */ 2834077365a9SGeert Uytterhoeven FN_DU0_DB6, 0, 0, 0, 0, 0, FN_A22, 0, 0, 2835077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2836077365a9SGeert Uytterhoeven /* IP6_27_24 [4] */ 2837077365a9SGeert Uytterhoeven FN_DU0_DB5, 0, FN_HRTS1_N_C, 0, 0, 0, 2838077365a9SGeert Uytterhoeven FN_A21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2839077365a9SGeert Uytterhoeven /* IP6_23_20 [4] */ 2840077365a9SGeert Uytterhoeven FN_DU0_DB4, 0, FN_HCTS1_N_C, 0, 0, 0, 2841077365a9SGeert Uytterhoeven FN_A20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2842077365a9SGeert Uytterhoeven /* IP6_19_16 [4] */ 2843077365a9SGeert Uytterhoeven FN_DU0_DB3, 0, FN_HRTS0_N, 0, 0, 0, FN_A19, 0, 0, 0, 2844077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2845077365a9SGeert Uytterhoeven /* IP6_15_12 [4] */ 2846077365a9SGeert Uytterhoeven FN_DU0_DB2, 0, FN_HCTS0_N, 0, 0, 0, FN_A18, 0, 0, 0, 2847077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2848077365a9SGeert Uytterhoeven /* IP6_11_8 [4] */ 2849077365a9SGeert Uytterhoeven FN_DU0_DB1, 0, 0, FN_SDA4_D, FN_CAN0_TX_C, 0, FN_A17, 2850077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2851077365a9SGeert Uytterhoeven /* IP6_7_4 [4] */ 2852077365a9SGeert Uytterhoeven FN_DU0_DB0, 0, 0, FN_SCL4_D, FN_CAN0_RX_C, 0, FN_A16, 2853077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2854077365a9SGeert Uytterhoeven /* IP6_3_0 [4] */ 2855077365a9SGeert Uytterhoeven FN_DU0_DG7, 0, FN_HTX1_C, 0, FN_PWM6_B, 0, FN_A15, 2856077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 2857077365a9SGeert Uytterhoeven }, 28587fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR7", 0xE606005C, 32, 4, GROUP( 2859077365a9SGeert Uytterhoeven /* IP7_31_28 [4] */ 2860077365a9SGeert Uytterhoeven FN_DU0_DISP, 0, 0, 0, FN_CAN1_RX_C, 0, 0, 0, 0, 0, 0, 2861077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 2862077365a9SGeert Uytterhoeven /* IP7_27_24 [4] */ 2863077365a9SGeert Uytterhoeven FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0, FN_MSIOF2_SCK_B, 2864077365a9SGeert Uytterhoeven 0, 0, 0, FN_DRACK0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2865077365a9SGeert Uytterhoeven /* IP7_23_20 [4] */ 2866077365a9SGeert Uytterhoeven FN_DU0_EXVSYNC_DU0_VSYNC, 0, FN_MSIOF2_SYNC_B, 0, 2867077365a9SGeert Uytterhoeven 0, 0, FN_DACK0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2868077365a9SGeert Uytterhoeven /* IP7_19_16 [4] */ 2869077365a9SGeert Uytterhoeven FN_DU0_EXHSYNC_DU0_HSYNC, 0, FN_MSIOF2_TXD_B, 0, 2870077365a9SGeert Uytterhoeven 0, 0, FN_DREQ0_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2871077365a9SGeert Uytterhoeven /* IP7_15_12 [4] */ 2872077365a9SGeert Uytterhoeven FN_DU0_DOTCLKOUT1, 0, FN_MSIOF2_RXD_B, 0, 0, 0, 2873077365a9SGeert Uytterhoeven FN_CS1_N_A26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2874077365a9SGeert Uytterhoeven /* IP7_11_8 [4] */ 2875077365a9SGeert Uytterhoeven FN_DU0_DOTCLKOUT0, 0, 0, 0, 0, 0, FN_A25, 0, 0, 0, 0, 2876077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 2877077365a9SGeert Uytterhoeven /* IP7_7_4 [4] */ 2878077365a9SGeert Uytterhoeven FN_DU0_DOTCLKIN, 0, 0, 0, 0, 0, FN_A24, 0, 0, 0, 2879077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2880077365a9SGeert Uytterhoeven /* IP7_3_0 [4] */ 2881077365a9SGeert Uytterhoeven FN_DU0_DB7, 0, 0, 0, 0, 0, FN_A23, 0, 0, 2882077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, )) 2883077365a9SGeert Uytterhoeven }, 28847fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR8", 0xE6060060, 32, 4, GROUP( 2885077365a9SGeert Uytterhoeven /* IP8_31_28 [4] */ 2886077365a9SGeert Uytterhoeven FN_VI1_DATA5, 0, 0, 0, FN_AVB_RXD4, FN_ETH_LINK, 0, 0, 0, 0, 2887077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2888077365a9SGeert Uytterhoeven /* IP8_27_24 [4] */ 2889077365a9SGeert Uytterhoeven FN_VI1_DATA4, 0, 0, 0, FN_AVB_RXD3, FN_ETH_RX_ER, 0, 0, 0, 0, 2890077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2891077365a9SGeert Uytterhoeven /* IP8_23_20 [4] */ 2892077365a9SGeert Uytterhoeven FN_VI1_DATA3, 0, 0, 0, FN_AVB_RXD2, FN_ETH_MDIO, 0, 0, 0, 0, 2893077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2894077365a9SGeert Uytterhoeven /* IP8_19_16 [4] */ 2895077365a9SGeert Uytterhoeven FN_VI1_DATA2, 0, 0, 0, FN_AVB_RXD1, FN_ETH_RXD1, 0, 0, 0, 0, 2896077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2897077365a9SGeert Uytterhoeven /* IP8_15_12 [4] */ 2898077365a9SGeert Uytterhoeven FN_VI1_DATA1, 0, 0, 0, FN_AVB_RXD0, FN_ETH_RXD0, 0, 0, 0, 0, 2899077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2900077365a9SGeert Uytterhoeven /* IP8_11_8 [4] */ 2901077365a9SGeert Uytterhoeven FN_VI1_DATA0, 0, 0, 0, FN_AVB_RX_DV, FN_ETH_CRS_DV, 0, 0, 0, 2902077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2903077365a9SGeert Uytterhoeven /* IP8_7_4 [4] */ 2904077365a9SGeert Uytterhoeven FN_VI1_CLK, 0, 0, 0, FN_AVB_RX_CLK, FN_ETH_REF_CLK, 0, 0, 0, 2905077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2906077365a9SGeert Uytterhoeven /* IP8_3_0 [4] */ 2907077365a9SGeert Uytterhoeven FN_DU0_CDE, 0, 0, 0, FN_CAN1_TX_C, 0, 0, 0, 0, 0, 0, 0, 2908077365a9SGeert Uytterhoeven 0, 0, 0, 0, )) 2909077365a9SGeert Uytterhoeven }, 29107fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR9", 0xE6060064, 32, 4, GROUP( 2911077365a9SGeert Uytterhoeven /* IP9_31_28 [4] */ 2912077365a9SGeert Uytterhoeven FN_VI1_DATA9, 0, 0, FN_SDA2_B, FN_AVB_TXD0, 0, 0, 0, 0, 0, 0, 2913077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 2914077365a9SGeert Uytterhoeven /* IP9_27_24 [4] */ 2915077365a9SGeert Uytterhoeven FN_VI1_DATA8, 0, 0, FN_SCL2_B, FN_AVB_TX_EN, 0, 0, 0, 0, 0, 0, 2916077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 2917077365a9SGeert Uytterhoeven /* IP9_23_20 [4] */ 2918077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N, FN_TX0_B, FN_SDA0_C, FN_AUDIO_CLKOUT_B, 2919077365a9SGeert Uytterhoeven FN_AVB_TX_CLK, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2920077365a9SGeert Uytterhoeven /* IP9_19_16 [4] */ 2921077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N, FN_RX0_B, FN_SCL0_C, 0, FN_AVB_GTXREFCLK, 2922077365a9SGeert Uytterhoeven FN_ETH_MDC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2923077365a9SGeert Uytterhoeven /* IP9_15_12 [4] */ 2924077365a9SGeert Uytterhoeven FN_VI1_FIELD, FN_SDA3_A, 0, 0, FN_AVB_RX_ER, FN_ETH_TXD0, 0, 2925077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2926077365a9SGeert Uytterhoeven /* IP9_11_8 [4] */ 2927077365a9SGeert Uytterhoeven FN_VI1_CLKENB, FN_SCL3_A, 0, 0, FN_AVB_RXD7, FN_ETH_MAGIC, 0, 2928077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2929077365a9SGeert Uytterhoeven /* IP9_7_4 [4] */ 2930077365a9SGeert Uytterhoeven FN_VI1_DATA7, 0, 0, 0, FN_AVB_RXD6, FN_ETH_TX_EN, 0, 0, 0, 0, 2931077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 2932077365a9SGeert Uytterhoeven /* IP9_3_0 [4] */ 2933077365a9SGeert Uytterhoeven FN_VI1_DATA6, 0, 0, 0, FN_AVB_RXD5, FN_ETH_TXD1, 0, 0, 0, 0, 2934077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, )) 2935077365a9SGeert Uytterhoeven }, 29367fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR10", 0xE6060068, 32, 4, GROUP( 2937077365a9SGeert Uytterhoeven /* IP10_31_28 [4] */ 2938077365a9SGeert Uytterhoeven FN_SCL1_A, FN_RX4_A, FN_PWM5_D, FN_DU1_DR0, 0, 0, 2939077365a9SGeert Uytterhoeven FN_SSI_SCK6_B, FN_VI0_G0, 0, 0, 0, 0, 0, 0, 0, 0, 2940077365a9SGeert Uytterhoeven /* IP10_27_24 [4] */ 2941077365a9SGeert Uytterhoeven FN_SDA0_A, FN_TX0_C, FN_IRQ5, FN_CAN_CLK_A, FN_AVB_GTX_CLK, 2942077365a9SGeert Uytterhoeven FN_CAN1_TX_D, FN_DVC_MUTE, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2943077365a9SGeert Uytterhoeven /* IP10_23_20 [4] */ 2944077365a9SGeert Uytterhoeven FN_SCL0_A, FN_RX0_C, FN_PWM5_A, FN_TCLK1_B, FN_AVB_TXD6, 2945077365a9SGeert Uytterhoeven FN_CAN1_RX_D, FN_MSIOF0_SYNC_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2946077365a9SGeert Uytterhoeven /* IP10_19_16 [4] */ 2947077365a9SGeert Uytterhoeven FN_AVB_TXD5, FN_SCIF_CLK_B, FN_AUDIO_CLKC_B, 0, 2948077365a9SGeert Uytterhoeven FN_SSI_SDATA1_D, 0, FN_MSIOF0_SCK_B, 0, 0, 0, 0, 0, 0, 0, 2949077365a9SGeert Uytterhoeven 0, 0, 2950077365a9SGeert Uytterhoeven /* IP10_15_12 [4] */ 2951077365a9SGeert Uytterhoeven FN_AVB_TXD4, 0, FN_AUDIO_CLKB_B, 0, FN_SSI_WS1_D, FN_TX5_F, 2952077365a9SGeert Uytterhoeven FN_MSIOF0_TXD_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2953077365a9SGeert Uytterhoeven /* IP10_11_8 [4] */ 2954077365a9SGeert Uytterhoeven FN_AVB_TXD3, 0, FN_AUDIO_CLKA_B, 0, FN_SSI_SCK1_D, FN_RX5_F, 2955077365a9SGeert Uytterhoeven FN_MSIOF0_RXD_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2956077365a9SGeert Uytterhoeven /* IP10_7_4 [4] */ 2957077365a9SGeert Uytterhoeven FN_VI1_DATA11, 0, 0, FN_CAN0_TX_B, FN_AVB_TXD2, 0, 0, 0, 0, 2958077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 2959077365a9SGeert Uytterhoeven /* IP10_3_0 [4] */ 2960077365a9SGeert Uytterhoeven FN_VI1_DATA10, 0, 0, FN_CAN0_RX_B, FN_AVB_TXD1, 0, 0, 0, 0, 2961077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, )) 2962077365a9SGeert Uytterhoeven }, 29637fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR11", 0xE606006C, 32, 4, GROUP( 2964077365a9SGeert Uytterhoeven /* IP11_31_28 [4] */ 2965077365a9SGeert Uytterhoeven FN_HRX1_A, FN_SCL4_A, FN_PWM6_A, FN_DU1_DG0, FN_RX0_A, 0, 0, 2966077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2967077365a9SGeert Uytterhoeven /* IP11_27_24 [4] */ 2968077365a9SGeert Uytterhoeven FN_MSIOF0_SS2_A, 0, 0, FN_DU1_DR7, 0, 2969077365a9SGeert Uytterhoeven FN_QSPI1_SSL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2970077365a9SGeert Uytterhoeven /* IP11_23_20 [4] */ 2971077365a9SGeert Uytterhoeven FN_MSIOF0_SS1_A, 0, 0, FN_DU1_DR6, 0, 2972077365a9SGeert Uytterhoeven FN_QSPI1_IO3, FN_SSI_SDATA8_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2973077365a9SGeert Uytterhoeven /* IP11_19_16 [4] */ 2974077365a9SGeert Uytterhoeven FN_MSIOF0_SYNC_A, FN_PWM1_A, 0, FN_DU1_DR5, 2975077365a9SGeert Uytterhoeven 0, FN_QSPI1_IO2, FN_SSI_SDATA7_B, 0, 0, 0, 0, 0, 2976077365a9SGeert Uytterhoeven 0, 0, 0, 0, 2977077365a9SGeert Uytterhoeven /* IP11_15_12 [4] */ 2978077365a9SGeert Uytterhoeven FN_MSIOF0_SCK_A, FN_IRQ0, 0, FN_DU1_DR4, 2979077365a9SGeert Uytterhoeven 0, FN_QSPI1_SPCLK, FN_SSI_SCK78_B, FN_VI0_G4, 2980077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2981077365a9SGeert Uytterhoeven /* IP11_11_8 [4] */ 2982077365a9SGeert Uytterhoeven FN_MSIOF0_TXD_A, FN_TX5_A, FN_SDA2_C, FN_DU1_DR3, 0, 2983077365a9SGeert Uytterhoeven FN_QSPI1_MISO_QSPI1_IO1, FN_SSI_WS78_B, FN_VI0_G3, 2984077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2985077365a9SGeert Uytterhoeven /* IP11_7_4 [4] */ 2986077365a9SGeert Uytterhoeven FN_MSIOF0_RXD_A, FN_RX5_A, FN_SCL2_C, FN_DU1_DR2, 0, 2987077365a9SGeert Uytterhoeven FN_QSPI1_MOSI_QSPI1_IO0, FN_SSI_SDATA6_B, FN_VI0_G2, 2988077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 2989077365a9SGeert Uytterhoeven /* IP11_3_0 [4] */ 2990077365a9SGeert Uytterhoeven FN_SDA1_A, FN_TX4_A, 0, FN_DU1_DR1, 0, 0, FN_SSI_WS6_B, 2991077365a9SGeert Uytterhoeven FN_VI0_G1, 0, 0, 0, 0, 0, 0, 0, 0, )) 2992077365a9SGeert Uytterhoeven }, 29937fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR12", 0xE6060070, 32, 4, GROUP( 2994077365a9SGeert Uytterhoeven /* IP12_31_28 [4] */ 2995077365a9SGeert Uytterhoeven FN_SD2_DAT2, FN_RX2_A, 0, FN_DU1_DB0, FN_SSI_SDATA2_B, 0, 0, 2996077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 2997077365a9SGeert Uytterhoeven /* IP12_27_24 [4] */ 2998077365a9SGeert Uytterhoeven FN_SD2_DAT1, FN_TX1_A, FN_SDA1_E, FN_DU1_DG7, FN_SSI_WS2_B, 2999077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3000077365a9SGeert Uytterhoeven /* IP12_23_20 [4] */ 3001077365a9SGeert Uytterhoeven FN_SD2_DAT0, FN_RX1_A, FN_SCL1_E, FN_DU1_DG6, 3002077365a9SGeert Uytterhoeven FN_SSI_SDATA1_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3003077365a9SGeert Uytterhoeven /* IP12_19_16 [4] */ 3004077365a9SGeert Uytterhoeven FN_SD2_CMD, FN_SCIF1_SCK_A, FN_TCLK2_A, FN_DU1_DG5, 3005077365a9SGeert Uytterhoeven FN_SSI_SCK2_B, FN_PWM3_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3006077365a9SGeert Uytterhoeven /* IP12_15_12 [4] */ 3007077365a9SGeert Uytterhoeven FN_SD2_CLK, FN_HSCK1, 0, FN_DU1_DG4, FN_SSI_SCK1_B, 0, 0, 0, 3008077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 3009077365a9SGeert Uytterhoeven /* IP12_11_8 [4] */ 3010077365a9SGeert Uytterhoeven FN_HRTS1_N_A, 0, 0, FN_DU1_DG3, FN_SSI_WS1_B, FN_IRQ1, 0, 0, 3011077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 3012077365a9SGeert Uytterhoeven /* IP12_7_4 [4] */ 3013077365a9SGeert Uytterhoeven FN_HCTS1_N_A, FN_PWM2_A, 0, FN_DU1_DG2, FN_REMOCON_B, 3014077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3015077365a9SGeert Uytterhoeven /* IP12_3_0 [4] */ 3016077365a9SGeert Uytterhoeven FN_HTX1_A, FN_SDA4_A, 0, FN_DU1_DG1, FN_TX0_A, 0, 0, 0, 0, 0, 3017077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, )) 3018077365a9SGeert Uytterhoeven }, 30197fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR13", 0xE6060074, 32, 4, GROUP( 3020077365a9SGeert Uytterhoeven /* IP13_31_28 [4] */ 3021077365a9SGeert Uytterhoeven FN_SSI_SCK5_A, 0, 0, FN_DU1_DOTCLKOUT1, 0, 0, 0, 0, 0, 0, 0, 3022077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 3023077365a9SGeert Uytterhoeven /* IP13_27_24 [4] */ 3024077365a9SGeert Uytterhoeven FN_SDA2_A, 0, FN_MSIOF1_SYNC_B, FN_DU1_DB7, FN_AUDIO_CLKOUT_C, 3025077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3026077365a9SGeert Uytterhoeven /* IP13_23_20 [4] */ 3027077365a9SGeert Uytterhoeven FN_SCL2_A, 0, FN_MSIOF1_SCK_B, FN_DU1_DB6, FN_AUDIO_CLKC_C, 3028077365a9SGeert Uytterhoeven FN_SSI_SCK4_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3029077365a9SGeert Uytterhoeven /* IP13_19_16 [4] */ 3030077365a9SGeert Uytterhoeven FN_TX3_A, FN_SDA1_C, FN_MSIOF1_TXD_B, FN_DU1_DB5, 3031077365a9SGeert Uytterhoeven FN_AUDIO_CLKB_C, FN_SSI_WS4_B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3032077365a9SGeert Uytterhoeven /* IP13_15_12 [4] */ 3033077365a9SGeert Uytterhoeven FN_RX3_A, FN_SCL1_C, FN_MSIOF1_RXD_B, FN_DU1_DB4, 3034077365a9SGeert Uytterhoeven FN_AUDIO_CLKA_C, FN_SSI_SDATA4_B, 0, 0, 0, 0, 0, 0, 0, 0, 3035077365a9SGeert Uytterhoeven 0, 0, 3036077365a9SGeert Uytterhoeven /* IP13_11_8 [4] */ 3037077365a9SGeert Uytterhoeven FN_SD2_WP, FN_SCIF3_SCK, 0, FN_DU1_DB3, FN_SSI_SDATA9_B, 0, 3038077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3039077365a9SGeert Uytterhoeven /* IP13_7_4 [4] */ 3040077365a9SGeert Uytterhoeven FN_SD2_CD, FN_SCIF2_SCK_A, 0, FN_DU1_DB2, FN_SSI_SCK9_B, 0, 0, 3041077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 3042077365a9SGeert Uytterhoeven /* IP13_3_0 [4] */ 3043077365a9SGeert Uytterhoeven FN_SD2_DAT3, FN_TX2_A, 0, FN_DU1_DB1, FN_SSI_WS9_B, 0, 0, 0, 3044077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 3045077365a9SGeert Uytterhoeven }, 30467fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR14", 0xE6060078, 32, 4, GROUP( 3047077365a9SGeert Uytterhoeven /* IP14_31_28 [4] */ 3048077365a9SGeert Uytterhoeven FN_SSI_SDATA7_A, 0, 0, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, 3049077365a9SGeert Uytterhoeven FN_VI0_G5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3050077365a9SGeert Uytterhoeven /* IP14_27_24 [4] */ 3051077365a9SGeert Uytterhoeven FN_SSI_WS78_A, 0, FN_SCL4_E, FN_DU1_CDE, 0, 0, 0, 0, 0, 0, 0, 3052077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 3053077365a9SGeert Uytterhoeven /* IP14_23_20 [4] */ 3054077365a9SGeert Uytterhoeven FN_SSI_SCK78_A, 0, FN_SDA4_E, FN_DU1_DISP, 0, 0, 0, 0, 0, 0, 3055077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 3056077365a9SGeert Uytterhoeven /* IP14_19_16 [4] */ 3057077365a9SGeert Uytterhoeven FN_SSI_SDATA6_A, 0, FN_SDA4_C, FN_DU1_EXVSYNC_DU1_VSYNC, 0, 0, 3058077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3059077365a9SGeert Uytterhoeven /* IP14_15_12 [4] */ 3060077365a9SGeert Uytterhoeven FN_SSI_WS6_A, 0, FN_SCL4_C, FN_DU1_EXHSYNC_DU1_HSYNC, 0, 0, 0, 3061077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 3062077365a9SGeert Uytterhoeven /* IP14_11_8 [4] */ 3063077365a9SGeert Uytterhoeven FN_SSI_SCK6_A, 0, 0, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, 0, 0, 3064077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3065077365a9SGeert Uytterhoeven /* IP14_7_4 [4] */ 3066077365a9SGeert Uytterhoeven FN_SSI_SDATA5_A, 0, FN_SDA3_C, FN_DU1_DOTCLKOUT0, 0, 0, 0, 3067077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 3068077365a9SGeert Uytterhoeven /* IP14_3_0 [4] */ 3069077365a9SGeert Uytterhoeven FN_SSI_WS5_A, 0, FN_SCL3_C, FN_DU1_DOTCLKIN, 0, 0, 0, 0, 0, 0, 3070077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, )) 3071077365a9SGeert Uytterhoeven }, 30727fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR15", 0xE606007C, 32, 4, GROUP( 3073077365a9SGeert Uytterhoeven /* IP15_31_28 [4] */ 3074077365a9SGeert Uytterhoeven FN_SSI_WS4_A, 0, FN_AVB_PHY_INT, 0, 0, 0, FN_VI0_R5, 0, 0, 0, 3075077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 3076077365a9SGeert Uytterhoeven /* IP15_27_24 [4] */ 3077077365a9SGeert Uytterhoeven FN_SSI_SCK4_A, 0, FN_AVB_MAGIC, 0, 0, 0, FN_VI0_R4, 0, 0, 0, 3078077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 3079077365a9SGeert Uytterhoeven /* IP15_23_20 [4] */ 3080077365a9SGeert Uytterhoeven FN_SSI_SDATA3, FN_MSIOF1_SS2_A, FN_AVB_LINK, 0, FN_CAN1_TX_A, 3081077365a9SGeert Uytterhoeven FN_DREQ2_N, FN_VI0_R3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3082077365a9SGeert Uytterhoeven /* IP15_19_16 [4] */ 3083077365a9SGeert Uytterhoeven FN_SSI_WS34, FN_MSIOF1_SS1_A, FN_AVB_MDIO, 0, FN_CAN1_RX_A, 3084077365a9SGeert Uytterhoeven FN_DREQ1_N, FN_VI0_R2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3085077365a9SGeert Uytterhoeven /* IP15_15_12 [4] */ 3086077365a9SGeert Uytterhoeven FN_SSI_SCK34, FN_MSIOF1_SCK_A, FN_AVB_MDC, 0, 0, FN_DACK1, 3087077365a9SGeert Uytterhoeven FN_VI0_R1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3088077365a9SGeert Uytterhoeven /* IP15_11_8 [4] */ 3089077365a9SGeert Uytterhoeven FN_SSI_SDATA0_A, FN_MSIOF1_SYNC_A, FN_PWM0_C, 0, 0, 0, 3090077365a9SGeert Uytterhoeven FN_VI0_R0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3091077365a9SGeert Uytterhoeven /* IP15_7_4 [4] */ 3092077365a9SGeert Uytterhoeven FN_SSI_WS0129_A, FN_MSIOF1_TXD_A, FN_TX5_D, 0, 0, 0, 3093077365a9SGeert Uytterhoeven FN_VI0_G7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3094077365a9SGeert Uytterhoeven /* IP15_3_0 [4] */ 3095077365a9SGeert Uytterhoeven FN_SSI_SCK0129_A, FN_MSIOF1_RXD_A, FN_RX5_D, 0, 0, 0, 3096077365a9SGeert Uytterhoeven FN_VI0_G6, 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 3097077365a9SGeert Uytterhoeven }, 30987fefb7c0SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR16", 0xE6060080, 32, 4, GROUP( 3099077365a9SGeert Uytterhoeven /* IP16_31_28 [4] */ 3100077365a9SGeert Uytterhoeven FN_SSI_SDATA2_A, FN_HRTS1_N_B, 0, 0, 0, 0, 3101077365a9SGeert Uytterhoeven FN_VI0_DATA4_VI0_B4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3102077365a9SGeert Uytterhoeven /* IP16_27_24 [4] */ 3103077365a9SGeert Uytterhoeven FN_SSI_WS2_A, FN_HCTS1_N_B, 0, 0, 0, FN_AVB_TX_ER, 3104077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3105077365a9SGeert Uytterhoeven /* IP16_23_20 [4] */ 3106077365a9SGeert Uytterhoeven FN_SSI_SCK2_A, FN_HTX1_B, 0, 0, 0, FN_AVB_TXD7, 3107077365a9SGeert Uytterhoeven FN_VI0_DATA2_VI0_B2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3108077365a9SGeert Uytterhoeven /* IP16_19_16 [4] */ 3109077365a9SGeert Uytterhoeven FN_SSI_SDATA1_A, FN_HRX1_B, 0, 0, 0, 0, FN_VI0_DATA1_VI0_B1, 3110077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 3111077365a9SGeert Uytterhoeven /* IP16_15_12 [4] */ 3112077365a9SGeert Uytterhoeven FN_SSI_WS1_A, FN_TX1_B, 0, 0, FN_CAN0_TX_D, 3113077365a9SGeert Uytterhoeven FN_AVB_AVTP_MATCH_B, FN_VI0_DATA0_VI0_B0, 0, 0, 0, 0, 0, 0, 3114077365a9SGeert Uytterhoeven 0, 0, 0, 3115077365a9SGeert Uytterhoeven /* IP16_11_8 [4] */ 3116077365a9SGeert Uytterhoeven FN_SSI_SDATA8_A, FN_RX1_B, 0, 0, FN_CAN0_RX_D, 3117077365a9SGeert Uytterhoeven FN_AVB_AVTP_CAPTURE_B, FN_VI0_R7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3118077365a9SGeert Uytterhoeven /* IP16_7_4 [4] */ 3119077365a9SGeert Uytterhoeven FN_SSI_SCK1_A, FN_SCIF1_SCK_B, FN_PWM1_D, FN_IRQ9, FN_REMOCON_A, 3120077365a9SGeert Uytterhoeven FN_DACK2, FN_VI0_CLK, FN_AVB_COL, 0, 0, 0, 0, 0, 0, 0, 0, 3121077365a9SGeert Uytterhoeven /* IP16_3_0 [4] */ 3122077365a9SGeert Uytterhoeven FN_SSI_SDATA4_A, 0, FN_AVB_CRS, 0, 0, 0, FN_VI0_R6, 0, 0, 0, 3123077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, )) 3124077365a9SGeert Uytterhoeven }, 3125*ade1ef99SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060084, 32, 3126*ade1ef99SGeert Uytterhoeven GROUP(-4, 4, 4, 4, 4, 4, 4, 4), 3127*ade1ef99SGeert Uytterhoeven GROUP( 3128*ade1ef99SGeert Uytterhoeven /* IP17_31_28 [4] RESERVED */ 3129077365a9SGeert Uytterhoeven /* IP17_27_24 [4] */ 3130077365a9SGeert Uytterhoeven FN_AUDIO_CLKOUT_A, FN_SDA4_B, 0, 0, 0, 0, 3131077365a9SGeert Uytterhoeven FN_VI0_VSYNC_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3132077365a9SGeert Uytterhoeven /* IP17_23_20 [4] */ 3133077365a9SGeert Uytterhoeven FN_AUDIO_CLKC_A, FN_SCL4_B, 0, 0, 0, 0, 3134077365a9SGeert Uytterhoeven FN_VI0_HSYNC_N, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3135077365a9SGeert Uytterhoeven /* IP17_19_16 [4] */ 3136077365a9SGeert Uytterhoeven FN_AUDIO_CLKB_A, FN_SDA0_B, 0, 0, 0, 0, 3137077365a9SGeert Uytterhoeven FN_VI0_FIELD, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3138077365a9SGeert Uytterhoeven /* IP17_15_12 [4] */ 3139077365a9SGeert Uytterhoeven FN_AUDIO_CLKA_A, FN_SCL0_B, 0, 0, 0, 0, 3140077365a9SGeert Uytterhoeven FN_VI0_CLKENB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3141077365a9SGeert Uytterhoeven /* IP17_11_8 [4] */ 3142077365a9SGeert Uytterhoeven FN_SSI_SDATA9_A, FN_SCIF2_SCK_B, FN_PWM2_D, 0, 0, 0, 3143077365a9SGeert Uytterhoeven FN_VI0_DATA7_VI0_B7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3144077365a9SGeert Uytterhoeven /* IP17_7_4 [4] */ 3145077365a9SGeert Uytterhoeven FN_SSI_WS9_A, FN_TX2_B, FN_SDA3_E, 0, 0, 0, 3146077365a9SGeert Uytterhoeven FN_VI0_DATA6_VI0_B6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3147077365a9SGeert Uytterhoeven /* IP17_3_0 [4] */ 3148077365a9SGeert Uytterhoeven FN_SSI_SCK9_A, FN_RX2_B, FN_SCL3_E, 0, 0, FN_EX_WAIT1, 3149077365a9SGeert Uytterhoeven FN_VI0_DATA5_VI0_B5, 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 3150077365a9SGeert Uytterhoeven }, 3151077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE60600C0, 32, 3152287f1ee3SGeert Uytterhoeven GROUP(-5, 2, -2, 2, 2, 2, -1, 3153287f1ee3SGeert Uytterhoeven 3, 3, -1, 2, 3, 3, 1), 3154077365a9SGeert Uytterhoeven GROUP( 3155287f1ee3SGeert Uytterhoeven /* RESERVED [5] */ 3156077365a9SGeert Uytterhoeven /* SEL_ADGA [2] */ 3157077365a9SGeert Uytterhoeven FN_SEL_ADGA_0, FN_SEL_ADGA_1, FN_SEL_ADGA_2, FN_SEL_ADGA_3, 3158287f1ee3SGeert Uytterhoeven /* RESERVED [2] */ 3159077365a9SGeert Uytterhoeven /* SEL_CANCLK [2] */ 3160077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, 3161077365a9SGeert Uytterhoeven FN_SEL_CANCLK_3, 3162077365a9SGeert Uytterhoeven /* SEL_CAN1 [2] */ 3163077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, 3164077365a9SGeert Uytterhoeven /* SEL_CAN0 [2] */ 3165077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 3166077365a9SGeert Uytterhoeven /* RESERVED [1] */ 3167077365a9SGeert Uytterhoeven /* SEL_I2C04 [3] */ 3168077365a9SGeert Uytterhoeven FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2, FN_SEL_I2C04_3, 3169077365a9SGeert Uytterhoeven FN_SEL_I2C04_4, 0, 0, 0, 3170077365a9SGeert Uytterhoeven /* SEL_I2C03 [3] */ 3171077365a9SGeert Uytterhoeven FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3, 3172077365a9SGeert Uytterhoeven FN_SEL_I2C03_4, 0, 0, 0, 3173077365a9SGeert Uytterhoeven /* RESERVED [1] */ 3174077365a9SGeert Uytterhoeven /* SEL_I2C02 [2] */ 3175077365a9SGeert Uytterhoeven FN_SEL_I2C02_0, FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, 3176077365a9SGeert Uytterhoeven /* SEL_I2C01 [3] */ 3177077365a9SGeert Uytterhoeven FN_SEL_I2C01_0, FN_SEL_I2C01_1, FN_SEL_I2C01_2, FN_SEL_I2C01_3, 3178077365a9SGeert Uytterhoeven FN_SEL_I2C01_4, 0, 0, 0, 3179077365a9SGeert Uytterhoeven /* SEL_I2C00 [3] */ 3180077365a9SGeert Uytterhoeven FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2, FN_SEL_I2C00_3, 3181077365a9SGeert Uytterhoeven FN_SEL_I2C00_4, 0, 0, 0, 3182077365a9SGeert Uytterhoeven /* SEL_AVB [1] */ 3183077365a9SGeert Uytterhoeven FN_SEL_AVB_0, FN_SEL_AVB_1, )) 3184077365a9SGeert Uytterhoeven }, 3185077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE60600C4, 32, 3186287f1ee3SGeert Uytterhoeven GROUP(1, 3, 3, 2, 2, 1, 2, 2, 2, -1, 1, -1, 3187287f1ee3SGeert Uytterhoeven 1, 1, -2, 1, 1, -2, 2, 1), 3188077365a9SGeert Uytterhoeven GROUP( 3189077365a9SGeert Uytterhoeven /* SEL_SCIFCLK [1] */ 3190077365a9SGeert Uytterhoeven FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, 3191077365a9SGeert Uytterhoeven /* SEL_SCIF5 [3] */ 3192077365a9SGeert Uytterhoeven FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, 3193077365a9SGeert Uytterhoeven FN_SEL_SCIF5_4, FN_SEL_SCIF5_5, 0, 0, 3194077365a9SGeert Uytterhoeven /* SEL_SCIF4 [3] */ 3195077365a9SGeert Uytterhoeven FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, 3196077365a9SGeert Uytterhoeven FN_SEL_SCIF4_4, 0, 0, 0, 3197077365a9SGeert Uytterhoeven /* SEL_SCIF3 [2] */ 3198077365a9SGeert Uytterhoeven FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, 0, 3199077365a9SGeert Uytterhoeven /* SEL_SCIF2 [2] */ 3200077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 0, 3201077365a9SGeert Uytterhoeven /* SEL_SCIF2_CLK [1] */ 3202077365a9SGeert Uytterhoeven FN_SEL_SCIF2_CLK_0, FN_SEL_SCIF2_CLK_1, 3203077365a9SGeert Uytterhoeven /* SEL_SCIF1 [2] */ 3204077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 3205077365a9SGeert Uytterhoeven /* SEL_SCIF0 [2] */ 3206077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, 3207077365a9SGeert Uytterhoeven /* SEL_MSIOF2 [2] */ 3208077365a9SGeert Uytterhoeven FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, FN_SEL_MSIOF2_2, 0, 3209077365a9SGeert Uytterhoeven /* RESERVED [1] */ 3210077365a9SGeert Uytterhoeven /* SEL_MSIOF1 [1] */ 3211077365a9SGeert Uytterhoeven FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, 3212077365a9SGeert Uytterhoeven /* RESERVED [1] */ 3213077365a9SGeert Uytterhoeven /* SEL_MSIOF0 [1] */ 3214077365a9SGeert Uytterhoeven FN_SEL_MSIOF0_0, FN_SEL_MSIOF0_1, 3215077365a9SGeert Uytterhoeven /* SEL_RCN [1] */ 3216077365a9SGeert Uytterhoeven FN_SEL_RCN_0, FN_SEL_RCN_1, 3217077365a9SGeert Uytterhoeven /* RESERVED [2] */ 3218077365a9SGeert Uytterhoeven /* SEL_TMU2 [1] */ 3219077365a9SGeert Uytterhoeven FN_SEL_TMU2_0, FN_SEL_TMU2_1, 3220077365a9SGeert Uytterhoeven /* SEL_TMU1 [1] */ 3221077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 3222077365a9SGeert Uytterhoeven /* RESERVED [2] */ 3223077365a9SGeert Uytterhoeven /* SEL_HSCIF1 [2] */ 3224077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, 0, 3225077365a9SGeert Uytterhoeven /* SEL_HSCIF0 [1] */ 3226077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, )) 3227077365a9SGeert Uytterhoeven }, 3228077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE60600C8, 32, 3229287f1ee3SGeert Uytterhoeven GROUP(-10, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2), 3230077365a9SGeert Uytterhoeven GROUP( 3231287f1ee3SGeert Uytterhoeven /* RESERVED [10] */ 3232077365a9SGeert Uytterhoeven /* SEL_ADGB [2] */ 3233077365a9SGeert Uytterhoeven FN_SEL_ADGB_0, FN_SEL_ADGB_1, FN_SEL_ADGB_2, 0, 3234077365a9SGeert Uytterhoeven /* SEL_ADGC [2] */ 3235077365a9SGeert Uytterhoeven FN_SEL_ADGC_0, FN_SEL_ADGC_1, FN_SEL_ADGC_2, 0, 3236077365a9SGeert Uytterhoeven /* SEL_SSI9 [2] */ 3237077365a9SGeert Uytterhoeven FN_SEL_SSI9_0, FN_SEL_SSI9_1, 0, 0, 3238077365a9SGeert Uytterhoeven /* SEL_SSI8 [2] */ 3239077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, 0, 0, 3240077365a9SGeert Uytterhoeven /* SEL_SSI7 [2] */ 3241077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, 0, 0, 3242077365a9SGeert Uytterhoeven /* SEL_SSI6 [2] */ 3243077365a9SGeert Uytterhoeven FN_SEL_SSI6_0, FN_SEL_SSI6_1, 0, 0, 3244077365a9SGeert Uytterhoeven /* SEL_SSI5 [2] */ 3245077365a9SGeert Uytterhoeven FN_SEL_SSI5_0, FN_SEL_SSI5_1, 0, 0, 3246077365a9SGeert Uytterhoeven /* SEL_SSI4 [2] */ 3247077365a9SGeert Uytterhoeven FN_SEL_SSI4_0, FN_SEL_SSI4_1, 0, 0, 3248077365a9SGeert Uytterhoeven /* SEL_SSI2 [2] */ 3249077365a9SGeert Uytterhoeven FN_SEL_SSI2_0, FN_SEL_SSI2_1, 0, 0, 3250077365a9SGeert Uytterhoeven /* SEL_SSI1 [2] */ 3251077365a9SGeert Uytterhoeven FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI1_2, FN_SEL_SSI1_3, 3252077365a9SGeert Uytterhoeven /* SEL_SSI0 [2] */ 3253077365a9SGeert Uytterhoeven FN_SEL_SSI0_0, FN_SEL_SSI0_1, 0, 0, )) 3254077365a9SGeert Uytterhoeven }, 3255077365a9SGeert Uytterhoeven { }, 3256077365a9SGeert Uytterhoeven }; 3257077365a9SGeert Uytterhoeven 3258b67fc1c6SGeert Uytterhoeven static int r8a77470_pin_to_pocctrl(unsigned int pin, u32 *pocctrl) 3259077365a9SGeert Uytterhoeven { 3260077365a9SGeert Uytterhoeven int bit = -EINVAL; 3261077365a9SGeert Uytterhoeven 3262077365a9SGeert Uytterhoeven *pocctrl = 0xe60600b0; 3263077365a9SGeert Uytterhoeven 3264077365a9SGeert Uytterhoeven if (pin >= RCAR_GP_PIN(0, 5) && pin <= RCAR_GP_PIN(0, 10)) 3265077365a9SGeert Uytterhoeven bit = 0; 3266077365a9SGeert Uytterhoeven 3267077365a9SGeert Uytterhoeven if (pin >= RCAR_GP_PIN(0, 13) && pin <= RCAR_GP_PIN(0, 22)) 3268077365a9SGeert Uytterhoeven bit = 2; 3269077365a9SGeert Uytterhoeven 3270077365a9SGeert Uytterhoeven if (pin >= RCAR_GP_PIN(4, 14) && pin <= RCAR_GP_PIN(4, 19)) 3271077365a9SGeert Uytterhoeven bit = 1; 3272077365a9SGeert Uytterhoeven 3273077365a9SGeert Uytterhoeven return bit; 3274077365a9SGeert Uytterhoeven } 3275077365a9SGeert Uytterhoeven 3276fd685013SGeert Uytterhoeven static const struct pinmux_bias_reg pinmux_bias_regs[] = { 3277fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR0", 0xe6060100, "N/A", 0) { 3278fd685013SGeert Uytterhoeven /* PUPR0 pull-up pins */ 3279fd685013SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(1, 0), /* D0 */ 3280fd685013SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(0, 22), /* MMC0_D7 */ 3281fd685013SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(0, 21), /* MMC0_D6 */ 3282fd685013SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(0, 20), /* MMC0_D5 */ 3283fd685013SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(0, 19), /* MMC0_D4 */ 3284fd685013SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(0, 18), /* MMC0_D3 */ 3285fd685013SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(0, 17), /* MMC0_D2 */ 3286fd685013SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(0, 16), /* MMC0_D1 */ 3287fd685013SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(0, 15), /* MMC0_D0 */ 3288fd685013SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(0, 14), /* MMC0_CMD */ 3289fd685013SGeert Uytterhoeven [10] = RCAR_GP_PIN(0, 13), /* MMC0_CLK */ 3290fd685013SGeert Uytterhoeven [11] = RCAR_GP_PIN(0, 12), /* SD0_WP */ 3291fd685013SGeert Uytterhoeven [12] = RCAR_GP_PIN(0, 11), /* SD0_CD */ 3292fd685013SGeert Uytterhoeven [13] = RCAR_GP_PIN(0, 10), /* SD0_DAT3 */ 3293fd685013SGeert Uytterhoeven [14] = RCAR_GP_PIN(0, 9), /* SD0_DAT2 */ 3294fd685013SGeert Uytterhoeven [15] = RCAR_GP_PIN(0, 8), /* SD0_DAT1 */ 3295fd685013SGeert Uytterhoeven [16] = RCAR_GP_PIN(0, 7), /* SD0_DAT0 */ 3296fd685013SGeert Uytterhoeven [17] = RCAR_GP_PIN(0, 6), /* SD0_CMD */ 3297fd685013SGeert Uytterhoeven [18] = RCAR_GP_PIN(0, 5), /* SD0_CLK */ 3298fd685013SGeert Uytterhoeven [19] = RCAR_GP_PIN(0, 4), /* CLKOUT */ 3299fd685013SGeert Uytterhoeven [20] = PIN_NMI, /* NMI */ 3300fd685013SGeert Uytterhoeven [21] = RCAR_GP_PIN(0, 3), /* USB1_OVC */ 3301fd685013SGeert Uytterhoeven [22] = RCAR_GP_PIN(0, 2), /* USB1_PWEN */ 3302fd685013SGeert Uytterhoeven [23] = RCAR_GP_PIN(0, 1), /* USB0_OVC */ 3303fd685013SGeert Uytterhoeven [24] = RCAR_GP_PIN(0, 0), /* USB0_PWEN */ 3304fd685013SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 3305fd685013SGeert Uytterhoeven [26] = PIN_TDO, /* TDO */ 3306fd685013SGeert Uytterhoeven [27] = PIN_TDI, /* TDI */ 3307fd685013SGeert Uytterhoeven [28] = PIN_TMS, /* TMS */ 3308fd685013SGeert Uytterhoeven [29] = PIN_TCK, /* TCK */ 3309fd685013SGeert Uytterhoeven [30] = PIN_TRST_N, /* TRST# */ 3310fd685013SGeert Uytterhoeven [31] = PIN_PRESETOUT_N, /* PRESETOUT# */ 3311fd685013SGeert Uytterhoeven } }, 3312fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("N/A", 0, "PUPR0", 0xe6060100) { 3313fd685013SGeert Uytterhoeven /* PUPR0 pull-down pins */ 3314fd685013SGeert Uytterhoeven [ 0] = SH_PFC_PIN_NONE, 3315fd685013SGeert Uytterhoeven [ 1] = SH_PFC_PIN_NONE, 3316fd685013SGeert Uytterhoeven [ 2] = SH_PFC_PIN_NONE, 3317fd685013SGeert Uytterhoeven [ 3] = SH_PFC_PIN_NONE, 3318fd685013SGeert Uytterhoeven [ 4] = SH_PFC_PIN_NONE, 3319fd685013SGeert Uytterhoeven [ 5] = SH_PFC_PIN_NONE, 3320fd685013SGeert Uytterhoeven [ 6] = SH_PFC_PIN_NONE, 3321fd685013SGeert Uytterhoeven [ 7] = SH_PFC_PIN_NONE, 3322fd685013SGeert Uytterhoeven [ 8] = SH_PFC_PIN_NONE, 3323fd685013SGeert Uytterhoeven [ 9] = SH_PFC_PIN_NONE, 3324fd685013SGeert Uytterhoeven [10] = SH_PFC_PIN_NONE, 3325fd685013SGeert Uytterhoeven [11] = SH_PFC_PIN_NONE, 3326fd685013SGeert Uytterhoeven [12] = SH_PFC_PIN_NONE, 3327fd685013SGeert Uytterhoeven [13] = SH_PFC_PIN_NONE, 3328fd685013SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 3329fd685013SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 3330fd685013SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 3331fd685013SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 3332fd685013SGeert Uytterhoeven [18] = SH_PFC_PIN_NONE, 3333fd685013SGeert Uytterhoeven [19] = SH_PFC_PIN_NONE, 3334fd685013SGeert Uytterhoeven [20] = SH_PFC_PIN_NONE, 3335fd685013SGeert Uytterhoeven [21] = SH_PFC_PIN_NONE, 3336fd685013SGeert Uytterhoeven [22] = SH_PFC_PIN_NONE, 3337fd685013SGeert Uytterhoeven [23] = SH_PFC_PIN_NONE, 3338fd685013SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 3339fd685013SGeert Uytterhoeven [25] = PIN_ASEBRK_N_ACK, /* ASEBRK#/ACK */ 3340fd685013SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 3341fd685013SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 3342fd685013SGeert Uytterhoeven [28] = SH_PFC_PIN_NONE, 3343fd685013SGeert Uytterhoeven [29] = SH_PFC_PIN_NONE, 3344fd685013SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 3345fd685013SGeert Uytterhoeven [31] = SH_PFC_PIN_NONE, 3346fd685013SGeert Uytterhoeven } }, 3347fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR1", 0xe6060104, "N/A", 0) { 3348fd685013SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(2, 9), /* DU0_DG1 */ 3349fd685013SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(2, 8), /* DU0_DG0 */ 3350fd685013SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(2, 7), /* DU0_DR7 */ 3351fd685013SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(2, 6), /* DU0_DR6 */ 3352fd685013SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(2, 5), /* DU0_DR5 */ 3353fd685013SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(2, 4), /* DU0_DR4 */ 3354fd685013SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(2, 3), /* DU0_DR3 */ 3355fd685013SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(2, 2), /* DU0_DR2 */ 3356fd685013SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(2, 1), /* DU0_DR1 */ 3357fd685013SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(2, 0), /* DU0_DR0 */ 3358fd685013SGeert Uytterhoeven [10] = RCAR_GP_PIN(1, 22), /* EX_WAIT0 */ 3359fd685013SGeert Uytterhoeven [11] = RCAR_GP_PIN(1, 21), /* QSPI0_SSL */ 3360fd685013SGeert Uytterhoeven [12] = RCAR_GP_PIN(1, 20), /* QSPI0_IO3 */ 3361fd685013SGeert Uytterhoeven [13] = RCAR_GP_PIN(1, 19), /* QSPI0_IO2 */ 3362fd685013SGeert Uytterhoeven [14] = RCAR_GP_PIN(1, 18), /* QSPI0_MISO/QSPI0_IO1 */ 3363fd685013SGeert Uytterhoeven [15] = RCAR_GP_PIN(1, 17), /* QSPI0_MOSI/QSPI0_IO0 */ 3364fd685013SGeert Uytterhoeven [16] = RCAR_GP_PIN(1, 16), /* QSPI0_SPCLK */ 3365fd685013SGeert Uytterhoeven [17] = RCAR_GP_PIN(1, 15), /* D15 */ 3366fd685013SGeert Uytterhoeven [18] = RCAR_GP_PIN(1, 14), /* D14 */ 3367fd685013SGeert Uytterhoeven [19] = RCAR_GP_PIN(1, 13), /* D13 */ 3368fd685013SGeert Uytterhoeven [20] = RCAR_GP_PIN(1, 12), /* D12 */ 3369fd685013SGeert Uytterhoeven [21] = RCAR_GP_PIN(1, 11), /* D11 */ 3370fd685013SGeert Uytterhoeven [22] = RCAR_GP_PIN(1, 10), /* D10 */ 3371fd685013SGeert Uytterhoeven [23] = RCAR_GP_PIN(1, 9), /* D9 */ 3372fd685013SGeert Uytterhoeven [24] = RCAR_GP_PIN(1, 8), /* D8 */ 3373fd685013SGeert Uytterhoeven [25] = RCAR_GP_PIN(1, 7), /* D7 */ 3374fd685013SGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 6), /* D6 */ 3375fd685013SGeert Uytterhoeven [27] = RCAR_GP_PIN(1, 5), /* D5 */ 3376fd685013SGeert Uytterhoeven [28] = RCAR_GP_PIN(1, 4), /* D4 */ 3377fd685013SGeert Uytterhoeven [29] = RCAR_GP_PIN(1, 3), /* D3 */ 3378fd685013SGeert Uytterhoeven [30] = RCAR_GP_PIN(1, 2), /* D2 */ 3379fd685013SGeert Uytterhoeven [31] = RCAR_GP_PIN(1, 1), /* D1 */ 3380fd685013SGeert Uytterhoeven } }, 3381fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR2", 0xe6060108, "N/A", 0) { 3382fd685013SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(3, 9), /* VI1_CLKENB */ 3383fd685013SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(3, 8), /* VI1_DATA7 */ 3384fd685013SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(3, 7), /* VI1_DATA6 */ 3385fd685013SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(3, 6), /* VI1_DATA5 */ 3386fd685013SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(3, 5), /* VI1_DATA4 */ 3387fd685013SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(3, 4), /* VI1_DATA3 */ 3388fd685013SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(3, 3), /* VI1_DATA2 */ 3389fd685013SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(3, 2), /* VI1_DATA1 */ 3390fd685013SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(3, 1), /* VI1_DATA0 */ 3391fd685013SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(3, 0), /* VI1_CLK */ 3392fd685013SGeert Uytterhoeven [10] = RCAR_GP_PIN(2, 31), /* DU0_CDE */ 3393fd685013SGeert Uytterhoeven [11] = RCAR_GP_PIN(2, 30), /* DU0_DISP */ 3394fd685013SGeert Uytterhoeven [12] = RCAR_GP_PIN(2, 29), /* DU0_EXODDF/DU0_ODDF_DISP_CDE */ 3395fd685013SGeert Uytterhoeven [13] = RCAR_GP_PIN(2, 28), /* DU0_EXVSYNC/DU0_VSYNC */ 3396fd685013SGeert Uytterhoeven [14] = RCAR_GP_PIN(2, 27), /* DU0_EXHSYNC/DU0_HSYNC */ 3397fd685013SGeert Uytterhoeven [15] = RCAR_GP_PIN(2, 26), /* DU0_DOTCLKOUT1 */ 3398fd685013SGeert Uytterhoeven [16] = RCAR_GP_PIN(2, 25), /* DU0_DOTCLKOUT0 */ 3399fd685013SGeert Uytterhoeven [17] = RCAR_GP_PIN(2, 24), /* DU0_DOTCLKIN */ 3400fd685013SGeert Uytterhoeven [18] = RCAR_GP_PIN(2, 23), /* DU0_DB7 */ 3401fd685013SGeert Uytterhoeven [19] = RCAR_GP_PIN(2, 22), /* DU0_DB6 */ 3402fd685013SGeert Uytterhoeven [20] = RCAR_GP_PIN(2, 21), /* DU0_DB5 */ 3403fd685013SGeert Uytterhoeven [21] = RCAR_GP_PIN(2, 20), /* DU0_DB4 */ 3404fd685013SGeert Uytterhoeven [22] = RCAR_GP_PIN(2, 19), /* DU0_DB3 */ 3405fd685013SGeert Uytterhoeven [23] = RCAR_GP_PIN(2, 18), /* DU0_DB2 */ 3406fd685013SGeert Uytterhoeven [24] = RCAR_GP_PIN(2, 17), /* DU0_DB1 */ 3407fd685013SGeert Uytterhoeven [25] = RCAR_GP_PIN(2, 16), /* DU0_DB0 */ 3408fd685013SGeert Uytterhoeven [26] = RCAR_GP_PIN(2, 15), /* DU0_DG7 */ 3409fd685013SGeert Uytterhoeven [27] = RCAR_GP_PIN(2, 14), /* DU0_DG6 */ 3410fd685013SGeert Uytterhoeven [28] = RCAR_GP_PIN(2, 13), /* DU0_DG5 */ 3411fd685013SGeert Uytterhoeven [29] = RCAR_GP_PIN(2, 12), /* DU0_DG4 */ 3412fd685013SGeert Uytterhoeven [30] = RCAR_GP_PIN(2, 11), /* DU0_DG3 */ 3413fd685013SGeert Uytterhoeven [31] = RCAR_GP_PIN(2, 10), /* DU0_DG2 */ 3414fd685013SGeert Uytterhoeven } }, 3415fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR3", 0xe606010c, "N/A", 0) { 3416fd685013SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(4, 21), /* SD2_WP */ 3417fd685013SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(4, 20), /* SD2_CD */ 3418fd685013SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 19), /* SD2_DAT3 */ 3419fd685013SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 18), /* SD2_DAT2 */ 3420fd685013SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 17), /* SD2_DAT1 */ 3421fd685013SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(4, 16), /* SD2_DAT0 */ 3422fd685013SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(4, 15), /* SD2_CMD */ 3423fd685013SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(4, 14), /* SD2_CLK */ 3424fd685013SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(4, 13), /* HRTS1#_A */ 3425fd685013SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(4, 12), /* HCTS1#_A */ 3426fd685013SGeert Uytterhoeven [10] = RCAR_GP_PIN(4, 11), /* HTX1_A */ 3427fd685013SGeert Uytterhoeven [11] = RCAR_GP_PIN(4, 10), /* HRX1_A */ 3428fd685013SGeert Uytterhoeven [12] = RCAR_GP_PIN(4, 9), /* MSIOF0_SS2_A */ 3429fd685013SGeert Uytterhoeven [13] = RCAR_GP_PIN(4, 8), /* MSIOF0_SS1_A */ 3430fd685013SGeert Uytterhoeven [14] = RCAR_GP_PIN(4, 7), /* MSIOF0_SYNC_A */ 3431fd685013SGeert Uytterhoeven [15] = RCAR_GP_PIN(4, 6), /* MSIOF0_SCK_A */ 3432fd685013SGeert Uytterhoeven [16] = RCAR_GP_PIN(4, 5), /* MSIOF0_TXD_A */ 3433fd685013SGeert Uytterhoeven [17] = RCAR_GP_PIN(4, 4), /* MSIOF0_RXD_A */ 3434fd685013SGeert Uytterhoeven [18] = RCAR_GP_PIN(4, 3), /* SDA1_A */ 3435fd685013SGeert Uytterhoeven [19] = RCAR_GP_PIN(4, 2), /* SCL1_A */ 3436fd685013SGeert Uytterhoeven [20] = RCAR_GP_PIN(4, 1), /* SDA0_A */ 3437fd685013SGeert Uytterhoeven [21] = RCAR_GP_PIN(4, 0), /* SCL0_A */ 3438fd685013SGeert Uytterhoeven [22] = RCAR_GP_PIN(3, 29), /* AVB_TXD5 */ 3439fd685013SGeert Uytterhoeven [23] = RCAR_GP_PIN(3, 28), /* AVB_TXD4 */ 3440fd685013SGeert Uytterhoeven [24] = RCAR_GP_PIN(3, 27), /* AVB_TXD3 */ 3441fd685013SGeert Uytterhoeven [25] = RCAR_GP_PIN(3, 16), /* VI1_DATA11 */ 3442fd685013SGeert Uytterhoeven [26] = RCAR_GP_PIN(3, 15), /* VI1_DATA10 */ 3443fd685013SGeert Uytterhoeven [27] = RCAR_GP_PIN(3, 14), /* VI1_DATA9 */ 3444fd685013SGeert Uytterhoeven [28] = RCAR_GP_PIN(3, 13), /* VI1_DATA8 */ 3445fd685013SGeert Uytterhoeven [29] = RCAR_GP_PIN(3, 12), /* VI1_VSYNC# */ 3446fd685013SGeert Uytterhoeven [30] = RCAR_GP_PIN(3, 11), /* VI1_HSYNC# */ 3447fd685013SGeert Uytterhoeven [31] = RCAR_GP_PIN(3, 10), /* VI1_FIELD */ 3448fd685013SGeert Uytterhoeven } }, 3449fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR4", 0xe6060110, "N/A", 0) { 3450fd685013SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(5, 27), /* SSI_SDATA9_A */ 3451fd685013SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(5, 26), /* SSI_WS9_A */ 3452fd685013SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(5, 25), /* SSI_SCK9_A */ 3453fd685013SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(5, 24), /* SSI_SDATA2_A */ 3454fd685013SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(5, 23), /* SSI_WS2_A */ 3455fd685013SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(5, 22), /* SSI_SCK2_A */ 3456fd685013SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(5, 21), /* SSI_SDATA1_A */ 3457fd685013SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 20), /* SSI_WS1_A */ 3458fd685013SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(5, 19), /* SSI_SDATA8_A */ 3459fd685013SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(5, 18), /* SSI_SCK1_A */ 3460fd685013SGeert Uytterhoeven [10] = RCAR_GP_PIN(5, 17), /* SSI_SDATA4_A */ 3461fd685013SGeert Uytterhoeven [11] = RCAR_GP_PIN(5, 16), /* SSI_WS4_A */ 3462fd685013SGeert Uytterhoeven [12] = RCAR_GP_PIN(5, 15), /* SSI_SCK4_A */ 3463fd685013SGeert Uytterhoeven [13] = RCAR_GP_PIN(5, 14), /* SSI_SDATA3 */ 3464fd685013SGeert Uytterhoeven [14] = RCAR_GP_PIN(5, 13), /* SSI_WS34 */ 3465fd685013SGeert Uytterhoeven [15] = RCAR_GP_PIN(5, 12), /* SSI_SCK34 */ 3466fd685013SGeert Uytterhoeven [16] = RCAR_GP_PIN(5, 11), /* SSI_SDATA0_A */ 3467fd685013SGeert Uytterhoeven [17] = RCAR_GP_PIN(5, 10), /* SSI_WS0129_A */ 3468fd685013SGeert Uytterhoeven [18] = RCAR_GP_PIN(5, 9), /* SSI_SCK0129_A */ 3469fd685013SGeert Uytterhoeven [19] = RCAR_GP_PIN(5, 8), /* SSI_SDATA7_A */ 3470fd685013SGeert Uytterhoeven [20] = RCAR_GP_PIN(5, 7), /* SSI_WS78_A */ 3471fd685013SGeert Uytterhoeven [21] = RCAR_GP_PIN(5, 6), /* SSI_SCK78_A */ 3472fd685013SGeert Uytterhoeven [22] = RCAR_GP_PIN(5, 5), /* SSI_SDATA6_A */ 3473fd685013SGeert Uytterhoeven [23] = RCAR_GP_PIN(5, 4), /* SSI_WS6_A */ 3474fd685013SGeert Uytterhoeven [24] = RCAR_GP_PIN(5, 3), /* SSI_SCK6_A */ 3475fd685013SGeert Uytterhoeven [25] = RCAR_GP_PIN(5, 2), /* SSI_SDATA5_A */ 3476fd685013SGeert Uytterhoeven [26] = RCAR_GP_PIN(5, 1), /* SSI_WS5_A */ 3477fd685013SGeert Uytterhoeven [27] = RCAR_GP_PIN(5, 0), /* SSI_SCK5_A */ 3478fd685013SGeert Uytterhoeven [28] = RCAR_GP_PIN(4, 25), /* SDA2_A */ 3479fd685013SGeert Uytterhoeven [29] = RCAR_GP_PIN(4, 24), /* SCL2_A */ 3480fd685013SGeert Uytterhoeven [30] = RCAR_GP_PIN(4, 23), /* TX3_A */ 3481fd685013SGeert Uytterhoeven [31] = RCAR_GP_PIN(4, 22), /* RX3_A */ 3482fd685013SGeert Uytterhoeven } }, 3483fd685013SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR5", 0xe6060114, "N/A", 0) { 3484fd685013SGeert Uytterhoeven [ 0] = SH_PFC_PIN_NONE, 3485fd685013SGeert Uytterhoeven [ 1] = SH_PFC_PIN_NONE, 3486fd685013SGeert Uytterhoeven [ 2] = SH_PFC_PIN_NONE, 3487fd685013SGeert Uytterhoeven [ 3] = SH_PFC_PIN_NONE, 3488fd685013SGeert Uytterhoeven [ 4] = SH_PFC_PIN_NONE, 3489fd685013SGeert Uytterhoeven [ 5] = SH_PFC_PIN_NONE, 3490fd685013SGeert Uytterhoeven [ 6] = SH_PFC_PIN_NONE, 3491fd685013SGeert Uytterhoeven [ 7] = SH_PFC_PIN_NONE, 3492fd685013SGeert Uytterhoeven [ 8] = SH_PFC_PIN_NONE, 3493fd685013SGeert Uytterhoeven [ 9] = SH_PFC_PIN_NONE, 3494fd685013SGeert Uytterhoeven [10] = SH_PFC_PIN_NONE, 3495fd685013SGeert Uytterhoeven [11] = SH_PFC_PIN_NONE, 3496fd685013SGeert Uytterhoeven [12] = SH_PFC_PIN_NONE, 3497fd685013SGeert Uytterhoeven [13] = SH_PFC_PIN_NONE, 3498fd685013SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 3499fd685013SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 3500fd685013SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 3501fd685013SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 3502fd685013SGeert Uytterhoeven [18] = SH_PFC_PIN_NONE, 3503fd685013SGeert Uytterhoeven [19] = SH_PFC_PIN_NONE, 3504fd685013SGeert Uytterhoeven [20] = SH_PFC_PIN_NONE, 3505fd685013SGeert Uytterhoeven [21] = SH_PFC_PIN_NONE, 3506fd685013SGeert Uytterhoeven [22] = SH_PFC_PIN_NONE, 3507fd685013SGeert Uytterhoeven [23] = SH_PFC_PIN_NONE, 3508fd685013SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 3509fd685013SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 3510fd685013SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 3511fd685013SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 3512fd685013SGeert Uytterhoeven [28] = RCAR_GP_PIN(5, 31), /* AUDIO_CLKOUT_A */ 3513fd685013SGeert Uytterhoeven [29] = RCAR_GP_PIN(5, 30), /* AUDIO_CLKC_A */ 3514fd685013SGeert Uytterhoeven [30] = RCAR_GP_PIN(5, 29), /* AUDIO_CLKB_A */ 3515fd685013SGeert Uytterhoeven [31] = RCAR_GP_PIN(5, 28), /* AUDIO_CLKA_A */ 3516fd685013SGeert Uytterhoeven } }, 3517fd685013SGeert Uytterhoeven { /* sentinel */ } 3518fd685013SGeert Uytterhoeven }; 3519fd685013SGeert Uytterhoeven 3520c614d12cSGeert Uytterhoeven static const struct sh_pfc_soc_operations r8a77470_pfc_ops = { 3521077365a9SGeert Uytterhoeven .pin_to_pocctrl = r8a77470_pin_to_pocctrl, 3522fd685013SGeert Uytterhoeven .get_bias = rcar_pinmux_get_bias, 3523fd685013SGeert Uytterhoeven .set_bias = rcar_pinmux_set_bias, 3524077365a9SGeert Uytterhoeven }; 3525077365a9SGeert Uytterhoeven 3526077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A77470 3527077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a77470_pinmux_info = { 3528077365a9SGeert Uytterhoeven .name = "r8a77470_pfc", 3529c614d12cSGeert Uytterhoeven .ops = &r8a77470_pfc_ops, 3530077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 3531077365a9SGeert Uytterhoeven 3532077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 3533077365a9SGeert Uytterhoeven 3534077365a9SGeert Uytterhoeven .pins = pinmux_pins, 3535077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 3536077365a9SGeert Uytterhoeven .groups = pinmux_groups, 3537077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups), 3538077365a9SGeert Uytterhoeven .functions = pinmux_functions, 3539077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions), 3540077365a9SGeert Uytterhoeven 3541077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 3542fd685013SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 3543077365a9SGeert Uytterhoeven 3544077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 3545077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 3546077365a9SGeert Uytterhoeven }; 3547077365a9SGeert Uytterhoeven #endif 3548