1 /* 2 * Copyright (c) 2015, Sony Mobile Communications AB. 3 * Copyright (c) 2013, The Linux Foundation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 and 7 * only version 2 as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/module.h> 16 #include <linux/platform_device.h> 17 #include <linux/pinctrl/pinctrl.h> 18 #include <linux/pinctrl/pinmux.h> 19 #include <linux/pinctrl/pinconf.h> 20 #include <linux/pinctrl/pinconf-generic.h> 21 #include <linux/slab.h> 22 #include <linux/regmap.h> 23 #include <linux/gpio.h> 24 #include <linux/interrupt.h> 25 #include <linux/of_device.h> 26 27 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 28 29 #include "../core.h" 30 #include "../pinctrl-utils.h" 31 32 /* MPP registers */ 33 #define SSBI_REG_ADDR_MPP_BASE 0x50 34 #define SSBI_REG_ADDR_MPP(n) (SSBI_REG_ADDR_MPP_BASE + n) 35 36 /* MPP Type: type */ 37 #define PM8XXX_MPP_TYPE_D_INPUT 0 38 #define PM8XXX_MPP_TYPE_D_OUTPUT 1 39 #define PM8XXX_MPP_TYPE_D_BI_DIR 2 40 #define PM8XXX_MPP_TYPE_A_INPUT 3 41 #define PM8XXX_MPP_TYPE_A_OUTPUT 4 42 #define PM8XXX_MPP_TYPE_SINK 5 43 #define PM8XXX_MPP_TYPE_DTEST_SINK 6 44 #define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7 45 46 /* Digital Input: control */ 47 #define PM8XXX_MPP_DIN_TO_INT 0 48 #define PM8XXX_MPP_DIN_TO_DBUS1 1 49 #define PM8XXX_MPP_DIN_TO_DBUS2 2 50 #define PM8XXX_MPP_DIN_TO_DBUS3 3 51 52 /* Digital Output: control */ 53 #define PM8XXX_MPP_DOUT_CTRL_LOW 0 54 #define PM8XXX_MPP_DOUT_CTRL_HIGH 1 55 #define PM8XXX_MPP_DOUT_CTRL_MPP 2 56 #define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3 57 58 /* Bidirectional: control */ 59 #define PM8XXX_MPP_BI_PULLUP_1KOHM 0 60 #define PM8XXX_MPP_BI_PULLUP_OPEN 1 61 #define PM8XXX_MPP_BI_PULLUP_10KOHM 2 62 #define PM8XXX_MPP_BI_PULLUP_30KOHM 3 63 64 /* Analog Output: control */ 65 #define PM8XXX_MPP_AOUT_CTRL_DISABLE 0 66 #define PM8XXX_MPP_AOUT_CTRL_ENABLE 1 67 #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2 68 #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3 69 70 /* Current Sink: control */ 71 #define PM8XXX_MPP_CS_CTRL_DISABLE 0 72 #define PM8XXX_MPP_CS_CTRL_ENABLE 1 73 #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2 74 #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3 75 76 /* DTEST Current Sink: control */ 77 #define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0 78 #define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1 79 #define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2 80 #define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3 81 82 /* DTEST Digital Output: control */ 83 #define PM8XXX_MPP_DTEST_DBUS1 0 84 #define PM8XXX_MPP_DTEST_DBUS2 1 85 #define PM8XXX_MPP_DTEST_DBUS3 2 86 #define PM8XXX_MPP_DTEST_DBUS4 3 87 88 /* custom pinconf parameters */ 89 #define PM8XXX_CONFIG_AMUX (PIN_CONFIG_END + 1) 90 #define PM8XXX_CONFIG_DTEST_SELECTOR (PIN_CONFIG_END + 2) 91 #define PM8XXX_CONFIG_ALEVEL (PIN_CONFIG_END + 3) 92 #define PM8XXX_CONFIG_PAIRED (PIN_CONFIG_END + 4) 93 94 /** 95 * struct pm8xxx_pin_data - dynamic configuration for a pin 96 * @reg: address of the control register 97 * @irq: IRQ from the PMIC interrupt controller 98 * @mode: operating mode for the pin (digital, analog or current sink) 99 * @input: pin is input 100 * @output: pin is output 101 * @high_z: pin is floating 102 * @paired: mpp operates in paired mode 103 * @output_value: logical output value of the mpp 104 * @power_source: selected power source 105 * @dtest: DTEST route selector 106 * @amux: input muxing in analog mode 107 * @aout_level: selector of the output in analog mode 108 * @drive_strength: drive strength of the current sink 109 * @pullup: pull up value, when in digital bidirectional mode 110 */ 111 struct pm8xxx_pin_data { 112 unsigned reg; 113 int irq; 114 115 u8 mode; 116 117 bool input; 118 bool output; 119 bool high_z; 120 bool paired; 121 bool output_value; 122 123 u8 power_source; 124 u8 dtest; 125 u8 amux; 126 u8 aout_level; 127 u8 drive_strength; 128 unsigned pullup; 129 }; 130 131 struct pm8xxx_mpp { 132 struct device *dev; 133 struct regmap *regmap; 134 struct pinctrl_dev *pctrl; 135 struct gpio_chip chip; 136 137 struct pinctrl_desc desc; 138 unsigned npins; 139 }; 140 141 static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = { 142 {"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0}, 143 {"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0}, 144 {"qcom,dtest", PM8XXX_CONFIG_DTEST_SELECTOR, 0}, 145 {"qcom,paired", PM8XXX_CONFIG_PAIRED, 0}, 146 }; 147 148 #ifdef CONFIG_DEBUG_FS 149 static const struct pin_config_item pm8xxx_conf_items[] = { 150 PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true), 151 PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true), 152 PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true), 153 PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false), 154 }; 155 #endif 156 157 #define PM8XXX_MAX_MPPS 12 158 static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = { 159 "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", 160 "mpp9", "mpp10", "mpp11", "mpp12", 161 }; 162 163 #define PM8XXX_MPP_DIGITAL 0 164 #define PM8XXX_MPP_ANALOG 1 165 #define PM8XXX_MPP_SINK 2 166 167 static const char * const pm8xxx_mpp_functions[] = { 168 "digital", "analog", "sink", 169 }; 170 171 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl, 172 struct pm8xxx_pin_data *pin) 173 { 174 unsigned level; 175 unsigned ctrl; 176 unsigned type; 177 int ret; 178 u8 val; 179 180 switch (pin->mode) { 181 case PM8XXX_MPP_DIGITAL: 182 if (pin->dtest) { 183 type = PM8XXX_MPP_TYPE_DTEST_OUTPUT; 184 ctrl = pin->dtest - 1; 185 } else if (pin->input && pin->output) { 186 type = PM8XXX_MPP_TYPE_D_BI_DIR; 187 if (pin->high_z) 188 ctrl = PM8XXX_MPP_BI_PULLUP_OPEN; 189 else if (pin->pullup == 600) 190 ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM; 191 else if (pin->pullup == 10000) 192 ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM; 193 else 194 ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM; 195 } else if (pin->input) { 196 type = PM8XXX_MPP_TYPE_D_INPUT; 197 if (pin->dtest) 198 ctrl = pin->dtest; 199 else 200 ctrl = PM8XXX_MPP_DIN_TO_INT; 201 } else { 202 type = PM8XXX_MPP_TYPE_D_OUTPUT; 203 ctrl = !!pin->output_value; 204 if (pin->paired) 205 ctrl |= BIT(1); 206 } 207 208 level = pin->power_source; 209 break; 210 case PM8XXX_MPP_ANALOG: 211 if (pin->output) { 212 type = PM8XXX_MPP_TYPE_A_OUTPUT; 213 level = pin->aout_level; 214 ctrl = pin->output_value; 215 if (pin->paired) 216 ctrl |= BIT(1); 217 } else { 218 type = PM8XXX_MPP_TYPE_A_INPUT; 219 level = pin->amux; 220 ctrl = 0; 221 } 222 break; 223 case PM8XXX_MPP_SINK: 224 level = (pin->drive_strength / 5) - 1; 225 if (pin->dtest) { 226 type = PM8XXX_MPP_TYPE_DTEST_SINK; 227 ctrl = pin->dtest - 1; 228 } else { 229 type = PM8XXX_MPP_TYPE_SINK; 230 ctrl = pin->output_value; 231 if (pin->paired) 232 ctrl |= BIT(1); 233 } 234 break; 235 default: 236 return -EINVAL; 237 } 238 239 val = type << 5 | level << 2 | ctrl; 240 ret = regmap_write(pctrl->regmap, pin->reg, val); 241 if (ret) 242 dev_err(pctrl->dev, "failed to write register\n"); 243 244 return ret; 245 } 246 247 static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev) 248 { 249 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 250 251 return pctrl->npins; 252 } 253 254 static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev, 255 unsigned group) 256 { 257 return pm8xxx_groups[group]; 258 } 259 260 261 static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev, 262 unsigned group, 263 const unsigned **pins, 264 unsigned *num_pins) 265 { 266 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 267 268 *pins = &pctrl->desc.pins[group].number; 269 *num_pins = 1; 270 271 return 0; 272 } 273 274 static const struct pinctrl_ops pm8xxx_pinctrl_ops = { 275 .get_groups_count = pm8xxx_get_groups_count, 276 .get_group_name = pm8xxx_get_group_name, 277 .get_group_pins = pm8xxx_get_group_pins, 278 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 279 .dt_free_map = pinctrl_utils_dt_free_map, 280 }; 281 282 static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev) 283 { 284 return ARRAY_SIZE(pm8xxx_mpp_functions); 285 } 286 287 static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev, 288 unsigned function) 289 { 290 return pm8xxx_mpp_functions[function]; 291 } 292 293 static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev, 294 unsigned function, 295 const char * const **groups, 296 unsigned * const num_groups) 297 { 298 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 299 300 *groups = pm8xxx_groups; 301 *num_groups = pctrl->npins; 302 return 0; 303 } 304 305 static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev, 306 unsigned function, 307 unsigned group) 308 { 309 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 310 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; 311 312 pin->mode = function; 313 pm8xxx_mpp_update(pctrl, pin); 314 315 return 0; 316 } 317 318 static const struct pinmux_ops pm8xxx_pinmux_ops = { 319 .get_functions_count = pm8xxx_get_functions_count, 320 .get_function_name = pm8xxx_get_function_name, 321 .get_function_groups = pm8xxx_get_function_groups, 322 .set_mux = pm8xxx_pinmux_set_mux, 323 }; 324 325 static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev, 326 unsigned int offset, 327 unsigned long *config) 328 { 329 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 330 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 331 unsigned param = pinconf_to_config_param(*config); 332 unsigned arg; 333 334 switch (param) { 335 case PIN_CONFIG_BIAS_PULL_UP: 336 arg = pin->pullup; 337 break; 338 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 339 arg = pin->high_z; 340 break; 341 case PIN_CONFIG_INPUT_ENABLE: 342 arg = pin->input; 343 break; 344 case PIN_CONFIG_OUTPUT: 345 arg = pin->output_value; 346 break; 347 case PIN_CONFIG_POWER_SOURCE: 348 arg = pin->power_source; 349 break; 350 case PIN_CONFIG_DRIVE_STRENGTH: 351 arg = pin->drive_strength; 352 break; 353 case PM8XXX_CONFIG_DTEST_SELECTOR: 354 arg = pin->dtest; 355 break; 356 case PM8XXX_CONFIG_AMUX: 357 arg = pin->amux; 358 break; 359 case PM8XXX_CONFIG_ALEVEL: 360 arg = pin->aout_level; 361 break; 362 case PM8XXX_CONFIG_PAIRED: 363 arg = pin->paired; 364 break; 365 default: 366 return -EINVAL; 367 } 368 369 *config = pinconf_to_config_packed(param, arg); 370 371 return 0; 372 } 373 374 static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev, 375 unsigned int offset, 376 unsigned long *configs, 377 unsigned num_configs) 378 { 379 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); 380 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 381 unsigned param; 382 unsigned arg; 383 unsigned i; 384 385 for (i = 0; i < num_configs; i++) { 386 param = pinconf_to_config_param(configs[i]); 387 arg = pinconf_to_config_argument(configs[i]); 388 389 switch (param) { 390 case PIN_CONFIG_BIAS_PULL_UP: 391 pin->pullup = arg; 392 break; 393 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 394 pin->high_z = true; 395 break; 396 case PIN_CONFIG_INPUT_ENABLE: 397 pin->input = true; 398 break; 399 case PIN_CONFIG_OUTPUT: 400 pin->output = true; 401 pin->output_value = !!arg; 402 break; 403 case PIN_CONFIG_POWER_SOURCE: 404 pin->power_source = arg; 405 break; 406 case PIN_CONFIG_DRIVE_STRENGTH: 407 pin->drive_strength = arg; 408 break; 409 case PM8XXX_CONFIG_DTEST_SELECTOR: 410 pin->dtest = arg; 411 break; 412 case PM8XXX_CONFIG_AMUX: 413 pin->amux = arg; 414 break; 415 case PM8XXX_CONFIG_ALEVEL: 416 pin->aout_level = arg; 417 break; 418 case PM8XXX_CONFIG_PAIRED: 419 pin->paired = !!arg; 420 break; 421 default: 422 dev_err(pctrl->dev, 423 "unsupported config parameter: %x\n", 424 param); 425 return -EINVAL; 426 } 427 } 428 429 pm8xxx_mpp_update(pctrl, pin); 430 431 return 0; 432 } 433 434 static const struct pinconf_ops pm8xxx_pinconf_ops = { 435 .is_generic = true, 436 .pin_config_group_get = pm8xxx_pin_config_get, 437 .pin_config_group_set = pm8xxx_pin_config_set, 438 }; 439 440 static struct pinctrl_desc pm8xxx_pinctrl_desc = { 441 .name = "pm8xxx_mpp", 442 .pctlops = &pm8xxx_pinctrl_ops, 443 .pmxops = &pm8xxx_pinmux_ops, 444 .confops = &pm8xxx_pinconf_ops, 445 .owner = THIS_MODULE, 446 }; 447 448 static int pm8xxx_mpp_direction_input(struct gpio_chip *chip, 449 unsigned offset) 450 { 451 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 452 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 453 454 switch (pin->mode) { 455 case PM8XXX_MPP_DIGITAL: 456 pin->input = true; 457 break; 458 case PM8XXX_MPP_ANALOG: 459 pin->input = true; 460 pin->output = true; 461 break; 462 case PM8XXX_MPP_SINK: 463 return -EINVAL; 464 } 465 466 pm8xxx_mpp_update(pctrl, pin); 467 468 return 0; 469 } 470 471 static int pm8xxx_mpp_direction_output(struct gpio_chip *chip, 472 unsigned offset, 473 int value) 474 { 475 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 476 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 477 478 switch (pin->mode) { 479 case PM8XXX_MPP_DIGITAL: 480 pin->output = true; 481 break; 482 case PM8XXX_MPP_ANALOG: 483 pin->input = false; 484 pin->output = true; 485 break; 486 case PM8XXX_MPP_SINK: 487 pin->input = false; 488 pin->output = true; 489 break; 490 } 491 492 pm8xxx_mpp_update(pctrl, pin); 493 494 return 0; 495 } 496 497 static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset) 498 { 499 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 500 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 501 bool state; 502 int ret; 503 504 if (!pin->input) 505 return pin->output_value; 506 507 ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state); 508 if (!ret) 509 ret = !!state; 510 511 return ret; 512 } 513 514 static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value) 515 { 516 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 517 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 518 519 pin->output_value = !!value; 520 521 pm8xxx_mpp_update(pctrl, pin); 522 } 523 524 static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip, 525 const struct of_phandle_args *gpio_desc, 526 u32 *flags) 527 { 528 if (chip->of_gpio_n_cells < 2) 529 return -EINVAL; 530 531 if (flags) 532 *flags = gpio_desc->args[1]; 533 534 return gpio_desc->args[0] - 1; 535 } 536 537 538 static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset) 539 { 540 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 541 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 542 543 return pin->irq; 544 } 545 546 #ifdef CONFIG_DEBUG_FS 547 #include <linux/seq_file.h> 548 549 static void pm8xxx_mpp_dbg_show_one(struct seq_file *s, 550 struct pinctrl_dev *pctldev, 551 struct gpio_chip *chip, 552 unsigned offset, 553 unsigned gpio) 554 { 555 struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); 556 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; 557 558 static const char * const aout_lvls[] = { 559 "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2", 560 "abus3" 561 }; 562 563 static const char * const amuxs[] = { 564 "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2", 565 "abus3", 566 }; 567 568 seq_printf(s, " mpp%-2d:", offset + 1); 569 570 switch (pin->mode) { 571 case PM8XXX_MPP_DIGITAL: 572 seq_puts(s, " digital "); 573 if (pin->dtest) { 574 seq_printf(s, "dtest%d\n", pin->dtest); 575 } else if (pin->input && pin->output) { 576 if (pin->high_z) 577 seq_puts(s, "bi-dir high-z"); 578 else 579 seq_printf(s, "bi-dir %dOhm", pin->pullup); 580 } else if (pin->input) { 581 if (pin->dtest) 582 seq_printf(s, "in dtest%d", pin->dtest); 583 else 584 seq_puts(s, "in gpio"); 585 } else if (pin->output) { 586 seq_puts(s, "out "); 587 588 if (!pin->paired) { 589 seq_puts(s, pin->output_value ? 590 "high" : "low"); 591 } else { 592 seq_puts(s, pin->output_value ? 593 "inverted" : "follow"); 594 } 595 } 596 break; 597 case PM8XXX_MPP_ANALOG: 598 seq_puts(s, " analog "); 599 if (pin->output) { 600 seq_printf(s, "out %s ", aout_lvls[pin->aout_level]); 601 if (!pin->paired) { 602 seq_puts(s, pin->output_value ? 603 "high" : "low"); 604 } else { 605 seq_puts(s, pin->output_value ? 606 "inverted" : "follow"); 607 } 608 } else { 609 seq_printf(s, "input mux %s", amuxs[pin->amux]); 610 } 611 break; 612 case PM8XXX_MPP_SINK: 613 seq_printf(s, " sink %dmA ", pin->drive_strength); 614 if (pin->dtest) { 615 seq_printf(s, "dtest%d", pin->dtest); 616 } else { 617 if (!pin->paired) { 618 seq_puts(s, pin->output_value ? 619 "high" : "low"); 620 } else { 621 seq_puts(s, pin->output_value ? 622 "inverted" : "follow"); 623 } 624 } 625 break; 626 } 627 628 } 629 630 static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip) 631 { 632 unsigned gpio = chip->base; 633 unsigned i; 634 635 for (i = 0; i < chip->ngpio; i++, gpio++) { 636 pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio); 637 seq_puts(s, "\n"); 638 } 639 } 640 641 #else 642 #define pm8xxx_mpp_dbg_show NULL 643 #endif 644 645 static struct gpio_chip pm8xxx_mpp_template = { 646 .direction_input = pm8xxx_mpp_direction_input, 647 .direction_output = pm8xxx_mpp_direction_output, 648 .get = pm8xxx_mpp_get, 649 .set = pm8xxx_mpp_set, 650 .of_xlate = pm8xxx_mpp_of_xlate, 651 .to_irq = pm8xxx_mpp_to_irq, 652 .dbg_show = pm8xxx_mpp_dbg_show, 653 .owner = THIS_MODULE, 654 }; 655 656 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, 657 struct pm8xxx_pin_data *pin) 658 { 659 unsigned int val; 660 unsigned level; 661 unsigned ctrl; 662 unsigned type; 663 int ret; 664 665 ret = regmap_read(pctrl->regmap, pin->reg, &val); 666 if (ret) { 667 dev_err(pctrl->dev, "failed to read register\n"); 668 return ret; 669 } 670 671 type = (val >> 5) & 7; 672 level = (val >> 2) & 7; 673 ctrl = (val) & 3; 674 675 switch (type) { 676 case PM8XXX_MPP_TYPE_D_INPUT: 677 pin->mode = PM8XXX_MPP_DIGITAL; 678 pin->input = true; 679 pin->power_source = level; 680 pin->dtest = ctrl; 681 break; 682 case PM8XXX_MPP_TYPE_D_OUTPUT: 683 pin->mode = PM8XXX_MPP_DIGITAL; 684 pin->output = true; 685 pin->power_source = level; 686 pin->output_value = !!(ctrl & BIT(0)); 687 pin->paired = !!(ctrl & BIT(1)); 688 break; 689 case PM8XXX_MPP_TYPE_D_BI_DIR: 690 pin->mode = PM8XXX_MPP_DIGITAL; 691 pin->input = true; 692 pin->output = true; 693 pin->power_source = level; 694 switch (ctrl) { 695 case PM8XXX_MPP_BI_PULLUP_1KOHM: 696 pin->pullup = 600; 697 break; 698 case PM8XXX_MPP_BI_PULLUP_OPEN: 699 pin->high_z = true; 700 break; 701 case PM8XXX_MPP_BI_PULLUP_10KOHM: 702 pin->pullup = 10000; 703 break; 704 case PM8XXX_MPP_BI_PULLUP_30KOHM: 705 pin->pullup = 30000; 706 break; 707 } 708 break; 709 case PM8XXX_MPP_TYPE_A_INPUT: 710 pin->mode = PM8XXX_MPP_ANALOG; 711 pin->input = true; 712 pin->amux = level; 713 break; 714 case PM8XXX_MPP_TYPE_A_OUTPUT: 715 pin->mode = PM8XXX_MPP_ANALOG; 716 pin->output = true; 717 pin->aout_level = level; 718 pin->output_value = !!(ctrl & BIT(0)); 719 pin->paired = !!(ctrl & BIT(1)); 720 break; 721 case PM8XXX_MPP_TYPE_SINK: 722 pin->mode = PM8XXX_MPP_SINK; 723 pin->drive_strength = 5 * (level + 1); 724 pin->output_value = !!(ctrl & BIT(0)); 725 pin->paired = !!(ctrl & BIT(1)); 726 break; 727 case PM8XXX_MPP_TYPE_DTEST_SINK: 728 pin->mode = PM8XXX_MPP_SINK; 729 pin->dtest = ctrl + 1; 730 pin->drive_strength = 5 * (level + 1); 731 break; 732 case PM8XXX_MPP_TYPE_DTEST_OUTPUT: 733 pin->mode = PM8XXX_MPP_DIGITAL; 734 pin->power_source = level; 735 if (ctrl >= 1) 736 pin->dtest = ctrl; 737 break; 738 } 739 740 return 0; 741 } 742 743 static const struct of_device_id pm8xxx_mpp_of_match[] = { 744 { .compatible = "qcom,pm8018-mpp", .data = (void *)6 }, 745 { .compatible = "qcom,pm8038-mpp", .data = (void *)6 }, 746 { .compatible = "qcom,pm8917-mpp", .data = (void *)10 }, 747 { .compatible = "qcom,pm8821-mpp", .data = (void *)4 }, 748 { .compatible = "qcom,pm8921-mpp", .data = (void *)12 }, 749 { }, 750 }; 751 MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match); 752 753 static int pm8xxx_mpp_probe(struct platform_device *pdev) 754 { 755 struct pm8xxx_pin_data *pin_data; 756 struct pinctrl_pin_desc *pins; 757 struct pm8xxx_mpp *pctrl; 758 int ret; 759 int i; 760 761 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 762 if (!pctrl) 763 return -ENOMEM; 764 765 pctrl->dev = &pdev->dev; 766 pctrl->npins = (unsigned)of_device_get_match_data(&pdev->dev); 767 768 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); 769 if (!pctrl->regmap) { 770 dev_err(&pdev->dev, "parent regmap unavailable\n"); 771 return -ENXIO; 772 } 773 774 pctrl->desc = pm8xxx_pinctrl_desc; 775 pctrl->desc.npins = pctrl->npins; 776 777 pins = devm_kcalloc(&pdev->dev, 778 pctrl->desc.npins, 779 sizeof(struct pinctrl_pin_desc), 780 GFP_KERNEL); 781 if (!pins) 782 return -ENOMEM; 783 784 pin_data = devm_kcalloc(&pdev->dev, 785 pctrl->desc.npins, 786 sizeof(struct pm8xxx_pin_data), 787 GFP_KERNEL); 788 if (!pin_data) 789 return -ENOMEM; 790 791 for (i = 0; i < pctrl->desc.npins; i++) { 792 pin_data[i].reg = SSBI_REG_ADDR_MPP(i); 793 pin_data[i].irq = platform_get_irq(pdev, i); 794 if (pin_data[i].irq < 0) { 795 dev_err(&pdev->dev, 796 "missing interrupts for pin %d\n", i); 797 return pin_data[i].irq; 798 } 799 800 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]); 801 if (ret) 802 return ret; 803 804 pins[i].number = i; 805 pins[i].name = pm8xxx_groups[i]; 806 pins[i].drv_data = &pin_data[i]; 807 } 808 pctrl->desc.pins = pins; 809 810 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings); 811 pctrl->desc.custom_params = pm8xxx_mpp_bindings; 812 #ifdef CONFIG_DEBUG_FS 813 pctrl->desc.custom_conf_items = pm8xxx_conf_items; 814 #endif 815 816 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl); 817 if (IS_ERR(pctrl->pctrl)) { 818 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n"); 819 return PTR_ERR(pctrl->pctrl); 820 } 821 822 pctrl->chip = pm8xxx_mpp_template; 823 pctrl->chip.base = -1; 824 pctrl->chip.dev = &pdev->dev; 825 pctrl->chip.of_node = pdev->dev.of_node; 826 pctrl->chip.of_gpio_n_cells = 2; 827 pctrl->chip.label = dev_name(pctrl->dev); 828 pctrl->chip.ngpio = pctrl->npins; 829 ret = gpiochip_add(&pctrl->chip); 830 if (ret) { 831 dev_err(&pdev->dev, "failed register gpiochip\n"); 832 goto unregister_pinctrl; 833 } 834 835 ret = gpiochip_add_pin_range(&pctrl->chip, 836 dev_name(pctrl->dev), 837 0, 0, pctrl->chip.ngpio); 838 if (ret) { 839 dev_err(pctrl->dev, "failed to add pin range\n"); 840 goto unregister_gpiochip; 841 } 842 843 platform_set_drvdata(pdev, pctrl); 844 845 dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n"); 846 847 return 0; 848 849 unregister_gpiochip: 850 gpiochip_remove(&pctrl->chip); 851 852 unregister_pinctrl: 853 pinctrl_unregister(pctrl->pctrl); 854 855 return ret; 856 } 857 858 static int pm8xxx_mpp_remove(struct platform_device *pdev) 859 { 860 struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev); 861 862 gpiochip_remove(&pctrl->chip); 863 864 pinctrl_unregister(pctrl->pctrl); 865 866 return 0; 867 } 868 869 static struct platform_driver pm8xxx_mpp_driver = { 870 .driver = { 871 .name = "qcom-ssbi-mpp", 872 .of_match_table = pm8xxx_mpp_of_match, 873 }, 874 .probe = pm8xxx_mpp_probe, 875 .remove = pm8xxx_mpp_remove, 876 }; 877 878 module_platform_driver(pm8xxx_mpp_driver); 879 880 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>"); 881 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver"); 882 MODULE_LICENSE("GPL v2"); 883