1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2015, Sony Mobile Communications AB.
4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
5  */
6 
7 #include <linux/gpio/driver.h>
8 #include <linux/interrupt.h>
9 #include <linux/module.h>
10 #include <linux/of_device.h>
11 #include <linux/of_irq.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/seq_file.h>
15 #include <linux/slab.h>
16 
17 #include <linux/pinctrl/pinconf-generic.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 
22 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
23 
24 #include "../core.h"
25 #include "../pinctrl-utils.h"
26 
27 /* MPP registers */
28 #define SSBI_REG_ADDR_MPP_BASE		0x50
29 #define SSBI_REG_ADDR_MPP(n)		(SSBI_REG_ADDR_MPP_BASE + n)
30 
31 /* MPP Type: type */
32 #define PM8XXX_MPP_TYPE_D_INPUT         0
33 #define PM8XXX_MPP_TYPE_D_OUTPUT        1
34 #define PM8XXX_MPP_TYPE_D_BI_DIR        2
35 #define PM8XXX_MPP_TYPE_A_INPUT         3
36 #define PM8XXX_MPP_TYPE_A_OUTPUT        4
37 #define PM8XXX_MPP_TYPE_SINK            5
38 #define PM8XXX_MPP_TYPE_DTEST_SINK      6
39 #define PM8XXX_MPP_TYPE_DTEST_OUTPUT    7
40 
41 /* Digital Input: control */
42 #define PM8XXX_MPP_DIN_TO_INT           0
43 #define PM8XXX_MPP_DIN_TO_DBUS1         1
44 #define PM8XXX_MPP_DIN_TO_DBUS2         2
45 #define PM8XXX_MPP_DIN_TO_DBUS3         3
46 
47 /* Digital Output: control */
48 #define PM8XXX_MPP_DOUT_CTRL_LOW        0
49 #define PM8XXX_MPP_DOUT_CTRL_HIGH       1
50 #define PM8XXX_MPP_DOUT_CTRL_MPP        2
51 #define PM8XXX_MPP_DOUT_CTRL_INV_MPP    3
52 
53 /* Bidirectional: control */
54 #define PM8XXX_MPP_BI_PULLUP_1KOHM      0
55 #define PM8XXX_MPP_BI_PULLUP_OPEN       1
56 #define PM8XXX_MPP_BI_PULLUP_10KOHM     2
57 #define PM8XXX_MPP_BI_PULLUP_30KOHM     3
58 
59 /* Analog Output: control */
60 #define PM8XXX_MPP_AOUT_CTRL_DISABLE            0
61 #define PM8XXX_MPP_AOUT_CTRL_ENABLE             1
62 #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN        2
63 #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN         3
64 
65 /* Current Sink: control */
66 #define PM8XXX_MPP_CS_CTRL_DISABLE      0
67 #define PM8XXX_MPP_CS_CTRL_ENABLE       1
68 #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN  2
69 #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN   3
70 
71 /* DTEST Current Sink: control */
72 #define PM8XXX_MPP_DTEST_CS_CTRL_EN1    0
73 #define PM8XXX_MPP_DTEST_CS_CTRL_EN2    1
74 #define PM8XXX_MPP_DTEST_CS_CTRL_EN3    2
75 #define PM8XXX_MPP_DTEST_CS_CTRL_EN4    3
76 
77 /* DTEST Digital Output: control */
78 #define PM8XXX_MPP_DTEST_DBUS1          0
79 #define PM8XXX_MPP_DTEST_DBUS2          1
80 #define PM8XXX_MPP_DTEST_DBUS3          2
81 #define PM8XXX_MPP_DTEST_DBUS4          3
82 
83 /* custom pinconf parameters */
84 #define PM8XXX_CONFIG_AMUX		(PIN_CONFIG_END + 1)
85 #define PM8XXX_CONFIG_DTEST_SELECTOR	(PIN_CONFIG_END + 2)
86 #define PM8XXX_CONFIG_ALEVEL		(PIN_CONFIG_END + 3)
87 #define PM8XXX_CONFIG_PAIRED		(PIN_CONFIG_END + 4)
88 
89 /**
90  * struct pm8xxx_pin_data - dynamic configuration for a pin
91  * @reg:		address of the control register
92  * @mode:		operating mode for the pin (digital, analog or current sink)
93  * @input:		pin is input
94  * @output:		pin is output
95  * @high_z:		pin is floating
96  * @paired:		mpp operates in paired mode
97  * @output_value:	logical output value of the mpp
98  * @power_source:	selected power source
99  * @dtest:		DTEST route selector
100  * @amux:		input muxing in analog mode
101  * @aout_level:		selector of the output in analog mode
102  * @drive_strength:	drive strength of the current sink
103  * @pullup:		pull up value, when in digital bidirectional mode
104  */
105 struct pm8xxx_pin_data {
106 	unsigned reg;
107 
108 	u8 mode;
109 
110 	bool input;
111 	bool output;
112 	bool high_z;
113 	bool paired;
114 	bool output_value;
115 
116 	u8 power_source;
117 	u8 dtest;
118 	u8 amux;
119 	u8 aout_level;
120 	u8 drive_strength;
121 	unsigned pullup;
122 };
123 
124 struct pm8xxx_mpp {
125 	struct device *dev;
126 	struct regmap *regmap;
127 	struct pinctrl_dev *pctrl;
128 	struct gpio_chip chip;
129 	struct irq_chip irq;
130 
131 	struct pinctrl_desc desc;
132 	unsigned npins;
133 };
134 
135 static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
136 	{"qcom,amux-route",	PM8XXX_CONFIG_AMUX,		0},
137 	{"qcom,analog-level",	PM8XXX_CONFIG_ALEVEL,		0},
138 	{"qcom,dtest",		PM8XXX_CONFIG_DTEST_SELECTOR,	0},
139 	{"qcom,paired",		PM8XXX_CONFIG_PAIRED,		0},
140 };
141 
142 #ifdef CONFIG_DEBUG_FS
143 static const struct pin_config_item pm8xxx_conf_items[] = {
144 	PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
145 	PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
146 	PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
147 	PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
148 };
149 #endif
150 
151 #define PM8XXX_MAX_MPPS	12
152 #define PM8XXX_MPP_PHYSICAL_OFFSET    1
153 
154 static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
155 	"mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
156 	"mpp9", "mpp10", "mpp11", "mpp12",
157 };
158 
159 #define PM8XXX_MPP_DIGITAL	0
160 #define PM8XXX_MPP_ANALOG	1
161 #define PM8XXX_MPP_SINK		2
162 
163 static const char * const pm8xxx_mpp_functions[] = {
164 	"digital", "analog", "sink",
165 };
166 
167 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
168 			     struct pm8xxx_pin_data *pin)
169 {
170 	unsigned level;
171 	unsigned ctrl;
172 	unsigned type;
173 	int ret;
174 	u8 val;
175 
176 	switch (pin->mode) {
177 	case PM8XXX_MPP_DIGITAL:
178 		if (pin->dtest) {
179 			type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
180 			ctrl = pin->dtest - 1;
181 		} else if (pin->input && pin->output) {
182 			type = PM8XXX_MPP_TYPE_D_BI_DIR;
183 			if (pin->high_z)
184 				ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
185 			else if (pin->pullup == 600)
186 				ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
187 			else if (pin->pullup == 10000)
188 				ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
189 			else
190 				ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
191 		} else if (pin->input) {
192 			type = PM8XXX_MPP_TYPE_D_INPUT;
193 			if (pin->dtest)
194 				ctrl = pin->dtest;
195 			else
196 				ctrl = PM8XXX_MPP_DIN_TO_INT;
197 		} else {
198 			type = PM8XXX_MPP_TYPE_D_OUTPUT;
199 			ctrl = !!pin->output_value;
200 			if (pin->paired)
201 				ctrl |= BIT(1);
202 		}
203 
204 		level = pin->power_source;
205 		break;
206 	case PM8XXX_MPP_ANALOG:
207 		if (pin->output) {
208 			type = PM8XXX_MPP_TYPE_A_OUTPUT;
209 			level = pin->aout_level;
210 			ctrl = pin->output_value;
211 			if (pin->paired)
212 				ctrl |= BIT(1);
213 		} else {
214 			type = PM8XXX_MPP_TYPE_A_INPUT;
215 			level = pin->amux;
216 			ctrl = 0;
217 		}
218 		break;
219 	case PM8XXX_MPP_SINK:
220 		level = (pin->drive_strength / 5) - 1;
221 		if (pin->dtest) {
222 			type = PM8XXX_MPP_TYPE_DTEST_SINK;
223 			ctrl = pin->dtest - 1;
224 		} else {
225 			type = PM8XXX_MPP_TYPE_SINK;
226 			ctrl = pin->output_value;
227 			if (pin->paired)
228 				ctrl |= BIT(1);
229 		}
230 		break;
231 	default:
232 		return -EINVAL;
233 	}
234 
235 	val = type << 5 | level << 2 | ctrl;
236 	ret = regmap_write(pctrl->regmap, pin->reg, val);
237 	if (ret)
238 		dev_err(pctrl->dev, "failed to write register\n");
239 
240 	return ret;
241 }
242 
243 static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
244 {
245 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
246 
247 	return pctrl->npins;
248 }
249 
250 static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
251 					 unsigned group)
252 {
253 	return pm8xxx_groups[group];
254 }
255 
256 
257 static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
258 				 unsigned group,
259 				 const unsigned **pins,
260 				 unsigned *num_pins)
261 {
262 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
263 
264 	*pins = &pctrl->desc.pins[group].number;
265 	*num_pins = 1;
266 
267 	return 0;
268 }
269 
270 static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
271 	.get_groups_count	= pm8xxx_get_groups_count,
272 	.get_group_name		= pm8xxx_get_group_name,
273 	.get_group_pins         = pm8xxx_get_group_pins,
274 	.dt_node_to_map		= pinconf_generic_dt_node_to_map_group,
275 	.dt_free_map		= pinctrl_utils_free_map,
276 };
277 
278 static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
279 {
280 	return ARRAY_SIZE(pm8xxx_mpp_functions);
281 }
282 
283 static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
284 					    unsigned function)
285 {
286 	return pm8xxx_mpp_functions[function];
287 }
288 
289 static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
290 				      unsigned function,
291 				      const char * const **groups,
292 				      unsigned * const num_groups)
293 {
294 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
295 
296 	*groups = pm8xxx_groups;
297 	*num_groups = pctrl->npins;
298 	return 0;
299 }
300 
301 static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
302 				 unsigned function,
303 				 unsigned group)
304 {
305 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
306 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
307 
308 	pin->mode = function;
309 	pm8xxx_mpp_update(pctrl, pin);
310 
311 	return 0;
312 }
313 
314 static const struct pinmux_ops pm8xxx_pinmux_ops = {
315 	.get_functions_count	= pm8xxx_get_functions_count,
316 	.get_function_name	= pm8xxx_get_function_name,
317 	.get_function_groups	= pm8xxx_get_function_groups,
318 	.set_mux		= pm8xxx_pinmux_set_mux,
319 };
320 
321 static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
322 				 unsigned int offset,
323 				 unsigned long *config)
324 {
325 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
326 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
327 	unsigned param = pinconf_to_config_param(*config);
328 	unsigned arg;
329 
330 	switch (param) {
331 	case PIN_CONFIG_BIAS_PULL_UP:
332 		arg = pin->pullup;
333 		break;
334 	case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
335 		arg = pin->high_z;
336 		break;
337 	case PIN_CONFIG_INPUT_ENABLE:
338 		arg = pin->input;
339 		break;
340 	case PIN_CONFIG_OUTPUT:
341 		arg = pin->output_value;
342 		break;
343 	case PIN_CONFIG_POWER_SOURCE:
344 		arg = pin->power_source;
345 		break;
346 	case PIN_CONFIG_DRIVE_STRENGTH:
347 		arg = pin->drive_strength;
348 		break;
349 	case PM8XXX_CONFIG_DTEST_SELECTOR:
350 		arg = pin->dtest;
351 		break;
352 	case PM8XXX_CONFIG_AMUX:
353 		arg = pin->amux;
354 		break;
355 	case PM8XXX_CONFIG_ALEVEL:
356 		arg = pin->aout_level;
357 		break;
358 	case PM8XXX_CONFIG_PAIRED:
359 		arg = pin->paired;
360 		break;
361 	default:
362 		return -EINVAL;
363 	}
364 
365 	*config = pinconf_to_config_packed(param, arg);
366 
367 	return 0;
368 }
369 
370 static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
371 				 unsigned int offset,
372 				 unsigned long *configs,
373 				 unsigned num_configs)
374 {
375 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
376 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
377 	unsigned param;
378 	unsigned arg;
379 	unsigned i;
380 
381 	for (i = 0; i < num_configs; i++) {
382 		param = pinconf_to_config_param(configs[i]);
383 		arg = pinconf_to_config_argument(configs[i]);
384 
385 		switch (param) {
386 		case PIN_CONFIG_BIAS_PULL_UP:
387 			pin->pullup = arg;
388 			break;
389 		case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
390 			pin->high_z = true;
391 			break;
392 		case PIN_CONFIG_INPUT_ENABLE:
393 			pin->input = true;
394 			break;
395 		case PIN_CONFIG_OUTPUT:
396 			pin->output = true;
397 			pin->output_value = !!arg;
398 			break;
399 		case PIN_CONFIG_POWER_SOURCE:
400 			pin->power_source = arg;
401 			break;
402 		case PIN_CONFIG_DRIVE_STRENGTH:
403 			pin->drive_strength = arg;
404 			break;
405 		case PM8XXX_CONFIG_DTEST_SELECTOR:
406 			pin->dtest = arg;
407 			break;
408 		case PM8XXX_CONFIG_AMUX:
409 			pin->amux = arg;
410 			break;
411 		case PM8XXX_CONFIG_ALEVEL:
412 			pin->aout_level = arg;
413 			break;
414 		case PM8XXX_CONFIG_PAIRED:
415 			pin->paired = !!arg;
416 			break;
417 		default:
418 			dev_err(pctrl->dev,
419 				"unsupported config parameter: %x\n",
420 				param);
421 			return -EINVAL;
422 		}
423 	}
424 
425 	pm8xxx_mpp_update(pctrl, pin);
426 
427 	return 0;
428 }
429 
430 static const struct pinconf_ops pm8xxx_pinconf_ops = {
431 	.is_generic = true,
432 	.pin_config_group_get = pm8xxx_pin_config_get,
433 	.pin_config_group_set = pm8xxx_pin_config_set,
434 };
435 
436 static const struct pinctrl_desc pm8xxx_pinctrl_desc = {
437 	.name = "pm8xxx_mpp",
438 	.pctlops = &pm8xxx_pinctrl_ops,
439 	.pmxops = &pm8xxx_pinmux_ops,
440 	.confops = &pm8xxx_pinconf_ops,
441 	.owner = THIS_MODULE,
442 };
443 
444 static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
445 				       unsigned offset)
446 {
447 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
448 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
449 
450 	switch (pin->mode) {
451 	case PM8XXX_MPP_DIGITAL:
452 		pin->input = true;
453 		break;
454 	case PM8XXX_MPP_ANALOG:
455 		pin->input = true;
456 		pin->output = true;
457 		break;
458 	case PM8XXX_MPP_SINK:
459 		return -EINVAL;
460 	}
461 
462 	pm8xxx_mpp_update(pctrl, pin);
463 
464 	return 0;
465 }
466 
467 static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
468 					unsigned offset,
469 					int value)
470 {
471 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
472 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
473 
474 	switch (pin->mode) {
475 	case PM8XXX_MPP_DIGITAL:
476 		pin->output = true;
477 		break;
478 	case PM8XXX_MPP_ANALOG:
479 		pin->input = false;
480 		pin->output = true;
481 		break;
482 	case PM8XXX_MPP_SINK:
483 		pin->input = false;
484 		pin->output = true;
485 		break;
486 	}
487 
488 	pm8xxx_mpp_update(pctrl, pin);
489 
490 	return 0;
491 }
492 
493 static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
494 {
495 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
496 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
497 	bool state;
498 	int ret, irq;
499 
500 	if (!pin->input)
501 		return !!pin->output_value;
502 
503 	irq = chip->to_irq(chip, offset);
504 	if (irq < 0)
505 		return irq;
506 
507 	ret = irq_get_irqchip_state(irq, IRQCHIP_STATE_LINE_LEVEL, &state);
508 	if (!ret)
509 		ret = !!state;
510 
511 	return ret;
512 }
513 
514 static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
515 {
516 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
517 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
518 
519 	pin->output_value = !!value;
520 
521 	pm8xxx_mpp_update(pctrl, pin);
522 }
523 
524 static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
525 				const struct of_phandle_args *gpio_desc,
526 				u32 *flags)
527 {
528 	if (chip->of_gpio_n_cells < 2)
529 		return -EINVAL;
530 
531 	if (flags)
532 		*flags = gpio_desc->args[1];
533 
534 	return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
535 }
536 
537 
538 #ifdef CONFIG_DEBUG_FS
539 
540 static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
541 				  struct pinctrl_dev *pctldev,
542 				  struct gpio_chip *chip,
543 				  unsigned offset,
544 				  unsigned gpio)
545 {
546 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
547 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
548 
549 	static const char * const aout_lvls[] = {
550 		"1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
551 		"abus3"
552 	};
553 
554 	static const char * const amuxs[] = {
555 		"amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
556 		"abus3",
557 	};
558 
559 	seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET);
560 
561 	switch (pin->mode) {
562 	case PM8XXX_MPP_DIGITAL:
563 		seq_puts(s, " digital ");
564 		if (pin->dtest) {
565 			seq_printf(s, "dtest%d\n", pin->dtest);
566 		} else if (pin->input && pin->output) {
567 			if (pin->high_z)
568 				seq_puts(s, "bi-dir high-z");
569 			else
570 				seq_printf(s, "bi-dir %dOhm", pin->pullup);
571 		} else if (pin->input) {
572 			if (pin->dtest)
573 				seq_printf(s, "in dtest%d", pin->dtest);
574 			else
575 				seq_puts(s, "in gpio");
576 		} else if (pin->output) {
577 			seq_puts(s, "out ");
578 
579 			if (!pin->paired) {
580 				seq_puts(s, pin->output_value ?
581 					 "high" : "low");
582 			} else {
583 				seq_puts(s, pin->output_value ?
584 					 "inverted" : "follow");
585 			}
586 		}
587 		break;
588 	case PM8XXX_MPP_ANALOG:
589 		seq_puts(s, " analog ");
590 		if (pin->output) {
591 			seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
592 			if (!pin->paired) {
593 				seq_puts(s, pin->output_value ?
594 					 "high" : "low");
595 			} else {
596 				seq_puts(s, pin->output_value ?
597 					 "inverted" : "follow");
598 			}
599 		} else {
600 			seq_printf(s, "input mux %s", amuxs[pin->amux]);
601 		}
602 		break;
603 	case PM8XXX_MPP_SINK:
604 		seq_printf(s, " sink %dmA ", pin->drive_strength);
605 		if (pin->dtest) {
606 			seq_printf(s, "dtest%d", pin->dtest);
607 		} else {
608 			if (!pin->paired) {
609 				seq_puts(s, pin->output_value ?
610 					 "high" : "low");
611 			} else {
612 				seq_puts(s, pin->output_value ?
613 					 "inverted" : "follow");
614 			}
615 		}
616 		break;
617 	}
618 }
619 
620 static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
621 {
622 	unsigned gpio = chip->base;
623 	unsigned i;
624 
625 	for (i = 0; i < chip->ngpio; i++, gpio++) {
626 		pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
627 		seq_puts(s, "\n");
628 	}
629 }
630 
631 #else
632 #define pm8xxx_mpp_dbg_show NULL
633 #endif
634 
635 static const struct gpio_chip pm8xxx_mpp_template = {
636 	.direction_input = pm8xxx_mpp_direction_input,
637 	.direction_output = pm8xxx_mpp_direction_output,
638 	.get = pm8xxx_mpp_get,
639 	.set = pm8xxx_mpp_set,
640 	.of_xlate = pm8xxx_mpp_of_xlate,
641 	.dbg_show = pm8xxx_mpp_dbg_show,
642 	.owner = THIS_MODULE,
643 };
644 
645 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
646 			       struct pm8xxx_pin_data *pin)
647 {
648 	unsigned int val;
649 	unsigned level;
650 	unsigned ctrl;
651 	unsigned type;
652 	int ret;
653 
654 	ret = regmap_read(pctrl->regmap, pin->reg, &val);
655 	if (ret) {
656 		dev_err(pctrl->dev, "failed to read register\n");
657 		return ret;
658 	}
659 
660 	type = (val >> 5) & 7;
661 	level = (val >> 2) & 7;
662 	ctrl = (val) & 3;
663 
664 	switch (type) {
665 	case PM8XXX_MPP_TYPE_D_INPUT:
666 		pin->mode = PM8XXX_MPP_DIGITAL;
667 		pin->input = true;
668 		pin->power_source = level;
669 		pin->dtest = ctrl;
670 		break;
671 	case PM8XXX_MPP_TYPE_D_OUTPUT:
672 		pin->mode = PM8XXX_MPP_DIGITAL;
673 		pin->output = true;
674 		pin->power_source = level;
675 		pin->output_value = !!(ctrl & BIT(0));
676 		pin->paired = !!(ctrl & BIT(1));
677 		break;
678 	case PM8XXX_MPP_TYPE_D_BI_DIR:
679 		pin->mode = PM8XXX_MPP_DIGITAL;
680 		pin->input = true;
681 		pin->output = true;
682 		pin->power_source = level;
683 		switch (ctrl) {
684 		case PM8XXX_MPP_BI_PULLUP_1KOHM:
685 			pin->pullup = 600;
686 			break;
687 		case PM8XXX_MPP_BI_PULLUP_OPEN:
688 			pin->high_z = true;
689 			break;
690 		case PM8XXX_MPP_BI_PULLUP_10KOHM:
691 			pin->pullup = 10000;
692 			break;
693 		case PM8XXX_MPP_BI_PULLUP_30KOHM:
694 			pin->pullup = 30000;
695 			break;
696 		}
697 		break;
698 	case PM8XXX_MPP_TYPE_A_INPUT:
699 		pin->mode = PM8XXX_MPP_ANALOG;
700 		pin->input = true;
701 		pin->amux = level;
702 		break;
703 	case PM8XXX_MPP_TYPE_A_OUTPUT:
704 		pin->mode = PM8XXX_MPP_ANALOG;
705 		pin->output = true;
706 		pin->aout_level = level;
707 		pin->output_value = !!(ctrl & BIT(0));
708 		pin->paired = !!(ctrl & BIT(1));
709 		break;
710 	case PM8XXX_MPP_TYPE_SINK:
711 		pin->mode = PM8XXX_MPP_SINK;
712 		pin->drive_strength = 5 * (level + 1);
713 		pin->output_value = !!(ctrl & BIT(0));
714 		pin->paired = !!(ctrl & BIT(1));
715 		break;
716 	case PM8XXX_MPP_TYPE_DTEST_SINK:
717 		pin->mode = PM8XXX_MPP_SINK;
718 		pin->dtest = ctrl + 1;
719 		pin->drive_strength = 5 * (level + 1);
720 		break;
721 	case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
722 		pin->mode = PM8XXX_MPP_DIGITAL;
723 		pin->power_source = level;
724 		if (ctrl >= 1)
725 			pin->dtest = ctrl;
726 		break;
727 	}
728 
729 	return 0;
730 }
731 
732 static int pm8xxx_mpp_domain_translate(struct irq_domain *domain,
733 				   struct irq_fwspec *fwspec,
734 				   unsigned long *hwirq,
735 				   unsigned int *type)
736 {
737 	struct pm8xxx_mpp *pctrl = container_of(domain->host_data,
738 						 struct pm8xxx_mpp, chip);
739 
740 	if (fwspec->param_count != 2 ||
741 	    fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET ||
742 	    fwspec->param[0] > pctrl->chip.ngpio)
743 		return -EINVAL;
744 
745 	*hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
746 	*type = fwspec->param[1];
747 
748 	return 0;
749 }
750 
751 static unsigned int pm8xxx_mpp_child_offset_to_irq(struct gpio_chip *chip,
752 						   unsigned int offset)
753 {
754 	return offset + PM8XXX_MPP_PHYSICAL_OFFSET;
755 }
756 
757 static int pm8821_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
758 					    unsigned int child_hwirq,
759 					    unsigned int child_type,
760 					    unsigned int *parent_hwirq,
761 					    unsigned int *parent_type)
762 {
763 	*parent_hwirq = child_hwirq + 24;
764 	*parent_type = child_type;
765 
766 	return 0;
767 }
768 
769 static int pm8xxx_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
770 					    unsigned int child_hwirq,
771 					    unsigned int child_type,
772 					    unsigned int *parent_hwirq,
773 					    unsigned int *parent_type)
774 {
775 	*parent_hwirq = child_hwirq + 0x80;
776 	*parent_type = child_type;
777 
778 	return 0;
779 }
780 
781 static const struct of_device_id pm8xxx_mpp_of_match[] = {
782 	{ .compatible = "qcom,pm8018-mpp", .data = (void *) 6 },
783 	{ .compatible = "qcom,pm8038-mpp", .data = (void *) 6 },
784 	{ .compatible = "qcom,pm8058-mpp", .data = (void *) 12 },
785 	{ .compatible = "qcom,pm8821-mpp", .data = (void *) 4 },
786 	{ .compatible = "qcom,pm8917-mpp", .data = (void *) 10 },
787 	{ .compatible = "qcom,pm8921-mpp", .data = (void *) 12 },
788 	{ },
789 };
790 MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
791 
792 static int pm8xxx_mpp_probe(struct platform_device *pdev)
793 {
794 	struct pm8xxx_pin_data *pin_data;
795 	struct irq_domain *parent_domain;
796 	struct device_node *parent_node;
797 	struct pinctrl_pin_desc *pins;
798 	struct gpio_irq_chip *girq;
799 	struct pm8xxx_mpp *pctrl;
800 	int ret;
801 	int i;
802 
803 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
804 	if (!pctrl)
805 		return -ENOMEM;
806 
807 	pctrl->dev = &pdev->dev;
808 	pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);
809 
810 	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
811 	if (!pctrl->regmap) {
812 		dev_err(&pdev->dev, "parent regmap unavailable\n");
813 		return -ENXIO;
814 	}
815 
816 	pctrl->desc = pm8xxx_pinctrl_desc;
817 	pctrl->desc.npins = pctrl->npins;
818 
819 	pins = devm_kcalloc(&pdev->dev,
820 			    pctrl->desc.npins,
821 			    sizeof(struct pinctrl_pin_desc),
822 			    GFP_KERNEL);
823 	if (!pins)
824 		return -ENOMEM;
825 
826 	pin_data = devm_kcalloc(&pdev->dev,
827 				pctrl->desc.npins,
828 				sizeof(struct pm8xxx_pin_data),
829 				GFP_KERNEL);
830 	if (!pin_data)
831 		return -ENOMEM;
832 
833 	for (i = 0; i < pctrl->desc.npins; i++) {
834 		pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
835 
836 		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
837 		if (ret)
838 			return ret;
839 
840 		pins[i].number = i;
841 		pins[i].name = pm8xxx_groups[i];
842 		pins[i].drv_data = &pin_data[i];
843 	}
844 	pctrl->desc.pins = pins;
845 
846 	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
847 	pctrl->desc.custom_params = pm8xxx_mpp_bindings;
848 #ifdef CONFIG_DEBUG_FS
849 	pctrl->desc.custom_conf_items = pm8xxx_conf_items;
850 #endif
851 
852 	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
853 	if (IS_ERR(pctrl->pctrl)) {
854 		dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
855 		return PTR_ERR(pctrl->pctrl);
856 	}
857 
858 	pctrl->chip = pm8xxx_mpp_template;
859 	pctrl->chip.base = -1;
860 	pctrl->chip.parent = &pdev->dev;
861 	pctrl->chip.of_gpio_n_cells = 2;
862 	pctrl->chip.label = dev_name(pctrl->dev);
863 	pctrl->chip.ngpio = pctrl->npins;
864 
865 	parent_node = of_irq_find_parent(pctrl->dev->of_node);
866 	if (!parent_node)
867 		return -ENXIO;
868 
869 	parent_domain = irq_find_host(parent_node);
870 	of_node_put(parent_node);
871 	if (!parent_domain)
872 		return -ENXIO;
873 
874 	pctrl->irq.name = "ssbi-mpp";
875 	pctrl->irq.irq_mask_ack = irq_chip_mask_ack_parent;
876 	pctrl->irq.irq_unmask = irq_chip_unmask_parent;
877 	pctrl->irq.irq_set_type = irq_chip_set_type_parent;
878 	pctrl->irq.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
879 
880 	girq = &pctrl->chip.irq;
881 	girq->chip = &pctrl->irq;
882 	girq->default_type = IRQ_TYPE_NONE;
883 	girq->handler = handle_level_irq;
884 	girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
885 	girq->parent_domain = parent_domain;
886 	if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp"))
887 		girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq;
888 	else
889 		girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq;
890 	girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell;
891 	girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq;
892 	girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate;
893 
894 	ret = gpiochip_add_data(&pctrl->chip, pctrl);
895 	if (ret) {
896 		dev_err(&pdev->dev, "failed register gpiochip\n");
897 		return ret;
898 	}
899 
900 	ret = gpiochip_add_pin_range(&pctrl->chip,
901 				     dev_name(pctrl->dev),
902 				     0, 0, pctrl->chip.ngpio);
903 	if (ret) {
904 		dev_err(pctrl->dev, "failed to add pin range\n");
905 		goto unregister_gpiochip;
906 	}
907 
908 	platform_set_drvdata(pdev, pctrl);
909 
910 	dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
911 
912 	return 0;
913 
914 unregister_gpiochip:
915 	gpiochip_remove(&pctrl->chip);
916 
917 	return ret;
918 }
919 
920 static int pm8xxx_mpp_remove(struct platform_device *pdev)
921 {
922 	struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
923 
924 	gpiochip_remove(&pctrl->chip);
925 
926 	return 0;
927 }
928 
929 static struct platform_driver pm8xxx_mpp_driver = {
930 	.driver = {
931 		.name = "qcom-ssbi-mpp",
932 		.of_match_table = pm8xxx_mpp_of_match,
933 	},
934 	.probe = pm8xxx_mpp_probe,
935 	.remove = pm8xxx_mpp_remove,
936 };
937 
938 module_platform_driver(pm8xxx_mpp_driver);
939 
940 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
941 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
942 MODULE_LICENSE("GPL v2");
943