1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2021, Linaro Limited 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 #include <linux/pinctrl/pinctrl.h> 11 12 #include "pinctrl-msm.h" 13 14 #define FUNCTION(fname) \ 15 [msm_mux_##fname] = { \ 16 .name = #fname, \ 17 .groups = fname##_groups, \ 18 .ngroups = ARRAY_SIZE(fname##_groups), \ 19 } 20 21 #define REG_SIZE 0x1000 22 23 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 24 { \ 25 .name = "gpio" #id, \ 26 .pins = gpio##id##_pins, \ 27 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \ 28 .funcs = (int[]){ \ 29 msm_mux_gpio, /* gpio mode */ \ 30 msm_mux_##f1, \ 31 msm_mux_##f2, \ 32 msm_mux_##f3, \ 33 msm_mux_##f4, \ 34 msm_mux_##f5, \ 35 msm_mux_##f6, \ 36 msm_mux_##f7, \ 37 msm_mux_##f8, \ 38 msm_mux_##f9 \ 39 }, \ 40 .nfuncs = 10, \ 41 .ctl_reg = REG_SIZE * id, \ 42 .io_reg = REG_SIZE * id + 0x4, \ 43 .intr_cfg_reg = REG_SIZE * id + 0x8, \ 44 .intr_status_reg = REG_SIZE * id + 0xc, \ 45 .intr_target_reg = REG_SIZE * id + 0x8, \ 46 .mux_bit = 2, \ 47 .pull_bit = 0, \ 48 .drv_bit = 6, \ 49 .oe_bit = 9, \ 50 .in_bit = 0, \ 51 .out_bit = 1, \ 52 .intr_enable_bit = 0, \ 53 .intr_status_bit = 0, \ 54 .intr_target_bit = 5, \ 55 .intr_target_kpss_val = 3, \ 56 .intr_raw_status_bit = 4, \ 57 .intr_polarity_bit = 1, \ 58 .intr_detection_bit = 2, \ 59 .intr_detection_width = 2, \ 60 } 61 62 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 63 { \ 64 .name = #pg_name, \ 65 .pins = pg_name##_pins, \ 66 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 67 .ctl_reg = ctl, \ 68 .io_reg = 0, \ 69 .intr_cfg_reg = 0, \ 70 .intr_status_reg = 0, \ 71 .intr_target_reg = 0, \ 72 .mux_bit = -1, \ 73 .pull_bit = pull, \ 74 .drv_bit = drv, \ 75 .oe_bit = -1, \ 76 .in_bit = -1, \ 77 .out_bit = -1, \ 78 .intr_enable_bit = -1, \ 79 .intr_status_bit = -1, \ 80 .intr_target_bit = -1, \ 81 .intr_raw_status_bit = -1, \ 82 .intr_polarity_bit = -1, \ 83 .intr_detection_bit = -1, \ 84 .intr_detection_width = -1, \ 85 } 86 87 #define UFS_RESET(pg_name, offset) \ 88 { \ 89 .name = #pg_name, \ 90 .pins = pg_name##_pins, \ 91 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 92 .ctl_reg = offset, \ 93 .io_reg = offset + 0x4, \ 94 .intr_cfg_reg = 0, \ 95 .intr_status_reg = 0, \ 96 .intr_target_reg = 0, \ 97 .mux_bit = -1, \ 98 .pull_bit = 3, \ 99 .drv_bit = 0, \ 100 .oe_bit = -1, \ 101 .in_bit = -1, \ 102 .out_bit = 0, \ 103 .intr_enable_bit = -1, \ 104 .intr_status_bit = -1, \ 105 .intr_target_bit = -1, \ 106 .intr_raw_status_bit = -1, \ 107 .intr_polarity_bit = -1, \ 108 .intr_detection_bit = -1, \ 109 .intr_detection_width = -1, \ 110 } 111 112 static const struct pinctrl_pin_desc sm8350_pins[] = { 113 PINCTRL_PIN(0, "GPIO_0"), 114 PINCTRL_PIN(1, "GPIO_1"), 115 PINCTRL_PIN(2, "GPIO_2"), 116 PINCTRL_PIN(3, "GPIO_3"), 117 PINCTRL_PIN(4, "GPIO_4"), 118 PINCTRL_PIN(5, "GPIO_5"), 119 PINCTRL_PIN(6, "GPIO_6"), 120 PINCTRL_PIN(7, "GPIO_7"), 121 PINCTRL_PIN(8, "GPIO_8"), 122 PINCTRL_PIN(9, "GPIO_9"), 123 PINCTRL_PIN(10, "GPIO_10"), 124 PINCTRL_PIN(11, "GPIO_11"), 125 PINCTRL_PIN(12, "GPIO_12"), 126 PINCTRL_PIN(13, "GPIO_13"), 127 PINCTRL_PIN(14, "GPIO_14"), 128 PINCTRL_PIN(15, "GPIO_15"), 129 PINCTRL_PIN(16, "GPIO_16"), 130 PINCTRL_PIN(17, "GPIO_17"), 131 PINCTRL_PIN(18, "GPIO_18"), 132 PINCTRL_PIN(19, "GPIO_19"), 133 PINCTRL_PIN(20, "GPIO_20"), 134 PINCTRL_PIN(21, "GPIO_21"), 135 PINCTRL_PIN(22, "GPIO_22"), 136 PINCTRL_PIN(23, "GPIO_23"), 137 PINCTRL_PIN(24, "GPIO_24"), 138 PINCTRL_PIN(25, "GPIO_25"), 139 PINCTRL_PIN(26, "GPIO_26"), 140 PINCTRL_PIN(27, "GPIO_27"), 141 PINCTRL_PIN(28, "GPIO_28"), 142 PINCTRL_PIN(29, "GPIO_29"), 143 PINCTRL_PIN(30, "GPIO_30"), 144 PINCTRL_PIN(31, "GPIO_31"), 145 PINCTRL_PIN(32, "GPIO_32"), 146 PINCTRL_PIN(33, "GPIO_33"), 147 PINCTRL_PIN(34, "GPIO_34"), 148 PINCTRL_PIN(35, "GPIO_35"), 149 PINCTRL_PIN(36, "GPIO_36"), 150 PINCTRL_PIN(37, "GPIO_37"), 151 PINCTRL_PIN(38, "GPIO_38"), 152 PINCTRL_PIN(39, "GPIO_39"), 153 PINCTRL_PIN(40, "GPIO_40"), 154 PINCTRL_PIN(41, "GPIO_41"), 155 PINCTRL_PIN(42, "GPIO_42"), 156 PINCTRL_PIN(43, "GPIO_43"), 157 PINCTRL_PIN(44, "GPIO_44"), 158 PINCTRL_PIN(45, "GPIO_45"), 159 PINCTRL_PIN(46, "GPIO_46"), 160 PINCTRL_PIN(47, "GPIO_47"), 161 PINCTRL_PIN(48, "GPIO_48"), 162 PINCTRL_PIN(49, "GPIO_49"), 163 PINCTRL_PIN(50, "GPIO_50"), 164 PINCTRL_PIN(51, "GPIO_51"), 165 PINCTRL_PIN(52, "GPIO_52"), 166 PINCTRL_PIN(53, "GPIO_53"), 167 PINCTRL_PIN(54, "GPIO_54"), 168 PINCTRL_PIN(55, "GPIO_55"), 169 PINCTRL_PIN(56, "GPIO_56"), 170 PINCTRL_PIN(57, "GPIO_57"), 171 PINCTRL_PIN(58, "GPIO_58"), 172 PINCTRL_PIN(59, "GPIO_59"), 173 PINCTRL_PIN(60, "GPIO_60"), 174 PINCTRL_PIN(61, "GPIO_61"), 175 PINCTRL_PIN(62, "GPIO_62"), 176 PINCTRL_PIN(63, "GPIO_63"), 177 PINCTRL_PIN(64, "GPIO_64"), 178 PINCTRL_PIN(65, "GPIO_65"), 179 PINCTRL_PIN(66, "GPIO_66"), 180 PINCTRL_PIN(67, "GPIO_67"), 181 PINCTRL_PIN(68, "GPIO_68"), 182 PINCTRL_PIN(69, "GPIO_69"), 183 PINCTRL_PIN(70, "GPIO_70"), 184 PINCTRL_PIN(71, "GPIO_71"), 185 PINCTRL_PIN(72, "GPIO_72"), 186 PINCTRL_PIN(73, "GPIO_73"), 187 PINCTRL_PIN(74, "GPIO_74"), 188 PINCTRL_PIN(75, "GPIO_75"), 189 PINCTRL_PIN(76, "GPIO_76"), 190 PINCTRL_PIN(77, "GPIO_77"), 191 PINCTRL_PIN(78, "GPIO_78"), 192 PINCTRL_PIN(79, "GPIO_79"), 193 PINCTRL_PIN(80, "GPIO_80"), 194 PINCTRL_PIN(81, "GPIO_81"), 195 PINCTRL_PIN(82, "GPIO_82"), 196 PINCTRL_PIN(83, "GPIO_83"), 197 PINCTRL_PIN(84, "GPIO_84"), 198 PINCTRL_PIN(85, "GPIO_85"), 199 PINCTRL_PIN(86, "GPIO_86"), 200 PINCTRL_PIN(87, "GPIO_87"), 201 PINCTRL_PIN(88, "GPIO_88"), 202 PINCTRL_PIN(89, "GPIO_89"), 203 PINCTRL_PIN(90, "GPIO_90"), 204 PINCTRL_PIN(91, "GPIO_91"), 205 PINCTRL_PIN(92, "GPIO_92"), 206 PINCTRL_PIN(93, "GPIO_93"), 207 PINCTRL_PIN(94, "GPIO_94"), 208 PINCTRL_PIN(95, "GPIO_95"), 209 PINCTRL_PIN(96, "GPIO_96"), 210 PINCTRL_PIN(97, "GPIO_97"), 211 PINCTRL_PIN(98, "GPIO_98"), 212 PINCTRL_PIN(99, "GPIO_99"), 213 PINCTRL_PIN(100, "GPIO_100"), 214 PINCTRL_PIN(101, "GPIO_101"), 215 PINCTRL_PIN(102, "GPIO_102"), 216 PINCTRL_PIN(103, "GPIO_103"), 217 PINCTRL_PIN(104, "GPIO_104"), 218 PINCTRL_PIN(105, "GPIO_105"), 219 PINCTRL_PIN(106, "GPIO_106"), 220 PINCTRL_PIN(107, "GPIO_107"), 221 PINCTRL_PIN(108, "GPIO_108"), 222 PINCTRL_PIN(109, "GPIO_109"), 223 PINCTRL_PIN(110, "GPIO_110"), 224 PINCTRL_PIN(111, "GPIO_111"), 225 PINCTRL_PIN(112, "GPIO_112"), 226 PINCTRL_PIN(113, "GPIO_113"), 227 PINCTRL_PIN(114, "GPIO_114"), 228 PINCTRL_PIN(115, "GPIO_115"), 229 PINCTRL_PIN(116, "GPIO_116"), 230 PINCTRL_PIN(117, "GPIO_117"), 231 PINCTRL_PIN(118, "GPIO_118"), 232 PINCTRL_PIN(119, "GPIO_119"), 233 PINCTRL_PIN(120, "GPIO_120"), 234 PINCTRL_PIN(121, "GPIO_121"), 235 PINCTRL_PIN(122, "GPIO_122"), 236 PINCTRL_PIN(123, "GPIO_123"), 237 PINCTRL_PIN(124, "GPIO_124"), 238 PINCTRL_PIN(125, "GPIO_125"), 239 PINCTRL_PIN(126, "GPIO_126"), 240 PINCTRL_PIN(127, "GPIO_127"), 241 PINCTRL_PIN(128, "GPIO_128"), 242 PINCTRL_PIN(129, "GPIO_129"), 243 PINCTRL_PIN(130, "GPIO_130"), 244 PINCTRL_PIN(131, "GPIO_131"), 245 PINCTRL_PIN(132, "GPIO_132"), 246 PINCTRL_PIN(133, "GPIO_133"), 247 PINCTRL_PIN(134, "GPIO_134"), 248 PINCTRL_PIN(135, "GPIO_135"), 249 PINCTRL_PIN(136, "GPIO_136"), 250 PINCTRL_PIN(137, "GPIO_137"), 251 PINCTRL_PIN(138, "GPIO_138"), 252 PINCTRL_PIN(139, "GPIO_139"), 253 PINCTRL_PIN(140, "GPIO_140"), 254 PINCTRL_PIN(141, "GPIO_141"), 255 PINCTRL_PIN(142, "GPIO_142"), 256 PINCTRL_PIN(143, "GPIO_143"), 257 PINCTRL_PIN(144, "GPIO_144"), 258 PINCTRL_PIN(145, "GPIO_145"), 259 PINCTRL_PIN(146, "GPIO_146"), 260 PINCTRL_PIN(147, "GPIO_147"), 261 PINCTRL_PIN(148, "GPIO_148"), 262 PINCTRL_PIN(149, "GPIO_149"), 263 PINCTRL_PIN(150, "GPIO_150"), 264 PINCTRL_PIN(151, "GPIO_151"), 265 PINCTRL_PIN(152, "GPIO_152"), 266 PINCTRL_PIN(153, "GPIO_153"), 267 PINCTRL_PIN(154, "GPIO_154"), 268 PINCTRL_PIN(155, "GPIO_155"), 269 PINCTRL_PIN(156, "GPIO_156"), 270 PINCTRL_PIN(157, "GPIO_157"), 271 PINCTRL_PIN(158, "GPIO_158"), 272 PINCTRL_PIN(159, "GPIO_159"), 273 PINCTRL_PIN(160, "GPIO_160"), 274 PINCTRL_PIN(161, "GPIO_161"), 275 PINCTRL_PIN(162, "GPIO_162"), 276 PINCTRL_PIN(163, "GPIO_163"), 277 PINCTRL_PIN(164, "GPIO_164"), 278 PINCTRL_PIN(165, "GPIO_165"), 279 PINCTRL_PIN(166, "GPIO_166"), 280 PINCTRL_PIN(167, "GPIO_167"), 281 PINCTRL_PIN(168, "GPIO_168"), 282 PINCTRL_PIN(169, "GPIO_169"), 283 PINCTRL_PIN(170, "GPIO_170"), 284 PINCTRL_PIN(171, "GPIO_171"), 285 PINCTRL_PIN(172, "GPIO_172"), 286 PINCTRL_PIN(173, "GPIO_173"), 287 PINCTRL_PIN(174, "GPIO_174"), 288 PINCTRL_PIN(175, "GPIO_175"), 289 PINCTRL_PIN(176, "GPIO_176"), 290 PINCTRL_PIN(177, "GPIO_177"), 291 PINCTRL_PIN(178, "GPIO_178"), 292 PINCTRL_PIN(179, "GPIO_179"), 293 PINCTRL_PIN(180, "GPIO_180"), 294 PINCTRL_PIN(181, "GPIO_181"), 295 PINCTRL_PIN(182, "GPIO_182"), 296 PINCTRL_PIN(183, "GPIO_183"), 297 PINCTRL_PIN(184, "GPIO_184"), 298 PINCTRL_PIN(185, "GPIO_185"), 299 PINCTRL_PIN(186, "GPIO_186"), 300 PINCTRL_PIN(187, "GPIO_187"), 301 PINCTRL_PIN(188, "GPIO_188"), 302 PINCTRL_PIN(189, "GPIO_189"), 303 PINCTRL_PIN(190, "GPIO_190"), 304 PINCTRL_PIN(191, "GPIO_191"), 305 PINCTRL_PIN(192, "GPIO_192"), 306 PINCTRL_PIN(193, "GPIO_193"), 307 PINCTRL_PIN(194, "GPIO_194"), 308 PINCTRL_PIN(195, "GPIO_195"), 309 PINCTRL_PIN(196, "GPIO_196"), 310 PINCTRL_PIN(197, "GPIO_197"), 311 PINCTRL_PIN(198, "GPIO_198"), 312 PINCTRL_PIN(199, "GPIO_199"), 313 PINCTRL_PIN(200, "GPIO_200"), 314 PINCTRL_PIN(201, "GPIO_201"), 315 PINCTRL_PIN(202, "GPIO_202"), 316 PINCTRL_PIN(203, "UFS_RESET"), 317 PINCTRL_PIN(204, "SDC2_CLK"), 318 PINCTRL_PIN(205, "SDC2_CMD"), 319 PINCTRL_PIN(206, "SDC2_DATA"), 320 }; 321 322 #define DECLARE_MSM_GPIO_PINS(pin) \ 323 static const unsigned int gpio##pin##_pins[] = { pin } 324 DECLARE_MSM_GPIO_PINS(0); 325 DECLARE_MSM_GPIO_PINS(1); 326 DECLARE_MSM_GPIO_PINS(2); 327 DECLARE_MSM_GPIO_PINS(3); 328 DECLARE_MSM_GPIO_PINS(4); 329 DECLARE_MSM_GPIO_PINS(5); 330 DECLARE_MSM_GPIO_PINS(6); 331 DECLARE_MSM_GPIO_PINS(7); 332 DECLARE_MSM_GPIO_PINS(8); 333 DECLARE_MSM_GPIO_PINS(9); 334 DECLARE_MSM_GPIO_PINS(10); 335 DECLARE_MSM_GPIO_PINS(11); 336 DECLARE_MSM_GPIO_PINS(12); 337 DECLARE_MSM_GPIO_PINS(13); 338 DECLARE_MSM_GPIO_PINS(14); 339 DECLARE_MSM_GPIO_PINS(15); 340 DECLARE_MSM_GPIO_PINS(16); 341 DECLARE_MSM_GPIO_PINS(17); 342 DECLARE_MSM_GPIO_PINS(18); 343 DECLARE_MSM_GPIO_PINS(19); 344 DECLARE_MSM_GPIO_PINS(20); 345 DECLARE_MSM_GPIO_PINS(21); 346 DECLARE_MSM_GPIO_PINS(22); 347 DECLARE_MSM_GPIO_PINS(23); 348 DECLARE_MSM_GPIO_PINS(24); 349 DECLARE_MSM_GPIO_PINS(25); 350 DECLARE_MSM_GPIO_PINS(26); 351 DECLARE_MSM_GPIO_PINS(27); 352 DECLARE_MSM_GPIO_PINS(28); 353 DECLARE_MSM_GPIO_PINS(29); 354 DECLARE_MSM_GPIO_PINS(30); 355 DECLARE_MSM_GPIO_PINS(31); 356 DECLARE_MSM_GPIO_PINS(32); 357 DECLARE_MSM_GPIO_PINS(33); 358 DECLARE_MSM_GPIO_PINS(34); 359 DECLARE_MSM_GPIO_PINS(35); 360 DECLARE_MSM_GPIO_PINS(36); 361 DECLARE_MSM_GPIO_PINS(37); 362 DECLARE_MSM_GPIO_PINS(38); 363 DECLARE_MSM_GPIO_PINS(39); 364 DECLARE_MSM_GPIO_PINS(40); 365 DECLARE_MSM_GPIO_PINS(41); 366 DECLARE_MSM_GPIO_PINS(42); 367 DECLARE_MSM_GPIO_PINS(43); 368 DECLARE_MSM_GPIO_PINS(44); 369 DECLARE_MSM_GPIO_PINS(45); 370 DECLARE_MSM_GPIO_PINS(46); 371 DECLARE_MSM_GPIO_PINS(47); 372 DECLARE_MSM_GPIO_PINS(48); 373 DECLARE_MSM_GPIO_PINS(49); 374 DECLARE_MSM_GPIO_PINS(50); 375 DECLARE_MSM_GPIO_PINS(51); 376 DECLARE_MSM_GPIO_PINS(52); 377 DECLARE_MSM_GPIO_PINS(53); 378 DECLARE_MSM_GPIO_PINS(54); 379 DECLARE_MSM_GPIO_PINS(55); 380 DECLARE_MSM_GPIO_PINS(56); 381 DECLARE_MSM_GPIO_PINS(57); 382 DECLARE_MSM_GPIO_PINS(58); 383 DECLARE_MSM_GPIO_PINS(59); 384 DECLARE_MSM_GPIO_PINS(60); 385 DECLARE_MSM_GPIO_PINS(61); 386 DECLARE_MSM_GPIO_PINS(62); 387 DECLARE_MSM_GPIO_PINS(63); 388 DECLARE_MSM_GPIO_PINS(64); 389 DECLARE_MSM_GPIO_PINS(65); 390 DECLARE_MSM_GPIO_PINS(66); 391 DECLARE_MSM_GPIO_PINS(67); 392 DECLARE_MSM_GPIO_PINS(68); 393 DECLARE_MSM_GPIO_PINS(69); 394 DECLARE_MSM_GPIO_PINS(70); 395 DECLARE_MSM_GPIO_PINS(71); 396 DECLARE_MSM_GPIO_PINS(72); 397 DECLARE_MSM_GPIO_PINS(73); 398 DECLARE_MSM_GPIO_PINS(74); 399 DECLARE_MSM_GPIO_PINS(75); 400 DECLARE_MSM_GPIO_PINS(76); 401 DECLARE_MSM_GPIO_PINS(77); 402 DECLARE_MSM_GPIO_PINS(78); 403 DECLARE_MSM_GPIO_PINS(79); 404 DECLARE_MSM_GPIO_PINS(80); 405 DECLARE_MSM_GPIO_PINS(81); 406 DECLARE_MSM_GPIO_PINS(82); 407 DECLARE_MSM_GPIO_PINS(83); 408 DECLARE_MSM_GPIO_PINS(84); 409 DECLARE_MSM_GPIO_PINS(85); 410 DECLARE_MSM_GPIO_PINS(86); 411 DECLARE_MSM_GPIO_PINS(87); 412 DECLARE_MSM_GPIO_PINS(88); 413 DECLARE_MSM_GPIO_PINS(89); 414 DECLARE_MSM_GPIO_PINS(90); 415 DECLARE_MSM_GPIO_PINS(91); 416 DECLARE_MSM_GPIO_PINS(92); 417 DECLARE_MSM_GPIO_PINS(93); 418 DECLARE_MSM_GPIO_PINS(94); 419 DECLARE_MSM_GPIO_PINS(95); 420 DECLARE_MSM_GPIO_PINS(96); 421 DECLARE_MSM_GPIO_PINS(97); 422 DECLARE_MSM_GPIO_PINS(98); 423 DECLARE_MSM_GPIO_PINS(99); 424 DECLARE_MSM_GPIO_PINS(100); 425 DECLARE_MSM_GPIO_PINS(101); 426 DECLARE_MSM_GPIO_PINS(102); 427 DECLARE_MSM_GPIO_PINS(103); 428 DECLARE_MSM_GPIO_PINS(104); 429 DECLARE_MSM_GPIO_PINS(105); 430 DECLARE_MSM_GPIO_PINS(106); 431 DECLARE_MSM_GPIO_PINS(107); 432 DECLARE_MSM_GPIO_PINS(108); 433 DECLARE_MSM_GPIO_PINS(109); 434 DECLARE_MSM_GPIO_PINS(110); 435 DECLARE_MSM_GPIO_PINS(111); 436 DECLARE_MSM_GPIO_PINS(112); 437 DECLARE_MSM_GPIO_PINS(113); 438 DECLARE_MSM_GPIO_PINS(114); 439 DECLARE_MSM_GPIO_PINS(115); 440 DECLARE_MSM_GPIO_PINS(116); 441 DECLARE_MSM_GPIO_PINS(117); 442 DECLARE_MSM_GPIO_PINS(118); 443 DECLARE_MSM_GPIO_PINS(119); 444 DECLARE_MSM_GPIO_PINS(120); 445 DECLARE_MSM_GPIO_PINS(121); 446 DECLARE_MSM_GPIO_PINS(122); 447 DECLARE_MSM_GPIO_PINS(123); 448 DECLARE_MSM_GPIO_PINS(124); 449 DECLARE_MSM_GPIO_PINS(125); 450 DECLARE_MSM_GPIO_PINS(126); 451 DECLARE_MSM_GPIO_PINS(127); 452 DECLARE_MSM_GPIO_PINS(128); 453 DECLARE_MSM_GPIO_PINS(129); 454 DECLARE_MSM_GPIO_PINS(130); 455 DECLARE_MSM_GPIO_PINS(131); 456 DECLARE_MSM_GPIO_PINS(132); 457 DECLARE_MSM_GPIO_PINS(133); 458 DECLARE_MSM_GPIO_PINS(134); 459 DECLARE_MSM_GPIO_PINS(135); 460 DECLARE_MSM_GPIO_PINS(136); 461 DECLARE_MSM_GPIO_PINS(137); 462 DECLARE_MSM_GPIO_PINS(138); 463 DECLARE_MSM_GPIO_PINS(139); 464 DECLARE_MSM_GPIO_PINS(140); 465 DECLARE_MSM_GPIO_PINS(141); 466 DECLARE_MSM_GPIO_PINS(142); 467 DECLARE_MSM_GPIO_PINS(143); 468 DECLARE_MSM_GPIO_PINS(144); 469 DECLARE_MSM_GPIO_PINS(145); 470 DECLARE_MSM_GPIO_PINS(146); 471 DECLARE_MSM_GPIO_PINS(147); 472 DECLARE_MSM_GPIO_PINS(148); 473 DECLARE_MSM_GPIO_PINS(149); 474 DECLARE_MSM_GPIO_PINS(150); 475 DECLARE_MSM_GPIO_PINS(151); 476 DECLARE_MSM_GPIO_PINS(152); 477 DECLARE_MSM_GPIO_PINS(153); 478 DECLARE_MSM_GPIO_PINS(154); 479 DECLARE_MSM_GPIO_PINS(155); 480 DECLARE_MSM_GPIO_PINS(156); 481 DECLARE_MSM_GPIO_PINS(157); 482 DECLARE_MSM_GPIO_PINS(158); 483 DECLARE_MSM_GPIO_PINS(159); 484 DECLARE_MSM_GPIO_PINS(160); 485 DECLARE_MSM_GPIO_PINS(161); 486 DECLARE_MSM_GPIO_PINS(162); 487 DECLARE_MSM_GPIO_PINS(163); 488 DECLARE_MSM_GPIO_PINS(164); 489 DECLARE_MSM_GPIO_PINS(165); 490 DECLARE_MSM_GPIO_PINS(166); 491 DECLARE_MSM_GPIO_PINS(167); 492 DECLARE_MSM_GPIO_PINS(168); 493 DECLARE_MSM_GPIO_PINS(169); 494 DECLARE_MSM_GPIO_PINS(170); 495 DECLARE_MSM_GPIO_PINS(171); 496 DECLARE_MSM_GPIO_PINS(172); 497 DECLARE_MSM_GPIO_PINS(173); 498 DECLARE_MSM_GPIO_PINS(174); 499 DECLARE_MSM_GPIO_PINS(175); 500 DECLARE_MSM_GPIO_PINS(176); 501 DECLARE_MSM_GPIO_PINS(177); 502 DECLARE_MSM_GPIO_PINS(178); 503 DECLARE_MSM_GPIO_PINS(179); 504 DECLARE_MSM_GPIO_PINS(180); 505 DECLARE_MSM_GPIO_PINS(181); 506 DECLARE_MSM_GPIO_PINS(182); 507 DECLARE_MSM_GPIO_PINS(183); 508 DECLARE_MSM_GPIO_PINS(184); 509 DECLARE_MSM_GPIO_PINS(185); 510 DECLARE_MSM_GPIO_PINS(186); 511 DECLARE_MSM_GPIO_PINS(187); 512 DECLARE_MSM_GPIO_PINS(188); 513 DECLARE_MSM_GPIO_PINS(189); 514 DECLARE_MSM_GPIO_PINS(190); 515 DECLARE_MSM_GPIO_PINS(191); 516 DECLARE_MSM_GPIO_PINS(192); 517 DECLARE_MSM_GPIO_PINS(193); 518 DECLARE_MSM_GPIO_PINS(194); 519 DECLARE_MSM_GPIO_PINS(195); 520 DECLARE_MSM_GPIO_PINS(196); 521 DECLARE_MSM_GPIO_PINS(197); 522 DECLARE_MSM_GPIO_PINS(198); 523 DECLARE_MSM_GPIO_PINS(199); 524 DECLARE_MSM_GPIO_PINS(200); 525 DECLARE_MSM_GPIO_PINS(201); 526 DECLARE_MSM_GPIO_PINS(202); 527 528 static const unsigned int ufs_reset_pins[] = { 203 }; 529 static const unsigned int sdc2_clk_pins[] = { 204 }; 530 static const unsigned int sdc2_cmd_pins[] = { 205 }; 531 static const unsigned int sdc2_data_pins[] = { 206 }; 532 533 enum sm8350_functions { 534 msm_mux_atest_char, 535 msm_mux_atest_usb, 536 msm_mux_audio_ref, 537 msm_mux_cam_mclk, 538 msm_mux_cci_async, 539 msm_mux_cci_i2c, 540 msm_mux_cci_timer, 541 msm_mux_cmu_rng, 542 msm_mux_coex_uart1, 543 msm_mux_coex_uart2, 544 msm_mux_cri_trng, 545 msm_mux_cri_trng0, 546 msm_mux_cri_trng1, 547 msm_mux_dbg_out, 548 msm_mux_ddr_bist, 549 msm_mux_ddr_pxi0, 550 msm_mux_ddr_pxi1, 551 msm_mux_ddr_pxi2, 552 msm_mux_ddr_pxi3, 553 msm_mux_dp_hot, 554 msm_mux_dp_lcd, 555 msm_mux_gcc_gp1, 556 msm_mux_gcc_gp2, 557 msm_mux_gcc_gp3, 558 msm_mux_gpio, 559 msm_mux_ibi_i3c, 560 msm_mux_jitter_bist, 561 msm_mux_lpass_slimbus, 562 msm_mux_mdp_vsync, 563 msm_mux_mdp_vsync0, 564 msm_mux_mdp_vsync1, 565 msm_mux_mdp_vsync2, 566 msm_mux_mdp_vsync3, 567 msm_mux_mi2s0_data0, 568 msm_mux_mi2s0_data1, 569 msm_mux_mi2s0_sck, 570 msm_mux_mi2s0_ws, 571 msm_mux_mi2s1_data0, 572 msm_mux_mi2s1_data1, 573 msm_mux_mi2s1_sck, 574 msm_mux_mi2s1_ws, 575 msm_mux_mi2s2_data0, 576 msm_mux_mi2s2_data1, 577 msm_mux_mi2s2_sck, 578 msm_mux_mi2s2_ws, 579 msm_mux_mss_grfc0, 580 msm_mux_mss_grfc1, 581 msm_mux_mss_grfc10, 582 msm_mux_mss_grfc11, 583 msm_mux_mss_grfc12, 584 msm_mux_mss_grfc2, 585 msm_mux_mss_grfc3, 586 msm_mux_mss_grfc4, 587 msm_mux_mss_grfc5, 588 msm_mux_mss_grfc6, 589 msm_mux_mss_grfc7, 590 msm_mux_mss_grfc8, 591 msm_mux_mss_grfc9, 592 msm_mux_nav_gpio, 593 msm_mux_pa_indicator, 594 msm_mux_pcie0_clkreqn, 595 msm_mux_pcie1_clkreqn, 596 msm_mux_phase_flag, 597 msm_mux_pll_bist, 598 msm_mux_pll_clk, 599 msm_mux_pri_mi2s, 600 msm_mux_prng_rosc, 601 msm_mux_qdss_cti, 602 msm_mux_qdss_gpio, 603 msm_mux_qlink0_enable, 604 msm_mux_qlink0_request, 605 msm_mux_qlink0_wmss, 606 msm_mux_qlink1_enable, 607 msm_mux_qlink1_request, 608 msm_mux_qlink1_wmss, 609 msm_mux_qlink2_enable, 610 msm_mux_qlink2_request, 611 msm_mux_qlink2_wmss, 612 msm_mux_qspi0, 613 msm_mux_qspi1, 614 msm_mux_qspi2, 615 msm_mux_qspi3, 616 msm_mux_qspi_clk, 617 msm_mux_qspi_cs, 618 msm_mux_qup0, 619 msm_mux_qup1, 620 msm_mux_qup10, 621 msm_mux_qup11, 622 msm_mux_qup12, 623 msm_mux_qup13, 624 msm_mux_qup14, 625 msm_mux_qup15, 626 msm_mux_qup16, 627 msm_mux_qup17, 628 msm_mux_qup18, 629 msm_mux_qup19, 630 msm_mux_qup2, 631 msm_mux_qup3, 632 msm_mux_qup4, 633 msm_mux_qup5, 634 msm_mux_qup6, 635 msm_mux_qup7, 636 msm_mux_qup8, 637 msm_mux_qup9, 638 msm_mux_qup_l4, 639 msm_mux_qup_l5, 640 msm_mux_qup_l6, 641 msm_mux_sd_write, 642 msm_mux_sdc40, 643 msm_mux_sdc41, 644 msm_mux_sdc42, 645 msm_mux_sdc43, 646 msm_mux_sdc4_clk, 647 msm_mux_sdc4_cmd, 648 msm_mux_sec_mi2s, 649 msm_mux_tb_trig, 650 msm_mux_tgu_ch0, 651 msm_mux_tgu_ch1, 652 msm_mux_tgu_ch2, 653 msm_mux_tgu_ch3, 654 msm_mux_tsense_pwm1, 655 msm_mux_tsense_pwm2, 656 msm_mux_uim0_clk, 657 msm_mux_uim0_data, 658 msm_mux_uim0_present, 659 msm_mux_uim0_reset, 660 msm_mux_uim1_clk, 661 msm_mux_uim1_data, 662 msm_mux_uim1_present, 663 msm_mux_uim1_reset, 664 msm_mux_usb2phy_ac, 665 msm_mux_usb_phy, 666 msm_mux_vfr_0, 667 msm_mux_vfr_1, 668 msm_mux_vsense_trigger, 669 msm_mux__, 670 }; 671 672 static const char * const gpio_groups[] = { 673 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 674 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 675 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 676 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 677 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 678 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 679 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 680 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 681 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 682 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 683 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 684 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 685 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 686 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 687 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", 688 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", 689 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", 690 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122", 691 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128", 692 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134", 693 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", 694 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146", 695 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 696 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158", 697 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 698 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 699 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 700 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 701 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 702 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", 703 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", 704 "gpio201", "gpio202", 705 }; 706 707 static const char * const atest_char_groups[] = { 708 "gpio85", "gpio86", "gpio87", "gpio115", "gpio117", 709 }; 710 711 static const char * const atest_usb_groups[] = { 712 "gpio55", "gpio80", "gpio81", "gpio151", "gpio152", 713 "gpio153", "gpio154", "gpio158", "gpio159", "gpio161", 714 }; 715 716 static const char * const audio_ref_groups[] = { 717 "gpio124", 718 }; 719 720 static const char * const cam_mclk_groups[] = { 721 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", 722 }; 723 724 static const char * const cci_async_groups[] = { 725 "gpio106", "gpio118", "gpio119", 726 }; 727 728 static const char * const cci_i2c_groups[] = { 729 "gpio107", "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", 730 "gpio113", "gpio114", 731 }; 732 733 static const char * const cci_timer_groups[] = { 734 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", 735 }; 736 737 static const char * const cmu_rng_groups[] = { 738 "gpio174", "gpio175", "gpio176", "gpio177", 739 }; 740 741 static const char * const coex_uart1_groups[] = { 742 "gpio151", "gpio152", 743 }; 744 745 static const char * const coex_uart2_groups[] = { 746 "gpio153", "gpio154", 747 }; 748 749 static const char * const cri_trng_groups[] = { 750 "gpio186", 751 }; 752 753 static const char * const cri_trng0_groups[] = { 754 "gpio183", 755 }; 756 757 static const char * const cri_trng1_groups[] = { 758 "gpio184", 759 }; 760 761 static const char * const dbg_out_groups[] = { 762 "gpio14", 763 }; 764 765 static const char * const ddr_bist_groups[] = { 766 "gpio36", "gpio37", "gpio40", "gpio41", 767 }; 768 769 static const char * const ddr_pxi0_groups[] = { 770 "gpio51", "gpio52", 771 }; 772 773 static const char * const ddr_pxi1_groups[] = { 774 "gpio48", "gpio49", 775 }; 776 777 static const char * const ddr_pxi2_groups[] = { 778 "gpio45", "gpio47", 779 }; 780 781 static const char * const ddr_pxi3_groups[] = { 782 "gpio43", "gpio44", 783 }; 784 785 static const char * const dp_hot_groups[] = { 786 "gpio87", 787 }; 788 789 static const char * const dp_lcd_groups[] = { 790 "gpio83", 791 }; 792 793 static const char * const gcc_gp1_groups[] = { 794 "gpio115", "gpio129", 795 }; 796 797 static const char * const gcc_gp2_groups[] = { 798 "gpio116", "gpio130", 799 }; 800 801 static const char * const gcc_gp3_groups[] = { 802 "gpio117", "gpio131", 803 }; 804 805 static const char * const ibi_i3c_groups[] = { 806 "gpio36", "gpio37", "gpio56", "gpio57", "gpio60", "gpio61", 807 }; 808 809 static const char * const jitter_bist_groups[] = { 810 "gpio80", 811 }; 812 813 static const char * const lpass_slimbus_groups[] = { 814 "gpio129", "gpio130", 815 }; 816 817 static const char * const mdp_vsync_groups[] = { 818 "gpio15", "gpio26", "gpio82", "gpio83", "gpio84", 819 }; 820 821 static const char * const mdp_vsync0_groups[] = { 822 "gpio86", 823 }; 824 825 static const char * const mdp_vsync1_groups[] = { 826 "gpio86", 827 }; 828 829 static const char * const mdp_vsync2_groups[] = { 830 "gpio87", 831 }; 832 833 static const char * const mdp_vsync3_groups[] = { 834 "gpio87", 835 }; 836 837 static const char * const mi2s0_data0_groups[] = { 838 "gpio126", 839 }; 840 841 static const char * const mi2s0_data1_groups[] = { 842 "gpio127", 843 }; 844 845 static const char * const mi2s0_sck_groups[] = { 846 "gpio125", 847 }; 848 849 static const char * const mi2s0_ws_groups[] = { 850 "gpio128", 851 }; 852 853 static const char * const mi2s1_data0_groups[] = { 854 "gpio130", 855 }; 856 857 static const char * const mi2s1_data1_groups[] = { 858 "gpio131", 859 }; 860 861 static const char * const mi2s1_sck_groups[] = { 862 "gpio129", 863 }; 864 865 static const char * const mi2s1_ws_groups[] = { 866 "gpio132", 867 }; 868 869 static const char * const mi2s2_data0_groups[] = { 870 "gpio121", 871 }; 872 873 static const char * const mi2s2_data1_groups[] = { 874 "gpio124", 875 }; 876 877 static const char * const mi2s2_sck_groups[] = { 878 "gpio120", 879 }; 880 881 static const char * const mi2s2_ws_groups[] = { 882 "gpio122", 883 }; 884 885 static const char * const mss_grfc0_groups[] = { 886 "gpio141", "gpio158", 887 }; 888 889 static const char * const mss_grfc1_groups[] = { 890 "gpio142", 891 }; 892 893 static const char * const mss_grfc10_groups[] = { 894 "gpio153", 895 }; 896 897 static const char * const mss_grfc11_groups[] = { 898 "gpio154", 899 }; 900 901 static const char * const mss_grfc12_groups[] = { 902 "gpio157", 903 }; 904 905 static const char * const mss_grfc2_groups[] = { 906 "gpio143", 907 }; 908 909 static const char * const mss_grfc3_groups[] = { 910 "gpio144", 911 }; 912 913 static const char * const mss_grfc4_groups[] = { 914 "gpio145", 915 }; 916 917 static const char * const mss_grfc5_groups[] = { 918 "gpio146", 919 }; 920 921 static const char * const mss_grfc6_groups[] = { 922 "gpio147", 923 }; 924 925 static const char * const mss_grfc7_groups[] = { 926 "gpio148", 927 }; 928 929 static const char * const mss_grfc8_groups[] = { 930 "gpio149", 931 }; 932 933 static const char * const mss_grfc9_groups[] = { 934 "gpio150", 935 }; 936 937 static const char * const nav_gpio_groups[] = { 938 "gpio155", "gpio156", "gpio157", 939 }; 940 941 static const char * const pa_indicator_groups[] = { 942 "gpio157", 943 }; 944 945 static const char * const pcie0_clkreqn_groups[] = { 946 "gpio95", 947 }; 948 949 static const char * const pcie1_clkreqn_groups[] = { 950 "gpio98", 951 }; 952 953 static const char * const phase_flag_groups[] = { 954 "gpio12", "gpio13", "gpio16", "gpio17", "gpio28", "gpio29", "gpio30", 955 "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio72", "gpio73", 956 "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", "gpio103", 957 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", 958 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", 959 }; 960 961 static const char * const pll_bist_groups[] = { 962 "gpio81", 963 }; 964 965 static const char * const pll_clk_groups[] = { 966 "gpio81", 967 }; 968 969 static const char * const pri_mi2s_groups[] = { 970 "gpio123", 971 }; 972 973 static const char * const prng_rosc_groups[] = { 974 "gpio185", 975 }; 976 977 static const char * const qdss_cti_groups[] = { 978 "gpio14", "gpio27", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92", 979 }; 980 981 static const char * const qdss_gpio_groups[] = { 982 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", 983 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", 984 "gpio116", "gpio117", "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 985 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", "gpio195", "gpio196", 986 "gpio197", "gpio198", "gpio199", "gpio200", 987 }; 988 989 static const char * const qlink0_enable_groups[] = { 990 "gpio160", 991 }; 992 993 static const char * const qlink0_request_groups[] = { 994 "gpio159", 995 }; 996 997 static const char * const qlink0_wmss_groups[] = { 998 "gpio161", 999 }; 1000 1001 static const char * const qlink1_enable_groups[] = { 1002 "gpio163", 1003 }; 1004 1005 static const char * const qlink1_request_groups[] = { 1006 "gpio162", 1007 }; 1008 1009 static const char * const qlink1_wmss_groups[] = { 1010 "gpio164", 1011 }; 1012 1013 static const char * const qlink2_enable_groups[] = { 1014 "gpio166", 1015 }; 1016 1017 static const char * const qlink2_request_groups[] = { 1018 "gpio165", 1019 }; 1020 1021 static const char * const qlink2_wmss_groups[] = { 1022 "gpio167", 1023 }; 1024 1025 static const char * const qspi0_groups[] = { 1026 "gpio44", 1027 }; 1028 1029 static const char * const qspi1_groups[] = { 1030 "gpio45", 1031 }; 1032 1033 static const char * const qspi2_groups[] = { 1034 "gpio48", 1035 }; 1036 1037 static const char * const qspi3_groups[] = { 1038 "gpio49", 1039 }; 1040 1041 static const char * const qspi_clk_groups[] = { 1042 "gpio50", 1043 }; 1044 1045 static const char * const qspi_cs_groups[] = { 1046 "gpio47", "gpio51", 1047 }; 1048 1049 static const char * const qup0_groups[] = { 1050 "gpio4", "gpio5", "gpio6", "gpio7", 1051 }; 1052 1053 static const char * const qup1_groups[] = { 1054 "gpio8", "gpio9", "gpio10", "gpio11", 1055 }; 1056 1057 static const char * const qup10_groups[] = { 1058 "gpio44", "gpio45", "gpio46", "gpio47", 1059 }; 1060 1061 static const char * const qup11_groups[] = { 1062 "gpio48", "gpio49", "gpio50", "gpio51", 1063 }; 1064 1065 static const char * const qup12_groups[] = { 1066 "gpio52", "gpio53", "gpio54", "gpio55", 1067 }; 1068 1069 static const char * const qup13_groups[] = { 1070 "gpio0", "gpio1", "gpio2", "gpio3", 1071 }; 1072 1073 static const char * const qup14_groups[] = { 1074 "gpio56", "gpio57", "gpio58", "gpio59", 1075 }; 1076 1077 static const char * const qup15_groups[] = { 1078 "gpio60", "gpio61", "gpio62", "gpio63", 1079 }; 1080 1081 static const char * const qup16_groups[] = { 1082 "gpio64", "gpio65", "gpio66", "gpio67", 1083 }; 1084 1085 static const char * const qup17_groups[] = { 1086 "gpio72", "gpio73", "gpio74", "gpio75", 1087 }; 1088 1089 static const char * const qup18_groups[] = { 1090 "gpio68", "gpio69", "gpio70", "gpio71", 1091 }; 1092 1093 static const char * const qup19_groups[] = { 1094 "gpio76", "gpio77", "gpio78", "gpio79", 1095 }; 1096 1097 static const char * const qup2_groups[] = { 1098 "gpio12", "gpio13", "gpio14", "gpio15", 1099 }; 1100 1101 static const char * const qup3_groups[] = { 1102 "gpio16", "gpio17", "gpio18", "gpio19", 1103 }; 1104 1105 static const char * const qup4_groups[] = { 1106 "gpio20", "gpio21", "gpio22", "gpio23", 1107 }; 1108 1109 static const char * const qup5_groups[] = { 1110 "gpio24", "gpio25", "gpio26", "gpio27", 1111 }; 1112 1113 static const char * const qup6_groups[] = { 1114 "gpio28", "gpio29", "gpio30", "gpio31", 1115 }; 1116 1117 static const char * const qup7_groups[] = { 1118 "gpio32", "gpio33", "gpio34", "gpio35", 1119 }; 1120 1121 static const char * const qup8_groups[] = { 1122 "gpio36", "gpio37", "gpio38", "gpio39", 1123 }; 1124 1125 static const char * const qup9_groups[] = { 1126 "gpio40", "gpio41", "gpio42", "gpio43", 1127 }; 1128 1129 static const char * const qup_l4_groups[] = { 1130 "gpio2", "gpio6", "gpio58", "gpio63", 1131 }; 1132 1133 static const char * const qup_l5_groups[] = { 1134 "gpio3", "gpio7", "gpio59", "gpio66", 1135 }; 1136 1137 static const char * const qup_l6_groups[] = { 1138 "gpio10", "gpio42", "gpio62", "gpio67", 1139 }; 1140 1141 static const char * const sd_write_groups[] = { 1142 "gpio93", 1143 }; 1144 1145 static const char * const sdc40_groups[] = { 1146 "gpio44", 1147 }; 1148 1149 static const char * const sdc41_groups[] = { 1150 "gpio45", 1151 }; 1152 1153 static const char * const sdc42_groups[] = { 1154 "gpio48", 1155 }; 1156 1157 static const char * const sdc43_groups[] = { 1158 "gpio49", 1159 }; 1160 1161 static const char * const sdc4_clk_groups[] = { 1162 "gpio50", 1163 }; 1164 1165 static const char * const sdc4_cmd_groups[] = { 1166 "gpio51", 1167 }; 1168 1169 static const char * const sec_mi2s_groups[] = { 1170 "gpio124", 1171 }; 1172 1173 static const char * const tb_trig_groups[] = { 1174 "gpio64", "gpio136", 1175 }; 1176 1177 static const char * const tgu_ch0_groups[] = { 1178 "gpio99", 1179 }; 1180 1181 static const char * const tgu_ch1_groups[] = { 1182 "gpio100", 1183 }; 1184 1185 static const char * const tgu_ch2_groups[] = { 1186 "gpio101", 1187 }; 1188 1189 static const char * const tgu_ch3_groups[] = { 1190 "gpio102", 1191 }; 1192 1193 static const char * const tsense_pwm1_groups[] = { 1194 "gpio88", 1195 }; 1196 1197 static const char * const tsense_pwm2_groups[] = { 1198 "gpio88", 1199 }; 1200 1201 static const char * const uim0_clk_groups[] = { 1202 "gpio138", 1203 }; 1204 1205 static const char * const uim0_data_groups[] = { 1206 "gpio137", 1207 }; 1208 1209 static const char * const uim0_present_groups[] = { 1210 "gpio140", 1211 }; 1212 1213 static const char * const uim0_reset_groups[] = { 1214 "gpio139", 1215 }; 1216 1217 static const char * const uim1_clk_groups[] = { 1218 "gpio134", 1219 }; 1220 1221 static const char * const uim1_data_groups[] = { 1222 "gpio133", 1223 }; 1224 1225 static const char * const uim1_present_groups[] = { 1226 "gpio136", 1227 }; 1228 1229 static const char * const uim1_reset_groups[] = { 1230 "gpio135", 1231 }; 1232 1233 static const char * const usb2phy_ac_groups[] = { 1234 "gpio39", "gpio80", 1235 }; 1236 1237 static const char * const usb_phy_groups[] = { 1238 "gpio81", 1239 }; 1240 1241 static const char * const vfr_0_groups[] = { 1242 "gpio84", 1243 }; 1244 1245 static const char * const vfr_1_groups[] = { 1246 "gpio90", 1247 }; 1248 1249 static const char * const vsense_trigger_groups[] = { 1250 "gpio78", 1251 }; 1252 1253 static const struct msm_function sm8350_functions[] = { 1254 FUNCTION(atest_char), 1255 FUNCTION(atest_usb), 1256 FUNCTION(audio_ref), 1257 FUNCTION(cam_mclk), 1258 FUNCTION(cci_async), 1259 FUNCTION(cci_i2c), 1260 FUNCTION(cci_timer), 1261 FUNCTION(cmu_rng), 1262 FUNCTION(coex_uart1), 1263 FUNCTION(coex_uart2), 1264 FUNCTION(cri_trng), 1265 FUNCTION(cri_trng0), 1266 FUNCTION(cri_trng1), 1267 FUNCTION(dbg_out), 1268 FUNCTION(ddr_bist), 1269 FUNCTION(ddr_pxi0), 1270 FUNCTION(ddr_pxi1), 1271 FUNCTION(ddr_pxi2), 1272 FUNCTION(ddr_pxi3), 1273 FUNCTION(dp_hot), 1274 FUNCTION(dp_lcd), 1275 FUNCTION(gcc_gp1), 1276 FUNCTION(gcc_gp2), 1277 FUNCTION(gcc_gp3), 1278 FUNCTION(gpio), 1279 FUNCTION(ibi_i3c), 1280 FUNCTION(jitter_bist), 1281 FUNCTION(lpass_slimbus), 1282 FUNCTION(mdp_vsync), 1283 FUNCTION(mdp_vsync0), 1284 FUNCTION(mdp_vsync1), 1285 FUNCTION(mdp_vsync2), 1286 FUNCTION(mdp_vsync3), 1287 FUNCTION(mi2s0_data0), 1288 FUNCTION(mi2s0_data1), 1289 FUNCTION(mi2s0_sck), 1290 FUNCTION(mi2s0_ws), 1291 FUNCTION(mi2s1_data0), 1292 FUNCTION(mi2s1_data1), 1293 FUNCTION(mi2s1_sck), 1294 FUNCTION(mi2s1_ws), 1295 FUNCTION(mi2s2_data0), 1296 FUNCTION(mi2s2_data1), 1297 FUNCTION(mi2s2_sck), 1298 FUNCTION(mi2s2_ws), 1299 FUNCTION(mss_grfc0), 1300 FUNCTION(mss_grfc1), 1301 FUNCTION(mss_grfc10), 1302 FUNCTION(mss_grfc11), 1303 FUNCTION(mss_grfc12), 1304 FUNCTION(mss_grfc2), 1305 FUNCTION(mss_grfc3), 1306 FUNCTION(mss_grfc4), 1307 FUNCTION(mss_grfc5), 1308 FUNCTION(mss_grfc6), 1309 FUNCTION(mss_grfc7), 1310 FUNCTION(mss_grfc8), 1311 FUNCTION(mss_grfc9), 1312 FUNCTION(nav_gpio), 1313 FUNCTION(pa_indicator), 1314 FUNCTION(pcie0_clkreqn), 1315 FUNCTION(pcie1_clkreqn), 1316 FUNCTION(phase_flag), 1317 FUNCTION(pll_bist), 1318 FUNCTION(pll_clk), 1319 FUNCTION(pri_mi2s), 1320 FUNCTION(prng_rosc), 1321 FUNCTION(qdss_cti), 1322 FUNCTION(qdss_gpio), 1323 FUNCTION(qlink0_enable), 1324 FUNCTION(qlink0_request), 1325 FUNCTION(qlink0_wmss), 1326 FUNCTION(qlink1_enable), 1327 FUNCTION(qlink1_request), 1328 FUNCTION(qlink1_wmss), 1329 FUNCTION(qlink2_enable), 1330 FUNCTION(qlink2_request), 1331 FUNCTION(qlink2_wmss), 1332 FUNCTION(qspi0), 1333 FUNCTION(qspi1), 1334 FUNCTION(qspi2), 1335 FUNCTION(qspi3), 1336 FUNCTION(qspi_clk), 1337 FUNCTION(qspi_cs), 1338 FUNCTION(qup0), 1339 FUNCTION(qup1), 1340 FUNCTION(qup10), 1341 FUNCTION(qup11), 1342 FUNCTION(qup12), 1343 FUNCTION(qup13), 1344 FUNCTION(qup14), 1345 FUNCTION(qup15), 1346 FUNCTION(qup16), 1347 FUNCTION(qup17), 1348 FUNCTION(qup18), 1349 FUNCTION(qup19), 1350 FUNCTION(qup2), 1351 FUNCTION(qup3), 1352 FUNCTION(qup4), 1353 FUNCTION(qup5), 1354 FUNCTION(qup6), 1355 FUNCTION(qup7), 1356 FUNCTION(qup8), 1357 FUNCTION(qup9), 1358 FUNCTION(qup_l4), 1359 FUNCTION(qup_l5), 1360 FUNCTION(qup_l6), 1361 FUNCTION(sd_write), 1362 FUNCTION(sdc40), 1363 FUNCTION(sdc41), 1364 FUNCTION(sdc42), 1365 FUNCTION(sdc43), 1366 FUNCTION(sdc4_clk), 1367 FUNCTION(sdc4_cmd), 1368 FUNCTION(sec_mi2s), 1369 FUNCTION(tb_trig), 1370 FUNCTION(tgu_ch0), 1371 FUNCTION(tgu_ch1), 1372 FUNCTION(tgu_ch2), 1373 FUNCTION(tgu_ch3), 1374 FUNCTION(tsense_pwm1), 1375 FUNCTION(tsense_pwm2), 1376 FUNCTION(uim0_clk), 1377 FUNCTION(uim0_data), 1378 FUNCTION(uim0_present), 1379 FUNCTION(uim0_reset), 1380 FUNCTION(uim1_clk), 1381 FUNCTION(uim1_data), 1382 FUNCTION(uim1_present), 1383 FUNCTION(uim1_reset), 1384 FUNCTION(usb2phy_ac), 1385 FUNCTION(usb_phy), 1386 FUNCTION(vfr_0), 1387 FUNCTION(vfr_1), 1388 FUNCTION(vsense_trigger), 1389 }; 1390 1391 /* Every pin is maintained as a single group, and missing or non-existing pin 1392 * would be maintained as dummy group to synchronize pin group index with 1393 * pin descriptor registered with pinctrl core. 1394 * Clients would not be able to request these dummy pin groups. 1395 */ 1396 static const struct msm_pingroup sm8350_groups[] = { 1397 [0] = PINGROUP(0, qup13, _, _, _, _, _, _, _, _), 1398 [1] = PINGROUP(1, qup13, _, _, _, _, _, _, _, _), 1399 [2] = PINGROUP(2, qup13, qup_l4, _, _, _, _, _, _, _), 1400 [3] = PINGROUP(3, qup13, qup_l5, _, _, _, _, _, _, _), 1401 [4] = PINGROUP(4, qup0, _, _, _, _, _, _, _, _), 1402 [5] = PINGROUP(5, qup0, _, _, _, _, _, _, _, _), 1403 [6] = PINGROUP(6, qup0, qup_l4, _, _, _, _, _, _, _), 1404 [7] = PINGROUP(7, qup0, qup_l5, _, _, _, _, _, _, _), 1405 [8] = PINGROUP(8, qup1, _, _, _, _, _, _, _, _), 1406 [9] = PINGROUP(9, qup1, _, _, _, _, _, _, _, _), 1407 [10] = PINGROUP(10, qup1, qup_l6, _, _, _, _, _, _, _), 1408 [11] = PINGROUP(11, qup1, _, _, _, _, _, _, _, _), 1409 [12] = PINGROUP(12, qup2, phase_flag, _, _, _, _, _, _, _), 1410 [13] = PINGROUP(13, qup2, phase_flag, _, _, _, _, _, _, _), 1411 [14] = PINGROUP(14, qup2, qdss_cti, dbg_out, _, _, _, _, _, _), 1412 [15] = PINGROUP(15, qup2, mdp_vsync, _, _, _, _, _, _, _), 1413 [16] = PINGROUP(16, qup3, phase_flag, _, _, _, _, _, _, _), 1414 [17] = PINGROUP(17, qup3, phase_flag, _, _, _, _, _, _, _), 1415 [18] = PINGROUP(18, qup3, _, _, _, _, _, _, _, _), 1416 [19] = PINGROUP(19, qup3, _, _, _, _, _, _, _, _), 1417 [20] = PINGROUP(20, qup4, _, _, _, _, _, _, _, _), 1418 [21] = PINGROUP(21, qup4, _, _, _, _, _, _, _, _), 1419 [22] = PINGROUP(22, qup4, _, _, _, _, _, _, _, _), 1420 [23] = PINGROUP(23, qup4, _, _, _, _, _, _, _, _), 1421 [24] = PINGROUP(24, qup5, _, _, _, _, _, _, _, _), 1422 [25] = PINGROUP(25, qup5, _, _, _, _, _, _, _, _), 1423 [26] = PINGROUP(26, qup5, mdp_vsync, _, _, _, _, _, _, _), 1424 [27] = PINGROUP(27, qup5, qdss_cti, _, _, _, _, _, _, _), 1425 [28] = PINGROUP(28, qup6, phase_flag, _, _, _, _, _, _, _), 1426 [29] = PINGROUP(29, qup6, phase_flag, _, _, _, _, _, _, _), 1427 [30] = PINGROUP(30, qup6, phase_flag, _, _, _, _, _, _, _), 1428 [31] = PINGROUP(31, qup6, phase_flag, _, _, _, _, _, _, _), 1429 [32] = PINGROUP(32, qup7, phase_flag, _, _, _, _, _, _, _), 1430 [33] = PINGROUP(33, qup7, phase_flag, _, _, _, _, _, _, _), 1431 [34] = PINGROUP(34, qup7, phase_flag, _, _, _, _, _, _, _), 1432 [35] = PINGROUP(35, qup7, phase_flag, _, _, _, _, _, _, _), 1433 [36] = PINGROUP(36, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), 1434 [37] = PINGROUP(37, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), 1435 [38] = PINGROUP(38, qup8, _, _, _, _, _, _, _, _), 1436 [39] = PINGROUP(39, qup8, usb2phy_ac, _, _, _, _, _, _, _), 1437 [40] = PINGROUP(40, qup9, ddr_bist, _, _, _, _, _, _, _), 1438 [41] = PINGROUP(41, qup9, ddr_bist, _, _, _, _, _, _, _), 1439 [42] = PINGROUP(42, qup9, qup_l6, _, _, _, _, _, _, _), 1440 [43] = PINGROUP(43, qup9, ddr_pxi3, _, _, _, _, _, _, _), 1441 [44] = PINGROUP(44, qup10, qspi0, sdc40, ddr_pxi3, _, _, _, _, _), 1442 [45] = PINGROUP(45, qup10, qspi1, sdc41, ddr_pxi2, _, _, _, _, _), 1443 [46] = PINGROUP(46, qup10, _, _, _, _, _, _, _, _), 1444 [47] = PINGROUP(47, qup10, qspi_cs, ddr_pxi2, _, _, _, _, _, _), 1445 [48] = PINGROUP(48, qup11, qspi2, sdc42, ddr_pxi1, _, _, _, _, _), 1446 [49] = PINGROUP(49, qup11, qspi3, sdc43, ddr_pxi1, _, _, _, _, _), 1447 [50] = PINGROUP(50, qup11, qspi_clk, sdc4_clk, _, _, _, _, _, _), 1448 [51] = PINGROUP(51, qup11, qspi_cs, sdc4_cmd, ddr_pxi0, _, _, _, _, _), 1449 [52] = PINGROUP(52, qup12, ddr_pxi0, _, _, _, _, _, _, _), 1450 [53] = PINGROUP(53, qup12, _, _, _, _, _, _, _, _), 1451 [54] = PINGROUP(54, qup12, _, _, _, _, _, _, _, _), 1452 [55] = PINGROUP(55, qup12, atest_usb, _, _, _, _, _, _, _), 1453 [56] = PINGROUP(56, qup14, ibi_i3c, _, _, _, _, _, _, _), 1454 [57] = PINGROUP(57, qup14, ibi_i3c, _, _, _, _, _, _, _), 1455 [58] = PINGROUP(58, qup14, qup_l4, _, _, _, _, _, _, _), 1456 [59] = PINGROUP(59, qup14, qup_l5, _, _, _, _, _, _, _), 1457 [60] = PINGROUP(60, qup15, ibi_i3c, _, _, _, _, _, _, _), 1458 [61] = PINGROUP(61, qup15, ibi_i3c, _, _, _, _, _, _, _), 1459 [62] = PINGROUP(62, qup15, qup_l6, _, _, _, _, _, _, _), 1460 [63] = PINGROUP(63, qup15, qup_l4, _, _, _, _, _, _, _), 1461 [64] = PINGROUP(64, qup16, tb_trig, _, _, _, _, _, _, _), 1462 [65] = PINGROUP(65, qup16, _, _, _, _, _, _, _, _), 1463 [66] = PINGROUP(66, qup16, qup_l5, _, _, _, _, _, _, _), 1464 [67] = PINGROUP(67, qup16, qup_l6, _, _, _, _, _, _, _), 1465 [68] = PINGROUP(68, qup18, _, _, _, _, _, _, _, _), 1466 [69] = PINGROUP(69, qup18, _, _, _, _, _, _, _, _), 1467 [70] = PINGROUP(70, qup18, _, _, _, _, _, _, _, _), 1468 [71] = PINGROUP(71, qup18, _, _, _, _, _, _, _, _), 1469 [72] = PINGROUP(72, qup17, phase_flag, _, _, _, _, _, _, _), 1470 [73] = PINGROUP(73, qup17, phase_flag, _, _, _, _, _, _, _), 1471 [74] = PINGROUP(74, qup17, phase_flag, _, _, _, _, _, _, _), 1472 [75] = PINGROUP(75, qup17, phase_flag, _, _, _, _, _, _, _), 1473 [76] = PINGROUP(76, qup19, phase_flag, _, _, _, _, _, _, _), 1474 [77] = PINGROUP(77, qup19, phase_flag, _, _, _, _, _, _, _), 1475 [78] = PINGROUP(78, qup19, phase_flag, _, vsense_trigger, _, _, _, _, _), 1476 [79] = PINGROUP(79, qup19, phase_flag, _, _, _, _, _, _, _), 1477 [80] = PINGROUP(80, usb2phy_ac, jitter_bist, atest_usb, _, _, _, _, _, _), 1478 [81] = PINGROUP(81, usb_phy, pll_bist, pll_clk, atest_usb, _, _, _, _, _), 1479 [82] = PINGROUP(82, mdp_vsync, _, _, _, _, _, _, _, _), 1480 [83] = PINGROUP(83, mdp_vsync, dp_lcd, _, _, _, _, _, _, _), 1481 [84] = PINGROUP(84, mdp_vsync, vfr_0, _, _, _, _, _, _, _), 1482 [85] = PINGROUP(85, atest_char, _, _, _, _, _, _, _, _), 1483 [86] = PINGROUP(86, mdp_vsync0, mdp_vsync1, atest_char, _, _, _, _, _, _), 1484 [87] = PINGROUP(87, dp_hot, mdp_vsync2, mdp_vsync3, qdss_cti, atest_char, _, _, _, _), 1485 [88] = PINGROUP(88, qdss_cti, tsense_pwm1, tsense_pwm2, _, _, _, _, _, _), 1486 [89] = PINGROUP(89, qdss_cti, _, _, _, _, _, _, _, _), 1487 [90] = PINGROUP(90, vfr_1, qdss_cti, _, _, _, _, _, _, _), 1488 [91] = PINGROUP(91, qdss_cti, _, _, _, _, _, _, _, _), 1489 [92] = PINGROUP(92, qdss_cti, _, _, _, _, _, _, _, _), 1490 [93] = PINGROUP(93, sd_write, _, _, _, _, _, _, _, _), 1491 [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _), 1492 [95] = PINGROUP(95, pcie0_clkreqn, _, _, _, _, _, _, _, _), 1493 [96] = PINGROUP(96, _, _, _, _, _, _, _, _, _), 1494 [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _), 1495 [98] = PINGROUP(98, pcie1_clkreqn, _, _, _, _, _, _, _, _), 1496 [99] = PINGROUP(99, tgu_ch0, _, _, _, _, _, _, _, _), 1497 [100] = PINGROUP(100, cam_mclk, tgu_ch1, qdss_gpio, _, _, _, _, _, _), 1498 [101] = PINGROUP(101, cam_mclk, tgu_ch2, qdss_gpio, _, _, _, _, _, _), 1499 [102] = PINGROUP(102, cam_mclk, tgu_ch3, qdss_gpio, _, _, _, _, _, _), 1500 [103] = PINGROUP(103, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1501 [104] = PINGROUP(104, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1502 [105] = PINGROUP(105, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1503 [106] = PINGROUP(106, cci_async, phase_flag, _, qdss_gpio, _, _, _, _, _), 1504 [107] = PINGROUP(107, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1505 [108] = PINGROUP(108, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1506 [109] = PINGROUP(109, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1507 [110] = PINGROUP(110, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1508 [111] = PINGROUP(111, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1509 [112] = PINGROUP(112, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1510 [113] = PINGROUP(113, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1511 [114] = PINGROUP(114, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1512 [115] = PINGROUP(115, cci_timer, gcc_gp1, qdss_gpio, atest_char, _, _, _, _, _), 1513 [116] = PINGROUP(116, cci_timer, gcc_gp2, qdss_gpio, _, _, _, _, _, _), 1514 [117] = PINGROUP(117, cci_timer, gcc_gp3, qdss_gpio, atest_char, _, _, _, _, _), 1515 [118] = PINGROUP(118, cci_timer, cci_async, _, _, _, _, _, _, _), 1516 [119] = PINGROUP(119, cci_timer, cci_async, _, _, _, _, _, _, _), 1517 [120] = PINGROUP(120, mi2s2_sck, _, _, _, _, _, _, _, _), 1518 [121] = PINGROUP(121, mi2s2_data0, _, _, _, _, _, _, _, _), 1519 [122] = PINGROUP(122, mi2s2_ws, _, _, _, _, _, _, _, _), 1520 [123] = PINGROUP(123, pri_mi2s, _, _, _, _, _, _, _, _), 1521 [124] = PINGROUP(124, sec_mi2s, audio_ref, mi2s2_data1, _, _, _, _, _, _), 1522 [125] = PINGROUP(125, mi2s0_sck, _, _, _, _, _, _, _, _), 1523 [126] = PINGROUP(126, mi2s0_data0, _, _, _, _, _, _, _, _), 1524 [127] = PINGROUP(127, mi2s0_data1, _, _, _, _, _, _, _, _), 1525 [128] = PINGROUP(128, mi2s0_ws, _, _, _, _, _, _, _, _), 1526 [129] = PINGROUP(129, lpass_slimbus, mi2s1_sck, gcc_gp1, _, _, _, _, _, _), 1527 [130] = PINGROUP(130, lpass_slimbus, mi2s1_data0, gcc_gp2, _, _, _, _, _, _), 1528 [131] = PINGROUP(131, mi2s1_data1, gcc_gp3, _, _, _, _, _, _, _), 1529 [132] = PINGROUP(132, mi2s1_ws, _, _, _, _, _, _, _, _), 1530 [133] = PINGROUP(133, uim1_data, _, _, _, _, _, _, _, _), 1531 [134] = PINGROUP(134, uim1_clk, _, _, _, _, _, _, _, _), 1532 [135] = PINGROUP(135, uim1_reset, _, _, _, _, _, _, _, _), 1533 [136] = PINGROUP(136, uim1_present, tb_trig, _, _, _, _, _, _, _), 1534 [137] = PINGROUP(137, uim0_data, _, _, _, _, _, _, _, _), 1535 [138] = PINGROUP(138, uim0_clk, _, _, _, _, _, _, _, _), 1536 [139] = PINGROUP(139, uim0_reset, _, _, _, _, _, _, _, _), 1537 [140] = PINGROUP(140, uim0_present, _, _, _, _, _, _, _, _), 1538 [141] = PINGROUP(141, _, mss_grfc0, _, _, _, _, _, _, _), 1539 [142] = PINGROUP(142, _, mss_grfc1, _, _, _, _, _, _, _), 1540 [143] = PINGROUP(143, _, mss_grfc2, _, _, _, _, _, _, _), 1541 [144] = PINGROUP(144, _, mss_grfc3, _, _, _, _, _, _, _), 1542 [145] = PINGROUP(145, _, mss_grfc4, _, _, _, _, _, _, _), 1543 [146] = PINGROUP(146, _, mss_grfc5, _, _, _, _, _, _, _), 1544 [147] = PINGROUP(147, _, mss_grfc6, _, _, _, _, _, _, _), 1545 [148] = PINGROUP(148, _, mss_grfc7, _, _, _, _, _, _, _), 1546 [149] = PINGROUP(149, _, mss_grfc8, _, _, _, _, _, _, _), 1547 [150] = PINGROUP(150, _, mss_grfc9, _, _, _, _, _, _, _), 1548 [151] = PINGROUP(151, coex_uart1, atest_usb, _, _, _, _, _, _, _), 1549 [152] = PINGROUP(152, coex_uart1, atest_usb, _, _, _, _, _, _, _), 1550 [153] = PINGROUP(153, coex_uart2, mss_grfc10, atest_usb, _, _, _, _, _, _), 1551 [154] = PINGROUP(154, coex_uart2, mss_grfc11, atest_usb, _, _, _, _, _, _), 1552 [155] = PINGROUP(155, nav_gpio, _, _, _, _, _, _, _, _), 1553 [156] = PINGROUP(156, nav_gpio, _, _, _, _, _, _, _, _), 1554 [157] = PINGROUP(157, mss_grfc12, pa_indicator, nav_gpio, _, _, _, _, _, _), 1555 [158] = PINGROUP(158, mss_grfc0, atest_usb, _, _, _, _, _, _, _), 1556 [159] = PINGROUP(159, qlink0_request, atest_usb, _, _, _, _, _, _, _), 1557 [160] = PINGROUP(160, qlink0_enable, _, _, _, _, _, _, _, _), 1558 [161] = PINGROUP(161, qlink0_wmss, atest_usb, _, _, _, _, _, _, _), 1559 [162] = PINGROUP(162, qlink1_request, _, _, _, _, _, _, _, _), 1560 [163] = PINGROUP(163, qlink1_enable, _, _, _, _, _, _, _, _), 1561 [164] = PINGROUP(164, qlink1_wmss, _, _, _, _, _, _, _, _), 1562 [165] = PINGROUP(165, qlink2_request, _, _, _, _, _, _, _, _), 1563 [166] = PINGROUP(166, qlink2_enable, _, _, _, _, _, _, _, _), 1564 [167] = PINGROUP(167, qlink2_wmss, _, _, _, _, _, _, _, _), 1565 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _), 1566 [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _), 1567 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _), 1568 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _), 1569 [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _), 1570 [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _), 1571 [174] = PINGROUP(174, cmu_rng, _, _, _, _, _, _, _, _), 1572 [175] = PINGROUP(175, cmu_rng, _, _, _, _, _, _, _, _), 1573 [176] = PINGROUP(176, cmu_rng, _, _, _, _, _, _, _, _), 1574 [177] = PINGROUP(177, cmu_rng, _, _, _, _, _, _, _, _), 1575 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _), 1576 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _), 1577 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _), 1578 [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _), 1579 [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _), 1580 [183] = PINGROUP(183, cri_trng0, qdss_gpio, _, _, _, _, _, _, _), 1581 [184] = PINGROUP(184, cri_trng1, qdss_gpio, _, _, _, _, _, _, _), 1582 [185] = PINGROUP(185, prng_rosc, qdss_gpio, _, _, _, _, _, _, _), 1583 [186] = PINGROUP(186, cri_trng, qdss_gpio, _, _, _, _, _, _, _), 1584 [187] = PINGROUP(187, qdss_gpio, _, _, _, _, _, _, _, _), 1585 [188] = PINGROUP(188, qdss_gpio, _, _, _, _, _, _, _, _), 1586 [189] = PINGROUP(189, qdss_gpio, _, _, _, _, _, _, _, _), 1587 [190] = PINGROUP(190, qdss_gpio, _, _, _, _, _, _, _, _), 1588 [191] = PINGROUP(191, qdss_gpio, _, _, _, _, _, _, _, _), 1589 [192] = PINGROUP(192, qdss_gpio, _, _, _, _, _, _, _, _), 1590 [193] = PINGROUP(193, qdss_gpio, _, _, _, _, _, _, _, _), 1591 [194] = PINGROUP(194, qdss_gpio, _, _, _, _, _, _, _, _), 1592 [195] = PINGROUP(195, qdss_gpio, _, _, _, _, _, _, _, _), 1593 [196] = PINGROUP(196, qdss_gpio, _, _, _, _, _, _, _, _), 1594 [197] = PINGROUP(197, qdss_gpio, _, _, _, _, _, _, _, _), 1595 [198] = PINGROUP(198, qdss_gpio, _, _, _, _, _, _, _, _), 1596 [199] = PINGROUP(199, qdss_gpio, _, _, _, _, _, _, _, _), 1597 [200] = PINGROUP(200, qdss_gpio, _, _, _, _, _, _, _, _), 1598 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _), 1599 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _), 1600 [203] = UFS_RESET(ufs_reset, 0xd8000), 1601 [204] = SDC_PINGROUP(sdc2_clk, 0xcf000, 14, 6), 1602 [205] = SDC_PINGROUP(sdc2_cmd, 0xcf000, 11, 3), 1603 [206] = SDC_PINGROUP(sdc2_data, 0xcf000, 9, 0), 1604 }; 1605 1606 static const struct msm_gpio_wakeirq_map sm8350_pdc_map[] = { 1607 { 2, 117 }, { 7, 82 }, { 11, 83 }, { 14, 80 }, { 15, 146 }, 1608 { 19, 121 }, { 23, 84 }, { 26, 86 }, { 27, 75 }, { 31, 85 }, 1609 { 32, 97 }, { 34, 98 }, { 35, 131 }, { 36, 79 }, { 38, 99 }, 1610 { 39, 92 }, { 40, 101 }, { 43, 137 }, { 44, 102 }, { 46, 96 }, 1611 { 47, 93 }, { 50, 108 }, { 51, 127 }, { 55, 128 }, { 56, 81 }, 1612 { 59, 112 }, { 60, 119 }, { 63, 73 }, { 67, 74 }, { 71, 134 }, 1613 { 75, 103 }, { 79, 104 }, { 80, 126 }, { 81, 139 }, { 82, 140 }, 1614 { 83, 141 }, { 84, 124 }, { 85, 109 }, { 86, 143 }, { 87, 138 }, 1615 { 88, 122 }, { 89, 113 }, { 90, 114 }, { 91, 115 }, { 92, 76 }, 1616 { 95, 147 }, { 96, 148 }, { 98, 149 }, { 99, 150 }, { 115, 125 }, 1617 { 116, 106 }, { 117, 105 }, { 118, 116 }, { 119, 123 }, { 130, 145 }, 1618 { 136, 72 }, { 140, 100 }, { 151, 110 }, { 153, 95 }, { 155, 107 }, 1619 { 156, 94 }, { 157, 111 }, { 159, 118 }, { 162, 77 }, { 165, 78 }, 1620 { 169, 70 }, { 172, 132 }, { 174, 87 }, { 175, 88 }, { 177, 89 }, 1621 { 179, 120 }, { 180, 129 }, { 183, 90 }, { 185, 136 }, { 187, 142 }, 1622 { 190, 144 }, { 198, 91 }, { 200, 133 }, { 202, 135 }, 1623 }; 1624 1625 static const struct msm_pinctrl_soc_data sm8350_tlmm = { 1626 .pins = sm8350_pins, 1627 .npins = ARRAY_SIZE(sm8350_pins), 1628 .functions = sm8350_functions, 1629 .nfunctions = ARRAY_SIZE(sm8350_functions), 1630 .groups = sm8350_groups, 1631 .ngroups = ARRAY_SIZE(sm8350_groups), 1632 .ngpios = 204, 1633 .wakeirq_map = sm8350_pdc_map, 1634 .nwakeirq_map = ARRAY_SIZE(sm8350_pdc_map), 1635 }; 1636 1637 static int sm8350_tlmm_probe(struct platform_device *pdev) 1638 { 1639 return msm_pinctrl_probe(pdev, &sm8350_tlmm); 1640 } 1641 1642 static const struct of_device_id sm8350_tlmm_of_match[] = { 1643 { .compatible = "qcom,sm8350-tlmm", }, 1644 { }, 1645 }; 1646 1647 static struct platform_driver sm8350_tlmm_driver = { 1648 .driver = { 1649 .name = "sm8350-tlmm", 1650 .of_match_table = sm8350_tlmm_of_match, 1651 }, 1652 .probe = sm8350_tlmm_probe, 1653 .remove = msm_pinctrl_remove, 1654 }; 1655 1656 static int __init sm8350_tlmm_init(void) 1657 { 1658 return platform_driver_register(&sm8350_tlmm_driver); 1659 } 1660 arch_initcall(sm8350_tlmm_init); 1661 1662 static void __exit sm8350_tlmm_exit(void) 1663 { 1664 platform_driver_unregister(&sm8350_tlmm_driver); 1665 } 1666 module_exit(sm8350_tlmm_exit); 1667 1668 MODULE_DESCRIPTION("QTI SM8350 TLMM driver"); 1669 MODULE_LICENSE("GPL v2"); 1670 MODULE_DEVICE_TABLE(of, sm8350_tlmm_of_match); 1671