1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org> 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 #include <linux/pinctrl/pinctrl.h> 11 12 #include "pinctrl-msm.h" 13 14 #define FUNCTION(fname) \ 15 [msm_mux_##fname] = { \ 16 .name = #fname, \ 17 .groups = fname##_groups, \ 18 .ngroups = ARRAY_SIZE(fname##_groups), \ 19 } 20 21 #define REG_BASE 0x100000 22 #define REG_SIZE 0x1000 23 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 24 { \ 25 .name = "gpio" #id, \ 26 .pins = gpio##id##_pins, \ 27 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \ 28 .funcs = (int[]){ \ 29 msm_mux_gpio, /* gpio mode */ \ 30 msm_mux_##f1, \ 31 msm_mux_##f2, \ 32 msm_mux_##f3, \ 33 msm_mux_##f4, \ 34 msm_mux_##f5, \ 35 msm_mux_##f6, \ 36 msm_mux_##f7, \ 37 msm_mux_##f8, \ 38 msm_mux_##f9 \ 39 }, \ 40 .nfuncs = 10, \ 41 .ctl_reg = REG_SIZE * id, \ 42 .io_reg = REG_SIZE * id + 0x4, \ 43 .intr_cfg_reg = REG_SIZE * id + 0x8, \ 44 .intr_status_reg = REG_SIZE * id + 0xc, \ 45 .intr_target_reg = REG_SIZE * id + 0x8, \ 46 .mux_bit = 2, \ 47 .pull_bit = 0, \ 48 .drv_bit = 6, \ 49 .egpio_enable = 12, \ 50 .egpio_present = 11, \ 51 .oe_bit = 9, \ 52 .in_bit = 0, \ 53 .out_bit = 1, \ 54 .intr_enable_bit = 0, \ 55 .intr_status_bit = 0, \ 56 .intr_target_bit = 5, \ 57 .intr_target_kpss_val = 3, \ 58 .intr_raw_status_bit = 4, \ 59 .intr_polarity_bit = 1, \ 60 .intr_detection_bit = 2, \ 61 .intr_detection_width = 2, \ 62 } 63 64 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 65 { \ 66 .name = #pg_name, \ 67 .pins = pg_name##_pins, \ 68 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 69 .ctl_reg = ctl, \ 70 .io_reg = 0, \ 71 .intr_cfg_reg = 0, \ 72 .intr_status_reg = 0, \ 73 .intr_target_reg = 0, \ 74 .mux_bit = -1, \ 75 .pull_bit = pull, \ 76 .drv_bit = drv, \ 77 .oe_bit = -1, \ 78 .in_bit = -1, \ 79 .out_bit = -1, \ 80 .intr_enable_bit = -1, \ 81 .intr_status_bit = -1, \ 82 .intr_target_bit = -1, \ 83 .intr_raw_status_bit = -1, \ 84 .intr_polarity_bit = -1, \ 85 .intr_detection_bit = -1, \ 86 .intr_detection_width = -1, \ 87 } 88 89 #define UFS_RESET(pg_name, offset) \ 90 { \ 91 .name = #pg_name, \ 92 .pins = pg_name##_pins, \ 93 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 94 .ctl_reg = offset, \ 95 .io_reg = offset + 0x4, \ 96 .intr_cfg_reg = 0, \ 97 .intr_status_reg = 0, \ 98 .intr_target_reg = 0, \ 99 .mux_bit = -1, \ 100 .pull_bit = 3, \ 101 .drv_bit = 0, \ 102 .oe_bit = -1, \ 103 .in_bit = -1, \ 104 .out_bit = 0, \ 105 .intr_enable_bit = -1, \ 106 .intr_status_bit = -1, \ 107 .intr_target_bit = -1, \ 108 .intr_raw_status_bit = -1, \ 109 .intr_polarity_bit = -1, \ 110 .intr_detection_bit = -1, \ 111 .intr_detection_width = -1, \ 112 } 113 114 static const struct pinctrl_pin_desc sm6375_pins[] = { 115 PINCTRL_PIN(0, "GPIO_0"), 116 PINCTRL_PIN(1, "GPIO_1"), 117 PINCTRL_PIN(2, "GPIO_2"), 118 PINCTRL_PIN(3, "GPIO_3"), 119 PINCTRL_PIN(4, "GPIO_4"), 120 PINCTRL_PIN(5, "GPIO_5"), 121 PINCTRL_PIN(6, "GPIO_6"), 122 PINCTRL_PIN(7, "GPIO_7"), 123 PINCTRL_PIN(8, "GPIO_8"), 124 PINCTRL_PIN(9, "GPIO_9"), 125 PINCTRL_PIN(10, "GPIO_10"), 126 PINCTRL_PIN(11, "GPIO_11"), 127 PINCTRL_PIN(12, "GPIO_12"), 128 PINCTRL_PIN(13, "GPIO_13"), 129 PINCTRL_PIN(14, "GPIO_14"), 130 PINCTRL_PIN(15, "GPIO_15"), 131 PINCTRL_PIN(16, "GPIO_16"), 132 PINCTRL_PIN(17, "GPIO_17"), 133 PINCTRL_PIN(18, "GPIO_18"), 134 PINCTRL_PIN(19, "GPIO_19"), 135 PINCTRL_PIN(20, "GPIO_20"), 136 PINCTRL_PIN(21, "GPIO_21"), 137 PINCTRL_PIN(22, "GPIO_22"), 138 PINCTRL_PIN(23, "GPIO_23"), 139 PINCTRL_PIN(24, "GPIO_24"), 140 PINCTRL_PIN(25, "GPIO_25"), 141 PINCTRL_PIN(26, "GPIO_26"), 142 PINCTRL_PIN(27, "GPIO_27"), 143 PINCTRL_PIN(28, "GPIO_28"), 144 PINCTRL_PIN(29, "GPIO_29"), 145 PINCTRL_PIN(30, "GPIO_30"), 146 PINCTRL_PIN(31, "GPIO_31"), 147 PINCTRL_PIN(32, "GPIO_32"), 148 PINCTRL_PIN(33, "GPIO_33"), 149 PINCTRL_PIN(34, "GPIO_34"), 150 PINCTRL_PIN(35, "GPIO_35"), 151 PINCTRL_PIN(36, "GPIO_36"), 152 PINCTRL_PIN(37, "GPIO_37"), 153 PINCTRL_PIN(38, "GPIO_38"), 154 PINCTRL_PIN(39, "GPIO_39"), 155 PINCTRL_PIN(40, "GPIO_40"), 156 PINCTRL_PIN(41, "GPIO_41"), 157 PINCTRL_PIN(42, "GPIO_42"), 158 PINCTRL_PIN(43, "GPIO_43"), 159 PINCTRL_PIN(44, "GPIO_44"), 160 PINCTRL_PIN(45, "GPIO_45"), 161 PINCTRL_PIN(46, "GPIO_46"), 162 PINCTRL_PIN(47, "GPIO_47"), 163 PINCTRL_PIN(48, "GPIO_48"), 164 PINCTRL_PIN(49, "GPIO_49"), 165 PINCTRL_PIN(50, "GPIO_50"), 166 PINCTRL_PIN(51, "GPIO_51"), 167 PINCTRL_PIN(52, "GPIO_52"), 168 PINCTRL_PIN(53, "GPIO_53"), 169 PINCTRL_PIN(54, "GPIO_54"), 170 PINCTRL_PIN(55, "GPIO_55"), 171 PINCTRL_PIN(56, "GPIO_56"), 172 PINCTRL_PIN(57, "GPIO_57"), 173 PINCTRL_PIN(58, "GPIO_58"), 174 PINCTRL_PIN(59, "GPIO_59"), 175 PINCTRL_PIN(60, "GPIO_60"), 176 PINCTRL_PIN(61, "GPIO_61"), 177 PINCTRL_PIN(62, "GPIO_62"), 178 PINCTRL_PIN(63, "GPIO_63"), 179 PINCTRL_PIN(64, "GPIO_64"), 180 PINCTRL_PIN(65, "GPIO_65"), 181 PINCTRL_PIN(66, "GPIO_66"), 182 PINCTRL_PIN(67, "GPIO_67"), 183 PINCTRL_PIN(68, "GPIO_68"), 184 PINCTRL_PIN(69, "GPIO_69"), 185 PINCTRL_PIN(70, "GPIO_70"), 186 PINCTRL_PIN(71, "GPIO_71"), 187 PINCTRL_PIN(72, "GPIO_72"), 188 PINCTRL_PIN(73, "GPIO_73"), 189 PINCTRL_PIN(74, "GPIO_74"), 190 PINCTRL_PIN(75, "GPIO_75"), 191 PINCTRL_PIN(76, "GPIO_76"), 192 PINCTRL_PIN(77, "GPIO_77"), 193 PINCTRL_PIN(78, "GPIO_78"), 194 PINCTRL_PIN(79, "GPIO_79"), 195 PINCTRL_PIN(80, "GPIO_80"), 196 PINCTRL_PIN(81, "GPIO_81"), 197 PINCTRL_PIN(82, "GPIO_82"), 198 PINCTRL_PIN(83, "GPIO_83"), 199 PINCTRL_PIN(84, "GPIO_84"), 200 PINCTRL_PIN(85, "GPIO_85"), 201 PINCTRL_PIN(86, "GPIO_86"), 202 PINCTRL_PIN(87, "GPIO_87"), 203 PINCTRL_PIN(88, "GPIO_88"), 204 PINCTRL_PIN(89, "GPIO_89"), 205 PINCTRL_PIN(90, "GPIO_90"), 206 PINCTRL_PIN(91, "GPIO_91"), 207 PINCTRL_PIN(92, "GPIO_92"), 208 PINCTRL_PIN(93, "GPIO_93"), 209 PINCTRL_PIN(94, "GPIO_94"), 210 PINCTRL_PIN(95, "GPIO_95"), 211 PINCTRL_PIN(96, "GPIO_96"), 212 PINCTRL_PIN(97, "GPIO_97"), 213 PINCTRL_PIN(98, "GPIO_98"), 214 PINCTRL_PIN(99, "GPIO_99"), 215 PINCTRL_PIN(100, "GPIO_100"), 216 PINCTRL_PIN(101, "GPIO_101"), 217 PINCTRL_PIN(102, "GPIO_102"), 218 PINCTRL_PIN(103, "GPIO_103"), 219 PINCTRL_PIN(104, "GPIO_104"), 220 PINCTRL_PIN(105, "GPIO_105"), 221 PINCTRL_PIN(106, "GPIO_106"), 222 PINCTRL_PIN(107, "GPIO_107"), 223 PINCTRL_PIN(108, "GPIO_108"), 224 PINCTRL_PIN(109, "GPIO_109"), 225 PINCTRL_PIN(110, "GPIO_110"), 226 PINCTRL_PIN(111, "GPIO_111"), 227 PINCTRL_PIN(112, "GPIO_112"), 228 PINCTRL_PIN(113, "GPIO_113"), 229 PINCTRL_PIN(114, "GPIO_114"), 230 PINCTRL_PIN(115, "GPIO_115"), 231 PINCTRL_PIN(116, "GPIO_116"), 232 PINCTRL_PIN(117, "GPIO_117"), 233 PINCTRL_PIN(118, "GPIO_118"), 234 PINCTRL_PIN(119, "GPIO_119"), 235 PINCTRL_PIN(120, "GPIO_120"), 236 PINCTRL_PIN(121, "GPIO_121"), 237 PINCTRL_PIN(122, "GPIO_122"), 238 PINCTRL_PIN(123, "GPIO_123"), 239 PINCTRL_PIN(124, "GPIO_124"), 240 PINCTRL_PIN(125, "GPIO_125"), 241 PINCTRL_PIN(126, "GPIO_126"), 242 PINCTRL_PIN(127, "GPIO_127"), 243 PINCTRL_PIN(128, "GPIO_128"), 244 PINCTRL_PIN(129, "GPIO_129"), 245 PINCTRL_PIN(130, "GPIO_130"), 246 PINCTRL_PIN(131, "GPIO_131"), 247 PINCTRL_PIN(132, "GPIO_132"), 248 PINCTRL_PIN(133, "GPIO_133"), 249 PINCTRL_PIN(134, "GPIO_134"), 250 PINCTRL_PIN(135, "GPIO_135"), 251 PINCTRL_PIN(136, "GPIO_136"), 252 PINCTRL_PIN(137, "GPIO_137"), 253 PINCTRL_PIN(138, "GPIO_138"), 254 PINCTRL_PIN(139, "GPIO_139"), 255 PINCTRL_PIN(140, "GPIO_140"), 256 PINCTRL_PIN(141, "GPIO_141"), 257 PINCTRL_PIN(142, "GPIO_142"), 258 PINCTRL_PIN(143, "GPIO_143"), 259 PINCTRL_PIN(144, "GPIO_144"), 260 PINCTRL_PIN(145, "GPIO_145"), 261 PINCTRL_PIN(146, "GPIO_146"), 262 PINCTRL_PIN(147, "GPIO_147"), 263 PINCTRL_PIN(148, "GPIO_148"), 264 PINCTRL_PIN(149, "GPIO_149"), 265 PINCTRL_PIN(150, "GPIO_150"), 266 PINCTRL_PIN(151, "GPIO_151"), 267 PINCTRL_PIN(152, "GPIO_152"), 268 PINCTRL_PIN(153, "GPIO_153"), 269 PINCTRL_PIN(154, "GPIO_154"), 270 PINCTRL_PIN(155, "GPIO_155"), 271 PINCTRL_PIN(156, "UFS_RESET"), 272 PINCTRL_PIN(157, "SDC1_RCLK"), 273 PINCTRL_PIN(158, "SDC1_CLK"), 274 PINCTRL_PIN(159, "SDC1_CMD"), 275 PINCTRL_PIN(160, "SDC1_DATA"), 276 PINCTRL_PIN(161, "SDC2_CLK"), 277 PINCTRL_PIN(162, "SDC2_CMD"), 278 PINCTRL_PIN(163, "SDC2_DATA"), 279 }; 280 281 #define DECLARE_MSM_GPIO_PINS(pin) \ 282 static const unsigned int gpio##pin##_pins[] = { pin } 283 DECLARE_MSM_GPIO_PINS(0); 284 DECLARE_MSM_GPIO_PINS(1); 285 DECLARE_MSM_GPIO_PINS(2); 286 DECLARE_MSM_GPIO_PINS(3); 287 DECLARE_MSM_GPIO_PINS(4); 288 DECLARE_MSM_GPIO_PINS(5); 289 DECLARE_MSM_GPIO_PINS(6); 290 DECLARE_MSM_GPIO_PINS(7); 291 DECLARE_MSM_GPIO_PINS(8); 292 DECLARE_MSM_GPIO_PINS(9); 293 DECLARE_MSM_GPIO_PINS(10); 294 DECLARE_MSM_GPIO_PINS(11); 295 DECLARE_MSM_GPIO_PINS(12); 296 DECLARE_MSM_GPIO_PINS(13); 297 DECLARE_MSM_GPIO_PINS(14); 298 DECLARE_MSM_GPIO_PINS(15); 299 DECLARE_MSM_GPIO_PINS(16); 300 DECLARE_MSM_GPIO_PINS(17); 301 DECLARE_MSM_GPIO_PINS(18); 302 DECLARE_MSM_GPIO_PINS(19); 303 DECLARE_MSM_GPIO_PINS(20); 304 DECLARE_MSM_GPIO_PINS(21); 305 DECLARE_MSM_GPIO_PINS(22); 306 DECLARE_MSM_GPIO_PINS(23); 307 DECLARE_MSM_GPIO_PINS(24); 308 DECLARE_MSM_GPIO_PINS(25); 309 DECLARE_MSM_GPIO_PINS(26); 310 DECLARE_MSM_GPIO_PINS(27); 311 DECLARE_MSM_GPIO_PINS(28); 312 DECLARE_MSM_GPIO_PINS(29); 313 DECLARE_MSM_GPIO_PINS(30); 314 DECLARE_MSM_GPIO_PINS(31); 315 DECLARE_MSM_GPIO_PINS(32); 316 DECLARE_MSM_GPIO_PINS(33); 317 DECLARE_MSM_GPIO_PINS(34); 318 DECLARE_MSM_GPIO_PINS(35); 319 DECLARE_MSM_GPIO_PINS(36); 320 DECLARE_MSM_GPIO_PINS(37); 321 DECLARE_MSM_GPIO_PINS(38); 322 DECLARE_MSM_GPIO_PINS(39); 323 DECLARE_MSM_GPIO_PINS(40); 324 DECLARE_MSM_GPIO_PINS(41); 325 DECLARE_MSM_GPIO_PINS(42); 326 DECLARE_MSM_GPIO_PINS(43); 327 DECLARE_MSM_GPIO_PINS(44); 328 DECLARE_MSM_GPIO_PINS(45); 329 DECLARE_MSM_GPIO_PINS(46); 330 DECLARE_MSM_GPIO_PINS(47); 331 DECLARE_MSM_GPIO_PINS(48); 332 DECLARE_MSM_GPIO_PINS(49); 333 DECLARE_MSM_GPIO_PINS(50); 334 DECLARE_MSM_GPIO_PINS(51); 335 DECLARE_MSM_GPIO_PINS(52); 336 DECLARE_MSM_GPIO_PINS(53); 337 DECLARE_MSM_GPIO_PINS(54); 338 DECLARE_MSM_GPIO_PINS(55); 339 DECLARE_MSM_GPIO_PINS(56); 340 DECLARE_MSM_GPIO_PINS(57); 341 DECLARE_MSM_GPIO_PINS(58); 342 DECLARE_MSM_GPIO_PINS(59); 343 DECLARE_MSM_GPIO_PINS(60); 344 DECLARE_MSM_GPIO_PINS(61); 345 DECLARE_MSM_GPIO_PINS(62); 346 DECLARE_MSM_GPIO_PINS(63); 347 DECLARE_MSM_GPIO_PINS(64); 348 DECLARE_MSM_GPIO_PINS(65); 349 DECLARE_MSM_GPIO_PINS(66); 350 DECLARE_MSM_GPIO_PINS(67); 351 DECLARE_MSM_GPIO_PINS(68); 352 DECLARE_MSM_GPIO_PINS(69); 353 DECLARE_MSM_GPIO_PINS(70); 354 DECLARE_MSM_GPIO_PINS(71); 355 DECLARE_MSM_GPIO_PINS(72); 356 DECLARE_MSM_GPIO_PINS(73); 357 DECLARE_MSM_GPIO_PINS(74); 358 DECLARE_MSM_GPIO_PINS(75); 359 DECLARE_MSM_GPIO_PINS(76); 360 DECLARE_MSM_GPIO_PINS(77); 361 DECLARE_MSM_GPIO_PINS(78); 362 DECLARE_MSM_GPIO_PINS(79); 363 DECLARE_MSM_GPIO_PINS(80); 364 DECLARE_MSM_GPIO_PINS(81); 365 DECLARE_MSM_GPIO_PINS(82); 366 DECLARE_MSM_GPIO_PINS(83); 367 DECLARE_MSM_GPIO_PINS(84); 368 DECLARE_MSM_GPIO_PINS(85); 369 DECLARE_MSM_GPIO_PINS(86); 370 DECLARE_MSM_GPIO_PINS(87); 371 DECLARE_MSM_GPIO_PINS(88); 372 DECLARE_MSM_GPIO_PINS(89); 373 DECLARE_MSM_GPIO_PINS(90); 374 DECLARE_MSM_GPIO_PINS(91); 375 DECLARE_MSM_GPIO_PINS(92); 376 DECLARE_MSM_GPIO_PINS(93); 377 DECLARE_MSM_GPIO_PINS(94); 378 DECLARE_MSM_GPIO_PINS(95); 379 DECLARE_MSM_GPIO_PINS(96); 380 DECLARE_MSM_GPIO_PINS(97); 381 DECLARE_MSM_GPIO_PINS(98); 382 DECLARE_MSM_GPIO_PINS(99); 383 DECLARE_MSM_GPIO_PINS(100); 384 DECLARE_MSM_GPIO_PINS(101); 385 DECLARE_MSM_GPIO_PINS(102); 386 DECLARE_MSM_GPIO_PINS(103); 387 DECLARE_MSM_GPIO_PINS(104); 388 DECLARE_MSM_GPIO_PINS(105); 389 DECLARE_MSM_GPIO_PINS(106); 390 DECLARE_MSM_GPIO_PINS(107); 391 DECLARE_MSM_GPIO_PINS(108); 392 DECLARE_MSM_GPIO_PINS(109); 393 DECLARE_MSM_GPIO_PINS(110); 394 DECLARE_MSM_GPIO_PINS(111); 395 DECLARE_MSM_GPIO_PINS(112); 396 DECLARE_MSM_GPIO_PINS(113); 397 DECLARE_MSM_GPIO_PINS(114); 398 DECLARE_MSM_GPIO_PINS(115); 399 DECLARE_MSM_GPIO_PINS(116); 400 DECLARE_MSM_GPIO_PINS(117); 401 DECLARE_MSM_GPIO_PINS(118); 402 DECLARE_MSM_GPIO_PINS(119); 403 DECLARE_MSM_GPIO_PINS(120); 404 DECLARE_MSM_GPIO_PINS(121); 405 DECLARE_MSM_GPIO_PINS(122); 406 DECLARE_MSM_GPIO_PINS(123); 407 DECLARE_MSM_GPIO_PINS(124); 408 DECLARE_MSM_GPIO_PINS(125); 409 DECLARE_MSM_GPIO_PINS(126); 410 DECLARE_MSM_GPIO_PINS(127); 411 DECLARE_MSM_GPIO_PINS(128); 412 DECLARE_MSM_GPIO_PINS(129); 413 DECLARE_MSM_GPIO_PINS(130); 414 DECLARE_MSM_GPIO_PINS(131); 415 DECLARE_MSM_GPIO_PINS(132); 416 DECLARE_MSM_GPIO_PINS(133); 417 DECLARE_MSM_GPIO_PINS(134); 418 DECLARE_MSM_GPIO_PINS(135); 419 DECLARE_MSM_GPIO_PINS(136); 420 DECLARE_MSM_GPIO_PINS(137); 421 DECLARE_MSM_GPIO_PINS(138); 422 DECLARE_MSM_GPIO_PINS(139); 423 DECLARE_MSM_GPIO_PINS(140); 424 DECLARE_MSM_GPIO_PINS(141); 425 DECLARE_MSM_GPIO_PINS(142); 426 DECLARE_MSM_GPIO_PINS(143); 427 DECLARE_MSM_GPIO_PINS(144); 428 DECLARE_MSM_GPIO_PINS(145); 429 DECLARE_MSM_GPIO_PINS(146); 430 DECLARE_MSM_GPIO_PINS(147); 431 DECLARE_MSM_GPIO_PINS(148); 432 DECLARE_MSM_GPIO_PINS(149); 433 DECLARE_MSM_GPIO_PINS(150); 434 DECLARE_MSM_GPIO_PINS(151); 435 DECLARE_MSM_GPIO_PINS(152); 436 DECLARE_MSM_GPIO_PINS(153); 437 DECLARE_MSM_GPIO_PINS(154); 438 DECLARE_MSM_GPIO_PINS(155); 439 440 441 static const unsigned int sdc1_rclk_pins[] = { 157 }; 442 static const unsigned int sdc1_clk_pins[] = { 158 }; 443 static const unsigned int sdc1_cmd_pins[] = { 159 }; 444 static const unsigned int sdc1_data_pins[] = { 160 }; 445 static const unsigned int sdc2_clk_pins[] = { 161 }; 446 static const unsigned int sdc2_cmd_pins[] = { 162 }; 447 static const unsigned int sdc2_data_pins[] = { 163 }; 448 static const unsigned int ufs_reset_pins[] = { 156 }; 449 450 enum sm6375_functions { 451 msm_mux_adsp_ext, 452 msm_mux_agera_pll, 453 msm_mux_atest_char, 454 msm_mux_atest_char0, 455 msm_mux_atest_char1, 456 msm_mux_atest_char2, 457 msm_mux_atest_char3, 458 msm_mux_atest_tsens, 459 msm_mux_atest_tsens2, 460 msm_mux_atest_usb1, 461 msm_mux_atest_usb10, 462 msm_mux_atest_usb11, 463 msm_mux_atest_usb12, 464 msm_mux_atest_usb13, 465 msm_mux_atest_usb2, 466 msm_mux_atest_usb20, 467 msm_mux_atest_usb21, 468 msm_mux_atest_usb22, 469 msm_mux_atest_usb23, 470 msm_mux_audio_ref, 471 msm_mux_btfm_slimbus, 472 msm_mux_cam_mclk, 473 msm_mux_cci_async, 474 msm_mux_cci_i2c, 475 msm_mux_cci_timer0, 476 msm_mux_cci_timer1, 477 msm_mux_cci_timer2, 478 msm_mux_cci_timer3, 479 msm_mux_cci_timer4, 480 msm_mux_cri_trng, 481 msm_mux_dbg_out, 482 msm_mux_ddr_bist, 483 msm_mux_ddr_pxi0, 484 msm_mux_ddr_pxi1, 485 msm_mux_ddr_pxi2, 486 msm_mux_ddr_pxi3, 487 msm_mux_dp_hot, 488 msm_mux_edp_lcd, 489 msm_mux_gcc_gp1, 490 msm_mux_gcc_gp2, 491 msm_mux_gcc_gp3, 492 msm_mux_gp_pdm0, 493 msm_mux_gp_pdm1, 494 msm_mux_gp_pdm2, 495 msm_mux_gpio, 496 msm_mux_gps_tx, 497 msm_mux_ibi_i3c, 498 msm_mux_jitter_bist, 499 msm_mux_ldo_en, 500 msm_mux_ldo_update, 501 msm_mux_lpass_ext, 502 msm_mux_m_voc, 503 msm_mux_mclk, 504 msm_mux_mdp_vsync, 505 msm_mux_mdp_vsync0, 506 msm_mux_mdp_vsync1, 507 msm_mux_mdp_vsync2, 508 msm_mux_mdp_vsync3, 509 msm_mux_mi2s_0, 510 msm_mux_mi2s_1, 511 msm_mux_mi2s_2, 512 msm_mux_mss_lte, 513 msm_mux_nav_gpio, 514 msm_mux_nav_pps, 515 msm_mux_pa_indicator, 516 msm_mux_phase_flag0, 517 msm_mux_phase_flag1, 518 msm_mux_phase_flag10, 519 msm_mux_phase_flag11, 520 msm_mux_phase_flag12, 521 msm_mux_phase_flag13, 522 msm_mux_phase_flag14, 523 msm_mux_phase_flag15, 524 msm_mux_phase_flag16, 525 msm_mux_phase_flag17, 526 msm_mux_phase_flag18, 527 msm_mux_phase_flag19, 528 msm_mux_phase_flag2, 529 msm_mux_phase_flag20, 530 msm_mux_phase_flag21, 531 msm_mux_phase_flag22, 532 msm_mux_phase_flag23, 533 msm_mux_phase_flag24, 534 msm_mux_phase_flag25, 535 msm_mux_phase_flag26, 536 msm_mux_phase_flag27, 537 msm_mux_phase_flag28, 538 msm_mux_phase_flag29, 539 msm_mux_phase_flag3, 540 msm_mux_phase_flag30, 541 msm_mux_phase_flag31, 542 msm_mux_phase_flag4, 543 msm_mux_phase_flag5, 544 msm_mux_phase_flag6, 545 msm_mux_phase_flag7, 546 msm_mux_phase_flag8, 547 msm_mux_phase_flag9, 548 msm_mux_pll_bist, 549 msm_mux_pll_bypassnl, 550 msm_mux_pll_clk, 551 msm_mux_pll_reset, 552 msm_mux_prng_rosc0, 553 msm_mux_prng_rosc1, 554 msm_mux_prng_rosc2, 555 msm_mux_prng_rosc3, 556 msm_mux_qdss_cti, 557 msm_mux_qdss_gpio, 558 msm_mux_qdss_gpio0, 559 msm_mux_qdss_gpio1, 560 msm_mux_qdss_gpio10, 561 msm_mux_qdss_gpio11, 562 msm_mux_qdss_gpio12, 563 msm_mux_qdss_gpio13, 564 msm_mux_qdss_gpio14, 565 msm_mux_qdss_gpio15, 566 msm_mux_qdss_gpio2, 567 msm_mux_qdss_gpio3, 568 msm_mux_qdss_gpio4, 569 msm_mux_qdss_gpio5, 570 msm_mux_qdss_gpio6, 571 msm_mux_qdss_gpio7, 572 msm_mux_qdss_gpio8, 573 msm_mux_qdss_gpio9, 574 msm_mux_qlink0_enable, 575 msm_mux_qlink0_request, 576 msm_mux_qlink0_wmss, 577 msm_mux_qlink1_enable, 578 msm_mux_qlink1_request, 579 msm_mux_qlink1_wmss, 580 msm_mux_qup00, 581 msm_mux_qup01, 582 msm_mux_qup02, 583 msm_mux_qup10, 584 msm_mux_qup11_f1, 585 msm_mux_qup11_f2, 586 msm_mux_qup12, 587 msm_mux_qup13_f1, 588 msm_mux_qup13_f2, 589 msm_mux_qup14, 590 msm_mux_sd_write, 591 msm_mux_sdc1_tb, 592 msm_mux_sdc2_tb, 593 msm_mux_sp_cmu, 594 msm_mux_tgu_ch0, 595 msm_mux_tgu_ch1, 596 msm_mux_tgu_ch2, 597 msm_mux_tgu_ch3, 598 msm_mux_tsense_pwm1, 599 msm_mux_tsense_pwm2, 600 msm_mux_uim1_clk, 601 msm_mux_uim1_data, 602 msm_mux_uim1_present, 603 msm_mux_uim1_reset, 604 msm_mux_uim2_clk, 605 msm_mux_uim2_data, 606 msm_mux_uim2_present, 607 msm_mux_uim2_reset, 608 msm_mux_usb2phy_ac, 609 msm_mux_usb_phy, 610 msm_mux_vfr_1, 611 msm_mux_vsense_trigger, 612 msm_mux_wlan1_adc0, 613 msm_mux_wlan1_adc1, 614 msm_mux_wlan2_adc0, 615 msm_mux_wlan2_adc1, 616 msm_mux__, 617 }; 618 619 static const char * const gpio_groups[] = { 620 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 621 "gpio8", "gpio9", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", 622 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", 623 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 624 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio36", 625 "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", 626 "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50", 627 "gpio51", "gpio52", "gpio53", "gpio56", "gpio57", "gpio58", "gpio59", 628 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", "gpio66", 629 "gpio67", "gpio68", "gpio69", "gpio75", "gpio76", "gpio77", "gpio78", 630 "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", "gpio85", 631 "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92", 632 "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", "gpio99", 633 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", 634 "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", "gpio111", 635 "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", "gpio117", 636 "gpio118", "gpio119", "gpio120", "gpio124", "gpio125", "gpio126", 637 "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", 638 "gpio133", "gpio134", "gpio135", "gpio136", "gpio141", "gpio142", 639 "gpio143", "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", 640 "gpio155", 641 }; 642 static const char * const agera_pll_groups[] = { 643 "gpio89", 644 }; 645 static const char * const cci_async_groups[] = { 646 "gpio35", "gpio36", "gpio48", "gpio52", "gpio53", 647 }; 648 static const char * const cci_i2c_groups[] = { 649 "gpio2", "gpio3", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", 650 "gpio44", 651 }; 652 static const char * const gps_tx_groups[] = { 653 "gpio101", "gpio102", "gpio107", "gpio108", 654 }; 655 static const char * const gp_pdm0_groups[] = { 656 "gpio37", "gpio68", 657 }; 658 static const char * const gp_pdm1_groups[] = { 659 "gpio8", "gpio52", 660 }; 661 static const char * const gp_pdm2_groups[] = { 662 "gpio57", 663 }; 664 static const char * const jitter_bist_groups[] = { 665 "gpio90", 666 }; 667 static const char * const mclk_groups[] = { 668 "gpio93", 669 }; 670 static const char * const mdp_vsync_groups[] = { 671 "gpio6", "gpio23", "gpio24", "gpio27", "gpio28", 672 }; 673 static const char * const mss_lte_groups[] = { 674 "gpio65", "gpio66", 675 }; 676 static const char * const nav_pps_groups[] = { 677 "gpio101", "gpio101", "gpio102", "gpio102", 678 }; 679 static const char * const pll_bist_groups[] = { 680 "gpio27", 681 }; 682 static const char * const qlink0_wmss_groups[] = { 683 "gpio103", 684 }; 685 static const char * const qlink1_wmss_groups[] = { 686 "gpio106", 687 }; 688 static const char * const usb_phy_groups[] = { 689 "gpio124", 690 }; 691 static const char * const adsp_ext_groups[] = { 692 "gpio87", 693 }; 694 static const char * const atest_char_groups[] = { 695 "gpio95", 696 }; 697 static const char * const atest_char0_groups[] = { 698 "gpio96", 699 }; 700 static const char * const atest_char1_groups[] = { 701 "gpio97", 702 }; 703 static const char * const atest_char2_groups[] = { 704 "gpio98", 705 }; 706 static const char * const atest_char3_groups[] = { 707 "gpio99", 708 }; 709 static const char * const atest_tsens_groups[] = { 710 "gpio92", 711 }; 712 static const char * const atest_tsens2_groups[] = { 713 "gpio93", 714 }; 715 static const char * const atest_usb1_groups[] = { 716 "gpio83", 717 }; 718 static const char * const atest_usb10_groups[] = { 719 "gpio84", 720 }; 721 static const char * const atest_usb11_groups[] = { 722 "gpio85", 723 }; 724 static const char * const atest_usb12_groups[] = { 725 "gpio86", 726 }; 727 static const char * const atest_usb13_groups[] = { 728 "gpio87", 729 }; 730 static const char * const atest_usb2_groups[] = { 731 "gpio88", 732 }; 733 static const char * const atest_usb20_groups[] = { 734 "gpio89", 735 }; 736 static const char * const atest_usb21_groups[] = { 737 "gpio90", 738 }; 739 static const char * const atest_usb22_groups[] = { 740 "gpio91", 741 }; 742 static const char * const atest_usb23_groups[] = { 743 "gpio92", 744 }; 745 static const char * const audio_ref_groups[] = { 746 "gpio60", 747 }; 748 static const char * const btfm_slimbus_groups[] = { 749 "gpio67", "gpio68", "gpio86", "gpio87", 750 }; 751 static const char * const cam_mclk_groups[] = { 752 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 753 }; 754 static const char * const cci_timer0_groups[] = { 755 "gpio34", 756 }; 757 static const char * const cci_timer1_groups[] = { 758 "gpio35", 759 }; 760 static const char * const cci_timer2_groups[] = { 761 "gpio36", 762 }; 763 static const char * const cci_timer3_groups[] = { 764 "gpio37", 765 }; 766 static const char * const cci_timer4_groups[] = { 767 "gpio38", 768 }; 769 static const char * const cri_trng_groups[] = { 770 "gpio0", "gpio1", "gpio2", 771 }; 772 static const char * const dbg_out_groups[] = { 773 "gpio3", 774 }; 775 static const char * const ddr_bist_groups[] = { 776 "gpio19", "gpio20", "gpio21", "gpio22", 777 }; 778 static const char * const ddr_pxi0_groups[] = { 779 "gpio86", "gpio90", 780 }; 781 static const char * const ddr_pxi1_groups[] = { 782 "gpio87", "gpio91", 783 }; 784 static const char * const ddr_pxi2_groups[] = { 785 "gpio88", "gpio92", 786 }; 787 static const char * const ddr_pxi3_groups[] = { 788 "gpio89", "gpio93", 789 }; 790 static const char * const dp_hot_groups[] = { 791 "gpio12", "gpio118", 792 }; 793 static const char * const edp_lcd_groups[] = { 794 "gpio23", 795 }; 796 static const char * const gcc_gp1_groups[] = { 797 "gpio48", "gpio58", 798 }; 799 static const char * const gcc_gp2_groups[] = { 800 "gpio21", 801 }; 802 static const char * const gcc_gp3_groups[] = { 803 "gpio22", 804 }; 805 static const char * const ibi_i3c_groups[] = { 806 "gpio0", "gpio1", 807 }; 808 static const char * const ldo_en_groups[] = { 809 "gpio95", 810 }; 811 static const char * const ldo_update_groups[] = { 812 "gpio96", 813 }; 814 static const char * const lpass_ext_groups[] = { 815 "gpio60", "gpio93", 816 }; 817 static const char * const m_voc_groups[] = { 818 "gpio12", 819 }; 820 static const char * const mdp_vsync0_groups[] = { 821 "gpio47", 822 }; 823 static const char * const mdp_vsync1_groups[] = { 824 "gpio48", 825 }; 826 static const char * const mdp_vsync2_groups[] = { 827 "gpio56", 828 }; 829 static const char * const mdp_vsync3_groups[] = { 830 "gpio57", 831 }; 832 static const char * const mi2s_0_groups[] = { 833 "gpio88", "gpio89", "gpio90", "gpio91", 834 }; 835 static const char * const mi2s_1_groups[] = { 836 "gpio67", "gpio68", "gpio86", "gpio87", 837 }; 838 static const char * const mi2s_2_groups[] = { 839 "gpio60", 840 }; 841 static const char * const nav_gpio_groups[] = { 842 "gpio101", "gpio102", 843 }; 844 static const char * const pa_indicator_groups[] = { 845 "gpio118", 846 }; 847 static const char * const phase_flag0_groups[] = { 848 "gpio12", 849 }; 850 static const char * const phase_flag1_groups[] = { 851 "gpio17", 852 }; 853 static const char * const phase_flag10_groups[] = { 854 "gpio41", 855 }; 856 static const char * const phase_flag11_groups[] = { 857 "gpio42", 858 }; 859 static const char * const phase_flag12_groups[] = { 860 "gpio43", 861 }; 862 static const char * const phase_flag13_groups[] = { 863 "gpio44", 864 }; 865 static const char * const phase_flag14_groups[] = { 866 "gpio45", 867 }; 868 static const char * const phase_flag15_groups[] = { 869 "gpio46", 870 }; 871 static const char * const phase_flag16_groups[] = { 872 "gpio47", 873 }; 874 static const char * const phase_flag17_groups[] = { 875 "gpio48", 876 }; 877 static const char * const phase_flag18_groups[] = { 878 "gpio49", 879 }; 880 static const char * const phase_flag19_groups[] = { 881 "gpio50", 882 }; 883 static const char * const phase_flag2_groups[] = { 884 "gpio18", 885 }; 886 static const char * const phase_flag20_groups[] = { 887 "gpio51", 888 }; 889 static const char * const phase_flag21_groups[] = { 890 "gpio52", 891 }; 892 static const char * const phase_flag22_groups[] = { 893 "gpio53", 894 }; 895 static const char * const phase_flag23_groups[] = { 896 "gpio56", 897 }; 898 static const char * const phase_flag24_groups[] = { 899 "gpio57", 900 }; 901 static const char * const phase_flag25_groups[] = { 902 "gpio60", 903 }; 904 static const char * const phase_flag26_groups[] = { 905 "gpio61", 906 }; 907 static const char * const phase_flag27_groups[] = { 908 "gpio62", 909 }; 910 static const char * const phase_flag28_groups[] = { 911 "gpio63", 912 }; 913 static const char * const phase_flag29_groups[] = { 914 "gpio64", 915 }; 916 static const char * const phase_flag3_groups[] = { 917 "gpio34", 918 }; 919 static const char * const phase_flag30_groups[] = { 920 "gpio67", 921 }; 922 static const char * const phase_flag31_groups[] = { 923 "gpio68", 924 }; 925 static const char * const phase_flag4_groups[] = { 926 "gpio35", 927 }; 928 static const char * const phase_flag5_groups[] = { 929 "gpio36", 930 }; 931 static const char * const phase_flag6_groups[] = { 932 "gpio37", 933 }; 934 static const char * const phase_flag7_groups[] = { 935 "gpio38", 936 }; 937 static const char * const phase_flag8_groups[] = { 938 "gpio39", 939 }; 940 static const char * const phase_flag9_groups[] = { 941 "gpio40", 942 }; 943 static const char * const pll_bypassnl_groups[] = { 944 "gpio13", 945 }; 946 static const char * const pll_clk_groups[] = { 947 "gpio98", 948 }; 949 static const char * const pll_reset_groups[] = { 950 "gpio14", 951 }; 952 static const char * const prng_rosc0_groups[] = { 953 "gpio97", 954 }; 955 static const char * const prng_rosc1_groups[] = { 956 "gpio98", 957 }; 958 static const char * const prng_rosc2_groups[] = { 959 "gpio99", 960 }; 961 static const char * const prng_rosc3_groups[] = { 962 "gpio100", 963 }; 964 static const char * const qdss_cti_groups[] = { 965 "gpio2", "gpio3", "gpio6", "gpio7", "gpio61", "gpio62", "gpio86", 966 "gpio87", 967 }; 968 static const char * const qdss_gpio_groups[] = { 969 "gpio8", "gpio9", "gpio63", "gpio64", 970 }; 971 static const char * const qdss_gpio0_groups[] = { 972 "gpio39", "gpio65", 973 }; 974 static const char * const qdss_gpio1_groups[] = { 975 "gpio40", "gpio66", 976 }; 977 static const char * const qdss_gpio10_groups[] = { 978 "gpio50", "gpio56", 979 }; 980 static const char * const qdss_gpio11_groups[] = { 981 "gpio51", "gpio57", 982 }; 983 static const char * const qdss_gpio12_groups[] = { 984 "gpio34", "gpio52", 985 }; 986 static const char * const qdss_gpio13_groups[] = { 987 "gpio35", "gpio53", 988 }; 989 static const char * const qdss_gpio14_groups[] = { 990 "gpio27", "gpio36", 991 }; 992 static const char * const qdss_gpio15_groups[] = { 993 "gpio28", "gpio37", 994 }; 995 static const char * const qdss_gpio2_groups[] = { 996 "gpio38", "gpio41", 997 }; 998 static const char * const qdss_gpio3_groups[] = { 999 "gpio42", "gpio47", 1000 }; 1001 static const char * const qdss_gpio4_groups[] = { 1002 "gpio43", "gpio88", 1003 }; 1004 static const char * const qdss_gpio5_groups[] = { 1005 "gpio44", "gpio89", 1006 }; 1007 static const char * const qdss_gpio6_groups[] = { 1008 "gpio45", "gpio90", 1009 }; 1010 static const char * const qdss_gpio7_groups[] = { 1011 "gpio46", "gpio91", 1012 }; 1013 static const char * const qdss_gpio8_groups[] = { 1014 "gpio48", "gpio92", 1015 }; 1016 static const char * const qdss_gpio9_groups[] = { 1017 "gpio49", "gpio93", 1018 }; 1019 static const char * const qlink0_enable_groups[] = { 1020 "gpio105", 1021 }; 1022 static const char * const qlink0_request_groups[] = { 1023 "gpio104", 1024 }; 1025 static const char * const qlink1_enable_groups[] = { 1026 "gpio108", 1027 }; 1028 static const char * const qlink1_request_groups[] = { 1029 "gpio107", 1030 }; 1031 static const char * const qup00_groups[] = { 1032 "gpio0", "gpio1", "gpio2", "gpio3", 1033 }; 1034 static const char * const qup01_groups[] = { 1035 "gpio61", "gpio62", "gpio63", "gpio64", 1036 }; 1037 static const char * const qup02_groups[] = { 1038 "gpio45", "gpio46", "gpio48", "gpio56", "gpio57", 1039 }; 1040 static const char * const qup10_groups[] = { 1041 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", 1042 }; 1043 static const char * const qup11_f1_groups[] = { 1044 "gpio27", "gpio28", 1045 }; 1046 static const char * const qup11_f2_groups[] = { 1047 "gpio27", "gpio28", 1048 }; 1049 1050 static const char * const qup12_groups[] = { 1051 "gpio19", "gpio19", "gpio20", "gpio20", 1052 }; 1053 static const char * const qup13_f1_groups[] = { 1054 "gpio25", "gpio26", 1055 }; 1056 static const char * const qup13_f2_groups[] = { 1057 "gpio25", "gpio26", 1058 }; 1059 static const char * const qup14_groups[] = { 1060 "gpio4", "gpio4", "gpio5", "gpio5", 1061 }; 1062 static const char * const sd_write_groups[] = { 1063 "gpio85", 1064 }; 1065 static const char * const sdc1_tb_groups[] = { 1066 "gpio4", 1067 }; 1068 static const char * const sdc2_tb_groups[] = { 1069 "gpio5", 1070 }; 1071 static const char * const sp_cmu_groups[] = { 1072 "gpio3", 1073 }; 1074 static const char * const tgu_ch0_groups[] = { 1075 "gpio61", 1076 }; 1077 static const char * const tgu_ch1_groups[] = { 1078 "gpio62", 1079 }; 1080 static const char * const tgu_ch2_groups[] = { 1081 "gpio63", 1082 }; 1083 static const char * const tgu_ch3_groups[] = { 1084 "gpio64", 1085 }; 1086 static const char * const tsense_pwm1_groups[] = { 1087 "gpio88", 1088 }; 1089 static const char * const tsense_pwm2_groups[] = { 1090 "gpio88", 1091 }; 1092 static const char * const uim1_clk_groups[] = { 1093 "gpio80", 1094 }; 1095 static const char * const uim1_data_groups[] = { 1096 "gpio79", 1097 }; 1098 static const char * const uim1_present_groups[] = { 1099 "gpio82", 1100 }; 1101 static const char * const uim1_reset_groups[] = { 1102 "gpio81", 1103 }; 1104 static const char * const uim2_clk_groups[] = { 1105 "gpio76", 1106 }; 1107 static const char * const uim2_data_groups[] = { 1108 "gpio75", 1109 }; 1110 static const char * const uim2_present_groups[] = { 1111 "gpio78", 1112 }; 1113 static const char * const uim2_reset_groups[] = { 1114 "gpio77", 1115 }; 1116 static const char * const usb2phy_ac_groups[] = { 1117 "gpio47", 1118 }; 1119 static const char * const vfr_1_groups[] = { 1120 "gpio49", 1121 }; 1122 static const char * const vsense_trigger_groups[] = { 1123 "gpio89", 1124 }; 1125 static const char * const wlan1_adc0_groups[] = { 1126 "gpio90", 1127 }; 1128 static const char * const wlan1_adc1_groups[] = { 1129 "gpio92", 1130 }; 1131 static const char * const wlan2_adc0_groups[] = { 1132 "gpio91", 1133 }; 1134 static const char * const wlan2_adc1_groups[] = { 1135 "gpio93", 1136 }; 1137 1138 static const struct msm_function sm6375_functions[] = { 1139 FUNCTION(adsp_ext), 1140 FUNCTION(agera_pll), 1141 FUNCTION(atest_char), 1142 FUNCTION(atest_char0), 1143 FUNCTION(atest_char1), 1144 FUNCTION(atest_char2), 1145 FUNCTION(atest_char3), 1146 FUNCTION(atest_tsens), 1147 FUNCTION(atest_tsens2), 1148 FUNCTION(atest_usb1), 1149 FUNCTION(atest_usb10), 1150 FUNCTION(atest_usb11), 1151 FUNCTION(atest_usb12), 1152 FUNCTION(atest_usb13), 1153 FUNCTION(atest_usb2), 1154 FUNCTION(atest_usb20), 1155 FUNCTION(atest_usb21), 1156 FUNCTION(atest_usb22), 1157 FUNCTION(atest_usb23), 1158 FUNCTION(audio_ref), 1159 FUNCTION(btfm_slimbus), 1160 FUNCTION(cam_mclk), 1161 FUNCTION(cci_async), 1162 FUNCTION(cci_i2c), 1163 FUNCTION(cci_timer0), 1164 FUNCTION(cci_timer1), 1165 FUNCTION(cci_timer2), 1166 FUNCTION(cci_timer3), 1167 FUNCTION(cci_timer4), 1168 FUNCTION(cri_trng), 1169 FUNCTION(dbg_out), 1170 FUNCTION(ddr_bist), 1171 FUNCTION(ddr_pxi0), 1172 FUNCTION(ddr_pxi1), 1173 FUNCTION(ddr_pxi2), 1174 FUNCTION(ddr_pxi3), 1175 FUNCTION(dp_hot), 1176 FUNCTION(edp_lcd), 1177 FUNCTION(gcc_gp1), 1178 FUNCTION(gcc_gp2), 1179 FUNCTION(gcc_gp3), 1180 FUNCTION(gp_pdm0), 1181 FUNCTION(gp_pdm1), 1182 FUNCTION(gp_pdm2), 1183 FUNCTION(gpio), 1184 FUNCTION(gps_tx), 1185 FUNCTION(ibi_i3c), 1186 FUNCTION(jitter_bist), 1187 FUNCTION(ldo_en), 1188 FUNCTION(ldo_update), 1189 FUNCTION(lpass_ext), 1190 FUNCTION(m_voc), 1191 FUNCTION(mclk), 1192 FUNCTION(mdp_vsync), 1193 FUNCTION(mdp_vsync0), 1194 FUNCTION(mdp_vsync1), 1195 FUNCTION(mdp_vsync2), 1196 FUNCTION(mdp_vsync3), 1197 FUNCTION(mi2s_0), 1198 FUNCTION(mi2s_1), 1199 FUNCTION(mi2s_2), 1200 FUNCTION(mss_lte), 1201 FUNCTION(nav_gpio), 1202 FUNCTION(nav_pps), 1203 FUNCTION(pa_indicator), 1204 FUNCTION(phase_flag0), 1205 FUNCTION(phase_flag1), 1206 FUNCTION(phase_flag10), 1207 FUNCTION(phase_flag11), 1208 FUNCTION(phase_flag12), 1209 FUNCTION(phase_flag13), 1210 FUNCTION(phase_flag14), 1211 FUNCTION(phase_flag15), 1212 FUNCTION(phase_flag16), 1213 FUNCTION(phase_flag17), 1214 FUNCTION(phase_flag18), 1215 FUNCTION(phase_flag19), 1216 FUNCTION(phase_flag2), 1217 FUNCTION(phase_flag20), 1218 FUNCTION(phase_flag21), 1219 FUNCTION(phase_flag22), 1220 FUNCTION(phase_flag23), 1221 FUNCTION(phase_flag24), 1222 FUNCTION(phase_flag25), 1223 FUNCTION(phase_flag26), 1224 FUNCTION(phase_flag27), 1225 FUNCTION(phase_flag28), 1226 FUNCTION(phase_flag29), 1227 FUNCTION(phase_flag3), 1228 FUNCTION(phase_flag30), 1229 FUNCTION(phase_flag31), 1230 FUNCTION(phase_flag4), 1231 FUNCTION(phase_flag5), 1232 FUNCTION(phase_flag6), 1233 FUNCTION(phase_flag7), 1234 FUNCTION(phase_flag8), 1235 FUNCTION(phase_flag9), 1236 FUNCTION(pll_bist), 1237 FUNCTION(pll_bypassnl), 1238 FUNCTION(pll_clk), 1239 FUNCTION(pll_reset), 1240 FUNCTION(prng_rosc0), 1241 FUNCTION(prng_rosc1), 1242 FUNCTION(prng_rosc2), 1243 FUNCTION(prng_rosc3), 1244 FUNCTION(qdss_cti), 1245 FUNCTION(qdss_gpio), 1246 FUNCTION(qdss_gpio0), 1247 FUNCTION(qdss_gpio1), 1248 FUNCTION(qdss_gpio10), 1249 FUNCTION(qdss_gpio11), 1250 FUNCTION(qdss_gpio12), 1251 FUNCTION(qdss_gpio13), 1252 FUNCTION(qdss_gpio14), 1253 FUNCTION(qdss_gpio15), 1254 FUNCTION(qdss_gpio2), 1255 FUNCTION(qdss_gpio3), 1256 FUNCTION(qdss_gpio4), 1257 FUNCTION(qdss_gpio5), 1258 FUNCTION(qdss_gpio6), 1259 FUNCTION(qdss_gpio7), 1260 FUNCTION(qdss_gpio8), 1261 FUNCTION(qdss_gpio9), 1262 FUNCTION(qlink0_enable), 1263 FUNCTION(qlink0_request), 1264 FUNCTION(qlink0_wmss), 1265 FUNCTION(qlink1_enable), 1266 FUNCTION(qlink1_request), 1267 FUNCTION(qlink1_wmss), 1268 FUNCTION(qup00), 1269 FUNCTION(qup01), 1270 FUNCTION(qup02), 1271 FUNCTION(qup10), 1272 FUNCTION(qup11_f1), 1273 FUNCTION(qup11_f2), 1274 FUNCTION(qup12), 1275 FUNCTION(qup13_f1), 1276 FUNCTION(qup13_f2), 1277 FUNCTION(qup14), 1278 FUNCTION(sd_write), 1279 FUNCTION(sdc1_tb), 1280 FUNCTION(sdc2_tb), 1281 FUNCTION(sp_cmu), 1282 FUNCTION(tgu_ch0), 1283 FUNCTION(tgu_ch1), 1284 FUNCTION(tgu_ch2), 1285 FUNCTION(tgu_ch3), 1286 FUNCTION(tsense_pwm1), 1287 FUNCTION(tsense_pwm2), 1288 FUNCTION(uim1_clk), 1289 FUNCTION(uim1_data), 1290 FUNCTION(uim1_present), 1291 FUNCTION(uim1_reset), 1292 FUNCTION(uim2_clk), 1293 FUNCTION(uim2_data), 1294 FUNCTION(uim2_present), 1295 FUNCTION(uim2_reset), 1296 FUNCTION(usb2phy_ac), 1297 FUNCTION(usb_phy), 1298 FUNCTION(vfr_1), 1299 FUNCTION(vsense_trigger), 1300 FUNCTION(wlan1_adc0), 1301 FUNCTION(wlan1_adc1), 1302 FUNCTION(wlan2_adc0), 1303 FUNCTION(wlan2_adc1), 1304 }; 1305 1306 /* 1307 * Every pin is maintained as a single group, and missing or non-existing pin 1308 * would be maintained as dummy group to synchronize pin group index with 1309 * pin descriptor registered with pinctrl core. 1310 * Clients would not be able to request these dummy pin groups. 1311 */ 1312 static const struct msm_pingroup sm6375_groups[] = { 1313 [0] = PINGROUP(0, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _), 1314 [1] = PINGROUP(1, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _), 1315 [2] = PINGROUP(2, qup00, cci_i2c, cri_trng, qdss_cti, _, _, _, _, _), 1316 [3] = PINGROUP(3, qup00, cci_i2c, sp_cmu, dbg_out, qdss_cti, _, _, _, _), 1317 [4] = PINGROUP(4, qup14, qup14, sdc1_tb, _, _, _, _, _, _), 1318 [5] = PINGROUP(5, qup14, qup14, sdc2_tb, _, _, _, _, _, _), 1319 [6] = PINGROUP(6, mdp_vsync, qdss_cti, _, _, _, _, _, _, _), 1320 [7] = PINGROUP(7, qdss_cti, _, _, _, _, _, _, _, _), 1321 [8] = PINGROUP(8, gp_pdm1, qdss_gpio, _, _, _, _, _, _, _), 1322 [9] = PINGROUP(9, qdss_gpio, _, _, _, _, _, _, _, _), 1323 [10] = PINGROUP(10, _, _, _, _, _, _, _, _, _), 1324 [11] = PINGROUP(11, _, _, _, _, _, _, _, _, _), 1325 [12] = PINGROUP(12, m_voc, dp_hot, _, phase_flag0, _, _, _, _, _), 1326 [13] = PINGROUP(13, qup10, pll_bypassnl, _, _, _, _, _, _, _), 1327 [14] = PINGROUP(14, qup10, pll_reset, _, _, _, _, _, _, _), 1328 [15] = PINGROUP(15, qup10, _, _, _, _, _, _, _, _), 1329 [16] = PINGROUP(16, qup10, _, _, _, _, _, _, _, _), 1330 [17] = PINGROUP(17, _, phase_flag1, qup10, _, _, _, _, _, _), 1331 [18] = PINGROUP(18, _, phase_flag2, _, _, _, _, _, _, _), 1332 [19] = PINGROUP(19, qup12, qup12, ddr_bist, _, _, _, _, _, _), 1333 [20] = PINGROUP(20, qup12, qup12, ddr_bist, _, _, _, _, _, _), 1334 [21] = PINGROUP(21, gcc_gp2, ddr_bist, _, _, _, _, _, _, _), 1335 [22] = PINGROUP(22, gcc_gp3, ddr_bist, _, _, _, _, _, _, _), 1336 [23] = PINGROUP(23, mdp_vsync, edp_lcd, _, _, _, _, _, _, _), 1337 [24] = PINGROUP(24, mdp_vsync, _, _, _, _, _, _, _, _), 1338 [25] = PINGROUP(25, qup13_f1, qup13_f2, _, _, _, _, _, _, _), 1339 [26] = PINGROUP(26, qup13_f1, qup13_f2, _, _, _, _, _, _, _), 1340 [27] = PINGROUP(27, qup11_f1, qup11_f2, mdp_vsync, pll_bist, _, qdss_gpio14, _, _, _), 1341 [28] = PINGROUP(28, qup11_f1, qup11_f2, mdp_vsync, _, qdss_gpio15, _, _, _, _), 1342 [29] = PINGROUP(29, cam_mclk, _, _, _, _, _, _, _, _), 1343 [30] = PINGROUP(30, cam_mclk, _, _, _, _, _, _, _, _), 1344 [31] = PINGROUP(31, cam_mclk, _, _, _, _, _, _, _, _), 1345 [32] = PINGROUP(32, cam_mclk, _, _, _, _, _, _, _, _), 1346 [33] = PINGROUP(33, cam_mclk, _, _, _, _, _, _, _, _), 1347 [34] = PINGROUP(34, cci_timer0, _, phase_flag3, qdss_gpio12, _, _, _, _, _), 1348 [35] = PINGROUP(35, cci_timer1, cci_async, _, phase_flag4, qdss_gpio13, _, _, _, _), 1349 [36] = PINGROUP(36, cci_timer2, cci_async, _, phase_flag5, qdss_gpio14, _, _, _, _), 1350 [37] = PINGROUP(37, cci_timer3, gp_pdm0, _, phase_flag6, qdss_gpio15, _, _, _, _), 1351 [38] = PINGROUP(38, cci_timer4, _, phase_flag7, qdss_gpio2, _, _, _, _, _), 1352 [39] = PINGROUP(39, cci_i2c, _, phase_flag8, qdss_gpio0, _, _, _, _, _), 1353 [40] = PINGROUP(40, cci_i2c, _, phase_flag9, qdss_gpio1, _, _, _, _, _), 1354 [41] = PINGROUP(41, cci_i2c, _, phase_flag10, qdss_gpio2, _, _, _, _, _), 1355 [42] = PINGROUP(42, cci_i2c, _, phase_flag11, qdss_gpio3, _, _, _, _, _), 1356 [43] = PINGROUP(43, cci_i2c, _, phase_flag12, qdss_gpio4, _, _, _, _, _), 1357 [44] = PINGROUP(44, cci_i2c, _, phase_flag13, qdss_gpio5, _, _, _, _, _), 1358 [45] = PINGROUP(45, qup02, _, phase_flag14, qdss_gpio6, _, _, _, _, _), 1359 [46] = PINGROUP(46, qup02, _, phase_flag15, qdss_gpio7, _, _, _, _, _), 1360 [47] = PINGROUP(47, mdp_vsync0, _, phase_flag16, qdss_gpio3, _, _, usb2phy_ac, _, _), 1361 [48] = PINGROUP(48, cci_async, mdp_vsync1, gcc_gp1, _, phase_flag17, qdss_gpio8, qup02, 1362 _, _), 1363 [49] = PINGROUP(49, vfr_1, _, phase_flag18, qdss_gpio9, _, _, _, _, _), 1364 [50] = PINGROUP(50, _, phase_flag19, qdss_gpio10, _, _, _, _, _, _), 1365 [51] = PINGROUP(51, _, phase_flag20, qdss_gpio11, _, _, _, _, _, _), 1366 [52] = PINGROUP(52, cci_async, gp_pdm1, _, phase_flag21, qdss_gpio12, _, _, _, _), 1367 [53] = PINGROUP(53, cci_async, _, phase_flag22, qdss_gpio13, _, _, _, _, _), 1368 [54] = PINGROUP(54, _, _, _, _, _, _, _, _, _), 1369 [55] = PINGROUP(55, _, _, _, _, _, _, _, _, _), 1370 [56] = PINGROUP(56, qup02, mdp_vsync2, _, phase_flag23, qdss_gpio10, _, _, _, _), 1371 [57] = PINGROUP(57, qup02, mdp_vsync3, gp_pdm2, _, phase_flag24, qdss_gpio11, _, _, _), 1372 [58] = PINGROUP(58, gcc_gp1, _, _, _, _, _, _, _, _), 1373 [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _), 1374 [60] = PINGROUP(60, audio_ref, lpass_ext, mi2s_2, _, phase_flag25, _, _, _, _), 1375 [61] = PINGROUP(61, qup01, tgu_ch0, _, phase_flag26, qdss_cti, _, _, _, _), 1376 [62] = PINGROUP(62, qup01, tgu_ch1, _, phase_flag27, qdss_cti, _, _, _, _), 1377 [63] = PINGROUP(63, qup01, tgu_ch2, _, phase_flag28, qdss_gpio, _, _, _, _), 1378 [64] = PINGROUP(64, qup01, tgu_ch3, _, phase_flag29, qdss_gpio, _, _, _, _), 1379 [65] = PINGROUP(65, mss_lte, _, qdss_gpio0, _, _, _, _, _, _), 1380 [66] = PINGROUP(66, mss_lte, _, qdss_gpio1, _, _, _, _, _, _), 1381 [67] = PINGROUP(67, btfm_slimbus, mi2s_1, _, phase_flag30, _, _, _, _, _), 1382 [68] = PINGROUP(68, btfm_slimbus, mi2s_1, gp_pdm0, _, phase_flag31, _, _, _, _), 1383 [69] = PINGROUP(69, _, _, _, _, _, _, _, _, _), 1384 [70] = PINGROUP(70, _, _, _, _, _, _, _, _, _), 1385 [71] = PINGROUP(71, _, _, _, _, _, _, _, _, _), 1386 [72] = PINGROUP(72, _, _, _, _, _, _, _, _, _), 1387 [73] = PINGROUP(73, _, _, _, _, _, _, _, _, _), 1388 [74] = PINGROUP(74, _, _, _, _, _, _, _, _, _), 1389 [75] = PINGROUP(75, uim2_data, _, _, _, _, _, _, _, _), 1390 [76] = PINGROUP(76, uim2_clk, _, _, _, _, _, _, _, _), 1391 [77] = PINGROUP(77, uim2_reset, _, _, _, _, _, _, _, _), 1392 [78] = PINGROUP(78, uim2_present, _, _, _, _, _, _, _, _), 1393 [79] = PINGROUP(79, uim1_data, _, _, _, _, _, _, _, _), 1394 [80] = PINGROUP(80, uim1_clk, _, _, _, _, _, _, _, _), 1395 [81] = PINGROUP(81, uim1_reset, _, _, _, _, _, _, _, _), 1396 [82] = PINGROUP(82, uim1_present, _, _, _, _, _, _, _, _), 1397 [83] = PINGROUP(83, atest_usb1, _, _, _, _, _, _, _, _), 1398 [84] = PINGROUP(84, _, atest_usb10, _, _, _, _, _, _, _), 1399 [85] = PINGROUP(85, sd_write, _, atest_usb11, _, _, _, _, _, _), 1400 [86] = PINGROUP(86, btfm_slimbus, mi2s_1, _, qdss_cti, atest_usb12, ddr_pxi0, _, _, _), 1401 [87] = PINGROUP(87, btfm_slimbus, mi2s_1, adsp_ext, _, qdss_cti, atest_usb13, ddr_pxi1, _, 1402 _), 1403 [88] = PINGROUP(88, mi2s_0, _, qdss_gpio4, _, atest_usb2, ddr_pxi2, tsense_pwm1, 1404 tsense_pwm2, _), 1405 [89] = PINGROUP(89, mi2s_0, agera_pll, _, qdss_gpio5, _, vsense_trigger, atest_usb20, 1406 ddr_pxi3, _), 1407 [90] = PINGROUP(90, mi2s_0, jitter_bist, _, qdss_gpio6, _, wlan1_adc0, atest_usb21, 1408 ddr_pxi0, _), 1409 [91] = PINGROUP(91, mi2s_0, _, qdss_gpio7, _, wlan2_adc0, atest_usb22, ddr_pxi1, _, _), 1410 [92] = PINGROUP(92, _, qdss_gpio8, atest_tsens, wlan1_adc1, atest_usb23, ddr_pxi2, _, _, 1411 _), 1412 [93] = PINGROUP(93, mclk, lpass_ext, _, qdss_gpio9, atest_tsens2, wlan2_adc1, ddr_pxi3, 1413 _, _), 1414 [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _), 1415 [95] = PINGROUP(95, ldo_en, _, atest_char, _, _, _, _, _, _), 1416 [96] = PINGROUP(96, ldo_update, _, atest_char0, _, _, _, _, _, _), 1417 [97] = PINGROUP(97, prng_rosc0, _, atest_char1, _, _, _, _, _, _), 1418 [98] = PINGROUP(98, _, atest_char2, _, _, prng_rosc1, pll_clk, _, _, _), 1419 [99] = PINGROUP(99, _, atest_char3, _, _, prng_rosc2, _, _, _, _), 1420 [100] = PINGROUP(100, _, _, prng_rosc3, _, _, _, _, _, _), 1421 [101] = PINGROUP(101, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _), 1422 [102] = PINGROUP(102, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _), 1423 [103] = PINGROUP(103, qlink0_wmss, _, _, _, _, _, _, _, _), 1424 [104] = PINGROUP(104, qlink0_request, _, _, _, _, _, _, _, _), 1425 [105] = PINGROUP(105, qlink0_enable, _, _, _, _, _, _, _, _), 1426 [106] = PINGROUP(106, qlink1_wmss, _, _, _, _, _, _, _, _), 1427 [107] = PINGROUP(107, qlink1_request, gps_tx, _, _, _, _, _, _, _), 1428 [108] = PINGROUP(108, qlink1_enable, gps_tx, _, _, _, _, _, _, _), 1429 [109] = PINGROUP(109, _, _, _, _, _, _, _, _, _), 1430 [110] = PINGROUP(110, _, _, _, _, _, _, _, _, _), 1431 [111] = PINGROUP(111, _, _, _, _, _, _, _, _, _), 1432 [112] = PINGROUP(112, _, _, _, _, _, _, _, _, _), 1433 [113] = PINGROUP(113, _, _, _, _, _, _, _, _, _), 1434 [114] = PINGROUP(114, _, _, _, _, _, _, _, _, _), 1435 [115] = PINGROUP(115, _, _, _, _, _, _, _, _, _), 1436 [116] = PINGROUP(116, _, _, _, _, _, _, _, _, _), 1437 [117] = PINGROUP(117, _, _, _, _, _, _, _, _, _), 1438 [118] = PINGROUP(118, _, _, pa_indicator, dp_hot, _, _, _, _, _), 1439 [119] = PINGROUP(119, _, _, _, _, _, _, _, _, _), 1440 [120] = PINGROUP(120, _, _, _, _, _, _, _, _, _), 1441 [121] = PINGROUP(121, _, _, _, _, _, _, _, _, _), 1442 [122] = PINGROUP(122, _, _, _, _, _, _, _, _, _), 1443 [123] = PINGROUP(123, _, _, _, _, _, _, _, _, _), 1444 [124] = PINGROUP(124, usb_phy, _, _, _, _, _, _, _, _), 1445 [125] = PINGROUP(125, _, _, _, _, _, _, _, _, _), 1446 [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _), 1447 [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _), 1448 [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _), 1449 [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _), 1450 [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _), 1451 [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _), 1452 [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _), 1453 [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _), 1454 [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _), 1455 [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _), 1456 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _), 1457 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _), 1458 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _), 1459 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _), 1460 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _), 1461 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _), 1462 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _), 1463 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _), 1464 [144] = PINGROUP(144, _, _, _, _, _, _, _, _, _), 1465 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _), 1466 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _), 1467 [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _), 1468 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _), 1469 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _), 1470 [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _), 1471 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _), 1472 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _), 1473 [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _), 1474 [154] = PINGROUP(154, _, _, _, _, _, _, _, _, _), 1475 [155] = PINGROUP(155, _, _, _, _, _, _, _, _, _), 1476 [156] = UFS_RESET(ufs_reset, 0x1ae000), 1477 [157] = SDC_PINGROUP(sdc1_rclk, 0x1a1000, 0, 0), 1478 [158] = SDC_PINGROUP(sdc1_clk, 0x1a0000, 13, 6), 1479 [159] = SDC_PINGROUP(sdc1_cmd, 0x1a0000, 11, 3), 1480 [160] = SDC_PINGROUP(sdc1_data, 0x1a0000, 9, 0), 1481 [161] = SDC_PINGROUP(sdc2_clk, 0x1a2000, 14, 6), 1482 [162] = SDC_PINGROUP(sdc2_cmd, 0x1a2000, 11, 3), 1483 [163] = SDC_PINGROUP(sdc2_data, 0x1a2000, 9, 0), 1484 }; 1485 1486 static const struct msm_gpio_wakeirq_map sm6375_mpm_map[] = { 1487 { 0, 84 }, { 3, 6 }, { 4, 7 }, { 7, 8 }, { 8, 9 }, { 9, 10 }, { 11, 11 }, { 12, 13 }, 1488 { 13, 14 }, { 16, 16 }, { 17, 17 }, { 18, 18 }, { 19, 19 }, { 21, 20 }, { 22, 21 }, 1489 { 23, 23 }, { 24, 24 }, { 25, 25 }, { 27, 26 }, { 28, 27 }, { 37, 28 }, { 38, 29 }, 1490 { 48, 30 }, { 50, 31 }, { 51, 32 }, { 52, 33 }, { 57, 34 }, { 59, 35 }, { 60, 37 }, 1491 { 61, 38 }, { 62, 39 }, { 64, 40 }, { 66, 41 }, { 67, 42 }, { 68, 43 }, { 69, 44 }, 1492 { 78, 45 }, { 82, 36 }, { 83, 47 }, { 84, 48 }, { 85, 49 }, { 87, 50 }, { 88, 51 }, 1493 { 91, 52 }, { 94, 53 }, { 95, 54 }, { 96, 55 }, { 97, 56 }, { 98, 57 }, { 99, 58 }, 1494 { 100, 59 }, { 104, 60 }, { 107, 61 }, { 118, 62 }, { 124, 63 }, { 125, 64 }, { 126, 65 }, 1495 { 128, 66 }, { 129, 67 }, { 131, 69 }, { 133, 70 }, { 134, 71 }, { 136, 73 }, { 142, 74 }, 1496 { 150, 75 }, { 153, 76 }, { 155, 77 }, 1497 }; 1498 1499 static const struct msm_pinctrl_soc_data sm6375_tlmm = { 1500 .pins = sm6375_pins, 1501 .npins = ARRAY_SIZE(sm6375_pins), 1502 .functions = sm6375_functions, 1503 .nfunctions = ARRAY_SIZE(sm6375_functions), 1504 .groups = sm6375_groups, 1505 .ngroups = ARRAY_SIZE(sm6375_groups), 1506 .ngpios = 157, 1507 .wakeirq_map = sm6375_mpm_map, 1508 .nwakeirq_map = ARRAY_SIZE(sm6375_mpm_map), 1509 }; 1510 1511 static int sm6375_tlmm_probe(struct platform_device *pdev) 1512 { 1513 return msm_pinctrl_probe(pdev, &sm6375_tlmm); 1514 } 1515 1516 static const struct of_device_id sm6375_tlmm_of_match[] = { 1517 { .compatible = "qcom,sm6375-tlmm", }, 1518 { }, 1519 }; 1520 1521 static struct platform_driver sm6375_tlmm_driver = { 1522 .driver = { 1523 .name = "sm6375-tlmm", 1524 .of_match_table = sm6375_tlmm_of_match, 1525 }, 1526 .probe = sm6375_tlmm_probe, 1527 .remove = msm_pinctrl_remove, 1528 }; 1529 1530 static int __init sm6375_tlmm_init(void) 1531 { 1532 return platform_driver_register(&sm6375_tlmm_driver); 1533 } 1534 arch_initcall(sm6375_tlmm_init); 1535 1536 static void __exit sm6375_tlmm_exit(void) 1537 { 1538 platform_driver_unregister(&sm6375_tlmm_driver); 1539 } 1540 module_exit(sm6375_tlmm_exit); 1541 1542 MODULE_DESCRIPTION("QTI SM6375 TLMM driver"); 1543 MODULE_LICENSE("GPL"); 1544 MODULE_DEVICE_TABLE(of, sm6375_tlmm_of_match); 1545