1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2018, Craig Tatlor.
5  */
6 
7 #include <linux/module.h>
8 #include <linux/of.h>
9 #include <linux/platform_device.h>
10 
11 #include "pinctrl-msm.h"
12 
13 static const char * const sdm660_tiles[] = {
14 	"north",
15 	"center",
16 	"south"
17 };
18 
19 enum {
20 	NORTH,
21 	CENTER,
22 	SOUTH
23 };
24 
25 #define REG_SIZE 0x1000
26 
27 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
28 	{					        \
29 		.grp = PINCTRL_PINGROUP("gpio" #id, 	\
30 			gpio##id##_pins, 		\
31 			ARRAY_SIZE(gpio##id##_pins)),	\
32 		.funcs = (int[]){			\
33 			msm_mux_gpio, /* gpio mode */	\
34 			msm_mux_##f1,			\
35 			msm_mux_##f2,			\
36 			msm_mux_##f3,			\
37 			msm_mux_##f4,			\
38 			msm_mux_##f5,			\
39 			msm_mux_##f6,			\
40 			msm_mux_##f7,			\
41 			msm_mux_##f8,			\
42 			msm_mux_##f9			\
43 		},				        \
44 		.nfuncs = 10,				\
45 		.ctl_reg = REG_SIZE * id,		\
46 		.io_reg = 0x4 + REG_SIZE * id,		\
47 		.intr_cfg_reg = 0x8 + REG_SIZE * id,	\
48 		.intr_status_reg = 0xc + REG_SIZE * id,	\
49 		.intr_target_reg = 0x8 + REG_SIZE * id,	\
50 		.tile = _tile,			\
51 		.mux_bit = 2,			\
52 		.pull_bit = 0,			\
53 		.drv_bit = 6,			\
54 		.oe_bit = 9,			\
55 		.in_bit = 0,			\
56 		.out_bit = 1,			\
57 		.intr_enable_bit = 0,		\
58 		.intr_status_bit = 0,		\
59 		.intr_target_bit = 5,		\
60 		.intr_target_kpss_val = 3,	\
61 		.intr_raw_status_bit = 4,	\
62 		.intr_polarity_bit = 1,		\
63 		.intr_detection_bit = 2,	\
64 		.intr_detection_width = 2,	\
65 	}
66 
67 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)	\
68 	{					        \
69 		.grp = PINCTRL_PINGROUP(#pg_name, 	\
70 			pg_name##_pins, 		\
71 			ARRAY_SIZE(pg_name##_pins)),	\
72 		.ctl_reg = ctl,				\
73 		.io_reg = 0,				\
74 		.intr_cfg_reg = 0,			\
75 		.intr_status_reg = 0,			\
76 		.intr_target_reg = 0,			\
77 		.tile = NORTH,				\
78 		.mux_bit = -1,				\
79 		.pull_bit = pull,			\
80 		.drv_bit = drv,				\
81 		.oe_bit = -1,				\
82 		.in_bit = -1,				\
83 		.out_bit = -1,				\
84 		.intr_enable_bit = -1,			\
85 		.intr_status_bit = -1,			\
86 		.intr_target_bit = -1,			\
87 		.intr_raw_status_bit = -1,		\
88 		.intr_polarity_bit = -1,		\
89 		.intr_detection_bit = -1,		\
90 		.intr_detection_width = -1,		\
91 	}
92 
93 static const struct pinctrl_pin_desc sdm660_pins[] = {
94 	PINCTRL_PIN(0, "GPIO_0"),
95 	PINCTRL_PIN(1, "GPIO_1"),
96 	PINCTRL_PIN(2, "GPIO_2"),
97 	PINCTRL_PIN(3, "GPIO_3"),
98 	PINCTRL_PIN(4, "GPIO_4"),
99 	PINCTRL_PIN(5, "GPIO_5"),
100 	PINCTRL_PIN(6, "GPIO_6"),
101 	PINCTRL_PIN(7, "GPIO_7"),
102 	PINCTRL_PIN(8, "GPIO_8"),
103 	PINCTRL_PIN(9, "GPIO_9"),
104 	PINCTRL_PIN(10, "GPIO_10"),
105 	PINCTRL_PIN(11, "GPIO_11"),
106 	PINCTRL_PIN(12, "GPIO_12"),
107 	PINCTRL_PIN(13, "GPIO_13"),
108 	PINCTRL_PIN(14, "GPIO_14"),
109 	PINCTRL_PIN(15, "GPIO_15"),
110 	PINCTRL_PIN(16, "GPIO_16"),
111 	PINCTRL_PIN(17, "GPIO_17"),
112 	PINCTRL_PIN(18, "GPIO_18"),
113 	PINCTRL_PIN(19, "GPIO_19"),
114 	PINCTRL_PIN(20, "GPIO_20"),
115 	PINCTRL_PIN(21, "GPIO_21"),
116 	PINCTRL_PIN(22, "GPIO_22"),
117 	PINCTRL_PIN(23, "GPIO_23"),
118 	PINCTRL_PIN(24, "GPIO_24"),
119 	PINCTRL_PIN(25, "GPIO_25"),
120 	PINCTRL_PIN(26, "GPIO_26"),
121 	PINCTRL_PIN(27, "GPIO_27"),
122 	PINCTRL_PIN(28, "GPIO_28"),
123 	PINCTRL_PIN(29, "GPIO_29"),
124 	PINCTRL_PIN(30, "GPIO_30"),
125 	PINCTRL_PIN(31, "GPIO_31"),
126 	PINCTRL_PIN(32, "GPIO_32"),
127 	PINCTRL_PIN(33, "GPIO_33"),
128 	PINCTRL_PIN(34, "GPIO_34"),
129 	PINCTRL_PIN(35, "GPIO_35"),
130 	PINCTRL_PIN(36, "GPIO_36"),
131 	PINCTRL_PIN(37, "GPIO_37"),
132 	PINCTRL_PIN(38, "GPIO_38"),
133 	PINCTRL_PIN(39, "GPIO_39"),
134 	PINCTRL_PIN(40, "GPIO_40"),
135 	PINCTRL_PIN(41, "GPIO_41"),
136 	PINCTRL_PIN(42, "GPIO_42"),
137 	PINCTRL_PIN(43, "GPIO_43"),
138 	PINCTRL_PIN(44, "GPIO_44"),
139 	PINCTRL_PIN(45, "GPIO_45"),
140 	PINCTRL_PIN(46, "GPIO_46"),
141 	PINCTRL_PIN(47, "GPIO_47"),
142 	PINCTRL_PIN(48, "GPIO_48"),
143 	PINCTRL_PIN(49, "GPIO_49"),
144 	PINCTRL_PIN(50, "GPIO_50"),
145 	PINCTRL_PIN(51, "GPIO_51"),
146 	PINCTRL_PIN(52, "GPIO_52"),
147 	PINCTRL_PIN(53, "GPIO_53"),
148 	PINCTRL_PIN(54, "GPIO_54"),
149 	PINCTRL_PIN(55, "GPIO_55"),
150 	PINCTRL_PIN(56, "GPIO_56"),
151 	PINCTRL_PIN(57, "GPIO_57"),
152 	PINCTRL_PIN(58, "GPIO_58"),
153 	PINCTRL_PIN(59, "GPIO_59"),
154 	PINCTRL_PIN(60, "GPIO_60"),
155 	PINCTRL_PIN(61, "GPIO_61"),
156 	PINCTRL_PIN(62, "GPIO_62"),
157 	PINCTRL_PIN(63, "GPIO_63"),
158 	PINCTRL_PIN(64, "GPIO_64"),
159 	PINCTRL_PIN(65, "GPIO_65"),
160 	PINCTRL_PIN(66, "GPIO_66"),
161 	PINCTRL_PIN(67, "GPIO_67"),
162 	PINCTRL_PIN(68, "GPIO_68"),
163 	PINCTRL_PIN(69, "GPIO_69"),
164 	PINCTRL_PIN(70, "GPIO_70"),
165 	PINCTRL_PIN(71, "GPIO_71"),
166 	PINCTRL_PIN(72, "GPIO_72"),
167 	PINCTRL_PIN(73, "GPIO_73"),
168 	PINCTRL_PIN(74, "GPIO_74"),
169 	PINCTRL_PIN(75, "GPIO_75"),
170 	PINCTRL_PIN(76, "GPIO_76"),
171 	PINCTRL_PIN(77, "GPIO_77"),
172 	PINCTRL_PIN(78, "GPIO_78"),
173 	PINCTRL_PIN(79, "GPIO_79"),
174 	PINCTRL_PIN(80, "GPIO_80"),
175 	PINCTRL_PIN(81, "GPIO_81"),
176 	PINCTRL_PIN(82, "GPIO_82"),
177 	PINCTRL_PIN(83, "GPIO_83"),
178 	PINCTRL_PIN(84, "GPIO_84"),
179 	PINCTRL_PIN(85, "GPIO_85"),
180 	PINCTRL_PIN(86, "GPIO_86"),
181 	PINCTRL_PIN(87, "GPIO_87"),
182 	PINCTRL_PIN(88, "GPIO_88"),
183 	PINCTRL_PIN(89, "GPIO_89"),
184 	PINCTRL_PIN(90, "GPIO_90"),
185 	PINCTRL_PIN(91, "GPIO_91"),
186 	PINCTRL_PIN(92, "GPIO_92"),
187 	PINCTRL_PIN(93, "GPIO_93"),
188 	PINCTRL_PIN(94, "GPIO_94"),
189 	PINCTRL_PIN(95, "GPIO_95"),
190 	PINCTRL_PIN(96, "GPIO_96"),
191 	PINCTRL_PIN(97, "GPIO_97"),
192 	PINCTRL_PIN(98, "GPIO_98"),
193 	PINCTRL_PIN(99, "GPIO_99"),
194 	PINCTRL_PIN(100, "GPIO_100"),
195 	PINCTRL_PIN(101, "GPIO_101"),
196 	PINCTRL_PIN(102, "GPIO_102"),
197 	PINCTRL_PIN(103, "GPIO_103"),
198 	PINCTRL_PIN(104, "GPIO_104"),
199 	PINCTRL_PIN(105, "GPIO_105"),
200 	PINCTRL_PIN(106, "GPIO_106"),
201 	PINCTRL_PIN(107, "GPIO_107"),
202 	PINCTRL_PIN(108, "GPIO_108"),
203 	PINCTRL_PIN(109, "GPIO_109"),
204 	PINCTRL_PIN(110, "GPIO_110"),
205 	PINCTRL_PIN(111, "GPIO_111"),
206 	PINCTRL_PIN(112, "GPIO_112"),
207 	PINCTRL_PIN(113, "GPIO_113"),
208 	PINCTRL_PIN(114, "SDC1_CLK"),
209 	PINCTRL_PIN(115, "SDC1_CMD"),
210 	PINCTRL_PIN(116, "SDC1_DATA"),
211 	PINCTRL_PIN(117, "SDC2_CLK"),
212 	PINCTRL_PIN(118, "SDC2_CMD"),
213 	PINCTRL_PIN(119, "SDC2_DATA"),
214 	PINCTRL_PIN(120, "SDC1_RCLK"),
215 };
216 
217 #define DECLARE_MSM_GPIO_PINS(pin) \
218 	static const unsigned int gpio##pin##_pins[] = { pin }
219 DECLARE_MSM_GPIO_PINS(0);
220 DECLARE_MSM_GPIO_PINS(1);
221 DECLARE_MSM_GPIO_PINS(2);
222 DECLARE_MSM_GPIO_PINS(3);
223 DECLARE_MSM_GPIO_PINS(4);
224 DECLARE_MSM_GPIO_PINS(5);
225 DECLARE_MSM_GPIO_PINS(6);
226 DECLARE_MSM_GPIO_PINS(7);
227 DECLARE_MSM_GPIO_PINS(8);
228 DECLARE_MSM_GPIO_PINS(9);
229 DECLARE_MSM_GPIO_PINS(10);
230 DECLARE_MSM_GPIO_PINS(11);
231 DECLARE_MSM_GPIO_PINS(12);
232 DECLARE_MSM_GPIO_PINS(13);
233 DECLARE_MSM_GPIO_PINS(14);
234 DECLARE_MSM_GPIO_PINS(15);
235 DECLARE_MSM_GPIO_PINS(16);
236 DECLARE_MSM_GPIO_PINS(17);
237 DECLARE_MSM_GPIO_PINS(18);
238 DECLARE_MSM_GPIO_PINS(19);
239 DECLARE_MSM_GPIO_PINS(20);
240 DECLARE_MSM_GPIO_PINS(21);
241 DECLARE_MSM_GPIO_PINS(22);
242 DECLARE_MSM_GPIO_PINS(23);
243 DECLARE_MSM_GPIO_PINS(24);
244 DECLARE_MSM_GPIO_PINS(25);
245 DECLARE_MSM_GPIO_PINS(26);
246 DECLARE_MSM_GPIO_PINS(27);
247 DECLARE_MSM_GPIO_PINS(28);
248 DECLARE_MSM_GPIO_PINS(29);
249 DECLARE_MSM_GPIO_PINS(30);
250 DECLARE_MSM_GPIO_PINS(31);
251 DECLARE_MSM_GPIO_PINS(32);
252 DECLARE_MSM_GPIO_PINS(33);
253 DECLARE_MSM_GPIO_PINS(34);
254 DECLARE_MSM_GPIO_PINS(35);
255 DECLARE_MSM_GPIO_PINS(36);
256 DECLARE_MSM_GPIO_PINS(37);
257 DECLARE_MSM_GPIO_PINS(38);
258 DECLARE_MSM_GPIO_PINS(39);
259 DECLARE_MSM_GPIO_PINS(40);
260 DECLARE_MSM_GPIO_PINS(41);
261 DECLARE_MSM_GPIO_PINS(42);
262 DECLARE_MSM_GPIO_PINS(43);
263 DECLARE_MSM_GPIO_PINS(44);
264 DECLARE_MSM_GPIO_PINS(45);
265 DECLARE_MSM_GPIO_PINS(46);
266 DECLARE_MSM_GPIO_PINS(47);
267 DECLARE_MSM_GPIO_PINS(48);
268 DECLARE_MSM_GPIO_PINS(49);
269 DECLARE_MSM_GPIO_PINS(50);
270 DECLARE_MSM_GPIO_PINS(51);
271 DECLARE_MSM_GPIO_PINS(52);
272 DECLARE_MSM_GPIO_PINS(53);
273 DECLARE_MSM_GPIO_PINS(54);
274 DECLARE_MSM_GPIO_PINS(55);
275 DECLARE_MSM_GPIO_PINS(56);
276 DECLARE_MSM_GPIO_PINS(57);
277 DECLARE_MSM_GPIO_PINS(58);
278 DECLARE_MSM_GPIO_PINS(59);
279 DECLARE_MSM_GPIO_PINS(60);
280 DECLARE_MSM_GPIO_PINS(61);
281 DECLARE_MSM_GPIO_PINS(62);
282 DECLARE_MSM_GPIO_PINS(63);
283 DECLARE_MSM_GPIO_PINS(64);
284 DECLARE_MSM_GPIO_PINS(65);
285 DECLARE_MSM_GPIO_PINS(66);
286 DECLARE_MSM_GPIO_PINS(67);
287 DECLARE_MSM_GPIO_PINS(68);
288 DECLARE_MSM_GPIO_PINS(69);
289 DECLARE_MSM_GPIO_PINS(70);
290 DECLARE_MSM_GPIO_PINS(71);
291 DECLARE_MSM_GPIO_PINS(72);
292 DECLARE_MSM_GPIO_PINS(73);
293 DECLARE_MSM_GPIO_PINS(74);
294 DECLARE_MSM_GPIO_PINS(75);
295 DECLARE_MSM_GPIO_PINS(76);
296 DECLARE_MSM_GPIO_PINS(77);
297 DECLARE_MSM_GPIO_PINS(78);
298 DECLARE_MSM_GPIO_PINS(79);
299 DECLARE_MSM_GPIO_PINS(80);
300 DECLARE_MSM_GPIO_PINS(81);
301 DECLARE_MSM_GPIO_PINS(82);
302 DECLARE_MSM_GPIO_PINS(83);
303 DECLARE_MSM_GPIO_PINS(84);
304 DECLARE_MSM_GPIO_PINS(85);
305 DECLARE_MSM_GPIO_PINS(86);
306 DECLARE_MSM_GPIO_PINS(87);
307 DECLARE_MSM_GPIO_PINS(88);
308 DECLARE_MSM_GPIO_PINS(89);
309 DECLARE_MSM_GPIO_PINS(90);
310 DECLARE_MSM_GPIO_PINS(91);
311 DECLARE_MSM_GPIO_PINS(92);
312 DECLARE_MSM_GPIO_PINS(93);
313 DECLARE_MSM_GPIO_PINS(94);
314 DECLARE_MSM_GPIO_PINS(95);
315 DECLARE_MSM_GPIO_PINS(96);
316 DECLARE_MSM_GPIO_PINS(97);
317 DECLARE_MSM_GPIO_PINS(98);
318 DECLARE_MSM_GPIO_PINS(99);
319 DECLARE_MSM_GPIO_PINS(100);
320 DECLARE_MSM_GPIO_PINS(101);
321 DECLARE_MSM_GPIO_PINS(102);
322 DECLARE_MSM_GPIO_PINS(103);
323 DECLARE_MSM_GPIO_PINS(104);
324 DECLARE_MSM_GPIO_PINS(105);
325 DECLARE_MSM_GPIO_PINS(106);
326 DECLARE_MSM_GPIO_PINS(107);
327 DECLARE_MSM_GPIO_PINS(108);
328 DECLARE_MSM_GPIO_PINS(109);
329 DECLARE_MSM_GPIO_PINS(110);
330 DECLARE_MSM_GPIO_PINS(111);
331 DECLARE_MSM_GPIO_PINS(112);
332 DECLARE_MSM_GPIO_PINS(113);
333 
334 static const unsigned int sdc1_clk_pins[] = { 114 };
335 static const unsigned int sdc1_cmd_pins[] = { 115 };
336 static const unsigned int sdc1_data_pins[] = { 116 };
337 static const unsigned int sdc1_rclk_pins[] = { 120 };
338 static const unsigned int sdc2_clk_pins[] = { 117 };
339 static const unsigned int sdc2_cmd_pins[] = { 118 };
340 static const unsigned int sdc2_data_pins[] = { 119 };
341 
342 enum sdm660_functions {
343 	msm_mux_adsp_ext,
344 	msm_mux_agera_pll,
345 	msm_mux_atest_char,
346 	msm_mux_atest_char0,
347 	msm_mux_atest_char1,
348 	msm_mux_atest_char2,
349 	msm_mux_atest_char3,
350 	msm_mux_atest_gpsadc0,
351 	msm_mux_atest_gpsadc1,
352 	msm_mux_atest_tsens,
353 	msm_mux_atest_tsens2,
354 	msm_mux_atest_usb1,
355 	msm_mux_atest_usb10,
356 	msm_mux_atest_usb11,
357 	msm_mux_atest_usb12,
358 	msm_mux_atest_usb13,
359 	msm_mux_atest_usb2,
360 	msm_mux_atest_usb20,
361 	msm_mux_atest_usb21,
362 	msm_mux_atest_usb22,
363 	msm_mux_atest_usb23,
364 	msm_mux_audio_ref,
365 	msm_mux_bimc_dte0,
366 	msm_mux_bimc_dte1,
367 	msm_mux_blsp_i2c1,
368 	msm_mux_blsp_i2c2,
369 	msm_mux_blsp_i2c3,
370 	msm_mux_blsp_i2c4,
371 	msm_mux_blsp_i2c5,
372 	msm_mux_blsp_i2c6,
373 	msm_mux_blsp_i2c7,
374 	msm_mux_blsp_i2c8_a,
375 	msm_mux_blsp_i2c8_b,
376 	msm_mux_blsp_spi1,
377 	msm_mux_blsp_spi2,
378 	msm_mux_blsp_spi3,
379 	msm_mux_blsp_spi3_cs1,
380 	msm_mux_blsp_spi3_cs2,
381 	msm_mux_blsp_spi4,
382 	msm_mux_blsp_spi5,
383 	msm_mux_blsp_spi6,
384 	msm_mux_blsp_spi7,
385 	msm_mux_blsp_spi8_a,
386 	msm_mux_blsp_spi8_b,
387 	msm_mux_blsp_spi8_cs1,
388 	msm_mux_blsp_spi8_cs2,
389 	msm_mux_blsp_uart1,
390 	msm_mux_blsp_uart2,
391 	msm_mux_blsp_uart5,
392 	msm_mux_blsp_uart6_a,
393 	msm_mux_blsp_uart6_b,
394 	msm_mux_blsp_uim1,
395 	msm_mux_blsp_uim2,
396 	msm_mux_blsp_uim5,
397 	msm_mux_blsp_uim6,
398 	msm_mux_cam_mclk,
399 	msm_mux_cci_async,
400 	msm_mux_cci_i2c,
401 	msm_mux_cri_trng,
402 	msm_mux_cri_trng0,
403 	msm_mux_cri_trng1,
404 	msm_mux_dbg_out,
405 	msm_mux_ddr_bist,
406 	msm_mux_gcc_gp1,
407 	msm_mux_gcc_gp2,
408 	msm_mux_gcc_gp3,
409 	msm_mux_gpio,
410 	msm_mux_gps_tx_a,
411 	msm_mux_gps_tx_b,
412 	msm_mux_gps_tx_c,
413 	msm_mux_isense_dbg,
414 	msm_mux_jitter_bist,
415 	msm_mux_ldo_en,
416 	msm_mux_ldo_update,
417 	msm_mux_m_voc,
418 	msm_mux_mdp_vsync,
419 	msm_mux_mdss_vsync0,
420 	msm_mux_mdss_vsync1,
421 	msm_mux_mdss_vsync2,
422 	msm_mux_mdss_vsync3,
423 	msm_mux_mss_lte,
424 	msm_mux_nav_pps_a,
425 	msm_mux_nav_pps_b,
426 	msm_mux_nav_pps_c,
427 	msm_mux_pa_indicator,
428 	msm_mux_phase_flag0,
429 	msm_mux_phase_flag1,
430 	msm_mux_phase_flag2,
431 	msm_mux_phase_flag3,
432 	msm_mux_phase_flag4,
433 	msm_mux_phase_flag5,
434 	msm_mux_phase_flag6,
435 	msm_mux_phase_flag7,
436 	msm_mux_phase_flag8,
437 	msm_mux_phase_flag9,
438 	msm_mux_phase_flag10,
439 	msm_mux_phase_flag11,
440 	msm_mux_phase_flag12,
441 	msm_mux_phase_flag13,
442 	msm_mux_phase_flag14,
443 	msm_mux_phase_flag15,
444 	msm_mux_phase_flag16,
445 	msm_mux_phase_flag17,
446 	msm_mux_phase_flag18,
447 	msm_mux_phase_flag19,
448 	msm_mux_phase_flag20,
449 	msm_mux_phase_flag21,
450 	msm_mux_phase_flag22,
451 	msm_mux_phase_flag23,
452 	msm_mux_phase_flag24,
453 	msm_mux_phase_flag25,
454 	msm_mux_phase_flag26,
455 	msm_mux_phase_flag27,
456 	msm_mux_phase_flag28,
457 	msm_mux_phase_flag29,
458 	msm_mux_phase_flag30,
459 	msm_mux_phase_flag31,
460 	msm_mux_pll_bypassnl,
461 	msm_mux_pll_reset,
462 	msm_mux_pri_mi2s,
463 	msm_mux_pri_mi2s_ws,
464 	msm_mux_prng_rosc,
465 	msm_mux_pwr_crypto,
466 	msm_mux_pwr_modem,
467 	msm_mux_pwr_nav,
468 	msm_mux_qdss_cti0_a,
469 	msm_mux_qdss_cti0_b,
470 	msm_mux_qdss_cti1_a,
471 	msm_mux_qdss_cti1_b,
472 	msm_mux_qdss_gpio,
473 	msm_mux_qdss_gpio0,
474 	msm_mux_qdss_gpio1,
475 	msm_mux_qdss_gpio10,
476 	msm_mux_qdss_gpio11,
477 	msm_mux_qdss_gpio12,
478 	msm_mux_qdss_gpio13,
479 	msm_mux_qdss_gpio14,
480 	msm_mux_qdss_gpio15,
481 	msm_mux_qdss_gpio2,
482 	msm_mux_qdss_gpio3,
483 	msm_mux_qdss_gpio4,
484 	msm_mux_qdss_gpio5,
485 	msm_mux_qdss_gpio6,
486 	msm_mux_qdss_gpio7,
487 	msm_mux_qdss_gpio8,
488 	msm_mux_qdss_gpio9,
489 	msm_mux_qlink_enable,
490 	msm_mux_qlink_request,
491 	msm_mux_qspi_clk,
492 	msm_mux_qspi_cs,
493 	msm_mux_qspi_data0,
494 	msm_mux_qspi_data1,
495 	msm_mux_qspi_data2,
496 	msm_mux_qspi_data3,
497 	msm_mux_qspi_resetn,
498 	msm_mux_sec_mi2s,
499 	msm_mux_sndwire_clk,
500 	msm_mux_sndwire_data,
501 	msm_mux_sp_cmu,
502 	msm_mux_ssc_irq,
503 	msm_mux_tgu_ch0,
504 	msm_mux_tgu_ch1,
505 	msm_mux_tsense_pwm1,
506 	msm_mux_tsense_pwm2,
507 	msm_mux_uim1_clk,
508 	msm_mux_uim1_data,
509 	msm_mux_uim1_present,
510 	msm_mux_uim1_reset,
511 	msm_mux_uim2_clk,
512 	msm_mux_uim2_data,
513 	msm_mux_uim2_present,
514 	msm_mux_uim2_reset,
515 	msm_mux_uim_batt,
516 	msm_mux_vfr_1,
517 	msm_mux_vsense_clkout,
518 	msm_mux_vsense_data0,
519 	msm_mux_vsense_data1,
520 	msm_mux_vsense_mode,
521 	msm_mux_wlan1_adc0,
522 	msm_mux_wlan1_adc1,
523 	msm_mux_wlan2_adc0,
524 	msm_mux_wlan2_adc1,
525 	msm_mux__,
526 };
527 
528 static const char * const gpio_groups[] = {
529 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
530 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
531 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
532 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
533 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
534 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
535 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
536 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
537 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
538 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
539 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
540 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
541 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
542 	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
543 	"gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
544 	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
545 	"gpio111", "gpio112", "gpio113",
546 };
547 
548 static const char * const adsp_ext_groups[] = {
549 	"gpio65",
550 };
551 static const char * const agera_pll_groups[] = {
552 	"gpio34", "gpio36",
553 };
554 static const char * const atest_char0_groups[] = {
555 	"gpio62",
556 };
557 static const char * const atest_char1_groups[] = {
558 	"gpio61",
559 };
560 static const char * const atest_char2_groups[] = {
561 	"gpio60",
562 };
563 static const char * const atest_char3_groups[] = {
564 	"gpio59",
565 };
566 static const char * const atest_char_groups[] = {
567 	"gpio58",
568 };
569 static const char * const atest_gpsadc0_groups[] = {
570 	"gpio1",
571 };
572 static const char * const atest_gpsadc1_groups[] = {
573 	"gpio0",
574 };
575 static const char * const atest_tsens2_groups[] = {
576 	"gpio3",
577 };
578 static const char * const atest_tsens_groups[] = {
579 	"gpio36",
580 };
581 static const char * const atest_usb10_groups[] = {
582 	"gpio11",
583 };
584 static const char * const atest_usb11_groups[] = {
585 	"gpio10",
586 };
587 static const char * const atest_usb12_groups[] = {
588 	"gpio9",
589 };
590 static const char * const atest_usb13_groups[] = {
591 	"gpio8",
592 };
593 static const char * const atest_usb1_groups[] = {
594 	"gpio3",
595 };
596 static const char * const atest_usb20_groups[] = {
597 	"gpio56",
598 };
599 static const char * const atest_usb21_groups[] = {
600 	"gpio36",
601 };
602 static const char * const atest_usb22_groups[] = {
603 	"gpio57",
604 };
605 static const char * const atest_usb23_groups[] = {
606 	"gpio37",
607 };
608 static const char * const atest_usb2_groups[] = {
609 	"gpio35",
610 };
611 static const char * const audio_ref_groups[] = {
612 	"gpio62",
613 };
614 static const char * const bimc_dte0_groups[] = {
615 	"gpio9", "gpio11",
616 };
617 static const char * const bimc_dte1_groups[] = {
618 	"gpio8", "gpio10",
619 };
620 static const char * const blsp_i2c1_groups[] = {
621 	"gpio2", "gpio3",
622 };
623 static const char * const blsp_i2c2_groups[] = {
624 	"gpio6", "gpio7",
625 };
626 static const char * const blsp_i2c3_groups[] = {
627 	"gpio10", "gpio11",
628 };
629 static const char * const blsp_i2c4_groups[] = {
630 	"gpio14", "gpio15",
631 };
632 static const char * const blsp_i2c5_groups[] = {
633 	"gpio18", "gpio19",
634 };
635 static const char * const blsp_i2c6_groups[] = {
636 	"gpio22", "gpio23",
637 };
638 static const char * const blsp_i2c7_groups[] = {
639 	"gpio26", "gpio27",
640 };
641 static const char * const blsp_i2c8_a_groups[] = {
642 	"gpio30", "gpio31",
643 };
644 static const char * const blsp_i2c8_b_groups[] = {
645 	"gpio44", "gpio52",
646 };
647 static const char * const blsp_spi1_groups[] = {
648 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio46",
649 };
650 static const char * const blsp_spi2_groups[] = {
651 	"gpio4", "gpio5", "gpio6", "gpio7",
652 };
653 static const char * const blsp_spi3_cs1_groups[] = {
654 	"gpio30",
655 };
656 static const char * const blsp_spi3_cs2_groups[] = {
657 	"gpio65",
658 };
659 static const char * const blsp_spi3_groups[] = {
660 	"gpio8", "gpio9", "gpio10", "gpio11",
661 };
662 static const char * const blsp_spi4_groups[] = {
663 	"gpio12", "gpio13", "gpio14", "gpio15",
664 };
665 static const char * const blsp_spi5_groups[] = {
666 	"gpio16", "gpio17", "gpio18", "gpio19",
667 };
668 static const char * const blsp_spi6_groups[] = {
669 	"gpio49", "gpio52", "gpio22", "gpio23",
670 };
671 static const char * const blsp_spi7_groups[] = {
672 	"gpio24", "gpio25", "gpio26", "gpio27",
673 };
674 static const char * const blsp_spi8_a_groups[] = {
675 	"gpio28", "gpio29", "gpio30", "gpio31",
676 };
677 static const char * const blsp_spi8_b_groups[] = {
678 	"gpio40", "gpio41", "gpio44", "gpio52",
679 };
680 static const char * const blsp_spi8_cs1_groups[] = {
681 	"gpio64",
682 };
683 static const char * const blsp_spi8_cs2_groups[] = {
684 	"gpio76",
685 };
686 static const char * const blsp_uart1_groups[] = {
687 	"gpio0", "gpio1", "gpio2", "gpio3",
688 };
689 static const char * const blsp_uart2_groups[] = {
690 	"gpio4", "gpio5", "gpio6", "gpio7",
691 };
692 static const char * const blsp_uart5_groups[] = {
693 	"gpio16", "gpio17", "gpio18", "gpio19",
694 };
695 static const char * const blsp_uart6_a_groups[] = {
696 	"gpio24", "gpio25", "gpio26", "gpio27",
697 };
698 static const char * const blsp_uart6_b_groups[] = {
699 	"gpio28", "gpio29", "gpio30", "gpio31",
700 };
701 static const char * const blsp_uim1_groups[] = {
702 	"gpio0", "gpio1",
703 };
704 static const char * const blsp_uim2_groups[] = {
705 	"gpio4", "gpio5",
706 };
707 static const char * const blsp_uim5_groups[] = {
708 	"gpio16", "gpio17",
709 };
710 static const char * const blsp_uim6_groups[] = {
711 	"gpio20", "gpio21",
712 };
713 static const char * const cam_mclk_groups[] = {
714 	"gpio32", "gpio33", "gpio34", "gpio35",
715 };
716 static const char * const cci_async_groups[] = {
717 	"gpio45",
718 };
719 static const char * const cci_i2c_groups[] = {
720 	"gpio36", "gpio37", "gpio38", "gpio39",
721 };
722 static const char * const cri_trng0_groups[] = {
723 	"gpio60",
724 };
725 static const char * const cri_trng1_groups[] = {
726 	"gpio61",
727 };
728 static const char * const cri_trng_groups[] = {
729 	"gpio62",
730 };
731 static const char * const dbg_out_groups[] = {
732 	"gpio11",
733 };
734 static const char * const ddr_bist_groups[] = {
735 	"gpio3", "gpio8", "gpio9", "gpio10",
736 };
737 static const char * const gcc_gp1_groups[] = {
738 	"gpio57", "gpio78",
739 };
740 static const char * const gcc_gp2_groups[] = {
741 	"gpio58", "gpio81",
742 };
743 static const char * const gcc_gp3_groups[] = {
744 	"gpio59", "gpio82",
745 };
746 static const char * const gps_tx_a_groups[] = {
747 	"gpio65",
748 };
749 static const char * const gps_tx_b_groups[] = {
750 	"gpio98",
751 };
752 static const char * const gps_tx_c_groups[] = {
753 	"gpio80",
754 };
755 static const char * const isense_dbg_groups[] = {
756 	"gpio68",
757 };
758 static const char * const jitter_bist_groups[] = {
759 	"gpio35",
760 };
761 static const char * const ldo_en_groups[] = {
762 	"gpio97",
763 };
764 static const char * const ldo_update_groups[] = {
765 	"gpio98",
766 };
767 static const char * const m_voc_groups[] = {
768 	"gpio28",
769 };
770 static const char * const mdp_vsync_groups[] = {
771 	"gpio59", "gpio74",
772 };
773 static const char * const mdss_vsync0_groups[] = {
774 	"gpio42",
775 };
776 static const char * const mdss_vsync1_groups[] = {
777 	"gpio42",
778 };
779 static const char * const mdss_vsync2_groups[] = {
780 	"gpio42",
781 };
782 static const char * const mdss_vsync3_groups[] = {
783 	"gpio42",
784 };
785 static const char * const mss_lte_groups[] = {
786 	"gpio81", "gpio82",
787 };
788 static const char * const nav_pps_a_groups[] = {
789 	"gpio65",
790 };
791 static const char * const nav_pps_b_groups[] = {
792 	"gpio98",
793 };
794 static const char * const nav_pps_c_groups[] = {
795 	"gpio80",
796 };
797 static const char * const pa_indicator_groups[] = {
798 	"gpio92",
799 };
800 static const char * const phase_flag0_groups[] = {
801 	"gpio68",
802 };
803 static const char * const phase_flag1_groups[] = {
804 	"gpio48",
805 };
806 static const char * const phase_flag2_groups[] = {
807 	"gpio49",
808 };
809 static const char * const phase_flag3_groups[] = {
810 	"gpio4",
811 };
812 static const char * const phase_flag4_groups[] = {
813 	"gpio57",
814 };
815 static const char * const phase_flag5_groups[] = {
816 	"gpio17",
817 };
818 static const char * const phase_flag6_groups[] = {
819 	"gpio53",
820 };
821 static const char * const phase_flag7_groups[] = {
822 	"gpio69",
823 };
824 static const char * const phase_flag8_groups[] = {
825 	"gpio70",
826 };
827 static const char * const phase_flag9_groups[] = {
828 	"gpio50",
829 };
830 static const char * const phase_flag10_groups[] = {
831 	"gpio56",
832 };
833 static const char * const phase_flag11_groups[] = {
834 	"gpio21",
835 };
836 static const char * const phase_flag12_groups[] = {
837 	"gpio22",
838 };
839 static const char * const phase_flag13_groups[] = {
840 	"gpio23",
841 };
842 static const char * const phase_flag14_groups[] = {
843 	"gpio5",
844 };
845 static const char * const phase_flag15_groups[] = {
846 	"gpio51",
847 };
848 static const char * const phase_flag16_groups[] = {
849 	"gpio52",
850 };
851 static const char * const phase_flag17_groups[] = {
852 	"gpio24",
853 };
854 static const char * const phase_flag18_groups[] = {
855 	"gpio25",
856 };
857 static const char * const phase_flag19_groups[] = {
858 	"gpio26",
859 };
860 static const char * const phase_flag20_groups[] = {
861 	"gpio27",
862 };
863 static const char * const phase_flag21_groups[] = {
864 	"gpio28",
865 };
866 static const char * const phase_flag22_groups[] = {
867 	"gpio29",
868 };
869 static const char * const phase_flag23_groups[] = {
870 	"gpio30",
871 };
872 static const char * const phase_flag24_groups[] = {
873 	"gpio31",
874 };
875 static const char * const phase_flag25_groups[] = {
876 	"gpio55",
877 };
878 static const char * const phase_flag26_groups[] = {
879 	"gpio12",
880 };
881 static const char * const phase_flag27_groups[] = {
882 	"gpio13",
883 };
884 static const char * const phase_flag28_groups[] = {
885 	"gpio14",
886 };
887 static const char * const phase_flag29_groups[] = {
888 	"gpio54",
889 };
890 static const char * const phase_flag30_groups[] = {
891 	"gpio47",
892 };
893 static const char * const phase_flag31_groups[] = {
894 	"gpio6",
895 };
896 static const char * const pll_bypassnl_groups[] = {
897 	"gpio36",
898 };
899 static const char * const pll_reset_groups[] = {
900 	"gpio37",
901 };
902 static const char * const pri_mi2s_groups[] = {
903 	"gpio12", "gpio14", "gpio15", "gpio61",
904 };
905 static const char * const pri_mi2s_ws_groups[] = {
906 	"gpio13",
907 };
908 static const char * const prng_rosc_groups[] = {
909 	"gpio102",
910 };
911 static const char * const pwr_crypto_groups[] = {
912 	"gpio33",
913 };
914 static const char * const pwr_modem_groups[] = {
915 	"gpio31",
916 };
917 static const char * const pwr_nav_groups[] = {
918 	"gpio32",
919 };
920 static const char * const qdss_cti0_a_groups[] = {
921 	"gpio49", "gpio50",
922 };
923 static const char * const qdss_cti0_b_groups[] = {
924 	"gpio13", "gpio21",
925 };
926 static const char * const qdss_cti1_a_groups[] = {
927 	"gpio53", "gpio55",
928 };
929 static const char * const qdss_cti1_b_groups[] = {
930 	"gpio12", "gpio66",
931 };
932 static const char * const qdss_gpio0_groups[] = {
933 	"gpio32", "gpio67",
934 };
935 static const char * const qdss_gpio10_groups[] = {
936 	"gpio43", "gpio77",
937 };
938 static const char * const qdss_gpio11_groups[] = {
939 	"gpio44", "gpio79",
940 };
941 static const char * const qdss_gpio12_groups[] = {
942 	"gpio45", "gpio80",
943 };
944 static const char * const qdss_gpio13_groups[] = {
945 	"gpio46", "gpio78",
946 };
947 static const char * const qdss_gpio14_groups[] = {
948 	"gpio47", "gpio72",
949 };
950 static const char * const qdss_gpio15_groups[] = {
951 	"gpio48", "gpio73",
952 };
953 static const char * const qdss_gpio1_groups[] = {
954 	"gpio33", "gpio63",
955 };
956 static const char * const qdss_gpio2_groups[] = {
957 	"gpio34", "gpio64",
958 };
959 static const char * const qdss_gpio3_groups[] = {
960 	"gpio35", "gpio56",
961 };
962 static const char * const qdss_gpio4_groups[] = {
963 	"gpio0", "gpio36",
964 };
965 static const char * const qdss_gpio5_groups[] = {
966 	"gpio1", "gpio37",
967 };
968 static const char * const qdss_gpio6_groups[] = {
969 	"gpio38", "gpio70",
970 };
971 static const char * const qdss_gpio7_groups[] = {
972 	"gpio39", "gpio71",
973 };
974 static const char * const qdss_gpio8_groups[] = {
975 	"gpio51", "gpio75",
976 };
977 static const char * const qdss_gpio9_groups[] = {
978 	"gpio42", "gpio76",
979 };
980 static const char * const qdss_gpio_groups[] = {
981 	"gpio31", "gpio52", "gpio68", "gpio69",
982 };
983 static const char * const qlink_enable_groups[] = {
984 	"gpio100",
985 };
986 static const char * const qlink_request_groups[] = {
987 	"gpio99",
988 };
989 static const char * const qspi_clk_groups[] = {
990 	"gpio47",
991 };
992 static const char * const qspi_cs_groups[] = {
993 	"gpio43", "gpio50",
994 };
995 static const char * const qspi_data0_groups[] = {
996 	"gpio33",
997 };
998 static const char * const qspi_data1_groups[] = {
999 	"gpio34",
1000 };
1001 static const char * const qspi_data2_groups[] = {
1002 	"gpio35",
1003 };
1004 static const char * const qspi_data3_groups[] = {
1005 	"gpio51",
1006 };
1007 static const char * const qspi_resetn_groups[] = {
1008 	"gpio48",
1009 };
1010 static const char * const sec_mi2s_groups[] = {
1011 	"gpio24", "gpio25", "gpio26", "gpio27", "gpio62",
1012 };
1013 static const char * const sndwire_clk_groups[] = {
1014 	"gpio24",
1015 };
1016 static const char * const sndwire_data_groups[] = {
1017 	"gpio25",
1018 };
1019 static const char * const sp_cmu_groups[] = {
1020 	"gpio64",
1021 };
1022 static const char * const ssc_irq_groups[] = {
1023 	"gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72", "gpio74",
1024 	"gpio75", "gpio76",
1025 };
1026 static const char * const tgu_ch0_groups[] = {
1027 	"gpio0",
1028 };
1029 static const char * const tgu_ch1_groups[] = {
1030 	"gpio1",
1031 };
1032 static const char * const tsense_pwm1_groups[] = {
1033 	"gpio71",
1034 };
1035 static const char * const tsense_pwm2_groups[] = {
1036 	"gpio71",
1037 };
1038 static const char * const uim1_clk_groups[] = {
1039 	"gpio88",
1040 };
1041 static const char * const uim1_data_groups[] = {
1042 	"gpio87",
1043 };
1044 static const char * const uim1_present_groups[] = {
1045 	"gpio90",
1046 };
1047 static const char * const uim1_reset_groups[] = {
1048 	"gpio89",
1049 };
1050 static const char * const uim2_clk_groups[] = {
1051 	"gpio84",
1052 };
1053 static const char * const uim2_data_groups[] = {
1054 	"gpio83",
1055 };
1056 static const char * const uim2_present_groups[] = {
1057 	"gpio86",
1058 };
1059 static const char * const uim2_reset_groups[] = {
1060 	"gpio85",
1061 };
1062 static const char * const uim_batt_groups[] = {
1063 	"gpio91",
1064 };
1065 static const char * const vfr_1_groups[] = {
1066 	"gpio27",
1067 };
1068 static const char * const vsense_clkout_groups[] = {
1069 	"gpio24",
1070 };
1071 static const char * const vsense_data0_groups[] = {
1072 	"gpio21",
1073 };
1074 static const char * const vsense_data1_groups[] = {
1075 	"gpio22",
1076 };
1077 static const char * const vsense_mode_groups[] = {
1078 	"gpio23",
1079 };
1080 static const char * const wlan1_adc0_groups[] = {
1081 	"gpio9",
1082 };
1083 static const char * const wlan1_adc1_groups[] = {
1084 	"gpio8",
1085 };
1086 static const char * const wlan2_adc0_groups[] = {
1087 	"gpio11",
1088 };
1089 static const char * const wlan2_adc1_groups[] = {
1090 	"gpio10",
1091 };
1092 
1093 static const struct pinfunction sdm660_functions[] = {
1094 	MSM_PIN_FUNCTION(adsp_ext),
1095 	MSM_PIN_FUNCTION(agera_pll),
1096 	MSM_PIN_FUNCTION(atest_char),
1097 	MSM_PIN_FUNCTION(atest_char0),
1098 	MSM_PIN_FUNCTION(atest_char1),
1099 	MSM_PIN_FUNCTION(atest_char2),
1100 	MSM_PIN_FUNCTION(atest_char3),
1101 	MSM_PIN_FUNCTION(atest_gpsadc0),
1102 	MSM_PIN_FUNCTION(atest_gpsadc1),
1103 	MSM_PIN_FUNCTION(atest_tsens),
1104 	MSM_PIN_FUNCTION(atest_tsens2),
1105 	MSM_PIN_FUNCTION(atest_usb1),
1106 	MSM_PIN_FUNCTION(atest_usb10),
1107 	MSM_PIN_FUNCTION(atest_usb11),
1108 	MSM_PIN_FUNCTION(atest_usb12),
1109 	MSM_PIN_FUNCTION(atest_usb13),
1110 	MSM_PIN_FUNCTION(atest_usb2),
1111 	MSM_PIN_FUNCTION(atest_usb20),
1112 	MSM_PIN_FUNCTION(atest_usb21),
1113 	MSM_PIN_FUNCTION(atest_usb22),
1114 	MSM_PIN_FUNCTION(atest_usb23),
1115 	MSM_PIN_FUNCTION(audio_ref),
1116 	MSM_PIN_FUNCTION(bimc_dte0),
1117 	MSM_PIN_FUNCTION(bimc_dte1),
1118 	MSM_PIN_FUNCTION(blsp_i2c1),
1119 	MSM_PIN_FUNCTION(blsp_i2c2),
1120 	MSM_PIN_FUNCTION(blsp_i2c3),
1121 	MSM_PIN_FUNCTION(blsp_i2c4),
1122 	MSM_PIN_FUNCTION(blsp_i2c5),
1123 	MSM_PIN_FUNCTION(blsp_i2c6),
1124 	MSM_PIN_FUNCTION(blsp_i2c7),
1125 	MSM_PIN_FUNCTION(blsp_i2c8_a),
1126 	MSM_PIN_FUNCTION(blsp_i2c8_b),
1127 	MSM_PIN_FUNCTION(blsp_spi1),
1128 	MSM_PIN_FUNCTION(blsp_spi2),
1129 	MSM_PIN_FUNCTION(blsp_spi3),
1130 	MSM_PIN_FUNCTION(blsp_spi3_cs1),
1131 	MSM_PIN_FUNCTION(blsp_spi3_cs2),
1132 	MSM_PIN_FUNCTION(blsp_spi4),
1133 	MSM_PIN_FUNCTION(blsp_spi5),
1134 	MSM_PIN_FUNCTION(blsp_spi6),
1135 	MSM_PIN_FUNCTION(blsp_spi7),
1136 	MSM_PIN_FUNCTION(blsp_spi8_a),
1137 	MSM_PIN_FUNCTION(blsp_spi8_b),
1138 	MSM_PIN_FUNCTION(blsp_spi8_cs1),
1139 	MSM_PIN_FUNCTION(blsp_spi8_cs2),
1140 	MSM_PIN_FUNCTION(blsp_uart1),
1141 	MSM_PIN_FUNCTION(blsp_uart2),
1142 	MSM_PIN_FUNCTION(blsp_uart5),
1143 	MSM_PIN_FUNCTION(blsp_uart6_a),
1144 	MSM_PIN_FUNCTION(blsp_uart6_b),
1145 	MSM_PIN_FUNCTION(blsp_uim1),
1146 	MSM_PIN_FUNCTION(blsp_uim2),
1147 	MSM_PIN_FUNCTION(blsp_uim5),
1148 	MSM_PIN_FUNCTION(blsp_uim6),
1149 	MSM_PIN_FUNCTION(cam_mclk),
1150 	MSM_PIN_FUNCTION(cci_async),
1151 	MSM_PIN_FUNCTION(cci_i2c),
1152 	MSM_PIN_FUNCTION(cri_trng),
1153 	MSM_PIN_FUNCTION(cri_trng0),
1154 	MSM_PIN_FUNCTION(cri_trng1),
1155 	MSM_PIN_FUNCTION(dbg_out),
1156 	MSM_PIN_FUNCTION(ddr_bist),
1157 	MSM_PIN_FUNCTION(gcc_gp1),
1158 	MSM_PIN_FUNCTION(gcc_gp2),
1159 	MSM_PIN_FUNCTION(gcc_gp3),
1160 	MSM_PIN_FUNCTION(gpio),
1161 	MSM_PIN_FUNCTION(gps_tx_a),
1162 	MSM_PIN_FUNCTION(gps_tx_b),
1163 	MSM_PIN_FUNCTION(gps_tx_c),
1164 	MSM_PIN_FUNCTION(isense_dbg),
1165 	MSM_PIN_FUNCTION(jitter_bist),
1166 	MSM_PIN_FUNCTION(ldo_en),
1167 	MSM_PIN_FUNCTION(ldo_update),
1168 	MSM_PIN_FUNCTION(m_voc),
1169 	MSM_PIN_FUNCTION(mdp_vsync),
1170 	MSM_PIN_FUNCTION(mdss_vsync0),
1171 	MSM_PIN_FUNCTION(mdss_vsync1),
1172 	MSM_PIN_FUNCTION(mdss_vsync2),
1173 	MSM_PIN_FUNCTION(mdss_vsync3),
1174 	MSM_PIN_FUNCTION(mss_lte),
1175 	MSM_PIN_FUNCTION(nav_pps_a),
1176 	MSM_PIN_FUNCTION(nav_pps_b),
1177 	MSM_PIN_FUNCTION(nav_pps_c),
1178 	MSM_PIN_FUNCTION(pa_indicator),
1179 	MSM_PIN_FUNCTION(phase_flag0),
1180 	MSM_PIN_FUNCTION(phase_flag1),
1181 	MSM_PIN_FUNCTION(phase_flag2),
1182 	MSM_PIN_FUNCTION(phase_flag3),
1183 	MSM_PIN_FUNCTION(phase_flag4),
1184 	MSM_PIN_FUNCTION(phase_flag5),
1185 	MSM_PIN_FUNCTION(phase_flag6),
1186 	MSM_PIN_FUNCTION(phase_flag7),
1187 	MSM_PIN_FUNCTION(phase_flag8),
1188 	MSM_PIN_FUNCTION(phase_flag9),
1189 	MSM_PIN_FUNCTION(phase_flag10),
1190 	MSM_PIN_FUNCTION(phase_flag11),
1191 	MSM_PIN_FUNCTION(phase_flag12),
1192 	MSM_PIN_FUNCTION(phase_flag13),
1193 	MSM_PIN_FUNCTION(phase_flag14),
1194 	MSM_PIN_FUNCTION(phase_flag15),
1195 	MSM_PIN_FUNCTION(phase_flag16),
1196 	MSM_PIN_FUNCTION(phase_flag17),
1197 	MSM_PIN_FUNCTION(phase_flag18),
1198 	MSM_PIN_FUNCTION(phase_flag19),
1199 	MSM_PIN_FUNCTION(phase_flag20),
1200 	MSM_PIN_FUNCTION(phase_flag21),
1201 	MSM_PIN_FUNCTION(phase_flag22),
1202 	MSM_PIN_FUNCTION(phase_flag23),
1203 	MSM_PIN_FUNCTION(phase_flag24),
1204 	MSM_PIN_FUNCTION(phase_flag25),
1205 	MSM_PIN_FUNCTION(phase_flag26),
1206 	MSM_PIN_FUNCTION(phase_flag27),
1207 	MSM_PIN_FUNCTION(phase_flag28),
1208 	MSM_PIN_FUNCTION(phase_flag29),
1209 	MSM_PIN_FUNCTION(phase_flag30),
1210 	MSM_PIN_FUNCTION(phase_flag31),
1211 	MSM_PIN_FUNCTION(pll_bypassnl),
1212 	MSM_PIN_FUNCTION(pll_reset),
1213 	MSM_PIN_FUNCTION(pri_mi2s),
1214 	MSM_PIN_FUNCTION(pri_mi2s_ws),
1215 	MSM_PIN_FUNCTION(prng_rosc),
1216 	MSM_PIN_FUNCTION(pwr_crypto),
1217 	MSM_PIN_FUNCTION(pwr_modem),
1218 	MSM_PIN_FUNCTION(pwr_nav),
1219 	MSM_PIN_FUNCTION(qdss_cti0_a),
1220 	MSM_PIN_FUNCTION(qdss_cti0_b),
1221 	MSM_PIN_FUNCTION(qdss_cti1_a),
1222 	MSM_PIN_FUNCTION(qdss_cti1_b),
1223 	MSM_PIN_FUNCTION(qdss_gpio),
1224 	MSM_PIN_FUNCTION(qdss_gpio0),
1225 	MSM_PIN_FUNCTION(qdss_gpio1),
1226 	MSM_PIN_FUNCTION(qdss_gpio10),
1227 	MSM_PIN_FUNCTION(qdss_gpio11),
1228 	MSM_PIN_FUNCTION(qdss_gpio12),
1229 	MSM_PIN_FUNCTION(qdss_gpio13),
1230 	MSM_PIN_FUNCTION(qdss_gpio14),
1231 	MSM_PIN_FUNCTION(qdss_gpio15),
1232 	MSM_PIN_FUNCTION(qdss_gpio2),
1233 	MSM_PIN_FUNCTION(qdss_gpio3),
1234 	MSM_PIN_FUNCTION(qdss_gpio4),
1235 	MSM_PIN_FUNCTION(qdss_gpio5),
1236 	MSM_PIN_FUNCTION(qdss_gpio6),
1237 	MSM_PIN_FUNCTION(qdss_gpio7),
1238 	MSM_PIN_FUNCTION(qdss_gpio8),
1239 	MSM_PIN_FUNCTION(qdss_gpio9),
1240 	MSM_PIN_FUNCTION(qlink_enable),
1241 	MSM_PIN_FUNCTION(qlink_request),
1242 	MSM_PIN_FUNCTION(qspi_clk),
1243 	MSM_PIN_FUNCTION(qspi_cs),
1244 	MSM_PIN_FUNCTION(qspi_data0),
1245 	MSM_PIN_FUNCTION(qspi_data1),
1246 	MSM_PIN_FUNCTION(qspi_data2),
1247 	MSM_PIN_FUNCTION(qspi_data3),
1248 	MSM_PIN_FUNCTION(qspi_resetn),
1249 	MSM_PIN_FUNCTION(sec_mi2s),
1250 	MSM_PIN_FUNCTION(sndwire_clk),
1251 	MSM_PIN_FUNCTION(sndwire_data),
1252 	MSM_PIN_FUNCTION(sp_cmu),
1253 	MSM_PIN_FUNCTION(ssc_irq),
1254 	MSM_PIN_FUNCTION(tgu_ch0),
1255 	MSM_PIN_FUNCTION(tgu_ch1),
1256 	MSM_PIN_FUNCTION(tsense_pwm1),
1257 	MSM_PIN_FUNCTION(tsense_pwm2),
1258 	MSM_PIN_FUNCTION(uim1_clk),
1259 	MSM_PIN_FUNCTION(uim1_data),
1260 	MSM_PIN_FUNCTION(uim1_present),
1261 	MSM_PIN_FUNCTION(uim1_reset),
1262 	MSM_PIN_FUNCTION(uim2_clk),
1263 	MSM_PIN_FUNCTION(uim2_data),
1264 	MSM_PIN_FUNCTION(uim2_present),
1265 	MSM_PIN_FUNCTION(uim2_reset),
1266 	MSM_PIN_FUNCTION(uim_batt),
1267 	MSM_PIN_FUNCTION(vfr_1),
1268 	MSM_PIN_FUNCTION(vsense_clkout),
1269 	MSM_PIN_FUNCTION(vsense_data0),
1270 	MSM_PIN_FUNCTION(vsense_data1),
1271 	MSM_PIN_FUNCTION(vsense_mode),
1272 	MSM_PIN_FUNCTION(wlan1_adc0),
1273 	MSM_PIN_FUNCTION(wlan1_adc1),
1274 	MSM_PIN_FUNCTION(wlan2_adc0),
1275 	MSM_PIN_FUNCTION(wlan2_adc1),
1276 };
1277 
1278 static const struct msm_pingroup sdm660_groups[] = {
1279 	PINGROUP(0, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch0, _, _, qdss_gpio4, atest_gpsadc1, _),
1280 	PINGROUP(1, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch1, _, _, qdss_gpio5, atest_gpsadc0, _),
1281 	PINGROUP(2, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _),
1282 	PINGROUP(3, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, ddr_bist, _, _, atest_tsens2, atest_usb1, _),
1283 	PINGROUP(4, NORTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag3, _, _, _, _, _),
1284 	PINGROUP(5, SOUTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag14, _, _, _, _, _),
1285 	PINGROUP(6, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, phase_flag31, _, _, _, _, _),
1286 	PINGROUP(7, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, _, _, _, _, _, _),
1287 	PINGROUP(8, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc1, atest_usb13, bimc_dte1, _),
1288 	PINGROUP(9, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc0, atest_usb12, bimc_dte0, _),
1289 	PINGROUP(10, NORTH, blsp_spi3, blsp_i2c3, ddr_bist, _, _, wlan2_adc1, atest_usb11, bimc_dte1, _),
1290 	PINGROUP(11, NORTH, blsp_spi3, blsp_i2c3, _, dbg_out, wlan2_adc0, atest_usb10, bimc_dte0, _, _),
1291 	PINGROUP(12, NORTH, blsp_spi4, pri_mi2s, _, phase_flag26, qdss_cti1_b, _, _, _, _),
1292 	PINGROUP(13, NORTH, blsp_spi4, _, pri_mi2s_ws, _, _, phase_flag27, qdss_cti0_b, _, _),
1293 	PINGROUP(14, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, phase_flag28, _, _, _, _),
1294 	PINGROUP(15, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, _, _, _, _, _),
1295 	PINGROUP(16, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, _, _, _, _, _),
1296 	PINGROUP(17, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, phase_flag5, _, _, _, _),
1297 	PINGROUP(18, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _),
1298 	PINGROUP(19, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _),
1299 	PINGROUP(20, SOUTH, _, _, blsp_uim6, _, _, _, _, _, _),
1300 	PINGROUP(21, SOUTH, _, _, blsp_uim6, _, phase_flag11, qdss_cti0_b, vsense_data0, _, _),
1301 	PINGROUP(22, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag12, vsense_data1, _, _, _),
1302 	PINGROUP(23, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag13, vsense_mode, _, _, _),
1303 	PINGROUP(24, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_clk, _, _, phase_flag17, vsense_clkout, _),
1304 	PINGROUP(25, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_data, _, _, phase_flag18, _, _),
1305 	PINGROUP(26, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, sec_mi2s, _, phase_flag19, _, _, _),
1306 	PINGROUP(27, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, vfr_1, sec_mi2s, _, phase_flag20, _, _),
1307 	PINGROUP(28, CENTER, blsp_spi8_a, blsp_uart6_b, m_voc, _, phase_flag21, _, _, _, _),
1308 	PINGROUP(29, CENTER, blsp_spi8_a, blsp_uart6_b, _, _, phase_flag22, _, _, _, _),
1309 	PINGROUP(30, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, blsp_spi3_cs1, _, phase_flag23, _, _, _),
1310 	PINGROUP(31, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, pwr_modem, _, phase_flag24, qdss_gpio, _, _),
1311 	PINGROUP(32, SOUTH, cam_mclk, pwr_nav, _, _, qdss_gpio0, _, _, _, _),
1312 	PINGROUP(33, SOUTH, cam_mclk, qspi_data0, pwr_crypto, _, _, qdss_gpio1, _, _, _),
1313 	PINGROUP(34, SOUTH, cam_mclk, qspi_data1, agera_pll, _, _, qdss_gpio2, _, _, _),
1314 	PINGROUP(35, SOUTH, cam_mclk, qspi_data2, jitter_bist, _, _, qdss_gpio3, _, atest_usb2, _),
1315 	PINGROUP(36, SOUTH, cci_i2c, pll_bypassnl, agera_pll, _, _, qdss_gpio4, atest_tsens, atest_usb21, _),
1316 	PINGROUP(37, SOUTH, cci_i2c, pll_reset, _, _, qdss_gpio5, atest_usb23, _, _, _),
1317 	PINGROUP(38, SOUTH, cci_i2c, _, _, qdss_gpio6, _, _, _, _, _),
1318 	PINGROUP(39, SOUTH, cci_i2c, _, _, qdss_gpio7, _, _, _, _, _),
1319 	PINGROUP(40, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _),
1320 	PINGROUP(41, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _),
1321 	PINGROUP(42, SOUTH, mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, _, _, qdss_gpio9, _, _),
1322 	PINGROUP(43, SOUTH, _, _, qspi_cs, _, _, qdss_gpio10, _, _, _),
1323 	PINGROUP(44, SOUTH, _, _, blsp_spi8_b, blsp_i2c8_b, _, _, qdss_gpio11, _, _),
1324 	PINGROUP(45, SOUTH, cci_async, _, _, qdss_gpio12, _, _, _, _, _),
1325 	PINGROUP(46, SOUTH, blsp_spi1, _, _, qdss_gpio13, _, _, _, _, _),
1326 	PINGROUP(47, SOUTH, qspi_clk, _, phase_flag30, qdss_gpio14, _, _, _, _, _),
1327 	PINGROUP(48, SOUTH, _, phase_flag1, qdss_gpio15, _, _, _, _, _, _),
1328 	PINGROUP(49, SOUTH, blsp_spi6, phase_flag2, qdss_cti0_a, _, _, _, _, _, _),
1329 	PINGROUP(50, SOUTH, qspi_cs, _, phase_flag9, qdss_cti0_a, _, _, _, _, _),
1330 	PINGROUP(51, SOUTH, qspi_data3, _, phase_flag15, qdss_gpio8, _, _, _, _, _),
1331 	PINGROUP(52, SOUTH, _, blsp_spi8_b, blsp_i2c8_b, blsp_spi6, phase_flag16, qdss_gpio, _, _, _),
1332 	PINGROUP(53, NORTH, _, phase_flag6, qdss_cti1_a, _, _, _, _, _, _),
1333 	PINGROUP(54, NORTH, _, _, phase_flag29, _, _, _, _, _, _),
1334 	PINGROUP(55, SOUTH, _, phase_flag25, qdss_cti1_a, _, _, _, _, _, _),
1335 	PINGROUP(56, SOUTH, _, phase_flag10, qdss_gpio3, _, atest_usb20, _, _, _, _),
1336 	PINGROUP(57, SOUTH, gcc_gp1, _, phase_flag4, atest_usb22, _, _, _, _, _),
1337 	PINGROUP(58, SOUTH, _, gcc_gp2, _, _, atest_char, _, _, _, _),
1338 	PINGROUP(59, NORTH, mdp_vsync, gcc_gp3, _, _, atest_char3, _, _, _, _),
1339 	PINGROUP(60, NORTH, cri_trng0, _, _, atest_char2, _, _, _, _, _),
1340 	PINGROUP(61, NORTH, pri_mi2s, cri_trng1, _, _, atest_char1, _, _, _, _),
1341 	PINGROUP(62, NORTH, sec_mi2s, audio_ref, _, cri_trng, _, _, atest_char0, _, _),
1342 	PINGROUP(63, NORTH, _, _, _, qdss_gpio1, _, _, _, _, _),
1343 	PINGROUP(64, SOUTH, blsp_spi8_cs1, sp_cmu, _, _, qdss_gpio2, _, _, _, _),
1344 	PINGROUP(65, SOUTH, _, nav_pps_a, nav_pps_a, gps_tx_a, blsp_spi3_cs2, adsp_ext, _, _, _),
1345 	PINGROUP(66, NORTH, _, _, qdss_cti1_b, _, _, _, _, _, _),
1346 	PINGROUP(67, NORTH, _, _, qdss_gpio0, _, _, _, _, _, _),
1347 	PINGROUP(68, NORTH, isense_dbg, _, phase_flag0, qdss_gpio, _, _, _, _, _),
1348 	PINGROUP(69, NORTH, _, phase_flag7, qdss_gpio, _, _, _, _, _, _),
1349 	PINGROUP(70, NORTH, _, phase_flag8, qdss_gpio6, _, _, _, _, _, _),
1350 	PINGROUP(71, NORTH, _, _, qdss_gpio7, tsense_pwm1, tsense_pwm2, _, _, _, _),
1351 	PINGROUP(72, NORTH, _, qdss_gpio14, _, _, _, _, _, _, _),
1352 	PINGROUP(73, NORTH, _, _, qdss_gpio15, _, _, _, _, _, _),
1353 	PINGROUP(74, NORTH, mdp_vsync, _, _, _, _, _, _, _, _),
1354 	PINGROUP(75, NORTH, _, _, qdss_gpio8, _, _, _, _, _, _),
1355 	PINGROUP(76, NORTH, blsp_spi8_cs2, _, _, _, qdss_gpio9, _, _, _, _),
1356 	PINGROUP(77, NORTH, _, _, qdss_gpio10, _, _, _, _, _, _),
1357 	PINGROUP(78, NORTH, gcc_gp1, _, qdss_gpio13, _, _, _, _, _, _),
1358 	PINGROUP(79, SOUTH, _, _, qdss_gpio11, _, _, _, _, _, _),
1359 	PINGROUP(80, SOUTH, nav_pps_b, nav_pps_b, gps_tx_c, _, _, qdss_gpio12, _, _, _),
1360 	PINGROUP(81, CENTER, mss_lte, gcc_gp2, _, _, _, _, _, _, _),
1361 	PINGROUP(82, CENTER, mss_lte, gcc_gp3, _, _, _, _, _, _, _),
1362 	PINGROUP(83, SOUTH, uim2_data, _, _, _, _, _, _, _, _),
1363 	PINGROUP(84, SOUTH, uim2_clk, _, _, _, _, _, _, _, _),
1364 	PINGROUP(85, SOUTH, uim2_reset, _, _, _, _, _, _, _, _),
1365 	PINGROUP(86, SOUTH, uim2_present, _, _, _, _, _, _, _, _),
1366 	PINGROUP(87, SOUTH, uim1_data, _, _, _, _, _, _, _, _),
1367 	PINGROUP(88, SOUTH, uim1_clk, _, _, _, _, _, _, _, _),
1368 	PINGROUP(89, SOUTH, uim1_reset, _, _, _, _, _, _, _, _),
1369 	PINGROUP(90, SOUTH, uim1_present, _, _, _, _, _, _, _, _),
1370 	PINGROUP(91, SOUTH, uim_batt, _, _, _, _, _, _, _, _),
1371 	PINGROUP(92, SOUTH, _, _, pa_indicator, _, _, _, _, _, _),
1372 	PINGROUP(93, SOUTH, _, _, _, _, _, _, _, _, _),
1373 	PINGROUP(94, SOUTH, _, _, _, _, _, _, _, _, _),
1374 	PINGROUP(95, SOUTH, _, _, _, _, _, _, _, _, _),
1375 	PINGROUP(96, SOUTH, _, _, _, _, _, _, _, _, _),
1376 	PINGROUP(97, SOUTH, _, ldo_en, _, _, _, _, _, _, _),
1377 	PINGROUP(98, SOUTH, _, nav_pps_c, nav_pps_c, gps_tx_b, ldo_update, _, _, _, _),
1378 	PINGROUP(99, SOUTH, qlink_request, _, _, _, _, _, _, _, _),
1379 	PINGROUP(100, SOUTH, qlink_enable, _, _, _, _, _, _, _, _),
1380 	PINGROUP(101, SOUTH, _, _, _, _, _, _, _, _, _),
1381 	PINGROUP(102, SOUTH, _, prng_rosc, _, _, _, _, _, _, _),
1382 	PINGROUP(103, SOUTH, _, _, _, _, _, _, _, _, _),
1383 	PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _),
1384 	PINGROUP(105, SOUTH, _, _, _, _, _, _, _, _, _),
1385 	PINGROUP(106, SOUTH, _, _, _, _, _, _, _, _, _),
1386 	PINGROUP(107, SOUTH, _, _, _, _, _, _, _, _, _),
1387 	PINGROUP(108, SOUTH, _, _, _, _, _, _, _, _, _),
1388 	PINGROUP(109, SOUTH, _, _, _, _, _, _, _, _, _),
1389 	PINGROUP(110, SOUTH, _, _, _, _, _, _, _, _, _),
1390 	PINGROUP(111, SOUTH, _, _, _, _, _, _, _, _, _),
1391 	PINGROUP(112, SOUTH, _, _, _, _, _, _, _, _, _),
1392 	PINGROUP(113, SOUTH, _, _, _, _, _, _, _, _, _),
1393 	SDC_QDSD_PINGROUP(sdc1_clk, 0x9a000, 13, 6),
1394 	SDC_QDSD_PINGROUP(sdc1_cmd, 0x9a000, 11, 3),
1395 	SDC_QDSD_PINGROUP(sdc1_data, 0x9a000, 9, 0),
1396 	SDC_QDSD_PINGROUP(sdc2_clk, 0x9b000, 14, 6),
1397 	SDC_QDSD_PINGROUP(sdc2_cmd, 0x9b000, 11, 3),
1398 	SDC_QDSD_PINGROUP(sdc2_data, 0x9b000, 9, 0),
1399 	SDC_QDSD_PINGROUP(sdc1_rclk, 0x9a000, 15, 0),
1400 };
1401 
1402 static const struct msm_pinctrl_soc_data sdm660_pinctrl = {
1403 	.pins = sdm660_pins,
1404 	.npins = ARRAY_SIZE(sdm660_pins),
1405 	.functions = sdm660_functions,
1406 	.nfunctions = ARRAY_SIZE(sdm660_functions),
1407 	.groups = sdm660_groups,
1408 	.ngroups = ARRAY_SIZE(sdm660_groups),
1409 	.ngpios = 114,
1410 	.tiles = sdm660_tiles,
1411 	.ntiles = ARRAY_SIZE(sdm660_tiles),
1412 };
1413 
1414 static int sdm660_pinctrl_probe(struct platform_device *pdev)
1415 {
1416 	return msm_pinctrl_probe(pdev, &sdm660_pinctrl);
1417 }
1418 
1419 static const struct of_device_id sdm660_pinctrl_of_match[] = {
1420 	{ .compatible = "qcom,sdm660-pinctrl", },
1421 	{ .compatible = "qcom,sdm630-pinctrl", },
1422 	{ },
1423 };
1424 
1425 static struct platform_driver sdm660_pinctrl_driver = {
1426 	.driver = {
1427 		.name = "sdm660-pinctrl",
1428 		.of_match_table = sdm660_pinctrl_of_match,
1429 	},
1430 	.probe = sdm660_pinctrl_probe,
1431 	.remove = msm_pinctrl_remove,
1432 };
1433 
1434 static int __init sdm660_pinctrl_init(void)
1435 {
1436 	return platform_driver_register(&sdm660_pinctrl_driver);
1437 }
1438 arch_initcall(sdm660_pinctrl_init);
1439 
1440 static void __exit sdm660_pinctrl_exit(void)
1441 {
1442 	platform_driver_unregister(&sdm660_pinctrl_driver);
1443 }
1444 module_exit(sdm660_pinctrl_exit);
1445 
1446 MODULE_DESCRIPTION("QTI sdm660 pinctrl driver");
1447 MODULE_LICENSE("GPL v2");
1448 MODULE_DEVICE_TABLE(of, sdm660_pinctrl_of_match);
1449