1 /* 2 * Copyright (c) 2013, Sony Mobile Communications AB. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 #include <linux/pinctrl/pinctrl.h> 18 19 #include "pinctrl-msm.h" 20 21 static const struct pinctrl_pin_desc msm8x74_pins[] = { 22 PINCTRL_PIN(0, "GPIO_0"), 23 PINCTRL_PIN(1, "GPIO_1"), 24 PINCTRL_PIN(2, "GPIO_2"), 25 PINCTRL_PIN(3, "GPIO_3"), 26 PINCTRL_PIN(4, "GPIO_4"), 27 PINCTRL_PIN(5, "GPIO_5"), 28 PINCTRL_PIN(6, "GPIO_6"), 29 PINCTRL_PIN(7, "GPIO_7"), 30 PINCTRL_PIN(8, "GPIO_8"), 31 PINCTRL_PIN(9, "GPIO_9"), 32 PINCTRL_PIN(10, "GPIO_10"), 33 PINCTRL_PIN(11, "GPIO_11"), 34 PINCTRL_PIN(12, "GPIO_12"), 35 PINCTRL_PIN(13, "GPIO_13"), 36 PINCTRL_PIN(14, "GPIO_14"), 37 PINCTRL_PIN(15, "GPIO_15"), 38 PINCTRL_PIN(16, "GPIO_16"), 39 PINCTRL_PIN(17, "GPIO_17"), 40 PINCTRL_PIN(18, "GPIO_18"), 41 PINCTRL_PIN(19, "GPIO_19"), 42 PINCTRL_PIN(20, "GPIO_20"), 43 PINCTRL_PIN(21, "GPIO_21"), 44 PINCTRL_PIN(22, "GPIO_22"), 45 PINCTRL_PIN(23, "GPIO_23"), 46 PINCTRL_PIN(24, "GPIO_24"), 47 PINCTRL_PIN(25, "GPIO_25"), 48 PINCTRL_PIN(26, "GPIO_26"), 49 PINCTRL_PIN(27, "GPIO_27"), 50 PINCTRL_PIN(28, "GPIO_28"), 51 PINCTRL_PIN(29, "GPIO_29"), 52 PINCTRL_PIN(30, "GPIO_30"), 53 PINCTRL_PIN(31, "GPIO_31"), 54 PINCTRL_PIN(32, "GPIO_32"), 55 PINCTRL_PIN(33, "GPIO_33"), 56 PINCTRL_PIN(34, "GPIO_34"), 57 PINCTRL_PIN(35, "GPIO_35"), 58 PINCTRL_PIN(36, "GPIO_36"), 59 PINCTRL_PIN(37, "GPIO_37"), 60 PINCTRL_PIN(38, "GPIO_38"), 61 PINCTRL_PIN(39, "GPIO_39"), 62 PINCTRL_PIN(40, "GPIO_40"), 63 PINCTRL_PIN(41, "GPIO_41"), 64 PINCTRL_PIN(42, "GPIO_42"), 65 PINCTRL_PIN(43, "GPIO_43"), 66 PINCTRL_PIN(44, "GPIO_44"), 67 PINCTRL_PIN(45, "GPIO_45"), 68 PINCTRL_PIN(46, "GPIO_46"), 69 PINCTRL_PIN(47, "GPIO_47"), 70 PINCTRL_PIN(48, "GPIO_48"), 71 PINCTRL_PIN(49, "GPIO_49"), 72 PINCTRL_PIN(50, "GPIO_50"), 73 PINCTRL_PIN(51, "GPIO_51"), 74 PINCTRL_PIN(52, "GPIO_52"), 75 PINCTRL_PIN(53, "GPIO_53"), 76 PINCTRL_PIN(54, "GPIO_54"), 77 PINCTRL_PIN(55, "GPIO_55"), 78 PINCTRL_PIN(56, "GPIO_56"), 79 PINCTRL_PIN(57, "GPIO_57"), 80 PINCTRL_PIN(58, "GPIO_58"), 81 PINCTRL_PIN(59, "GPIO_59"), 82 PINCTRL_PIN(60, "GPIO_60"), 83 PINCTRL_PIN(61, "GPIO_61"), 84 PINCTRL_PIN(62, "GPIO_62"), 85 PINCTRL_PIN(63, "GPIO_63"), 86 PINCTRL_PIN(64, "GPIO_64"), 87 PINCTRL_PIN(65, "GPIO_65"), 88 PINCTRL_PIN(66, "GPIO_66"), 89 PINCTRL_PIN(67, "GPIO_67"), 90 PINCTRL_PIN(68, "GPIO_68"), 91 PINCTRL_PIN(69, "GPIO_69"), 92 PINCTRL_PIN(70, "GPIO_70"), 93 PINCTRL_PIN(71, "GPIO_71"), 94 PINCTRL_PIN(72, "GPIO_72"), 95 PINCTRL_PIN(73, "GPIO_73"), 96 PINCTRL_PIN(74, "GPIO_74"), 97 PINCTRL_PIN(75, "GPIO_75"), 98 PINCTRL_PIN(76, "GPIO_76"), 99 PINCTRL_PIN(77, "GPIO_77"), 100 PINCTRL_PIN(78, "GPIO_78"), 101 PINCTRL_PIN(79, "GPIO_79"), 102 PINCTRL_PIN(80, "GPIO_80"), 103 PINCTRL_PIN(81, "GPIO_81"), 104 PINCTRL_PIN(82, "GPIO_82"), 105 PINCTRL_PIN(83, "GPIO_83"), 106 PINCTRL_PIN(84, "GPIO_84"), 107 PINCTRL_PIN(85, "GPIO_85"), 108 PINCTRL_PIN(86, "GPIO_86"), 109 PINCTRL_PIN(87, "GPIO_87"), 110 PINCTRL_PIN(88, "GPIO_88"), 111 PINCTRL_PIN(89, "GPIO_89"), 112 PINCTRL_PIN(90, "GPIO_90"), 113 PINCTRL_PIN(91, "GPIO_91"), 114 PINCTRL_PIN(92, "GPIO_92"), 115 PINCTRL_PIN(93, "GPIO_93"), 116 PINCTRL_PIN(94, "GPIO_94"), 117 PINCTRL_PIN(95, "GPIO_95"), 118 PINCTRL_PIN(96, "GPIO_96"), 119 PINCTRL_PIN(97, "GPIO_97"), 120 PINCTRL_PIN(98, "GPIO_98"), 121 PINCTRL_PIN(99, "GPIO_99"), 122 PINCTRL_PIN(100, "GPIO_100"), 123 PINCTRL_PIN(101, "GPIO_101"), 124 PINCTRL_PIN(102, "GPIO_102"), 125 PINCTRL_PIN(103, "GPIO_103"), 126 PINCTRL_PIN(104, "GPIO_104"), 127 PINCTRL_PIN(105, "GPIO_105"), 128 PINCTRL_PIN(106, "GPIO_106"), 129 PINCTRL_PIN(107, "GPIO_107"), 130 PINCTRL_PIN(108, "GPIO_108"), 131 PINCTRL_PIN(109, "GPIO_109"), 132 PINCTRL_PIN(110, "GPIO_110"), 133 PINCTRL_PIN(111, "GPIO_111"), 134 PINCTRL_PIN(112, "GPIO_112"), 135 PINCTRL_PIN(113, "GPIO_113"), 136 PINCTRL_PIN(114, "GPIO_114"), 137 PINCTRL_PIN(115, "GPIO_115"), 138 PINCTRL_PIN(116, "GPIO_116"), 139 PINCTRL_PIN(117, "GPIO_117"), 140 PINCTRL_PIN(118, "GPIO_118"), 141 PINCTRL_PIN(119, "GPIO_119"), 142 PINCTRL_PIN(120, "GPIO_120"), 143 PINCTRL_PIN(121, "GPIO_121"), 144 PINCTRL_PIN(122, "GPIO_122"), 145 PINCTRL_PIN(123, "GPIO_123"), 146 PINCTRL_PIN(124, "GPIO_124"), 147 PINCTRL_PIN(125, "GPIO_125"), 148 PINCTRL_PIN(126, "GPIO_126"), 149 PINCTRL_PIN(127, "GPIO_127"), 150 PINCTRL_PIN(128, "GPIO_128"), 151 PINCTRL_PIN(129, "GPIO_129"), 152 PINCTRL_PIN(130, "GPIO_130"), 153 PINCTRL_PIN(131, "GPIO_131"), 154 PINCTRL_PIN(132, "GPIO_132"), 155 PINCTRL_PIN(133, "GPIO_133"), 156 PINCTRL_PIN(134, "GPIO_134"), 157 PINCTRL_PIN(135, "GPIO_135"), 158 PINCTRL_PIN(136, "GPIO_136"), 159 PINCTRL_PIN(137, "GPIO_137"), 160 PINCTRL_PIN(138, "GPIO_138"), 161 PINCTRL_PIN(139, "GPIO_139"), 162 PINCTRL_PIN(140, "GPIO_140"), 163 PINCTRL_PIN(141, "GPIO_141"), 164 PINCTRL_PIN(142, "GPIO_142"), 165 PINCTRL_PIN(143, "GPIO_143"), 166 PINCTRL_PIN(144, "GPIO_144"), 167 PINCTRL_PIN(145, "GPIO_145"), 168 169 PINCTRL_PIN(146, "SDC1_CLK"), 170 PINCTRL_PIN(147, "SDC1_CMD"), 171 PINCTRL_PIN(148, "SDC1_DATA"), 172 PINCTRL_PIN(149, "SDC2_CLK"), 173 PINCTRL_PIN(150, "SDC2_CMD"), 174 PINCTRL_PIN(151, "SDC2_DATA"), 175 }; 176 177 #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } 178 DECLARE_MSM_GPIO_PINS(0); 179 DECLARE_MSM_GPIO_PINS(1); 180 DECLARE_MSM_GPIO_PINS(2); 181 DECLARE_MSM_GPIO_PINS(3); 182 DECLARE_MSM_GPIO_PINS(4); 183 DECLARE_MSM_GPIO_PINS(5); 184 DECLARE_MSM_GPIO_PINS(6); 185 DECLARE_MSM_GPIO_PINS(7); 186 DECLARE_MSM_GPIO_PINS(8); 187 DECLARE_MSM_GPIO_PINS(9); 188 DECLARE_MSM_GPIO_PINS(10); 189 DECLARE_MSM_GPIO_PINS(11); 190 DECLARE_MSM_GPIO_PINS(12); 191 DECLARE_MSM_GPIO_PINS(13); 192 DECLARE_MSM_GPIO_PINS(14); 193 DECLARE_MSM_GPIO_PINS(15); 194 DECLARE_MSM_GPIO_PINS(16); 195 DECLARE_MSM_GPIO_PINS(17); 196 DECLARE_MSM_GPIO_PINS(18); 197 DECLARE_MSM_GPIO_PINS(19); 198 DECLARE_MSM_GPIO_PINS(20); 199 DECLARE_MSM_GPIO_PINS(21); 200 DECLARE_MSM_GPIO_PINS(22); 201 DECLARE_MSM_GPIO_PINS(23); 202 DECLARE_MSM_GPIO_PINS(24); 203 DECLARE_MSM_GPIO_PINS(25); 204 DECLARE_MSM_GPIO_PINS(26); 205 DECLARE_MSM_GPIO_PINS(27); 206 DECLARE_MSM_GPIO_PINS(28); 207 DECLARE_MSM_GPIO_PINS(29); 208 DECLARE_MSM_GPIO_PINS(30); 209 DECLARE_MSM_GPIO_PINS(31); 210 DECLARE_MSM_GPIO_PINS(32); 211 DECLARE_MSM_GPIO_PINS(33); 212 DECLARE_MSM_GPIO_PINS(34); 213 DECLARE_MSM_GPIO_PINS(35); 214 DECLARE_MSM_GPIO_PINS(36); 215 DECLARE_MSM_GPIO_PINS(37); 216 DECLARE_MSM_GPIO_PINS(38); 217 DECLARE_MSM_GPIO_PINS(39); 218 DECLARE_MSM_GPIO_PINS(40); 219 DECLARE_MSM_GPIO_PINS(41); 220 DECLARE_MSM_GPIO_PINS(42); 221 DECLARE_MSM_GPIO_PINS(43); 222 DECLARE_MSM_GPIO_PINS(44); 223 DECLARE_MSM_GPIO_PINS(45); 224 DECLARE_MSM_GPIO_PINS(46); 225 DECLARE_MSM_GPIO_PINS(47); 226 DECLARE_MSM_GPIO_PINS(48); 227 DECLARE_MSM_GPIO_PINS(49); 228 DECLARE_MSM_GPIO_PINS(50); 229 DECLARE_MSM_GPIO_PINS(51); 230 DECLARE_MSM_GPIO_PINS(52); 231 DECLARE_MSM_GPIO_PINS(53); 232 DECLARE_MSM_GPIO_PINS(54); 233 DECLARE_MSM_GPIO_PINS(55); 234 DECLARE_MSM_GPIO_PINS(56); 235 DECLARE_MSM_GPIO_PINS(57); 236 DECLARE_MSM_GPIO_PINS(58); 237 DECLARE_MSM_GPIO_PINS(59); 238 DECLARE_MSM_GPIO_PINS(60); 239 DECLARE_MSM_GPIO_PINS(61); 240 DECLARE_MSM_GPIO_PINS(62); 241 DECLARE_MSM_GPIO_PINS(63); 242 DECLARE_MSM_GPIO_PINS(64); 243 DECLARE_MSM_GPIO_PINS(65); 244 DECLARE_MSM_GPIO_PINS(66); 245 DECLARE_MSM_GPIO_PINS(67); 246 DECLARE_MSM_GPIO_PINS(68); 247 DECLARE_MSM_GPIO_PINS(69); 248 DECLARE_MSM_GPIO_PINS(70); 249 DECLARE_MSM_GPIO_PINS(71); 250 DECLARE_MSM_GPIO_PINS(72); 251 DECLARE_MSM_GPIO_PINS(73); 252 DECLARE_MSM_GPIO_PINS(74); 253 DECLARE_MSM_GPIO_PINS(75); 254 DECLARE_MSM_GPIO_PINS(76); 255 DECLARE_MSM_GPIO_PINS(77); 256 DECLARE_MSM_GPIO_PINS(78); 257 DECLARE_MSM_GPIO_PINS(79); 258 DECLARE_MSM_GPIO_PINS(80); 259 DECLARE_MSM_GPIO_PINS(81); 260 DECLARE_MSM_GPIO_PINS(82); 261 DECLARE_MSM_GPIO_PINS(83); 262 DECLARE_MSM_GPIO_PINS(84); 263 DECLARE_MSM_GPIO_PINS(85); 264 DECLARE_MSM_GPIO_PINS(86); 265 DECLARE_MSM_GPIO_PINS(87); 266 DECLARE_MSM_GPIO_PINS(88); 267 DECLARE_MSM_GPIO_PINS(89); 268 DECLARE_MSM_GPIO_PINS(90); 269 DECLARE_MSM_GPIO_PINS(91); 270 DECLARE_MSM_GPIO_PINS(92); 271 DECLARE_MSM_GPIO_PINS(93); 272 DECLARE_MSM_GPIO_PINS(94); 273 DECLARE_MSM_GPIO_PINS(95); 274 DECLARE_MSM_GPIO_PINS(96); 275 DECLARE_MSM_GPIO_PINS(97); 276 DECLARE_MSM_GPIO_PINS(98); 277 DECLARE_MSM_GPIO_PINS(99); 278 DECLARE_MSM_GPIO_PINS(100); 279 DECLARE_MSM_GPIO_PINS(101); 280 DECLARE_MSM_GPIO_PINS(102); 281 DECLARE_MSM_GPIO_PINS(103); 282 DECLARE_MSM_GPIO_PINS(104); 283 DECLARE_MSM_GPIO_PINS(105); 284 DECLARE_MSM_GPIO_PINS(106); 285 DECLARE_MSM_GPIO_PINS(107); 286 DECLARE_MSM_GPIO_PINS(108); 287 DECLARE_MSM_GPIO_PINS(109); 288 DECLARE_MSM_GPIO_PINS(110); 289 DECLARE_MSM_GPIO_PINS(111); 290 DECLARE_MSM_GPIO_PINS(112); 291 DECLARE_MSM_GPIO_PINS(113); 292 DECLARE_MSM_GPIO_PINS(114); 293 DECLARE_MSM_GPIO_PINS(115); 294 DECLARE_MSM_GPIO_PINS(116); 295 DECLARE_MSM_GPIO_PINS(117); 296 DECLARE_MSM_GPIO_PINS(118); 297 DECLARE_MSM_GPIO_PINS(119); 298 DECLARE_MSM_GPIO_PINS(120); 299 DECLARE_MSM_GPIO_PINS(121); 300 DECLARE_MSM_GPIO_PINS(122); 301 DECLARE_MSM_GPIO_PINS(123); 302 DECLARE_MSM_GPIO_PINS(124); 303 DECLARE_MSM_GPIO_PINS(125); 304 DECLARE_MSM_GPIO_PINS(126); 305 DECLARE_MSM_GPIO_PINS(127); 306 DECLARE_MSM_GPIO_PINS(128); 307 DECLARE_MSM_GPIO_PINS(129); 308 DECLARE_MSM_GPIO_PINS(130); 309 DECLARE_MSM_GPIO_PINS(131); 310 DECLARE_MSM_GPIO_PINS(132); 311 DECLARE_MSM_GPIO_PINS(133); 312 DECLARE_MSM_GPIO_PINS(134); 313 DECLARE_MSM_GPIO_PINS(135); 314 DECLARE_MSM_GPIO_PINS(136); 315 DECLARE_MSM_GPIO_PINS(137); 316 DECLARE_MSM_GPIO_PINS(138); 317 DECLARE_MSM_GPIO_PINS(139); 318 DECLARE_MSM_GPIO_PINS(140); 319 DECLARE_MSM_GPIO_PINS(141); 320 DECLARE_MSM_GPIO_PINS(142); 321 DECLARE_MSM_GPIO_PINS(143); 322 DECLARE_MSM_GPIO_PINS(144); 323 DECLARE_MSM_GPIO_PINS(145); 324 325 static const unsigned int sdc1_clk_pins[] = { 146 }; 326 static const unsigned int sdc1_cmd_pins[] = { 147 }; 327 static const unsigned int sdc1_data_pins[] = { 148 }; 328 static const unsigned int sdc2_clk_pins[] = { 149 }; 329 static const unsigned int sdc2_cmd_pins[] = { 150 }; 330 static const unsigned int sdc2_data_pins[] = { 151 }; 331 332 #define FUNCTION(fname) \ 333 [MSM_MUX_##fname] = { \ 334 .name = #fname, \ 335 .groups = fname##_groups, \ 336 .ngroups = ARRAY_SIZE(fname##_groups), \ 337 } 338 339 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ 340 { \ 341 .name = "gpio" #id, \ 342 .pins = gpio##id##_pins, \ 343 .npins = ARRAY_SIZE(gpio##id##_pins), \ 344 .funcs = (int[]){ \ 345 MSM_MUX_gpio, \ 346 MSM_MUX_##f1, \ 347 MSM_MUX_##f2, \ 348 MSM_MUX_##f3, \ 349 MSM_MUX_##f4, \ 350 MSM_MUX_##f5, \ 351 MSM_MUX_##f6, \ 352 MSM_MUX_##f7 \ 353 }, \ 354 .nfuncs = 8, \ 355 .ctl_reg = 0x1000 + 0x10 * id, \ 356 .io_reg = 0x1004 + 0x10 * id, \ 357 .intr_cfg_reg = 0x1008 + 0x10 * id, \ 358 .intr_status_reg = 0x100c + 0x10 * id, \ 359 .intr_target_reg = 0x1008 + 0x10 * id, \ 360 .mux_bit = 2, \ 361 .pull_bit = 0, \ 362 .drv_bit = 6, \ 363 .oe_bit = 9, \ 364 .in_bit = 0, \ 365 .out_bit = 1, \ 366 .intr_enable_bit = 0, \ 367 .intr_status_bit = 0, \ 368 .intr_target_bit = 5, \ 369 .intr_raw_status_bit = 4, \ 370 .intr_polarity_bit = 1, \ 371 .intr_detection_bit = 2, \ 372 .intr_detection_width = 2, \ 373 } 374 375 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 376 { \ 377 .name = #pg_name, \ 378 .pins = pg_name##_pins, \ 379 .npins = ARRAY_SIZE(pg_name##_pins), \ 380 .ctl_reg = ctl, \ 381 .io_reg = 0, \ 382 .intr_cfg_reg = 0, \ 383 .intr_status_reg = 0, \ 384 .intr_target_reg = 0, \ 385 .mux_bit = -1, \ 386 .pull_bit = pull, \ 387 .drv_bit = drv, \ 388 .oe_bit = -1, \ 389 .in_bit = -1, \ 390 .out_bit = -1, \ 391 .intr_enable_bit = -1, \ 392 .intr_status_bit = -1, \ 393 .intr_target_bit = -1, \ 394 .intr_raw_status_bit = -1, \ 395 .intr_polarity_bit = -1, \ 396 .intr_detection_bit = -1, \ 397 .intr_detection_width = -1, \ 398 } 399 400 /* 401 * TODO: Add the rest of the possible functions and fill out 402 * the pingroup table below. 403 */ 404 enum msm8x74_functions { 405 MSM_MUX_gpio, 406 MSM_MUX_cci_i2c0, 407 MSM_MUX_cci_i2c1, 408 MSM_MUX_blsp_i2c1, 409 MSM_MUX_blsp_i2c2, 410 MSM_MUX_blsp_i2c3, 411 MSM_MUX_blsp_i2c4, 412 MSM_MUX_blsp_i2c5, 413 MSM_MUX_blsp_i2c6, 414 MSM_MUX_blsp_i2c7, 415 MSM_MUX_blsp_i2c8, 416 MSM_MUX_blsp_i2c9, 417 MSM_MUX_blsp_i2c10, 418 MSM_MUX_blsp_i2c11, 419 MSM_MUX_blsp_i2c12, 420 MSM_MUX_blsp_spi1, 421 MSM_MUX_blsp_spi1_cs1, 422 MSM_MUX_blsp_spi1_cs2, 423 MSM_MUX_blsp_spi1_cs3, 424 MSM_MUX_blsp_spi2, 425 MSM_MUX_blsp_spi2_cs1, 426 MSM_MUX_blsp_spi2_cs2, 427 MSM_MUX_blsp_spi2_cs3, 428 MSM_MUX_blsp_spi3, 429 MSM_MUX_blsp_spi4, 430 MSM_MUX_blsp_spi5, 431 MSM_MUX_blsp_spi6, 432 MSM_MUX_blsp_spi7, 433 MSM_MUX_blsp_spi8, 434 MSM_MUX_blsp_spi9, 435 MSM_MUX_blsp_spi10, 436 MSM_MUX_blsp_spi10_cs1, 437 MSM_MUX_blsp_spi10_cs2, 438 MSM_MUX_blsp_spi10_cs3, 439 MSM_MUX_blsp_spi11, 440 MSM_MUX_blsp_spi12, 441 MSM_MUX_blsp_uart1, 442 MSM_MUX_blsp_uart2, 443 MSM_MUX_blsp_uart3, 444 MSM_MUX_blsp_uart4, 445 MSM_MUX_blsp_uart5, 446 MSM_MUX_blsp_uart6, 447 MSM_MUX_blsp_uart7, 448 MSM_MUX_blsp_uart8, 449 MSM_MUX_blsp_uart9, 450 MSM_MUX_blsp_uart10, 451 MSM_MUX_blsp_uart11, 452 MSM_MUX_blsp_uart12, 453 MSM_MUX_blsp_uim1, 454 MSM_MUX_blsp_uim2, 455 MSM_MUX_blsp_uim3, 456 MSM_MUX_blsp_uim4, 457 MSM_MUX_blsp_uim5, 458 MSM_MUX_blsp_uim6, 459 MSM_MUX_blsp_uim7, 460 MSM_MUX_blsp_uim8, 461 MSM_MUX_blsp_uim9, 462 MSM_MUX_blsp_uim10, 463 MSM_MUX_blsp_uim11, 464 MSM_MUX_blsp_uim12, 465 MSM_MUX_uim1, 466 MSM_MUX_uim2, 467 MSM_MUX_uim_batt_alarm, 468 MSM_MUX_sdc3, 469 MSM_MUX_sdc4, 470 MSM_MUX_gcc_gp_clk1, 471 MSM_MUX_gcc_gp_clk2, 472 MSM_MUX_gcc_gp_clk3, 473 MSM_MUX_qua_mi2s, 474 MSM_MUX_pri_mi2s, 475 MSM_MUX_spkr_mi2s, 476 MSM_MUX_ter_mi2s, 477 MSM_MUX_sec_mi2s, 478 MSM_MUX_hdmi_cec, 479 MSM_MUX_hdmi_ddc, 480 MSM_MUX_hdmi_hpd, 481 MSM_MUX_edp_hpd, 482 MSM_MUX_mdp_vsync, 483 MSM_MUX_cam_mclk0, 484 MSM_MUX_cam_mclk1, 485 MSM_MUX_cam_mclk2, 486 MSM_MUX_cam_mclk3, 487 MSM_MUX_cci_timer0, 488 MSM_MUX_cci_timer1, 489 MSM_MUX_cci_timer2, 490 MSM_MUX_cci_timer3, 491 MSM_MUX_cci_timer4, 492 MSM_MUX_cci_async_in0, 493 MSM_MUX_cci_async_in1, 494 MSM_MUX_cci_async_in2, 495 MSM_MUX_gp_pdm0, 496 MSM_MUX_gp_pdm1, 497 MSM_MUX_gp_pdm2, 498 MSM_MUX_gp0_clk, 499 MSM_MUX_gp1_clk, 500 MSM_MUX_gp_mn, 501 MSM_MUX_tsif1, 502 MSM_MUX_tsif2, 503 MSM_MUX_hsic, 504 MSM_MUX_grfc, 505 MSM_MUX_audio_ref_clk, 506 MSM_MUX_bt, 507 MSM_MUX_fm, 508 MSM_MUX_wlan, 509 MSM_MUX_slimbus, 510 MSM_MUX_NA, 511 }; 512 513 static const char * const gpio_groups[] = { 514 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 515 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 516 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 517 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 518 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 519 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 520 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 521 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 522 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 523 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 524 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 525 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 526 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 527 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 528 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", 529 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", 530 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", 531 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122", 532 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128", 533 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134", 534 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", 535 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145" 536 }; 537 538 static const char * const blsp_uart1_groups[] = { 539 "gpio0", "gpio1", "gpio2", "gpio3" 540 }; 541 static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" }; 542 static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" }; 543 static const char * const blsp_spi1_groups[] = { 544 "gpio0", "gpio1", "gpio2", "gpio3" 545 }; 546 static const char * const blsp_spi1_cs1_groups[] = { "gpio8" }; 547 static const char * const blsp_spi1_cs2_groups[] = { "gpio9", "gpio11" }; 548 static const char * const blsp_spi1_cs3_groups[] = { "gpio10" }; 549 550 static const char * const blsp_uart2_groups[] = { 551 "gpio4", "gpio5", "gpio6", "gpio7" 552 }; 553 static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" }; 554 static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" }; 555 static const char * const blsp_spi2_groups[] = { 556 "gpio4", "gpio5", "gpio6", "gpio7" 557 }; 558 static const char * const blsp_spi2_cs1_groups[] = { "gpio53", "gpio62" }; 559 static const char * const blsp_spi2_cs2_groups[] = { "gpio54", "gpio63" }; 560 static const char * const blsp_spi2_cs3_groups[] = { "gpio66" }; 561 562 static const char * const blsp_uart3_groups[] = { 563 "gpio8", "gpio9", "gpio10", "gpio11" 564 }; 565 static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" }; 566 static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" }; 567 static const char * const blsp_spi3_groups[] = { 568 "gpio8", "gpio9", "gpio10", "gpio11" 569 }; 570 571 static const char * const cci_i2c0_groups[] = { "gpio19", "gpio20" }; 572 static const char * const cci_i2c1_groups[] = { "gpio21", "gpio22" }; 573 574 static const char * const blsp_uart4_groups[] = { 575 "gpio19", "gpio20", "gpio21", "gpio22" 576 }; 577 static const char * const blsp_uim4_groups[] = { "gpio19", "gpio20" }; 578 static const char * const blsp_i2c4_groups[] = { "gpio21", "gpio22" }; 579 static const char * const blsp_spi4_groups[] = { 580 "gpio19", "gpio20", "gpio21", "gpio22" 581 }; 582 583 static const char * const blsp_uart5_groups[] = { 584 "gpio23", "gpio24", "gpio25", "gpio26" 585 }; 586 static const char * const blsp_uim5_groups[] = { "gpio23", "gpio24" }; 587 static const char * const blsp_i2c5_groups[] = { "gpio25", "gpio26" }; 588 static const char * const blsp_spi5_groups[] = { 589 "gpio23", "gpio24", "gpio25", "gpio26" 590 }; 591 592 static const char * const blsp_uart6_groups[] = { 593 "gpio27", "gpio28", "gpio29", "gpio30" 594 }; 595 static const char * const blsp_uim6_groups[] = { "gpio27", "gpio28" }; 596 static const char * const blsp_i2c6_groups[] = { "gpio29", "gpio30" }; 597 static const char * const blsp_spi6_groups[] = { 598 "gpio27", "gpio28", "gpio29", "gpio30" 599 }; 600 601 static const char * const blsp_uart7_groups[] = { 602 "gpio41", "gpio42", "gpio43", "gpio44" 603 }; 604 static const char * const blsp_uim7_groups[] = { "gpio41", "gpio42" }; 605 static const char * const blsp_i2c7_groups[] = { "gpio43", "gpio44" }; 606 static const char * const blsp_spi7_groups[] = { 607 "gpio41", "gpio42", "gpio43", "gpio44" 608 }; 609 610 static const char * const blsp_uart8_groups[] = { 611 "gpio45", "gpio46", "gpio47", "gpio48" 612 }; 613 static const char * const blsp_uim8_groups[] = { "gpio45", "gpio46" }; 614 static const char * const blsp_i2c8_groups[] = { "gpio47", "gpio48" }; 615 static const char * const blsp_spi8_groups[] = { 616 "gpio45", "gpio46", "gpio47", "gpio48" 617 }; 618 619 static const char * const blsp_uart9_groups[] = { 620 "gpio49", "gpio50", "gpio51", "gpio52" 621 }; 622 static const char * const blsp_uim9_groups[] = { "gpio49", "gpio50" }; 623 static const char * const blsp_i2c9_groups[] = { "gpio51", "gpio52" }; 624 static const char * const blsp_spi9_groups[] = { 625 "gpio49", "gpio50", "gpio51", "gpio52" 626 }; 627 628 static const char * const blsp_uart10_groups[] = { 629 "gpio53", "gpio54", "gpio55", "gpio56" 630 }; 631 static const char * const blsp_uim10_groups[] = { "gpio53", "gpio54" }; 632 static const char * const blsp_i2c10_groups[] = { "gpio55", "gpio56" }; 633 static const char * const blsp_spi10_groups[] = { 634 "gpio53", "gpio54", "gpio55", "gpio56" 635 }; 636 static const char * const blsp_spi10_cs1_groups[] = { "gpio47", "gpio67" }; 637 static const char * const blsp_spi10_cs2_groups[] = { "gpio48", "gpio68" }; 638 static const char * const blsp_spi10_cs3_groups[] = { "gpio90" }; 639 640 static const char * const blsp_uart11_groups[] = { 641 "gpio81", "gpio82", "gpio83", "gpio84" 642 }; 643 static const char * const blsp_uim11_groups[] = { "gpio81", "gpio82" }; 644 static const char * const blsp_i2c11_groups[] = { "gpio83", "gpio84" }; 645 static const char * const blsp_spi11_groups[] = { 646 "gpio81", "gpio82", "gpio83", "gpio84" 647 }; 648 649 static const char * const blsp_uart12_groups[] = { 650 "gpio85", "gpio86", "gpio87", "gpio88" 651 }; 652 static const char * const blsp_uim12_groups[] = { "gpio85", "gpio86" }; 653 static const char * const blsp_i2c12_groups[] = { "gpio87", "gpio88" }; 654 static const char * const blsp_spi12_groups[] = { 655 "gpio85", "gpio86", "gpio87", "gpio88" 656 }; 657 658 static const char * const uim1_groups[] = { 659 "gpio97", "gpio98", "gpio99", "gpio100" 660 }; 661 662 static const char * const uim2_groups[] = { 663 "gpio49", "gpio50", "gpio51", "gpio52" 664 }; 665 666 static const char * const uim_batt_alarm_groups[] = { "gpio101" }; 667 668 static const char * const sdc3_groups[] = { 669 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40" 670 }; 671 672 static const char * const sdc4_groups[] = { 673 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96" 674 }; 675 676 static const char * const gp0_clk_groups[] = { "gpio26" }; 677 static const char * const gp1_clk_groups[] = { "gpio27", "gpio57", "gpio78" }; 678 static const char * const gp_mn_groups[] = { "gpio29" }; 679 static const char * const gcc_gp_clk1_groups[] = { "gpio57", "gpio78" }; 680 static const char * const gcc_gp_clk2_groups[] = { "gpio58", "gpio81" }; 681 static const char * const gcc_gp_clk3_groups[] = { "gpio59", "gpio82" }; 682 683 static const char * const qua_mi2s_groups[] = { 684 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 685 }; 686 687 static const char * const pri_mi2s_groups[] = { 688 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68" 689 }; 690 691 static const char * const spkr_mi2s_groups[] = { 692 "gpio69", "gpio70", "gpio71", "gpio72" 693 }; 694 695 static const char * const ter_mi2s_groups[] = { 696 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77" 697 }; 698 699 static const char * const sec_mi2s_groups[] = { 700 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82" 701 }; 702 703 static const char * const hdmi_cec_groups[] = { "gpio31" }; 704 static const char * const hdmi_ddc_groups[] = { "gpio32", "gpio33" }; 705 static const char * const hdmi_hpd_groups[] = { "gpio34" }; 706 static const char * const edp_hpd_groups[] = { "gpio102" }; 707 708 static const char * const mdp_vsync_groups[] = { "gpio12", "gpio13", "gpio14" }; 709 static const char * const cam_mclk0_groups[] = { "gpio15" }; 710 static const char * const cam_mclk1_groups[] = { "gpio16" }; 711 static const char * const cam_mclk2_groups[] = { "gpio17" }; 712 static const char * const cam_mclk3_groups[] = { "gpio18" }; 713 714 static const char * const cci_timer0_groups[] = { "gpio23" }; 715 static const char * const cci_timer1_groups[] = { "gpio24" }; 716 static const char * const cci_timer2_groups[] = { "gpio25" }; 717 static const char * const cci_timer3_groups[] = { "gpio26" }; 718 static const char * const cci_timer4_groups[] = { "gpio27" }; 719 static const char * const cci_async_in0_groups[] = { "gpio28" }; 720 static const char * const cci_async_in1_groups[] = { "gpio26" }; 721 static const char * const cci_async_in2_groups[] = { "gpio27" }; 722 723 static const char * const gp_pdm0_groups[] = { "gpio54", "gpio68" }; 724 static const char * const gp_pdm1_groups[] = { "gpio74", "gpio86" }; 725 static const char * const gp_pdm2_groups[] = { "gpio63", "gpio79" }; 726 727 static const char * const tsif1_groups[] = { 728 "gpio89", "gpio90", "gpio91", "gpio92" 729 }; 730 731 static const char * const tsif2_groups[] = { 732 "gpio93", "gpio94", "gpio95", "gpio96" 733 }; 734 735 static const char * const hsic_groups[] = { "gpio144", "gpio145" }; 736 static const char * const grfc_groups[] = { 737 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", 738 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", 739 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", 740 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", 741 "gpio128", "gpio136", "gpio137", "gpio141", "gpio143" 742 }; 743 744 static const char * const audio_ref_clk_groups[] = { "gpio69" }; 745 746 static const char * const bt_groups[] = { "gpio35", "gpio43", "gpio44" }; 747 748 static const char * const fm_groups[] = { "gpio41", "gpio42" }; 749 750 static const char * const wlan_groups[] = { 751 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40" 752 }; 753 754 static const char * const slimbus_groups[] = { "gpio70", "gpio71" }; 755 756 static const struct msm_function msm8x74_functions[] = { 757 FUNCTION(gpio), 758 FUNCTION(cci_i2c0), 759 FUNCTION(cci_i2c1), 760 FUNCTION(uim1), 761 FUNCTION(uim2), 762 FUNCTION(uim_batt_alarm), 763 FUNCTION(blsp_uim1), 764 FUNCTION(blsp_uim2), 765 FUNCTION(blsp_uim3), 766 FUNCTION(blsp_uim4), 767 FUNCTION(blsp_uim5), 768 FUNCTION(blsp_uim6), 769 FUNCTION(blsp_uim7), 770 FUNCTION(blsp_uim8), 771 FUNCTION(blsp_uim9), 772 FUNCTION(blsp_uim10), 773 FUNCTION(blsp_uim11), 774 FUNCTION(blsp_uim12), 775 FUNCTION(blsp_i2c1), 776 FUNCTION(blsp_i2c2), 777 FUNCTION(blsp_i2c3), 778 FUNCTION(blsp_i2c4), 779 FUNCTION(blsp_i2c5), 780 FUNCTION(blsp_i2c6), 781 FUNCTION(blsp_i2c7), 782 FUNCTION(blsp_i2c8), 783 FUNCTION(blsp_i2c9), 784 FUNCTION(blsp_i2c10), 785 FUNCTION(blsp_i2c11), 786 FUNCTION(blsp_i2c12), 787 FUNCTION(blsp_spi1), 788 FUNCTION(blsp_spi1_cs1), 789 FUNCTION(blsp_spi1_cs2), 790 FUNCTION(blsp_spi1_cs3), 791 FUNCTION(blsp_spi2), 792 FUNCTION(blsp_spi2_cs1), 793 FUNCTION(blsp_spi2_cs2), 794 FUNCTION(blsp_spi2_cs3), 795 FUNCTION(blsp_spi3), 796 FUNCTION(blsp_spi4), 797 FUNCTION(blsp_spi5), 798 FUNCTION(blsp_spi6), 799 FUNCTION(blsp_spi7), 800 FUNCTION(blsp_spi8), 801 FUNCTION(blsp_spi9), 802 FUNCTION(blsp_spi10), 803 FUNCTION(blsp_spi10_cs1), 804 FUNCTION(blsp_spi10_cs2), 805 FUNCTION(blsp_spi10_cs3), 806 FUNCTION(blsp_spi11), 807 FUNCTION(blsp_spi12), 808 FUNCTION(blsp_uart1), 809 FUNCTION(blsp_uart2), 810 FUNCTION(blsp_uart3), 811 FUNCTION(blsp_uart4), 812 FUNCTION(blsp_uart5), 813 FUNCTION(blsp_uart6), 814 FUNCTION(blsp_uart7), 815 FUNCTION(blsp_uart8), 816 FUNCTION(blsp_uart9), 817 FUNCTION(blsp_uart10), 818 FUNCTION(blsp_uart11), 819 FUNCTION(blsp_uart12), 820 FUNCTION(sdc3), 821 FUNCTION(sdc4), 822 FUNCTION(gcc_gp_clk1), 823 FUNCTION(gcc_gp_clk2), 824 FUNCTION(gcc_gp_clk3), 825 FUNCTION(qua_mi2s), 826 FUNCTION(pri_mi2s), 827 FUNCTION(spkr_mi2s), 828 FUNCTION(ter_mi2s), 829 FUNCTION(sec_mi2s), 830 FUNCTION(mdp_vsync), 831 FUNCTION(cam_mclk0), 832 FUNCTION(cam_mclk1), 833 FUNCTION(cam_mclk2), 834 FUNCTION(cam_mclk3), 835 FUNCTION(cci_timer0), 836 FUNCTION(cci_timer1), 837 FUNCTION(cci_timer2), 838 FUNCTION(cci_timer3), 839 FUNCTION(cci_timer4), 840 FUNCTION(cci_async_in0), 841 FUNCTION(cci_async_in1), 842 FUNCTION(cci_async_in2), 843 FUNCTION(hdmi_cec), 844 FUNCTION(hdmi_ddc), 845 FUNCTION(hdmi_hpd), 846 FUNCTION(edp_hpd), 847 FUNCTION(gp_pdm0), 848 FUNCTION(gp_pdm1), 849 FUNCTION(gp_pdm2), 850 FUNCTION(gp0_clk), 851 FUNCTION(gp1_clk), 852 FUNCTION(gp_mn), 853 FUNCTION(tsif1), 854 FUNCTION(tsif2), 855 FUNCTION(hsic), 856 FUNCTION(grfc), 857 FUNCTION(audio_ref_clk), 858 FUNCTION(bt), 859 FUNCTION(fm), 860 FUNCTION(wlan), 861 FUNCTION(slimbus), 862 }; 863 864 static const struct msm_pingroup msm8x74_groups[] = { 865 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 866 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 867 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 868 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 869 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 870 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 871 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 872 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 873 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA, NA), 874 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA, NA), 875 PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs3, NA, NA, NA), 876 PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs2, NA, NA, NA), 877 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA), 878 PINGROUP(13, mdp_vsync, NA, NA, NA, NA, NA, NA), 879 PINGROUP(14, mdp_vsync, NA, NA, NA, NA, NA, NA), 880 PINGROUP(15, cam_mclk0, NA, NA, NA, NA, NA, NA), 881 PINGROUP(16, cam_mclk1, NA, NA, NA, NA, NA, NA), 882 PINGROUP(17, cam_mclk2, NA, NA, NA, NA, NA, NA), 883 PINGROUP(18, cam_mclk3, NA, NA, NA, NA, NA, NA), 884 PINGROUP(19, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA), 885 PINGROUP(20, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA), 886 PINGROUP(21, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA), 887 PINGROUP(22, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA), 888 PINGROUP(23, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA), 889 PINGROUP(24, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA), 890 PINGROUP(25, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA), 891 PINGROUP(26, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5, blsp_i2c5, gp0_clk, NA), 892 PINGROUP(27, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk, NA), 893 PINGROUP(28, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA), 894 PINGROUP(29, blsp_spi6, blsp_uart6, blsp_i2c6, gp_mn, NA, NA, NA), 895 PINGROUP(30, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA), 896 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA), 897 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA), 898 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA), 899 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA), 900 PINGROUP(35, bt, sdc3, NA, NA, NA, NA, NA), 901 PINGROUP(36, wlan, sdc3, NA, NA, NA, NA, NA), 902 PINGROUP(37, wlan, sdc3, NA, NA, NA, NA, NA), 903 PINGROUP(38, wlan, sdc3, NA, NA, NA, NA, NA), 904 PINGROUP(39, wlan, sdc3, NA, NA, NA, NA, NA), 905 PINGROUP(40, wlan, sdc3, NA, NA, NA, NA, NA), 906 PINGROUP(41, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA), 907 PINGROUP(42, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA), 908 PINGROUP(43, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA), 909 PINGROUP(44, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA), 910 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA), 911 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA), 912 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA, NA), 913 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA, NA), 914 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA), 915 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA), 916 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA), 917 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA), 918 PINGROUP(53, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs1, NA, NA, NA), 919 PINGROUP(54, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs2, gp_pdm0, NA, NA), 920 PINGROUP(55, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA), 921 PINGROUP(56, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA), 922 PINGROUP(57, qua_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA), 923 PINGROUP(58, qua_mi2s, gcc_gp_clk2, NA, NA, NA, NA, NA), 924 PINGROUP(59, qua_mi2s, gcc_gp_clk3, NA, NA, NA, NA, NA), 925 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA), 926 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA), 927 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA), 928 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA), 929 PINGROUP(64, pri_mi2s, NA, NA, NA, NA, NA, NA), 930 PINGROUP(65, pri_mi2s, NA, NA, NA, NA, NA, NA), 931 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, NA, NA), 932 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, NA, NA), 933 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, gp_pdm0, NA, NA, NA, NA), 934 PINGROUP(69, spkr_mi2s, audio_ref_clk, NA, NA, NA, NA, NA), 935 PINGROUP(70, slimbus, spkr_mi2s, NA, NA, NA, NA, NA), 936 PINGROUP(71, slimbus, spkr_mi2s, NA, NA, NA, NA, NA), 937 PINGROUP(72, spkr_mi2s, NA, NA, NA, NA, NA, NA), 938 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA), 939 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, NA, NA), 940 PINGROUP(75, ter_mi2s, NA, NA, NA, NA, NA, NA), 941 PINGROUP(76, ter_mi2s, NA, NA, NA, NA, NA, NA), 942 PINGROUP(77, ter_mi2s, NA, NA, NA, NA, NA, NA), 943 PINGROUP(78, sec_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA), 944 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA), 945 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA), 946 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk2, NA, NA), 947 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk3, NA, NA), 948 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA), 949 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA), 950 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA), 951 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA, NA, NA), 952 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA), 953 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA), 954 PINGROUP(89, tsif1, NA, NA, NA, NA, NA, NA), 955 PINGROUP(90, tsif1, blsp_spi10_cs3, NA, NA, NA, NA, NA), 956 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, NA), 957 PINGROUP(92, tsif1, sdc4, NA, NA, NA, NA, NA), 958 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, NA), 959 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, NA), 960 PINGROUP(95, tsif2, sdc4, NA, NA, NA, NA, NA), 961 PINGROUP(96, tsif2, sdc4, NA, NA, NA, NA, NA), 962 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA), 963 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA), 964 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA), 965 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA), 966 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA), 967 PINGROUP(102, edp_hpd, NA, NA, NA, NA, NA, NA), 968 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA), 969 PINGROUP(104, grfc, NA, NA, NA, NA, NA, NA), 970 PINGROUP(105, grfc, NA, NA, NA, NA, NA, NA), 971 PINGROUP(106, grfc, NA, NA, NA, NA, NA, NA), 972 PINGROUP(107, grfc, NA, NA, NA, NA, NA, NA), 973 PINGROUP(108, grfc, NA, NA, NA, NA, NA, NA), 974 PINGROUP(109, grfc, NA, NA, NA, NA, NA, NA), 975 PINGROUP(110, grfc, NA, NA, NA, NA, NA, NA), 976 PINGROUP(111, grfc, NA, NA, NA, NA, NA, NA), 977 PINGROUP(112, grfc, NA, NA, NA, NA, NA, NA), 978 PINGROUP(113, grfc, NA, NA, NA, NA, NA, NA), 979 PINGROUP(114, grfc, NA, NA, NA, NA, NA, NA), 980 PINGROUP(115, grfc, NA, NA, NA, NA, NA, NA), 981 PINGROUP(116, grfc, NA, NA, NA, NA, NA, NA), 982 PINGROUP(117, grfc, NA, NA, NA, NA, NA, NA), 983 PINGROUP(118, grfc, NA, NA, NA, NA, NA, NA), 984 PINGROUP(119, grfc, NA, NA, NA, NA, NA, NA), 985 PINGROUP(120, grfc, NA, NA, NA, NA, NA, NA), 986 PINGROUP(121, grfc, NA, NA, NA, NA, NA, NA), 987 PINGROUP(122, grfc, NA, NA, NA, NA, NA, NA), 988 PINGROUP(123, grfc, NA, NA, NA, NA, NA, NA), 989 PINGROUP(124, grfc, NA, NA, NA, NA, NA, NA), 990 PINGROUP(125, grfc, NA, NA, NA, NA, NA, NA), 991 PINGROUP(126, grfc, NA, NA, NA, NA, NA, NA), 992 PINGROUP(127, grfc, NA, NA, NA, NA, NA, NA), 993 PINGROUP(128, NA, grfc, NA, NA, NA, NA, NA), 994 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA), 995 PINGROUP(130, NA, NA, NA, NA, NA, NA, NA), 996 PINGROUP(131, NA, NA, NA, NA, NA, NA, NA), 997 PINGROUP(132, NA, NA, NA, NA, NA, NA, NA), 998 PINGROUP(133, NA, NA, NA, NA, NA, NA, NA), 999 PINGROUP(134, NA, NA, NA, NA, NA, NA, NA), 1000 PINGROUP(135, NA, NA, NA, NA, NA, NA, NA), 1001 PINGROUP(136, NA, grfc, NA, NA, NA, NA, NA), 1002 PINGROUP(137, NA, grfc, NA, NA, NA, NA, NA), 1003 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA), 1004 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA), 1005 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA), 1006 PINGROUP(141, NA, grfc, NA, NA, NA, NA, NA), 1007 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA), 1008 PINGROUP(143, NA, grfc, NA, NA, NA, NA, NA), 1009 PINGROUP(144, hsic, NA, NA, NA, NA, NA, NA), 1010 PINGROUP(145, hsic, NA, NA, NA, NA, NA, NA), 1011 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6), 1012 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3), 1013 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0), 1014 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6), 1015 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3), 1016 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0), 1017 }; 1018 1019 #define NUM_GPIO_PINGROUPS 146 1020 1021 static const struct msm_pinctrl_soc_data msm8x74_pinctrl = { 1022 .pins = msm8x74_pins, 1023 .npins = ARRAY_SIZE(msm8x74_pins), 1024 .functions = msm8x74_functions, 1025 .nfunctions = ARRAY_SIZE(msm8x74_functions), 1026 .groups = msm8x74_groups, 1027 .ngroups = ARRAY_SIZE(msm8x74_groups), 1028 .ngpios = NUM_GPIO_PINGROUPS, 1029 }; 1030 1031 static int msm8x74_pinctrl_probe(struct platform_device *pdev) 1032 { 1033 return msm_pinctrl_probe(pdev, &msm8x74_pinctrl); 1034 } 1035 1036 static const struct of_device_id msm8x74_pinctrl_of_match[] = { 1037 { .compatible = "qcom,msm8974-pinctrl", }, 1038 { }, 1039 }; 1040 1041 static struct platform_driver msm8x74_pinctrl_driver = { 1042 .driver = { 1043 .name = "msm8x74-pinctrl", 1044 .owner = THIS_MODULE, 1045 .of_match_table = msm8x74_pinctrl_of_match, 1046 }, 1047 .probe = msm8x74_pinctrl_probe, 1048 .remove = msm_pinctrl_remove, 1049 }; 1050 1051 static int __init msm8x74_pinctrl_init(void) 1052 { 1053 return platform_driver_register(&msm8x74_pinctrl_driver); 1054 } 1055 arch_initcall(msm8x74_pinctrl_init); 1056 1057 static void __exit msm8x74_pinctrl_exit(void) 1058 { 1059 platform_driver_unregister(&msm8x74_pinctrl_driver); 1060 } 1061 module_exit(msm8x74_pinctrl_exit); 1062 1063 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>"); 1064 MODULE_DESCRIPTION("Qualcomm MSM8x74 pinctrl driver"); 1065 MODULE_LICENSE("GPL v2"); 1066 MODULE_DEVICE_TABLE(of, msm8x74_pinctrl_of_match); 1067 1068