1 /*
2  * Copyright (c) 2014, Sony Mobile Communications AB.
3  * Copyright (c) 2016 BayLibre, SAS.
4  * Author : Neil Armstrong <narmstrong@baylibre.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 and
8  * only version 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/platform_device.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 
22 #include "pinctrl-msm.h"
23 
24 static const struct pinctrl_pin_desc mdm9615_pins[] = {
25 	PINCTRL_PIN(0, "GPIO_0"),
26 	PINCTRL_PIN(1, "GPIO_1"),
27 	PINCTRL_PIN(2, "GPIO_2"),
28 	PINCTRL_PIN(3, "GPIO_3"),
29 	PINCTRL_PIN(4, "GPIO_4"),
30 	PINCTRL_PIN(5, "GPIO_5"),
31 	PINCTRL_PIN(6, "GPIO_6"),
32 	PINCTRL_PIN(7, "GPIO_7"),
33 	PINCTRL_PIN(8, "GPIO_8"),
34 	PINCTRL_PIN(9, "GPIO_9"),
35 	PINCTRL_PIN(10, "GPIO_10"),
36 	PINCTRL_PIN(11, "GPIO_11"),
37 	PINCTRL_PIN(12, "GPIO_12"),
38 	PINCTRL_PIN(13, "GPIO_13"),
39 	PINCTRL_PIN(14, "GPIO_14"),
40 	PINCTRL_PIN(15, "GPIO_15"),
41 	PINCTRL_PIN(16, "GPIO_16"),
42 	PINCTRL_PIN(17, "GPIO_17"),
43 	PINCTRL_PIN(18, "GPIO_18"),
44 	PINCTRL_PIN(19, "GPIO_19"),
45 	PINCTRL_PIN(20, "GPIO_20"),
46 	PINCTRL_PIN(21, "GPIO_21"),
47 	PINCTRL_PIN(22, "GPIO_22"),
48 	PINCTRL_PIN(23, "GPIO_23"),
49 	PINCTRL_PIN(24, "GPIO_24"),
50 	PINCTRL_PIN(25, "GPIO_25"),
51 	PINCTRL_PIN(26, "GPIO_26"),
52 	PINCTRL_PIN(27, "GPIO_27"),
53 	PINCTRL_PIN(28, "GPIO_28"),
54 	PINCTRL_PIN(29, "GPIO_29"),
55 	PINCTRL_PIN(30, "GPIO_30"),
56 	PINCTRL_PIN(31, "GPIO_31"),
57 	PINCTRL_PIN(32, "GPIO_32"),
58 	PINCTRL_PIN(33, "GPIO_33"),
59 	PINCTRL_PIN(34, "GPIO_34"),
60 	PINCTRL_PIN(35, "GPIO_35"),
61 	PINCTRL_PIN(36, "GPIO_36"),
62 	PINCTRL_PIN(37, "GPIO_37"),
63 	PINCTRL_PIN(38, "GPIO_38"),
64 	PINCTRL_PIN(39, "GPIO_39"),
65 	PINCTRL_PIN(40, "GPIO_40"),
66 	PINCTRL_PIN(41, "GPIO_41"),
67 	PINCTRL_PIN(42, "GPIO_42"),
68 	PINCTRL_PIN(43, "GPIO_43"),
69 	PINCTRL_PIN(44, "GPIO_44"),
70 	PINCTRL_PIN(45, "GPIO_45"),
71 	PINCTRL_PIN(46, "GPIO_46"),
72 	PINCTRL_PIN(47, "GPIO_47"),
73 	PINCTRL_PIN(48, "GPIO_48"),
74 	PINCTRL_PIN(49, "GPIO_49"),
75 	PINCTRL_PIN(50, "GPIO_50"),
76 	PINCTRL_PIN(51, "GPIO_51"),
77 	PINCTRL_PIN(52, "GPIO_52"),
78 	PINCTRL_PIN(53, "GPIO_53"),
79 	PINCTRL_PIN(54, "GPIO_54"),
80 	PINCTRL_PIN(55, "GPIO_55"),
81 	PINCTRL_PIN(56, "GPIO_56"),
82 	PINCTRL_PIN(57, "GPIO_57"),
83 	PINCTRL_PIN(58, "GPIO_58"),
84 	PINCTRL_PIN(59, "GPIO_59"),
85 	PINCTRL_PIN(60, "GPIO_60"),
86 	PINCTRL_PIN(61, "GPIO_61"),
87 	PINCTRL_PIN(62, "GPIO_62"),
88 	PINCTRL_PIN(63, "GPIO_63"),
89 	PINCTRL_PIN(64, "GPIO_64"),
90 	PINCTRL_PIN(65, "GPIO_65"),
91 	PINCTRL_PIN(66, "GPIO_66"),
92 	PINCTRL_PIN(67, "GPIO_67"),
93 	PINCTRL_PIN(68, "GPIO_68"),
94 	PINCTRL_PIN(69, "GPIO_69"),
95 	PINCTRL_PIN(70, "GPIO_70"),
96 	PINCTRL_PIN(71, "GPIO_71"),
97 	PINCTRL_PIN(72, "GPIO_72"),
98 	PINCTRL_PIN(73, "GPIO_73"),
99 	PINCTRL_PIN(74, "GPIO_74"),
100 	PINCTRL_PIN(75, "GPIO_75"),
101 	PINCTRL_PIN(76, "GPIO_76"),
102 	PINCTRL_PIN(77, "GPIO_77"),
103 	PINCTRL_PIN(78, "GPIO_78"),
104 	PINCTRL_PIN(79, "GPIO_79"),
105 	PINCTRL_PIN(80, "GPIO_80"),
106 	PINCTRL_PIN(81, "GPIO_81"),
107 	PINCTRL_PIN(82, "GPIO_82"),
108 	PINCTRL_PIN(83, "GPIO_83"),
109 	PINCTRL_PIN(84, "GPIO_84"),
110 	PINCTRL_PIN(85, "GPIO_85"),
111 	PINCTRL_PIN(86, "GPIO_86"),
112 	PINCTRL_PIN(87, "GPIO_87"),
113 };
114 
115 #define DECLARE_MSM_GPIO_PINS(pin) \
116 	static const unsigned int gpio##pin##_pins[] = { pin }
117 DECLARE_MSM_GPIO_PINS(0);
118 DECLARE_MSM_GPIO_PINS(1);
119 DECLARE_MSM_GPIO_PINS(2);
120 DECLARE_MSM_GPIO_PINS(3);
121 DECLARE_MSM_GPIO_PINS(4);
122 DECLARE_MSM_GPIO_PINS(5);
123 DECLARE_MSM_GPIO_PINS(6);
124 DECLARE_MSM_GPIO_PINS(7);
125 DECLARE_MSM_GPIO_PINS(8);
126 DECLARE_MSM_GPIO_PINS(9);
127 DECLARE_MSM_GPIO_PINS(10);
128 DECLARE_MSM_GPIO_PINS(11);
129 DECLARE_MSM_GPIO_PINS(12);
130 DECLARE_MSM_GPIO_PINS(13);
131 DECLARE_MSM_GPIO_PINS(14);
132 DECLARE_MSM_GPIO_PINS(15);
133 DECLARE_MSM_GPIO_PINS(16);
134 DECLARE_MSM_GPIO_PINS(17);
135 DECLARE_MSM_GPIO_PINS(18);
136 DECLARE_MSM_GPIO_PINS(19);
137 DECLARE_MSM_GPIO_PINS(20);
138 DECLARE_MSM_GPIO_PINS(21);
139 DECLARE_MSM_GPIO_PINS(22);
140 DECLARE_MSM_GPIO_PINS(23);
141 DECLARE_MSM_GPIO_PINS(24);
142 DECLARE_MSM_GPIO_PINS(25);
143 DECLARE_MSM_GPIO_PINS(26);
144 DECLARE_MSM_GPIO_PINS(27);
145 DECLARE_MSM_GPIO_PINS(28);
146 DECLARE_MSM_GPIO_PINS(29);
147 DECLARE_MSM_GPIO_PINS(30);
148 DECLARE_MSM_GPIO_PINS(31);
149 DECLARE_MSM_GPIO_PINS(32);
150 DECLARE_MSM_GPIO_PINS(33);
151 DECLARE_MSM_GPIO_PINS(34);
152 DECLARE_MSM_GPIO_PINS(35);
153 DECLARE_MSM_GPIO_PINS(36);
154 DECLARE_MSM_GPIO_PINS(37);
155 DECLARE_MSM_GPIO_PINS(38);
156 DECLARE_MSM_GPIO_PINS(39);
157 DECLARE_MSM_GPIO_PINS(40);
158 DECLARE_MSM_GPIO_PINS(41);
159 DECLARE_MSM_GPIO_PINS(42);
160 DECLARE_MSM_GPIO_PINS(43);
161 DECLARE_MSM_GPIO_PINS(44);
162 DECLARE_MSM_GPIO_PINS(45);
163 DECLARE_MSM_GPIO_PINS(46);
164 DECLARE_MSM_GPIO_PINS(47);
165 DECLARE_MSM_GPIO_PINS(48);
166 DECLARE_MSM_GPIO_PINS(49);
167 DECLARE_MSM_GPIO_PINS(50);
168 DECLARE_MSM_GPIO_PINS(51);
169 DECLARE_MSM_GPIO_PINS(52);
170 DECLARE_MSM_GPIO_PINS(53);
171 DECLARE_MSM_GPIO_PINS(54);
172 DECLARE_MSM_GPIO_PINS(55);
173 DECLARE_MSM_GPIO_PINS(56);
174 DECLARE_MSM_GPIO_PINS(57);
175 DECLARE_MSM_GPIO_PINS(58);
176 DECLARE_MSM_GPIO_PINS(59);
177 DECLARE_MSM_GPIO_PINS(60);
178 DECLARE_MSM_GPIO_PINS(61);
179 DECLARE_MSM_GPIO_PINS(62);
180 DECLARE_MSM_GPIO_PINS(63);
181 DECLARE_MSM_GPIO_PINS(64);
182 DECLARE_MSM_GPIO_PINS(65);
183 DECLARE_MSM_GPIO_PINS(66);
184 DECLARE_MSM_GPIO_PINS(67);
185 DECLARE_MSM_GPIO_PINS(68);
186 DECLARE_MSM_GPIO_PINS(69);
187 DECLARE_MSM_GPIO_PINS(70);
188 DECLARE_MSM_GPIO_PINS(71);
189 DECLARE_MSM_GPIO_PINS(72);
190 DECLARE_MSM_GPIO_PINS(73);
191 DECLARE_MSM_GPIO_PINS(74);
192 DECLARE_MSM_GPIO_PINS(75);
193 DECLARE_MSM_GPIO_PINS(76);
194 DECLARE_MSM_GPIO_PINS(77);
195 DECLARE_MSM_GPIO_PINS(78);
196 DECLARE_MSM_GPIO_PINS(79);
197 DECLARE_MSM_GPIO_PINS(80);
198 DECLARE_MSM_GPIO_PINS(81);
199 DECLARE_MSM_GPIO_PINS(82);
200 DECLARE_MSM_GPIO_PINS(83);
201 DECLARE_MSM_GPIO_PINS(84);
202 DECLARE_MSM_GPIO_PINS(85);
203 DECLARE_MSM_GPIO_PINS(86);
204 DECLARE_MSM_GPIO_PINS(87);
205 
206 #define FUNCTION(fname)					\
207 	[MSM_MUX_##fname] = {				\
208 		.name = #fname,				\
209 		.groups = fname##_groups,		\
210 		.ngroups = ARRAY_SIZE(fname##_groups),	\
211 	}
212 
213 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
214 	{						\
215 		.name = "gpio" #id,			\
216 		.pins = gpio##id##_pins,		\
217 		.npins = ARRAY_SIZE(gpio##id##_pins),	\
218 		.funcs = (int[]){			\
219 			MSM_MUX_gpio,			\
220 			MSM_MUX_##f1,			\
221 			MSM_MUX_##f2,			\
222 			MSM_MUX_##f3,			\
223 			MSM_MUX_##f4,			\
224 			MSM_MUX_##f5,			\
225 			MSM_MUX_##f6,			\
226 			MSM_MUX_##f7,			\
227 			MSM_MUX_##f8,			\
228 			MSM_MUX_##f9,			\
229 			MSM_MUX_##f10,			\
230 			MSM_MUX_##f11			\
231 		},					\
232 		.nfuncs = 12,				\
233 		.ctl_reg = 0x1000 + 0x10 * id,		\
234 		.io_reg = 0x1004 + 0x10 * id,		\
235 		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
236 		.intr_status_reg = 0x100c + 0x10 * id,	\
237 		.intr_target_reg = 0x400 + 0x4 * id,	\
238 		.mux_bit = 2,				\
239 		.pull_bit = 0,				\
240 		.drv_bit = 6,				\
241 		.oe_bit = 9,				\
242 		.in_bit = 0,				\
243 		.out_bit = 1,				\
244 		.intr_enable_bit = 0,			\
245 		.intr_status_bit = 0,			\
246 		.intr_ack_high = 1,			\
247 		.intr_target_bit = 0,			\
248 		.intr_target_kpss_val = 4,		\
249 		.intr_raw_status_bit = 3,		\
250 		.intr_polarity_bit = 1,			\
251 		.intr_detection_bit = 2,		\
252 		.intr_detection_width = 1,		\
253 	}
254 
255 enum mdm9615_functions {
256 	MSM_MUX_gpio,
257 	MSM_MUX_gsbi2_i2c,
258 	MSM_MUX_gsbi3,
259 	MSM_MUX_gsbi4,
260 	MSM_MUX_gsbi5_i2c,
261 	MSM_MUX_gsbi5_uart,
262 	MSM_MUX_sdc2,
263 	MSM_MUX_ebi2_lcdc,
264 	MSM_MUX_ps_hold,
265 	MSM_MUX_prim_audio,
266 	MSM_MUX_sec_audio,
267 	MSM_MUX_cdc_mclk,
268 	MSM_MUX_NA,
269 };
270 
271 static const char * const gpio_groups[] = {
272 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
273 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
274 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
275 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
276 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
277 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
278 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
279 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
280 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
281 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
282 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
283 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
284 	"gpio85", "gpio86", "gpio87"
285 };
286 
287 static const char * const gsbi2_i2c_groups[] = {
288 	"gpio4", "gpio5"
289 };
290 
291 static const char * const gsbi3_groups[] = {
292 	"gpio8", "gpio9", "gpio10", "gpio11"
293 };
294 
295 static const char * const gsbi4_groups[] = {
296 	"gpio12", "gpio13", "gpio14", "gpio15"
297 };
298 
299 static const char * const gsbi5_i2c_groups[] = {
300 	"gpio16", "gpio17"
301 };
302 
303 static const char * const gsbi5_uart_groups[] = {
304 	"gpio18", "gpio19"
305 };
306 
307 static const char * const sdc2_groups[] = {
308 	"gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
309 };
310 
311 static const char * const ebi2_lcdc_groups[] = {
312 	"gpio21", "gpio22", "gpio24",
313 };
314 
315 static const char * const ps_hold_groups[] = {
316 	"gpio83",
317 };
318 
319 static const char * const prim_audio_groups[] = {
320 	"gpio20", "gpio21", "gpio22", "gpio23",
321 };
322 
323 static const char * const sec_audio_groups[] = {
324 	"gpio25", "gpio26", "gpio27", "gpio28",
325 };
326 
327 static const char * const cdc_mclk_groups[] = {
328 	"gpio24",
329 };
330 
331 static const struct msm_function mdm9615_functions[] = {
332 	FUNCTION(gpio),
333 	FUNCTION(gsbi2_i2c),
334 	FUNCTION(gsbi3),
335 	FUNCTION(gsbi4),
336 	FUNCTION(gsbi5_i2c),
337 	FUNCTION(gsbi5_uart),
338 	FUNCTION(sdc2),
339 	FUNCTION(ebi2_lcdc),
340 	FUNCTION(ps_hold),
341 	FUNCTION(prim_audio),
342 	FUNCTION(sec_audio),
343 	FUNCTION(cdc_mclk),
344 };
345 
346 static const struct msm_pingroup mdm9615_groups[] = {
347 	PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
348 	PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
349 	PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
350 	PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
351 	PINGROUP(4, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
352 	PINGROUP(5, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
353 	PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
354 	PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
355 	PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
356 	PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
357 	PINGROUP(10, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
358 	PINGROUP(11, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
359 	PINGROUP(12, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
360 	PINGROUP(13, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
361 	PINGROUP(14, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
362 	PINGROUP(15, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
363 	PINGROUP(16, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
364 	PINGROUP(17, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
365 	PINGROUP(18, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
366 	PINGROUP(19, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
367 	PINGROUP(20, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
368 	PINGROUP(21, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
369 	PINGROUP(22, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
370 	PINGROUP(23, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
371 	PINGROUP(24, cdc_mclk, NA, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA),
372 	PINGROUP(25, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
373 	PINGROUP(26, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
374 	PINGROUP(27, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
375 	PINGROUP(28, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
376 	PINGROUP(29, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
377 	PINGROUP(30, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
378 	PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
379 	PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
380 	PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
381 	PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
382 	PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
383 	PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
384 	PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
385 	PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
386 	PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
387 	PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
388 	PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
389 	PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
390 	PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
391 	PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
392 	PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
393 	PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
394 	PINGROUP(47, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
395 	PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
396 	PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
397 	PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
398 	PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
399 	PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
400 	PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
401 	PINGROUP(54, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
402 	PINGROUP(55, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
403 	PINGROUP(56, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
404 	PINGROUP(57, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
405 	PINGROUP(58, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
406 	PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
407 	PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
408 	PINGROUP(61, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
409 	PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
410 	PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
411 	PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
412 	PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
413 	PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
414 	PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
415 	PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
416 	PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
417 	PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
418 	PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
419 	PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
420 	PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
421 	PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
422 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
423 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
424 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
425 	PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
426 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
427 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
428 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
429 	PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
430 	PINGROUP(83, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
431 	PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
432 	PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
433 	PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
434 	PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
435 };
436 
437 #define NUM_GPIO_PINGROUPS 88
438 
439 static const struct msm_pinctrl_soc_data mdm9615_pinctrl = {
440 	.pins = mdm9615_pins,
441 	.npins = ARRAY_SIZE(mdm9615_pins),
442 	.functions = mdm9615_functions,
443 	.nfunctions = ARRAY_SIZE(mdm9615_functions),
444 	.groups = mdm9615_groups,
445 	.ngroups = ARRAY_SIZE(mdm9615_groups),
446 	.ngpios = NUM_GPIO_PINGROUPS,
447 };
448 
449 static int mdm9615_pinctrl_probe(struct platform_device *pdev)
450 {
451 	return msm_pinctrl_probe(pdev, &mdm9615_pinctrl);
452 }
453 
454 static const struct of_device_id mdm9615_pinctrl_of_match[] = {
455 	{ .compatible = "qcom,mdm9615-pinctrl", },
456 	{ },
457 };
458 
459 static struct platform_driver mdm9615_pinctrl_driver = {
460 	.driver = {
461 		.name = "mdm9615-pinctrl",
462 		.of_match_table = mdm9615_pinctrl_of_match,
463 	},
464 	.probe = mdm9615_pinctrl_probe,
465 	.remove = msm_pinctrl_remove,
466 };
467 
468 static int __init mdm9615_pinctrl_init(void)
469 {
470 	return platform_driver_register(&mdm9615_pinctrl_driver);
471 }
472 arch_initcall(mdm9615_pinctrl_init);
473 
474 static void __exit mdm9615_pinctrl_exit(void)
475 {
476 	platform_driver_unregister(&mdm9615_pinctrl_driver);
477 }
478 module_exit(mdm9615_pinctrl_exit);
479 
480 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
481 MODULE_DESCRIPTION("Qualcomm MDM9615 pinctrl driver");
482 MODULE_LICENSE("GPL v2");
483 MODULE_DEVICE_TABLE(of, mdm9615_pinctrl_of_match);
484