1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /* 3 * Copyright (c) 2023 The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 #include <linux/pinctrl/pinctrl.h> 10 11 #include "pinctrl-msm.h" 12 13 #define FUNCTION(fname) \ 14 [msm_mux_##fname] = { \ 15 .name = #fname, \ 16 .groups = fname##_groups, \ 17 .ngroups = ARRAY_SIZE(fname##_groups), \ 18 } 19 20 #define REG_SIZE 0x1000 21 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 22 { \ 23 .name = "gpio" #id, \ 24 .pins = gpio##id##_pins, \ 25 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \ 26 .funcs = (int[]){ \ 27 msm_mux_gpio, /* gpio mode */ \ 28 msm_mux_##f1, \ 29 msm_mux_##f2, \ 30 msm_mux_##f3, \ 31 msm_mux_##f4, \ 32 msm_mux_##f5, \ 33 msm_mux_##f6, \ 34 msm_mux_##f7, \ 35 msm_mux_##f8, \ 36 msm_mux_##f9 \ 37 }, \ 38 .nfuncs = 10, \ 39 .ctl_reg = REG_SIZE * id, \ 40 .io_reg = 0x4 + REG_SIZE * id, \ 41 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 42 .intr_status_reg = 0xc + REG_SIZE * id, \ 43 .intr_target_reg = 0x8 + REG_SIZE * id, \ 44 .mux_bit = 2, \ 45 .pull_bit = 0, \ 46 .drv_bit = 6, \ 47 .oe_bit = 9, \ 48 .in_bit = 0, \ 49 .out_bit = 1, \ 50 .intr_enable_bit = 0, \ 51 .intr_status_bit = 0, \ 52 .intr_target_bit = 5, \ 53 .intr_target_kpss_val = 3, \ 54 .intr_raw_status_bit = 4, \ 55 .intr_polarity_bit = 1, \ 56 .intr_detection_bit = 2, \ 57 .intr_detection_width = 2, \ 58 } 59 60 static const struct pinctrl_pin_desc ipq9574_pins[] = { 61 PINCTRL_PIN(0, "GPIO_0"), 62 PINCTRL_PIN(1, "GPIO_1"), 63 PINCTRL_PIN(2, "GPIO_2"), 64 PINCTRL_PIN(3, "GPIO_3"), 65 PINCTRL_PIN(4, "GPIO_4"), 66 PINCTRL_PIN(5, "GPIO_5"), 67 PINCTRL_PIN(6, "GPIO_6"), 68 PINCTRL_PIN(7, "GPIO_7"), 69 PINCTRL_PIN(8, "GPIO_8"), 70 PINCTRL_PIN(9, "GPIO_9"), 71 PINCTRL_PIN(10, "GPIO_10"), 72 PINCTRL_PIN(11, "GPIO_11"), 73 PINCTRL_PIN(12, "GPIO_12"), 74 PINCTRL_PIN(13, "GPIO_13"), 75 PINCTRL_PIN(14, "GPIO_14"), 76 PINCTRL_PIN(15, "GPIO_15"), 77 PINCTRL_PIN(16, "GPIO_16"), 78 PINCTRL_PIN(17, "GPIO_17"), 79 PINCTRL_PIN(18, "GPIO_18"), 80 PINCTRL_PIN(19, "GPIO_19"), 81 PINCTRL_PIN(20, "GPIO_20"), 82 PINCTRL_PIN(21, "GPIO_21"), 83 PINCTRL_PIN(22, "GPIO_22"), 84 PINCTRL_PIN(23, "GPIO_23"), 85 PINCTRL_PIN(24, "GPIO_24"), 86 PINCTRL_PIN(25, "GPIO_25"), 87 PINCTRL_PIN(26, "GPIO_26"), 88 PINCTRL_PIN(27, "GPIO_27"), 89 PINCTRL_PIN(28, "GPIO_28"), 90 PINCTRL_PIN(29, "GPIO_29"), 91 PINCTRL_PIN(30, "GPIO_30"), 92 PINCTRL_PIN(31, "GPIO_31"), 93 PINCTRL_PIN(32, "GPIO_32"), 94 PINCTRL_PIN(33, "GPIO_33"), 95 PINCTRL_PIN(34, "GPIO_34"), 96 PINCTRL_PIN(35, "GPIO_35"), 97 PINCTRL_PIN(36, "GPIO_36"), 98 PINCTRL_PIN(37, "GPIO_37"), 99 PINCTRL_PIN(38, "GPIO_38"), 100 PINCTRL_PIN(39, "GPIO_39"), 101 PINCTRL_PIN(40, "GPIO_40"), 102 PINCTRL_PIN(41, "GPIO_41"), 103 PINCTRL_PIN(42, "GPIO_42"), 104 PINCTRL_PIN(43, "GPIO_43"), 105 PINCTRL_PIN(44, "GPIO_44"), 106 PINCTRL_PIN(45, "GPIO_45"), 107 PINCTRL_PIN(46, "GPIO_46"), 108 PINCTRL_PIN(47, "GPIO_47"), 109 PINCTRL_PIN(48, "GPIO_48"), 110 PINCTRL_PIN(49, "GPIO_49"), 111 PINCTRL_PIN(50, "GPIO_50"), 112 PINCTRL_PIN(51, "GPIO_51"), 113 PINCTRL_PIN(52, "GPIO_52"), 114 PINCTRL_PIN(53, "GPIO_53"), 115 PINCTRL_PIN(54, "GPIO_54"), 116 PINCTRL_PIN(55, "GPIO_55"), 117 PINCTRL_PIN(56, "GPIO_56"), 118 PINCTRL_PIN(57, "GPIO_57"), 119 PINCTRL_PIN(58, "GPIO_58"), 120 PINCTRL_PIN(59, "GPIO_59"), 121 PINCTRL_PIN(60, "GPIO_60"), 122 PINCTRL_PIN(61, "GPIO_61"), 123 PINCTRL_PIN(62, "GPIO_62"), 124 PINCTRL_PIN(63, "GPIO_63"), 125 PINCTRL_PIN(64, "GPIO_64"), 126 }; 127 128 #define DECLARE_MSM_GPIO_PINS(pin) \ 129 static const unsigned int gpio##pin##_pins[] = { pin } 130 DECLARE_MSM_GPIO_PINS(0); 131 DECLARE_MSM_GPIO_PINS(1); 132 DECLARE_MSM_GPIO_PINS(2); 133 DECLARE_MSM_GPIO_PINS(3); 134 DECLARE_MSM_GPIO_PINS(4); 135 DECLARE_MSM_GPIO_PINS(5); 136 DECLARE_MSM_GPIO_PINS(6); 137 DECLARE_MSM_GPIO_PINS(7); 138 DECLARE_MSM_GPIO_PINS(8); 139 DECLARE_MSM_GPIO_PINS(9); 140 DECLARE_MSM_GPIO_PINS(10); 141 DECLARE_MSM_GPIO_PINS(11); 142 DECLARE_MSM_GPIO_PINS(12); 143 DECLARE_MSM_GPIO_PINS(13); 144 DECLARE_MSM_GPIO_PINS(14); 145 DECLARE_MSM_GPIO_PINS(15); 146 DECLARE_MSM_GPIO_PINS(16); 147 DECLARE_MSM_GPIO_PINS(17); 148 DECLARE_MSM_GPIO_PINS(18); 149 DECLARE_MSM_GPIO_PINS(19); 150 DECLARE_MSM_GPIO_PINS(20); 151 DECLARE_MSM_GPIO_PINS(21); 152 DECLARE_MSM_GPIO_PINS(22); 153 DECLARE_MSM_GPIO_PINS(23); 154 DECLARE_MSM_GPIO_PINS(24); 155 DECLARE_MSM_GPIO_PINS(25); 156 DECLARE_MSM_GPIO_PINS(26); 157 DECLARE_MSM_GPIO_PINS(27); 158 DECLARE_MSM_GPIO_PINS(28); 159 DECLARE_MSM_GPIO_PINS(29); 160 DECLARE_MSM_GPIO_PINS(30); 161 DECLARE_MSM_GPIO_PINS(31); 162 DECLARE_MSM_GPIO_PINS(32); 163 DECLARE_MSM_GPIO_PINS(33); 164 DECLARE_MSM_GPIO_PINS(34); 165 DECLARE_MSM_GPIO_PINS(35); 166 DECLARE_MSM_GPIO_PINS(36); 167 DECLARE_MSM_GPIO_PINS(37); 168 DECLARE_MSM_GPIO_PINS(38); 169 DECLARE_MSM_GPIO_PINS(39); 170 DECLARE_MSM_GPIO_PINS(40); 171 DECLARE_MSM_GPIO_PINS(41); 172 DECLARE_MSM_GPIO_PINS(42); 173 DECLARE_MSM_GPIO_PINS(43); 174 DECLARE_MSM_GPIO_PINS(44); 175 DECLARE_MSM_GPIO_PINS(45); 176 DECLARE_MSM_GPIO_PINS(46); 177 DECLARE_MSM_GPIO_PINS(47); 178 DECLARE_MSM_GPIO_PINS(48); 179 DECLARE_MSM_GPIO_PINS(49); 180 DECLARE_MSM_GPIO_PINS(50); 181 DECLARE_MSM_GPIO_PINS(51); 182 DECLARE_MSM_GPIO_PINS(52); 183 DECLARE_MSM_GPIO_PINS(53); 184 DECLARE_MSM_GPIO_PINS(54); 185 DECLARE_MSM_GPIO_PINS(55); 186 DECLARE_MSM_GPIO_PINS(56); 187 DECLARE_MSM_GPIO_PINS(57); 188 DECLARE_MSM_GPIO_PINS(58); 189 DECLARE_MSM_GPIO_PINS(59); 190 DECLARE_MSM_GPIO_PINS(60); 191 DECLARE_MSM_GPIO_PINS(61); 192 DECLARE_MSM_GPIO_PINS(62); 193 DECLARE_MSM_GPIO_PINS(63); 194 DECLARE_MSM_GPIO_PINS(64); 195 196 enum ipq9574_functions { 197 msm_mux_atest_char, 198 msm_mux_atest_char0, 199 msm_mux_atest_char1, 200 msm_mux_atest_char2, 201 msm_mux_atest_char3, 202 msm_mux_audio_pdm0, 203 msm_mux_audio_pdm1, 204 msm_mux_audio_pri, 205 msm_mux_audio_sec, 206 msm_mux_blsp0_spi, 207 msm_mux_blsp0_uart, 208 msm_mux_blsp1_i2c, 209 msm_mux_blsp1_spi, 210 msm_mux_blsp1_uart, 211 msm_mux_blsp2_i2c, 212 msm_mux_blsp2_spi, 213 msm_mux_blsp2_uart, 214 msm_mux_blsp3_i2c, 215 msm_mux_blsp3_spi, 216 msm_mux_blsp3_uart, 217 msm_mux_blsp4_i2c, 218 msm_mux_blsp4_spi, 219 msm_mux_blsp4_uart, 220 msm_mux_blsp5_i2c, 221 msm_mux_blsp5_uart, 222 msm_mux_cri_trng0, 223 msm_mux_cri_trng1, 224 msm_mux_cri_trng2, 225 msm_mux_cri_trng3, 226 msm_mux_cxc0, 227 msm_mux_cxc1, 228 msm_mux_dbg_out, 229 msm_mux_dwc_ddrphy, 230 msm_mux_gcc_plltest, 231 msm_mux_gcc_tlmm, 232 msm_mux_gpio, 233 msm_mux_mac, 234 msm_mux_mdc, 235 msm_mux_mdio, 236 msm_mux_pcie0_clk, 237 msm_mux_pcie0_wake, 238 msm_mux_pcie1_clk, 239 msm_mux_pcie1_wake, 240 msm_mux_pcie2_clk, 241 msm_mux_pcie2_wake, 242 msm_mux_pcie3_clk, 243 msm_mux_pcie3_wake, 244 msm_mux_prng_rosc0, 245 msm_mux_prng_rosc1, 246 msm_mux_prng_rosc2, 247 msm_mux_prng_rosc3, 248 msm_mux_pta, 249 msm_mux_pwm, 250 msm_mux_qdss_cti_trig_in_a0, 251 msm_mux_qdss_cti_trig_in_a1, 252 msm_mux_qdss_cti_trig_in_b0, 253 msm_mux_qdss_cti_trig_in_b1, 254 msm_mux_qdss_cti_trig_out_a0, 255 msm_mux_qdss_cti_trig_out_a1, 256 msm_mux_qdss_cti_trig_out_b0, 257 msm_mux_qdss_cti_trig_out_b1, 258 msm_mux_qdss_traceclk_a, 259 msm_mux_qdss_traceclk_b, 260 msm_mux_qdss_tracectl_a, 261 msm_mux_qdss_tracectl_b, 262 msm_mux_qdss_tracedata_a, 263 msm_mux_qdss_tracedata_b, 264 msm_mux_qspi_data, 265 msm_mux_qspi_clk, 266 msm_mux_qspi_cs, 267 msm_mux_rx0, 268 msm_mux_rx1, 269 msm_mux_sdc_data, 270 msm_mux_sdc_clk, 271 msm_mux_sdc_cmd, 272 msm_mux_sdc_rclk, 273 msm_mux_tsens_max, 274 msm_mux_wci20, 275 msm_mux_wci21, 276 msm_mux_wsa_swrm, 277 msm_mux__, 278 }; 279 280 static const char * const gpio_groups[] = { 281 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 282 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 283 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 284 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 285 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 286 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 287 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 288 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 289 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 290 "gpio64", 291 }; 292 293 static const char * const sdc_data_groups[] = { 294 "gpio0", 295 "gpio1", 296 "gpio2", 297 "gpio3", 298 "gpio6", 299 "gpio7", 300 "gpio8", 301 "gpio9", 302 }; 303 304 static const char * const qspi_data_groups[] = { 305 "gpio0", 306 "gpio1", 307 "gpio2", 308 "gpio3", 309 }; 310 311 static const char * const qdss_traceclk_b_groups[] = { 312 "gpio0", 313 }; 314 315 static const char * const qdss_tracectl_b_groups[] = { 316 "gpio1", 317 }; 318 319 static const char * const qdss_tracedata_b_groups[] = { 320 "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9", 321 "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", 322 "gpio17", 323 }; 324 325 static const char * const sdc_cmd_groups[] = { 326 "gpio4", 327 }; 328 329 static const char * const qspi_cs_groups[] = { 330 "gpio4", 331 }; 332 333 static const char * const sdc_clk_groups[] = { 334 "gpio5", 335 }; 336 337 static const char * const qspi_clk_groups[] = { 338 "gpio5", 339 }; 340 341 static const char * const sdc_rclk_groups[] = { 342 "gpio10", 343 }; 344 345 static const char * const blsp0_spi_groups[] = { 346 "gpio11", "gpio12", "gpio13", "gpio14", 347 }; 348 349 static const char * const blsp0_uart_groups[] = { 350 "gpio11", "gpio12", "gpio13", "gpio14", 351 }; 352 353 static const char * const blsp3_spi_groups[] = { 354 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 355 }; 356 357 static const char * const blsp3_i2c_groups[] = { 358 "gpio15", "gpio16", 359 }; 360 361 static const char * const blsp3_uart_groups[] = { 362 "gpio15", "gpio16", "gpio17", "gpio18", 363 }; 364 365 static const char * const dbg_out_groups[] = { 366 "gpio17", 367 }; 368 369 static const char * const cri_trng0_groups[] = { 370 "gpio20", "gpio38", 371 }; 372 373 static const char * const cri_trng1_groups[] = { 374 "gpio21", "gpio34", 375 }; 376 377 static const char * const pcie0_clk_groups[] = { 378 "gpio22", 379 }; 380 381 static const char * const pta_groups[] = { 382 "gpio22", "gpio23", "gpio24", "gpio54", "gpio55", "gpio56", "gpio61", 383 "gpio62", "gpio63", 384 }; 385 386 static const char * const wci21_groups[] = { 387 "gpio23", "gpio24", 388 }; 389 390 static const char * const cxc0_groups[] = { 391 "gpio23", "gpio24", 392 }; 393 394 static const char * const pcie0_wake_groups[] = { 395 "gpio24", 396 }; 397 398 static const char * const qdss_cti_trig_out_b0_groups[] = { 399 "gpio24", 400 }; 401 402 static const char * const pcie1_clk_groups[] = { 403 "gpio25", 404 }; 405 406 static const char * const qdss_cti_trig_in_b0_groups[] = { 407 "gpio25", 408 }; 409 410 static const char * const atest_char0_groups[] = { 411 "gpio26", 412 }; 413 414 static const char * const qdss_cti_trig_out_b1_groups[] = { 415 "gpio26", 416 }; 417 418 static const char * const pcie1_wake_groups[] = { 419 "gpio27", 420 }; 421 422 static const char * const atest_char1_groups[] = { 423 "gpio27", 424 }; 425 426 static const char * const qdss_cti_trig_in_b1_groups[] = { 427 "gpio27", 428 }; 429 430 static const char * const pcie2_clk_groups[] = { 431 "gpio28", 432 }; 433 434 static const char * const atest_char2_groups[] = { 435 "gpio28", 436 }; 437 438 static const char * const atest_char3_groups[] = { 439 "gpio29", 440 }; 441 442 static const char * const pcie2_wake_groups[] = { 443 "gpio30", 444 }; 445 446 static const char * const pwm_groups[] = { 447 "gpio30", "gpio31", "gpio32", "gpio33", "gpio44", "gpio45", "gpio46", 448 "gpio47", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", 449 "gpio56", "gpio57", "gpio58", "gpio59", "gpio60", 450 }; 451 452 static const char * const atest_char_groups[] = { 453 "gpio30", 454 }; 455 456 static const char * const pcie3_clk_groups[] = { 457 "gpio31", 458 }; 459 460 static const char * const qdss_cti_trig_in_a1_groups[] = { 461 "gpio31", 462 }; 463 464 static const char * const qdss_cti_trig_out_a1_groups[] = { 465 "gpio32", 466 }; 467 468 static const char * const pcie3_wake_groups[] = { 469 "gpio33", 470 }; 471 472 static const char * const qdss_cti_trig_in_a0_groups[] = { 473 "gpio33", 474 }; 475 476 static const char * const blsp2_uart_groups[] = { 477 "gpio34", "gpio35", 478 }; 479 480 static const char * const blsp2_i2c_groups[] = { 481 "gpio34", "gpio35", 482 }; 483 484 static const char * const blsp2_spi_groups[] = { 485 "gpio34", "gpio35", "gpio36", "gpio37", 486 }; 487 488 static const char * const blsp1_uart_groups[] = { 489 "gpio34", "gpio35", "gpio36", "gpio37", 490 }; 491 492 static const char * const qdss_cti_trig_out_a0_groups[] = { 493 "gpio34", 494 }; 495 496 static const char * const cri_trng2_groups[] = { 497 "gpio35", 498 }; 499 500 static const char * const blsp1_i2c_groups[] = { 501 "gpio36", "gpio37", 502 }; 503 504 static const char * const cri_trng3_groups[] = { 505 "gpio36", 506 }; 507 508 static const char * const dwc_ddrphy_groups[] = { 509 "gpio37", 510 }; 511 512 static const char * const mdc_groups[] = { 513 "gpio38", 514 }; 515 516 static const char * const mdio_groups[] = { 517 "gpio39", 518 }; 519 520 static const char * const audio_pri_groups[] = { 521 "gpio40", "gpio41", "gpio42", "gpio43", "gpio61", "gpio61", 522 }; 523 524 static const char * const audio_pdm0_groups[] = { 525 "gpio40", "gpio41", "gpio42", "gpio43", 526 }; 527 528 static const char * const qdss_traceclk_a_groups[] = { 529 "gpio43", 530 }; 531 532 static const char * const audio_sec_groups[] = { 533 "gpio44", "gpio45", "gpio46", "gpio47", "gpio62", "gpio62", 534 }; 535 536 static const char * const wsa_swrm_groups[] = { 537 "gpio44", "gpio45", 538 }; 539 540 static const char * const qdss_tracectl_a_groups[] = { 541 "gpio44", 542 }; 543 544 static const char * const qdss_tracedata_a_groups[] = { 545 "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50", "gpio51", 546 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", 547 "gpio59", "gpio60", 548 }; 549 550 static const char * const rx1_groups[] = { 551 "gpio46", 552 }; 553 554 static const char * const mac_groups[] = { 555 "gpio46", "gpio47", "gpio57", "gpio58", 556 }; 557 558 static const char * const blsp5_i2c_groups[] = { 559 "gpio48", "gpio49", 560 }; 561 562 static const char * const blsp5_uart_groups[] = { 563 "gpio48", "gpio49", 564 }; 565 566 static const char * const blsp4_uart_groups[] = { 567 "gpio50", "gpio51", "gpio52", "gpio53", 568 }; 569 570 static const char * const blsp4_i2c_groups[] = { 571 "gpio50", "gpio51", 572 }; 573 574 static const char * const blsp4_spi_groups[] = { 575 "gpio50", "gpio51", "gpio52", "gpio53", 576 }; 577 578 static const char * const wci20_groups[] = { 579 "gpio57", "gpio58", 580 }; 581 582 static const char * const cxc1_groups[] = { 583 "gpio57", "gpio58", 584 }; 585 586 static const char * const rx0_groups[] = { 587 "gpio59", 588 }; 589 590 static const char * const prng_rosc0_groups[] = { 591 "gpio60", 592 }; 593 594 static const char * const gcc_plltest_groups[] = { 595 "gpio60", "gpio62", 596 }; 597 598 static const char * const blsp1_spi_groups[] = { 599 "gpio61", "gpio62", "gpio63", "gpio64", 600 }; 601 602 static const char * const audio_pdm1_groups[] = { 603 "gpio61", "gpio62", "gpio63", "gpio64", 604 }; 605 606 static const char * const prng_rosc1_groups[] = { 607 "gpio61", 608 }; 609 610 static const char * const gcc_tlmm_groups[] = { 611 "gpio61", 612 }; 613 614 static const char * const prng_rosc2_groups[] = { 615 "gpio62", 616 }; 617 618 static const char * const prng_rosc3_groups[] = { 619 "gpio63", 620 }; 621 622 static const char * const tsens_max_groups[] = { 623 "gpio64", 624 }; 625 626 static const struct msm_function ipq9574_functions[] = { 627 FUNCTION(atest_char), 628 FUNCTION(atest_char0), 629 FUNCTION(atest_char1), 630 FUNCTION(atest_char2), 631 FUNCTION(atest_char3), 632 FUNCTION(audio_pdm0), 633 FUNCTION(audio_pdm1), 634 FUNCTION(audio_pri), 635 FUNCTION(audio_sec), 636 FUNCTION(blsp0_spi), 637 FUNCTION(blsp0_uart), 638 FUNCTION(blsp1_i2c), 639 FUNCTION(blsp1_spi), 640 FUNCTION(blsp1_uart), 641 FUNCTION(blsp2_i2c), 642 FUNCTION(blsp2_spi), 643 FUNCTION(blsp2_uart), 644 FUNCTION(blsp3_i2c), 645 FUNCTION(blsp3_spi), 646 FUNCTION(blsp3_uart), 647 FUNCTION(blsp4_i2c), 648 FUNCTION(blsp4_spi), 649 FUNCTION(blsp4_uart), 650 FUNCTION(blsp5_i2c), 651 FUNCTION(blsp5_uart), 652 FUNCTION(cri_trng0), 653 FUNCTION(cri_trng1), 654 FUNCTION(cri_trng2), 655 FUNCTION(cri_trng3), 656 FUNCTION(cxc0), 657 FUNCTION(cxc1), 658 FUNCTION(dbg_out), 659 FUNCTION(dwc_ddrphy), 660 FUNCTION(gcc_plltest), 661 FUNCTION(gcc_tlmm), 662 FUNCTION(gpio), 663 FUNCTION(mac), 664 FUNCTION(mdc), 665 FUNCTION(mdio), 666 FUNCTION(pcie0_clk), 667 FUNCTION(pcie0_wake), 668 FUNCTION(pcie1_clk), 669 FUNCTION(pcie1_wake), 670 FUNCTION(pcie2_clk), 671 FUNCTION(pcie2_wake), 672 FUNCTION(pcie3_clk), 673 FUNCTION(pcie3_wake), 674 FUNCTION(prng_rosc0), 675 FUNCTION(prng_rosc1), 676 FUNCTION(prng_rosc2), 677 FUNCTION(prng_rosc3), 678 FUNCTION(pta), 679 FUNCTION(pwm), 680 FUNCTION(qdss_cti_trig_in_a0), 681 FUNCTION(qdss_cti_trig_in_a1), 682 FUNCTION(qdss_cti_trig_in_b0), 683 FUNCTION(qdss_cti_trig_in_b1), 684 FUNCTION(qdss_cti_trig_out_a0), 685 FUNCTION(qdss_cti_trig_out_a1), 686 FUNCTION(qdss_cti_trig_out_b0), 687 FUNCTION(qdss_cti_trig_out_b1), 688 FUNCTION(qdss_traceclk_a), 689 FUNCTION(qdss_traceclk_b), 690 FUNCTION(qdss_tracectl_a), 691 FUNCTION(qdss_tracectl_b), 692 FUNCTION(qdss_tracedata_a), 693 FUNCTION(qdss_tracedata_b), 694 FUNCTION(qspi_data), 695 FUNCTION(qspi_clk), 696 FUNCTION(qspi_cs), 697 FUNCTION(rx0), 698 FUNCTION(rx1), 699 FUNCTION(sdc_data), 700 FUNCTION(sdc_clk), 701 FUNCTION(sdc_cmd), 702 FUNCTION(sdc_rclk), 703 FUNCTION(tsens_max), 704 FUNCTION(wci20), 705 FUNCTION(wci21), 706 FUNCTION(wsa_swrm), 707 }; 708 709 static const struct msm_pingroup ipq9574_groups[] = { 710 PINGROUP(0, sdc_data, qspi_data, qdss_traceclk_b, _, _, _, _, _, _), 711 PINGROUP(1, sdc_data, qspi_data, qdss_tracectl_b, _, _, _, _, _, _), 712 PINGROUP(2, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _), 713 PINGROUP(3, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _), 714 PINGROUP(4, sdc_cmd, qspi_cs, qdss_tracedata_b, _, _, _, _, _, _), 715 PINGROUP(5, sdc_clk, qspi_clk, qdss_tracedata_b, _, _, _, _, _, _), 716 PINGROUP(6, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), 717 PINGROUP(7, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), 718 PINGROUP(8, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), 719 PINGROUP(9, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _), 720 PINGROUP(10, sdc_rclk, qdss_tracedata_b, _, _, _, _, _, _, _), 721 PINGROUP(11, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), 722 PINGROUP(12, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), 723 PINGROUP(13, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), 724 PINGROUP(14, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _), 725 PINGROUP(15, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _), 726 PINGROUP(16, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _), 727 PINGROUP(17, blsp3_spi, blsp3_uart, dbg_out, qdss_tracedata_b, _, _, _, _, _), 728 PINGROUP(18, blsp3_spi, blsp3_uart, _, _, _, _, _, _, _), 729 PINGROUP(19, blsp3_spi, _, _, _, _, _, _, _, _), 730 PINGROUP(20, blsp3_spi, _, cri_trng0, _, _, _, _, _, _), 731 PINGROUP(21, blsp3_spi, _, cri_trng1, _, _, _, _, _, _), 732 PINGROUP(22, pcie0_clk, _, pta, _, _, _, _, _, _), 733 PINGROUP(23, _, pta, wci21, cxc0, _, _, _, _, _), 734 PINGROUP(24, pcie0_wake, _, pta, wci21, cxc0, _, qdss_cti_trig_out_b0, _, _), 735 PINGROUP(25, pcie1_clk, _, _, qdss_cti_trig_in_b0, _, _, _, _, _), 736 PINGROUP(26, _, atest_char0, _, qdss_cti_trig_out_b1, _, _, _, _, _), 737 PINGROUP(27, pcie1_wake, _, atest_char1, qdss_cti_trig_in_b1, _, _, _, _, _), 738 PINGROUP(28, pcie2_clk, atest_char2, _, _, _, _, _, _, _), 739 PINGROUP(29, atest_char3, _, _, _, _, _, _, _, _), 740 PINGROUP(30, pcie2_wake, pwm, atest_char, _, _, _, _, _, _), 741 PINGROUP(31, pcie3_clk, pwm, _, qdss_cti_trig_in_a1, _, _, _, _, _), 742 PINGROUP(32, pwm, _, qdss_cti_trig_out_a1, _, _, _, _, _, _), 743 PINGROUP(33, pcie3_wake, pwm, _, qdss_cti_trig_in_a0, _, _, _, _, _), 744 PINGROUP(34, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng1, qdss_cti_trig_out_a0, _, _), 745 PINGROUP(35, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng2, _, _, _), 746 PINGROUP(36, blsp1_uart, blsp1_i2c, blsp2_spi, _, cri_trng3, _, _, _, _), 747 PINGROUP(37, blsp1_uart, blsp1_i2c, blsp2_spi, _, dwc_ddrphy, _, _, _, _), 748 PINGROUP(38, mdc, _, cri_trng0, _, _, _, _, _, _), 749 PINGROUP(39, mdio, _, _, _, _, _, _, _, _), 750 PINGROUP(40, audio_pri, audio_pdm0, _, _, _, _, _, _, _), 751 PINGROUP(41, audio_pri, audio_pdm0, _, _, _, _, _, _, _), 752 PINGROUP(42, audio_pri, audio_pdm0, _, _, _, _, _, _, _), 753 PINGROUP(43, audio_pri, audio_pdm0, _, qdss_traceclk_a, _, _, _, _, _), 754 PINGROUP(44, pwm, audio_sec, wsa_swrm, _, qdss_tracectl_a, _, _, _, _), 755 PINGROUP(45, pwm, audio_sec, wsa_swrm, _, qdss_tracedata_a, _, _, _, _), 756 PINGROUP(46, pwm, audio_sec, rx1, mac, _, qdss_tracedata_a, _, _, _), 757 PINGROUP(47, pwm, audio_sec, mac, _, qdss_tracedata_a, _, _, _, _), 758 PINGROUP(48, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _), 759 PINGROUP(49, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _), 760 PINGROUP(50, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _), 761 PINGROUP(51, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _), 762 PINGROUP(52, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _), 763 PINGROUP(53, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _), 764 PINGROUP(54, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), 765 PINGROUP(55, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), 766 PINGROUP(56, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _), 767 PINGROUP(57, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _), 768 PINGROUP(58, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _), 769 PINGROUP(59, rx0, pwm, qdss_tracedata_a, _, _, _, _, _, _), 770 PINGROUP(60, pwm, prng_rosc0, qdss_tracedata_a, _, gcc_plltest, _, _, _, _), 771 PINGROUP(61, blsp1_spi, audio_pri, audio_pdm1, audio_pri, pta, prng_rosc1, gcc_tlmm, _, _), 772 PINGROUP(62, blsp1_spi, audio_sec, audio_pdm1, audio_sec, pta, prng_rosc2, gcc_plltest, _, _), 773 PINGROUP(63, blsp1_spi, audio_pdm1, pta, prng_rosc3, _, _, _, _, _), 774 PINGROUP(64, blsp1_spi, audio_pdm1, tsens_max, _, _, _, _, _, _), 775 }; 776 777 /* Reserving GPIO59 for controlling the QFPROM LDO regulator */ 778 static const int ipq9574_reserved_gpios[] = { 779 59, -1 780 }; 781 782 static const struct msm_pinctrl_soc_data ipq9574_pinctrl = { 783 .pins = ipq9574_pins, 784 .npins = ARRAY_SIZE(ipq9574_pins), 785 .functions = ipq9574_functions, 786 .nfunctions = ARRAY_SIZE(ipq9574_functions), 787 .groups = ipq9574_groups, 788 .ngroups = ARRAY_SIZE(ipq9574_groups), 789 .reserved_gpios = ipq9574_reserved_gpios, 790 .ngpios = 65, 791 }; 792 793 static int ipq9574_pinctrl_probe(struct platform_device *pdev) 794 { 795 return msm_pinctrl_probe(pdev, &ipq9574_pinctrl); 796 } 797 798 static const struct of_device_id ipq9574_pinctrl_of_match[] = { 799 { .compatible = "qcom,ipq9574-tlmm", }, 800 { } 801 }; 802 MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match); 803 804 static struct platform_driver ipq9574_pinctrl_driver = { 805 .driver = { 806 .name = "ipq9574-tlmm", 807 .of_match_table = ipq9574_pinctrl_of_match, 808 }, 809 .probe = ipq9574_pinctrl_probe, 810 .remove = msm_pinctrl_remove, 811 }; 812 813 static int __init ipq9574_pinctrl_init(void) 814 { 815 return platform_driver_register(&ipq9574_pinctrl_driver); 816 } 817 arch_initcall(ipq9574_pinctrl_init); 818 819 static void __exit ipq9574_pinctrl_exit(void) 820 { 821 platform_driver_unregister(&ipq9574_pinctrl_driver); 822 } 823 module_exit(ipq9574_pinctrl_exit); 824 825 MODULE_DESCRIPTION("QTI IPQ9574 TLMM driver"); 826 MODULE_LICENSE("GPL"); 827