1 /*
2  * Copyright (c) 2017, The Linux Foundation. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/pinctrl/pinctrl.h>
18 
19 #include "pinctrl-msm.h"
20 
21 #define FUNCTION(fname)			                \
22 	[msm_mux_##fname] = {		                \
23 		.name = #fname,				\
24 		.groups = fname##_groups,               \
25 		.ngroups = ARRAY_SIZE(fname##_groups),	\
26 	}
27 
28 #define REG_SIZE 0x1000
29 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
30 	{					        \
31 		.name = "gpio" #id,			\
32 		.pins = gpio##id##_pins,		\
33 		.npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins),	\
34 		.funcs = (int[]){			\
35 			msm_mux_gpio, /* gpio mode */	\
36 			msm_mux_##f1,			\
37 			msm_mux_##f2,			\
38 			msm_mux_##f3,			\
39 			msm_mux_##f4,			\
40 			msm_mux_##f5,			\
41 			msm_mux_##f6,			\
42 			msm_mux_##f7,			\
43 			msm_mux_##f8,			\
44 			msm_mux_##f9			\
45 		},				        \
46 		.nfuncs = 10,				\
47 		.ctl_reg = REG_SIZE * id,		\
48 		.io_reg = 0x4 + REG_SIZE * id,		\
49 		.intr_cfg_reg = 0x8 + REG_SIZE * id,		\
50 		.intr_status_reg = 0xc + REG_SIZE * id,	\
51 		.intr_target_reg = 0x8 + REG_SIZE * id,	\
52 		.mux_bit = 2,			\
53 		.pull_bit = 0,			\
54 		.drv_bit = 6,			\
55 		.oe_bit = 9,			\
56 		.in_bit = 0,			\
57 		.out_bit = 1,			\
58 		.intr_enable_bit = 0,		\
59 		.intr_status_bit = 0,		\
60 		.intr_target_bit = 5,		\
61 		.intr_raw_status_bit = 4,	\
62 		.intr_polarity_bit = 1,		\
63 		.intr_detection_bit = 2,	\
64 		.intr_detection_width = 2,	\
65 	}
66 
67 static const struct pinctrl_pin_desc ipq8074_pins[] = {
68 	PINCTRL_PIN(0, "GPIO_0"),
69 	PINCTRL_PIN(1, "GPIO_1"),
70 	PINCTRL_PIN(2, "GPIO_2"),
71 	PINCTRL_PIN(3, "GPIO_3"),
72 	PINCTRL_PIN(4, "GPIO_4"),
73 	PINCTRL_PIN(5, "GPIO_5"),
74 	PINCTRL_PIN(6, "GPIO_6"),
75 	PINCTRL_PIN(7, "GPIO_7"),
76 	PINCTRL_PIN(8, "GPIO_8"),
77 	PINCTRL_PIN(9, "GPIO_9"),
78 	PINCTRL_PIN(10, "GPIO_10"),
79 	PINCTRL_PIN(11, "GPIO_11"),
80 	PINCTRL_PIN(12, "GPIO_12"),
81 	PINCTRL_PIN(13, "GPIO_13"),
82 	PINCTRL_PIN(14, "GPIO_14"),
83 	PINCTRL_PIN(15, "GPIO_15"),
84 	PINCTRL_PIN(16, "GPIO_16"),
85 	PINCTRL_PIN(17, "GPIO_17"),
86 	PINCTRL_PIN(18, "GPIO_18"),
87 	PINCTRL_PIN(19, "GPIO_19"),
88 	PINCTRL_PIN(20, "GPIO_20"),
89 	PINCTRL_PIN(21, "GPIO_21"),
90 	PINCTRL_PIN(22, "GPIO_22"),
91 	PINCTRL_PIN(23, "GPIO_23"),
92 	PINCTRL_PIN(24, "GPIO_24"),
93 	PINCTRL_PIN(25, "GPIO_25"),
94 	PINCTRL_PIN(26, "GPIO_26"),
95 	PINCTRL_PIN(27, "GPIO_27"),
96 	PINCTRL_PIN(28, "GPIO_28"),
97 	PINCTRL_PIN(29, "GPIO_29"),
98 	PINCTRL_PIN(30, "GPIO_30"),
99 	PINCTRL_PIN(31, "GPIO_31"),
100 	PINCTRL_PIN(32, "GPIO_32"),
101 	PINCTRL_PIN(33, "GPIO_33"),
102 	PINCTRL_PIN(34, "GPIO_34"),
103 	PINCTRL_PIN(35, "GPIO_35"),
104 	PINCTRL_PIN(36, "GPIO_36"),
105 	PINCTRL_PIN(37, "GPIO_37"),
106 	PINCTRL_PIN(38, "GPIO_38"),
107 	PINCTRL_PIN(39, "GPIO_39"),
108 	PINCTRL_PIN(40, "GPIO_40"),
109 	PINCTRL_PIN(41, "GPIO_41"),
110 	PINCTRL_PIN(42, "GPIO_42"),
111 	PINCTRL_PIN(43, "GPIO_43"),
112 	PINCTRL_PIN(44, "GPIO_44"),
113 	PINCTRL_PIN(45, "GPIO_45"),
114 	PINCTRL_PIN(46, "GPIO_46"),
115 	PINCTRL_PIN(47, "GPIO_47"),
116 	PINCTRL_PIN(48, "GPIO_48"),
117 	PINCTRL_PIN(49, "GPIO_49"),
118 	PINCTRL_PIN(50, "GPIO_50"),
119 	PINCTRL_PIN(51, "GPIO_51"),
120 	PINCTRL_PIN(52, "GPIO_52"),
121 	PINCTRL_PIN(53, "GPIO_53"),
122 	PINCTRL_PIN(54, "GPIO_54"),
123 	PINCTRL_PIN(55, "GPIO_55"),
124 	PINCTRL_PIN(56, "GPIO_56"),
125 	PINCTRL_PIN(57, "GPIO_57"),
126 	PINCTRL_PIN(58, "GPIO_58"),
127 	PINCTRL_PIN(59, "GPIO_59"),
128 	PINCTRL_PIN(60, "GPIO_60"),
129 	PINCTRL_PIN(61, "GPIO_61"),
130 	PINCTRL_PIN(62, "GPIO_62"),
131 	PINCTRL_PIN(63, "GPIO_63"),
132 	PINCTRL_PIN(64, "GPIO_64"),
133 	PINCTRL_PIN(65, "GPIO_65"),
134 	PINCTRL_PIN(66, "GPIO_66"),
135 	PINCTRL_PIN(67, "GPIO_67"),
136 	PINCTRL_PIN(68, "GPIO_68"),
137 	PINCTRL_PIN(69, "GPIO_69"),
138 };
139 
140 #define DECLARE_MSM_GPIO_PINS(pin) \
141 	static const unsigned int gpio##pin##_pins[] = { pin }
142 DECLARE_MSM_GPIO_PINS(0);
143 DECLARE_MSM_GPIO_PINS(1);
144 DECLARE_MSM_GPIO_PINS(2);
145 DECLARE_MSM_GPIO_PINS(3);
146 DECLARE_MSM_GPIO_PINS(4);
147 DECLARE_MSM_GPIO_PINS(5);
148 DECLARE_MSM_GPIO_PINS(6);
149 DECLARE_MSM_GPIO_PINS(7);
150 DECLARE_MSM_GPIO_PINS(8);
151 DECLARE_MSM_GPIO_PINS(9);
152 DECLARE_MSM_GPIO_PINS(10);
153 DECLARE_MSM_GPIO_PINS(11);
154 DECLARE_MSM_GPIO_PINS(12);
155 DECLARE_MSM_GPIO_PINS(13);
156 DECLARE_MSM_GPIO_PINS(14);
157 DECLARE_MSM_GPIO_PINS(15);
158 DECLARE_MSM_GPIO_PINS(16);
159 DECLARE_MSM_GPIO_PINS(17);
160 DECLARE_MSM_GPIO_PINS(18);
161 DECLARE_MSM_GPIO_PINS(19);
162 DECLARE_MSM_GPIO_PINS(20);
163 DECLARE_MSM_GPIO_PINS(21);
164 DECLARE_MSM_GPIO_PINS(22);
165 DECLARE_MSM_GPIO_PINS(23);
166 DECLARE_MSM_GPIO_PINS(24);
167 DECLARE_MSM_GPIO_PINS(25);
168 DECLARE_MSM_GPIO_PINS(26);
169 DECLARE_MSM_GPIO_PINS(27);
170 DECLARE_MSM_GPIO_PINS(28);
171 DECLARE_MSM_GPIO_PINS(29);
172 DECLARE_MSM_GPIO_PINS(30);
173 DECLARE_MSM_GPIO_PINS(31);
174 DECLARE_MSM_GPIO_PINS(32);
175 DECLARE_MSM_GPIO_PINS(33);
176 DECLARE_MSM_GPIO_PINS(34);
177 DECLARE_MSM_GPIO_PINS(35);
178 DECLARE_MSM_GPIO_PINS(36);
179 DECLARE_MSM_GPIO_PINS(37);
180 DECLARE_MSM_GPIO_PINS(38);
181 DECLARE_MSM_GPIO_PINS(39);
182 DECLARE_MSM_GPIO_PINS(40);
183 DECLARE_MSM_GPIO_PINS(41);
184 DECLARE_MSM_GPIO_PINS(42);
185 DECLARE_MSM_GPIO_PINS(43);
186 DECLARE_MSM_GPIO_PINS(44);
187 DECLARE_MSM_GPIO_PINS(45);
188 DECLARE_MSM_GPIO_PINS(46);
189 DECLARE_MSM_GPIO_PINS(47);
190 DECLARE_MSM_GPIO_PINS(48);
191 DECLARE_MSM_GPIO_PINS(49);
192 DECLARE_MSM_GPIO_PINS(50);
193 DECLARE_MSM_GPIO_PINS(51);
194 DECLARE_MSM_GPIO_PINS(52);
195 DECLARE_MSM_GPIO_PINS(53);
196 DECLARE_MSM_GPIO_PINS(54);
197 DECLARE_MSM_GPIO_PINS(55);
198 DECLARE_MSM_GPIO_PINS(56);
199 DECLARE_MSM_GPIO_PINS(57);
200 DECLARE_MSM_GPIO_PINS(58);
201 DECLARE_MSM_GPIO_PINS(59);
202 DECLARE_MSM_GPIO_PINS(60);
203 DECLARE_MSM_GPIO_PINS(61);
204 DECLARE_MSM_GPIO_PINS(62);
205 DECLARE_MSM_GPIO_PINS(63);
206 DECLARE_MSM_GPIO_PINS(64);
207 DECLARE_MSM_GPIO_PINS(65);
208 DECLARE_MSM_GPIO_PINS(66);
209 DECLARE_MSM_GPIO_PINS(67);
210 DECLARE_MSM_GPIO_PINS(68);
211 DECLARE_MSM_GPIO_PINS(69);
212 
213 enum ipq8074_functions {
214 	msm_mux_atest_char,
215 	msm_mux_atest_char0,
216 	msm_mux_atest_char1,
217 	msm_mux_atest_char2,
218 	msm_mux_atest_char3,
219 	msm_mux_audio_rxbclk,
220 	msm_mux_audio_rxd,
221 	msm_mux_audio_rxfsync,
222 	msm_mux_audio_rxmclk,
223 	msm_mux_audio_txbclk,
224 	msm_mux_audio_txd,
225 	msm_mux_audio_txfsync,
226 	msm_mux_audio_txmclk,
227 	msm_mux_blsp0_i2c,
228 	msm_mux_blsp0_spi,
229 	msm_mux_blsp0_uart,
230 	msm_mux_blsp1_i2c,
231 	msm_mux_blsp1_spi,
232 	msm_mux_blsp1_uart,
233 	msm_mux_blsp2_i2c,
234 	msm_mux_blsp2_spi,
235 	msm_mux_blsp2_uart,
236 	msm_mux_blsp3_i2c,
237 	msm_mux_blsp3_spi,
238 	msm_mux_blsp3_spi0,
239 	msm_mux_blsp3_spi1,
240 	msm_mux_blsp3_spi2,
241 	msm_mux_blsp3_spi3,
242 	msm_mux_blsp3_uart,
243 	msm_mux_blsp4_i2c0,
244 	msm_mux_blsp4_i2c1,
245 	msm_mux_blsp4_spi0,
246 	msm_mux_blsp4_spi1,
247 	msm_mux_blsp4_uart0,
248 	msm_mux_blsp4_uart1,
249 	msm_mux_blsp5_i2c,
250 	msm_mux_blsp5_spi,
251 	msm_mux_blsp5_uart,
252 	msm_mux_burn0,
253 	msm_mux_burn1,
254 	msm_mux_cri_trng,
255 	msm_mux_cri_trng0,
256 	msm_mux_cri_trng1,
257 	msm_mux_cxc0,
258 	msm_mux_cxc1,
259 	msm_mux_dbg_out,
260 	msm_mux_gcc_plltest,
261 	msm_mux_gcc_tlmm,
262 	msm_mux_gpio,
263 	msm_mux_ldo_en,
264 	msm_mux_ldo_update,
265 	msm_mux_led0,
266 	msm_mux_led1,
267 	msm_mux_led2,
268 	msm_mux_mac0_sa0,
269 	msm_mux_mac0_sa1,
270 	msm_mux_mac1_sa0,
271 	msm_mux_mac1_sa1,
272 	msm_mux_mac1_sa2,
273 	msm_mux_mac1_sa3,
274 	msm_mux_mac2_sa0,
275 	msm_mux_mac2_sa1,
276 	msm_mux_mdc,
277 	msm_mux_mdio,
278 	msm_mux_pcie0_clk,
279 	msm_mux_pcie0_rst,
280 	msm_mux_pcie0_wake,
281 	msm_mux_pcie1_clk,
282 	msm_mux_pcie1_rst,
283 	msm_mux_pcie1_wake,
284 	msm_mux_pcm_drx,
285 	msm_mux_pcm_dtx,
286 	msm_mux_pcm_fsync,
287 	msm_mux_pcm_pclk,
288 	msm_mux_pcm_zsi0,
289 	msm_mux_pcm_zsi1,
290 	msm_mux_prng_rosc,
291 	msm_mux_pta1_0,
292 	msm_mux_pta1_1,
293 	msm_mux_pta1_2,
294 	msm_mux_pta2_0,
295 	msm_mux_pta2_1,
296 	msm_mux_pta2_2,
297 	msm_mux_pwm0,
298 	msm_mux_pwm1,
299 	msm_mux_pwm2,
300 	msm_mux_pwm3,
301 	msm_mux_qdss_cti_trig_in_a0,
302 	msm_mux_qdss_cti_trig_in_a1,
303 	msm_mux_qdss_cti_trig_in_b0,
304 	msm_mux_qdss_cti_trig_in_b1,
305 	msm_mux_qdss_cti_trig_out_a0,
306 	msm_mux_qdss_cti_trig_out_a1,
307 	msm_mux_qdss_cti_trig_out_b0,
308 	msm_mux_qdss_cti_trig_out_b1,
309 	msm_mux_qdss_traceclk_a,
310 	msm_mux_qdss_traceclk_b,
311 	msm_mux_qdss_tracectl_a,
312 	msm_mux_qdss_tracectl_b,
313 	msm_mux_qdss_tracedata_a,
314 	msm_mux_qdss_tracedata_b,
315 	msm_mux_qpic,
316 	msm_mux_rx0,
317 	msm_mux_rx1,
318 	msm_mux_rx2,
319 	msm_mux_sd_card,
320 	msm_mux_sd_write,
321 	msm_mux_tsens_max,
322 	msm_mux_wci2a,
323 	msm_mux_wci2b,
324 	msm_mux_wci2c,
325 	msm_mux_wci2d,
326 	msm_mux_NA,
327 };
328 
329 static const char * const qpic_groups[] = {
330 	"gpio0",	/* LCD_TE */
331 	"gpio1",	/* BUSY_N */
332 	"gpio2",	/* LCD_RS_N */
333 	"gpio3",	/* WE_N */
334 	"gpio4",	/* OE_N */
335 	"gpio5",	/* DATA[0] */
336 	"gpio6",	/* DATA[1] */
337 	"gpio7",	/* DATA[2] */
338 	"gpio8",	/* DATA[3] */
339 	"gpio9",	/* CS_CSR_LCD */
340 	"gpio10",	/* CLE */
341 	"gpio11",	/* NAND_CS_N */
342 	"gpio12",	/* DATA[4] */
343 	"gpio13",	/* DATA[5] */
344 	"gpio14",	/* DATA[6] */
345 	"gpio15",	/* DATA[7] */
346 	"gpio16",	/* DATA[8] */
347 	"gpio17",	/* ALE */
348 };
349 
350 static const char * const blsp5_i2c_groups[] = {
351 	"gpio0", "gpio2",
352 };
353 
354 static const char * const blsp5_spi_groups[] = {
355 	"gpio0", "gpio2", "gpio9", "gpio16",
356 };
357 
358 static const char * const wci2a_groups[] = {
359 	"gpio0", "gpio2",
360 };
361 
362 static const char * const blsp3_spi3_groups[] = {
363 	"gpio0", "gpio2", "gpio9",
364 };
365 
366 static const char * const burn0_groups[] = {
367 	"gpio0",
368 };
369 
370 static const char * const pcm_zsi0_groups[] = {
371 	"gpio1",
372 };
373 
374 static const char * const blsp5_uart_groups[] = {
375 	"gpio0", "gpio2", "gpio9", "gpio16",
376 };
377 
378 static const char * const mac1_sa2_groups[] = {
379 	"gpio1", "gpio11",
380 };
381 
382 static const char * const blsp3_spi0_groups[] = {
383 	"gpio1", "gpio3", "gpio4",
384 };
385 
386 static const char * const burn1_groups[] = {
387 	"gpio1",
388 };
389 
390 static const char * const mac0_sa1_groups[] = {
391 	"gpio3", "gpio4",
392 };
393 
394 static const char * const qdss_cti_trig_out_b0_groups[] = {
395 	"gpio3",
396 };
397 
398 static const char * const qdss_cti_trig_in_b0_groups[] = {
399 	"gpio4",
400 };
401 
402 static const char * const blsp4_uart0_groups[] = {
403 	"gpio5", "gpio6", "gpio7", "gpio8",
404 };
405 
406 static const char * const blsp4_i2c0_groups[] = {
407 	"gpio5", "gpio6",
408 };
409 
410 static const char * const blsp4_spi0_groups[] = {
411 	"gpio5", "gpio6", "gpio7", "gpio8",
412 };
413 
414 static const char * const mac2_sa1_groups[] = {
415 	"gpio5", "gpio6",
416 };
417 
418 static const char * const qdss_cti_trig_out_b1_groups[] = {
419 	"gpio5",
420 };
421 
422 static const char * const qdss_cti_trig_in_b1_groups[] = {
423 	"gpio6",
424 };
425 
426 static const char * const cxc0_groups[] = {
427 	"gpio9", "gpio16",
428 };
429 
430 static const char * const mac1_sa3_groups[] = {
431 	"gpio9", "gpio16",
432 };
433 
434 static const char * const qdss_cti_trig_in_a1_groups[] = {
435 	"gpio9",
436 };
437 
438 static const char * const qdss_cti_trig_out_a1_groups[] = {
439 	"gpio10",
440 };
441 
442 static const char * const wci2c_groups[] = {
443 	"gpio11", "gpio17",
444 };
445 
446 static const char * const qdss_cti_trig_in_a0_groups[] = {
447 	"gpio11",
448 };
449 
450 static const char * const qdss_cti_trig_out_a0_groups[] = {
451 	"gpio12",
452 };
453 
454 static const char * const qdss_traceclk_b_groups[] = {
455 	"gpio14",
456 };
457 
458 static const char * const qdss_tracectl_b_groups[] = {
459 	"gpio15",
460 };
461 
462 static const char * const pcm_zsi1_groups[] = {
463 	"gpio16",
464 };
465 
466 static const char * const qdss_tracedata_b_groups[] = {
467 	"gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
468 	"gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
469 	"gpio30", "gpio31",
470 };
471 
472 static const char * const led0_groups[] = {
473 	"gpio18",
474 };
475 
476 static const char * const pwm0_groups[] = {
477 	"gpio18", "gpio21", "gpio25", "gpio29", "gpio63",
478 };
479 
480 static const char * const led1_groups[] = {
481 	"gpio19",
482 };
483 
484 static const char * const pwm1_groups[] = {
485 	"gpio19", "gpio22", "gpio26", "gpio30", "gpio64",
486 };
487 
488 static const char * const led2_groups[] = {
489 	"gpio20",
490 };
491 
492 static const char * const pwm2_groups[] = {
493 	"gpio20", "gpio23", "gpio27", "gpio31", "gpio66",
494 };
495 
496 static const char * const blsp4_uart1_groups[] = {
497 	"gpio21", "gpio22", "gpio23", "gpio24",
498 };
499 
500 static const char * const blsp4_i2c1_groups[] = {
501 	"gpio21", "gpio22",
502 };
503 
504 static const char * const blsp4_spi1_groups[] = {
505 	"gpio21", "gpio22", "gpio23", "gpio24",
506 };
507 
508 static const char * const wci2d_groups[] = {
509 	"gpio21", "gpio22",
510 };
511 
512 static const char * const mac1_sa1_groups[] = {
513 	"gpio21", "gpio22",
514 };
515 
516 static const char * const blsp3_spi2_groups[] = {
517 	"gpio21", "gpio22", "gpio23",
518 };
519 
520 static const char * const pwm3_groups[] = {
521 	"gpio24", "gpio28", "gpio32", "gpio67",
522 };
523 
524 static const char * const audio_txmclk_groups[] = {
525 	"gpio25",
526 };
527 
528 static const char * const audio_txbclk_groups[] = {
529 	"gpio26",
530 };
531 
532 static const char * const audio_txfsync_groups[] = {
533 	"gpio27",
534 };
535 
536 static const char * const audio_txd_groups[] = {
537 	"gpio28",
538 };
539 
540 static const char * const audio_rxmclk_groups[] = {
541 	"gpio29",
542 };
543 
544 static const char * const atest_char0_groups[] = {
545 	"gpio29",
546 };
547 
548 static const char * const audio_rxbclk_groups[] = {
549 	"gpio30",
550 };
551 
552 static const char * const atest_char1_groups[] = {
553 	"gpio30",
554 };
555 
556 static const char * const audio_rxfsync_groups[] = {
557 	"gpio31",
558 };
559 
560 static const char * const atest_char2_groups[] = {
561 	"gpio31",
562 };
563 
564 static const char * const audio_rxd_groups[] = {
565 	"gpio32",
566 };
567 
568 static const char * const atest_char3_groups[] = {
569 	"gpio32",
570 };
571 
572 static const char * const pcm_drx_groups[] = {
573 	"gpio33",
574 };
575 
576 static const char * const mac1_sa0_groups[] = {
577 	"gpio33", "gpio34",
578 };
579 
580 static const char * const mac0_sa0_groups[] = {
581 	"gpio33", "gpio34",
582 };
583 
584 static const char * const pcm_dtx_groups[] = {
585 	"gpio34",
586 };
587 
588 static const char * const pcm_fsync_groups[] = {
589 	"gpio35",
590 };
591 
592 static const char * const mac2_sa0_groups[] = {
593 	"gpio35", "gpio36",
594 };
595 
596 static const char * const qdss_traceclk_a_groups[] = {
597 	"gpio35",
598 };
599 
600 static const char * const pcm_pclk_groups[] = {
601 	"gpio36",
602 };
603 
604 static const char * const qdss_tracectl_a_groups[] = {
605 	"gpio36",
606 };
607 
608 static const char * const atest_char_groups[] = {
609 	"gpio37",
610 };
611 
612 static const char * const qdss_tracedata_a_groups[] = {
613 	"gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
614 	"gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
615 	"gpio51", "gpio52",
616 };
617 
618 static const char * const blsp0_uart_groups[] = {
619 	"gpio38", "gpio39", "gpio40", "gpio41",
620 };
621 
622 static const char * const blsp0_i2c_groups[] = {
623 	"gpio38", "gpio39",
624 };
625 
626 static const char * const blsp0_spi_groups[] = {
627 	"gpio38", "gpio39", "gpio40", "gpio41",
628 };
629 
630 static const char * const blsp1_uart_groups[] = {
631 	"gpio42", "gpio43", "gpio44", "gpio45",
632 };
633 
634 static const char * const blsp1_i2c_groups[] = {
635 	"gpio42", "gpio43",
636 };
637 
638 static const char * const blsp1_spi_groups[] = {
639 	"gpio42", "gpio43", "gpio44", "gpio45",
640 };
641 
642 static const char * const blsp2_uart_groups[] = {
643 	"gpio46", "gpio47", "gpio48", "gpio49",
644 };
645 
646 static const char * const blsp2_i2c_groups[] = {
647 	"gpio46", "gpio47",
648 };
649 
650 static const char * const blsp2_spi_groups[] = {
651 	"gpio46", "gpio47", "gpio48", "gpio49",
652 };
653 
654 static const char * const blsp3_uart_groups[] = {
655 	"gpio50", "gpio51", "gpio52", "gpio53",
656 };
657 
658 static const char * const blsp3_i2c_groups[] = {
659 	"gpio50", "gpio51",
660 };
661 
662 static const char * const blsp3_spi_groups[] = {
663 	"gpio50", "gpio51", "gpio52", "gpio53",
664 };
665 
666 static const char * const pta2_0_groups[] = {
667 	"gpio54",
668 };
669 
670 static const char * const wci2b_groups[] = {
671 	"gpio54", "gpio56",
672 };
673 
674 static const char * const cxc1_groups[] = {
675 	"gpio54", "gpio56",
676 };
677 
678 static const char * const blsp3_spi1_groups[] = {
679 	"gpio54", "gpio55", "gpio56",
680 };
681 
682 static const char * const pta2_1_groups[] = {
683 	"gpio55",
684 };
685 
686 static const char * const pta2_2_groups[] = {
687 	"gpio56",
688 };
689 
690 static const char * const pcie0_clk_groups[] = {
691 	"gpio57",
692 };
693 
694 static const char * const dbg_out_groups[] = {
695 	"gpio57",
696 };
697 
698 static const char * const cri_trng0_groups[] = {
699 	"gpio57",
700 };
701 
702 static const char * const pcie0_rst_groups[] = {
703 	"gpio58",
704 };
705 
706 static const char * const cri_trng1_groups[] = {
707 	"gpio58",
708 };
709 
710 static const char * const pcie0_wake_groups[] = {
711 	"gpio59",
712 };
713 
714 static const char * const cri_trng_groups[] = {
715 	"gpio59",
716 };
717 
718 static const char * const pcie1_clk_groups[] = {
719 	"gpio60",
720 };
721 
722 static const char * const rx2_groups[] = {
723 	"gpio60",
724 };
725 
726 static const char * const ldo_update_groups[] = {
727 	"gpio60",
728 };
729 
730 static const char * const pcie1_rst_groups[] = {
731 	"gpio61",
732 };
733 
734 static const char * const ldo_en_groups[] = {
735 	"gpio61",
736 };
737 
738 static const char * const pcie1_wake_groups[] = {
739 	"gpio62",
740 };
741 
742 static const char * const gcc_plltest_groups[] = {
743 	"gpio62", "gpio63",
744 };
745 
746 static const char * const sd_card_groups[] = {
747 	"gpio63",
748 };
749 
750 static const char * const pta1_1_groups[] = {
751 	"gpio64",
752 };
753 
754 static const char * const rx1_groups[] = {
755 	"gpio64",
756 };
757 
758 static const char * const pta1_2_groups[] = {
759 	"gpio65",
760 };
761 
762 static const char * const gcc_tlmm_groups[] = {
763 	"gpio65",
764 };
765 
766 static const char * const pta1_0_groups[] = {
767 	"gpio66",
768 };
769 
770 static const char * const prng_rosc_groups[] = {
771 	"gpio66",
772 };
773 
774 static const char * const sd_write_groups[] = {
775 	"gpio67",
776 };
777 
778 static const char * const rx0_groups[] = {
779 	"gpio67",
780 };
781 
782 static const char * const tsens_max_groups[] = {
783 	"gpio67",
784 };
785 
786 static const char * const mdc_groups[] = {
787 	"gpio68",
788 };
789 
790 static const char * const mdio_groups[] = {
791 	"gpio69",
792 };
793 
794 static const char * const gpio_groups[] = {
795 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
796 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
797 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
798 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
799 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
800 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
801 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
802 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
803 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
804 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
805 };
806 
807 static const struct msm_function ipq8074_functions[] = {
808 	FUNCTION(atest_char),
809 	FUNCTION(atest_char0),
810 	FUNCTION(atest_char1),
811 	FUNCTION(atest_char2),
812 	FUNCTION(atest_char3),
813 	FUNCTION(audio_rxbclk),
814 	FUNCTION(audio_rxd),
815 	FUNCTION(audio_rxfsync),
816 	FUNCTION(audio_rxmclk),
817 	FUNCTION(audio_txbclk),
818 	FUNCTION(audio_txd),
819 	FUNCTION(audio_txfsync),
820 	FUNCTION(audio_txmclk),
821 	FUNCTION(blsp0_i2c),
822 	FUNCTION(blsp0_spi),
823 	FUNCTION(blsp0_uart),
824 	FUNCTION(blsp1_i2c),
825 	FUNCTION(blsp1_spi),
826 	FUNCTION(blsp1_uart),
827 	FUNCTION(blsp2_i2c),
828 	FUNCTION(blsp2_spi),
829 	FUNCTION(blsp2_uart),
830 	FUNCTION(blsp3_i2c),
831 	FUNCTION(blsp3_spi),
832 	FUNCTION(blsp3_spi0),
833 	FUNCTION(blsp3_spi1),
834 	FUNCTION(blsp3_spi2),
835 	FUNCTION(blsp3_spi3),
836 	FUNCTION(blsp3_uart),
837 	FUNCTION(blsp4_i2c0),
838 	FUNCTION(blsp4_i2c1),
839 	FUNCTION(blsp4_spi0),
840 	FUNCTION(blsp4_spi1),
841 	FUNCTION(blsp4_uart0),
842 	FUNCTION(blsp4_uart1),
843 	FUNCTION(blsp5_i2c),
844 	FUNCTION(blsp5_spi),
845 	FUNCTION(blsp5_uart),
846 	FUNCTION(burn0),
847 	FUNCTION(burn1),
848 	FUNCTION(cri_trng),
849 	FUNCTION(cri_trng0),
850 	FUNCTION(cri_trng1),
851 	FUNCTION(cxc0),
852 	FUNCTION(cxc1),
853 	FUNCTION(dbg_out),
854 	FUNCTION(gcc_plltest),
855 	FUNCTION(gcc_tlmm),
856 	FUNCTION(gpio),
857 	FUNCTION(ldo_en),
858 	FUNCTION(ldo_update),
859 	FUNCTION(led0),
860 	FUNCTION(led1),
861 	FUNCTION(led2),
862 	FUNCTION(mac0_sa0),
863 	FUNCTION(mac0_sa1),
864 	FUNCTION(mac1_sa0),
865 	FUNCTION(mac1_sa1),
866 	FUNCTION(mac1_sa2),
867 	FUNCTION(mac1_sa3),
868 	FUNCTION(mac2_sa0),
869 	FUNCTION(mac2_sa1),
870 	FUNCTION(mdc),
871 	FUNCTION(mdio),
872 	FUNCTION(pcie0_clk),
873 	FUNCTION(pcie0_rst),
874 	FUNCTION(pcie0_wake),
875 	FUNCTION(pcie1_clk),
876 	FUNCTION(pcie1_rst),
877 	FUNCTION(pcie1_wake),
878 	FUNCTION(pcm_drx),
879 	FUNCTION(pcm_dtx),
880 	FUNCTION(pcm_fsync),
881 	FUNCTION(pcm_pclk),
882 	FUNCTION(pcm_zsi0),
883 	FUNCTION(pcm_zsi1),
884 	FUNCTION(prng_rosc),
885 	FUNCTION(pta1_0),
886 	FUNCTION(pta1_1),
887 	FUNCTION(pta1_2),
888 	FUNCTION(pta2_0),
889 	FUNCTION(pta2_1),
890 	FUNCTION(pta2_2),
891 	FUNCTION(pwm0),
892 	FUNCTION(pwm1),
893 	FUNCTION(pwm2),
894 	FUNCTION(pwm3),
895 	FUNCTION(qdss_cti_trig_in_a0),
896 	FUNCTION(qdss_cti_trig_in_a1),
897 	FUNCTION(qdss_cti_trig_in_b0),
898 	FUNCTION(qdss_cti_trig_in_b1),
899 	FUNCTION(qdss_cti_trig_out_a0),
900 	FUNCTION(qdss_cti_trig_out_a1),
901 	FUNCTION(qdss_cti_trig_out_b0),
902 	FUNCTION(qdss_cti_trig_out_b1),
903 	FUNCTION(qdss_traceclk_a),
904 	FUNCTION(qdss_traceclk_b),
905 	FUNCTION(qdss_tracectl_a),
906 	FUNCTION(qdss_tracectl_b),
907 	FUNCTION(qdss_tracedata_a),
908 	FUNCTION(qdss_tracedata_b),
909 	FUNCTION(qpic),
910 	FUNCTION(rx0),
911 	FUNCTION(rx1),
912 	FUNCTION(rx2),
913 	FUNCTION(sd_card),
914 	FUNCTION(sd_write),
915 	FUNCTION(tsens_max),
916 	FUNCTION(wci2a),
917 	FUNCTION(wci2b),
918 	FUNCTION(wci2c),
919 	FUNCTION(wci2d),
920 };
921 
922 static const struct msm_pingroup ipq8074_groups[] = {
923 	PINGROUP(0, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
924 		 blsp3_spi3, NA, burn0, NA),
925 	PINGROUP(1, qpic, pcm_zsi0, mac1_sa2, blsp3_spi0, NA, burn1, NA, NA,
926 		 NA),
927 	PINGROUP(2, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
928 		 blsp3_spi3, NA, NA, NA),
929 	PINGROUP(3, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_out_b0, NA, NA,
930 		 NA, NA, NA),
931 	PINGROUP(4, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_in_b0, NA, NA,
932 		 NA, NA, NA),
933 	PINGROUP(5, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
934 		 qdss_cti_trig_out_b1, NA, NA, NA),
935 	PINGROUP(6, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
936 		 qdss_cti_trig_in_b1, NA, NA, NA),
937 	PINGROUP(7, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
938 	PINGROUP(8, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
939 	PINGROUP(9, qpic, blsp5_uart, blsp5_spi, cxc0, mac1_sa3, blsp3_spi3,
940 		 qdss_cti_trig_in_a1, NA, NA),
941 	PINGROUP(10, qpic, qdss_cti_trig_out_a1, NA, NA, NA, NA, NA, NA,
942 		 NA),
943 	PINGROUP(11, qpic, wci2c, mac1_sa2, qdss_cti_trig_in_a0, NA, NA, NA,
944 		 NA, NA),
945 	PINGROUP(12, qpic, qdss_cti_trig_out_a0, NA, NA, NA, NA, NA, NA,
946 		 NA),
947 	PINGROUP(13, qpic, NA, NA, NA, NA, NA, NA, NA, NA),
948 	PINGROUP(14, qpic, qdss_traceclk_b, NA, NA, NA, NA, NA, NA, NA),
949 	PINGROUP(15, qpic, qdss_tracectl_b, NA, NA, NA, NA, NA, NA, NA),
950 	PINGROUP(16, qpic, blsp5_uart, pcm_zsi1, blsp5_spi, cxc0, mac1_sa3,
951 		 qdss_tracedata_b, NA, NA),
952 	PINGROUP(17, qpic, wci2c, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
953 	PINGROUP(18, led0, pwm0, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
954 	PINGROUP(19, led1, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
955 	PINGROUP(20, led2, pwm2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
956 	PINGROUP(21, pwm0, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
957 		 blsp3_spi2, NA, qdss_tracedata_b),
958 	PINGROUP(22, pwm1, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
959 		 blsp3_spi2, NA, qdss_tracedata_b),
960 	PINGROUP(23, pwm2, blsp4_uart1, blsp4_spi1, blsp3_spi2, NA,
961 		 qdss_tracedata_b, NA, NA, NA),
962 	PINGROUP(24, pwm3, blsp4_uart1, blsp4_spi1, NA, qdss_tracedata_b, NA,
963 		 NA, NA, NA),
964 	PINGROUP(25, audio_txmclk, pwm0, NA, qdss_tracedata_b, NA, NA, NA, NA,
965 		 NA),
966 	PINGROUP(26, audio_txbclk, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA,
967 		 NA),
968 	PINGROUP(27, audio_txfsync, pwm2, NA, qdss_tracedata_b, NA, NA, NA,
969 		 NA, NA),
970 	PINGROUP(28, audio_txd, pwm3, NA, qdss_tracedata_b, NA, NA, NA, NA,
971 		 NA),
972 	PINGROUP(29, audio_rxmclk, pwm0, atest_char0, NA, qdss_tracedata_b,
973 		 NA, NA, NA, NA),
974 	PINGROUP(30, audio_rxbclk, pwm1, atest_char1, NA, qdss_tracedata_b,
975 		 NA, NA, NA, NA),
976 	PINGROUP(31, audio_rxfsync, pwm2, atest_char2, NA, qdss_tracedata_b,
977 		 NA, NA, NA, NA),
978 	PINGROUP(32, audio_rxd, pwm3, atest_char3, NA, NA, NA, NA, NA, NA),
979 	PINGROUP(33, pcm_drx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
980 	PINGROUP(34, pcm_dtx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
981 	PINGROUP(35, pcm_fsync, mac2_sa0, qdss_traceclk_a, NA, NA, NA, NA, NA, NA),
982 	PINGROUP(36, pcm_pclk, mac2_sa0, NA, qdss_tracectl_a, NA, NA, NA, NA, NA),
983 	PINGROUP(37, atest_char, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
984 	PINGROUP(38, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
985 		 NA, NA, NA, NA),
986 	PINGROUP(39, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
987 		 NA, NA, NA, NA),
988 	PINGROUP(40, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
989 		 NA, NA),
990 	PINGROUP(41, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
991 		 NA, NA),
992 	PINGROUP(42, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
993 		 NA, NA, NA, NA),
994 	PINGROUP(43, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
995 		 NA, NA, NA, NA),
996 	PINGROUP(44, blsp1_uart, blsp1_spi, NA, qdss_tracedata_a, NA, NA, NA,
997 		 NA, NA),
998 	PINGROUP(45, blsp1_uart, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA,
999 		 NA, NA),
1000 	PINGROUP(46, blsp2_uart, blsp2_i2c, blsp2_spi, qdss_tracedata_a, NA,
1001 		 NA, NA, NA, NA),
1002 	PINGROUP(47, blsp2_uart, blsp2_i2c, blsp2_spi, NA, qdss_tracedata_a,
1003 		 NA, NA, NA, NA),
1004 	PINGROUP(48, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
1005 		 NA, NA),
1006 	PINGROUP(49, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
1007 		 NA, NA),
1008 	PINGROUP(50, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
1009 		 NA, NA, NA, NA),
1010 	PINGROUP(51, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
1011 		 NA, NA, NA, NA),
1012 	PINGROUP(52, blsp3_uart, blsp3_spi, NA, qdss_tracedata_a, NA, NA, NA,
1013 		 NA, NA),
1014 	PINGROUP(53, blsp3_uart, blsp3_spi, NA, NA, NA, NA, NA, NA, NA),
1015 	PINGROUP(54, pta2_0, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
1016 	PINGROUP(55, pta2_1, blsp3_spi1, NA, NA, NA, NA, NA, NA, NA),
1017 	PINGROUP(56, pta2_2, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
1018 	PINGROUP(57, pcie0_clk, NA, dbg_out, cri_trng0, NA, NA, NA, NA, NA),
1019 	PINGROUP(58, pcie0_rst, NA, cri_trng1, NA, NA, NA, NA, NA, NA),
1020 	PINGROUP(59, pcie0_wake, NA, cri_trng, NA, NA, NA, NA, NA, NA),
1021 	PINGROUP(60, pcie1_clk, rx2, ldo_update, NA, NA, NA, NA, NA, NA),
1022 	PINGROUP(61, pcie1_rst, ldo_en, NA, NA, NA, NA, NA, NA, NA),
1023 	PINGROUP(62, pcie1_wake, gcc_plltest, NA, NA, NA, NA, NA, NA, NA),
1024 	PINGROUP(63, sd_card, pwm0, NA, gcc_plltest, NA, NA, NA, NA, NA),
1025 	PINGROUP(64, pta1_1, pwm1, NA, rx1, NA, NA, NA, NA, NA),
1026 	PINGROUP(65, pta1_2, NA, gcc_tlmm, NA, NA, NA, NA, NA, NA),
1027 	PINGROUP(66, pta1_0, pwm2, prng_rosc, NA, NA, NA, NA, NA, NA),
1028 	PINGROUP(67, sd_write, pwm3, rx0, tsens_max, NA, NA, NA, NA, NA),
1029 	PINGROUP(68, mdc, NA, NA, NA, NA, NA, NA, NA, NA),
1030 	PINGROUP(69, mdio, NA, NA, NA, NA, NA, NA, NA, NA),
1031 };
1032 
1033 static const struct msm_pinctrl_soc_data ipq8074_pinctrl = {
1034 	.pins = ipq8074_pins,
1035 	.npins = ARRAY_SIZE(ipq8074_pins),
1036 	.functions = ipq8074_functions,
1037 	.nfunctions = ARRAY_SIZE(ipq8074_functions),
1038 	.groups = ipq8074_groups,
1039 	.ngroups = ARRAY_SIZE(ipq8074_groups),
1040 	.ngpios = 70,
1041 };
1042 
1043 static int ipq8074_pinctrl_probe(struct platform_device *pdev)
1044 {
1045 	return msm_pinctrl_probe(pdev, &ipq8074_pinctrl);
1046 }
1047 
1048 static const struct of_device_id ipq8074_pinctrl_of_match[] = {
1049 	{ .compatible = "qcom,ipq8074-pinctrl", },
1050 	{ },
1051 };
1052 
1053 static struct platform_driver ipq8074_pinctrl_driver = {
1054 	.driver = {
1055 		.name = "ipq8074-pinctrl",
1056 		.of_match_table = ipq8074_pinctrl_of_match,
1057 	},
1058 	.probe = ipq8074_pinctrl_probe,
1059 	.remove = msm_pinctrl_remove,
1060 };
1061 
1062 static int __init ipq8074_pinctrl_init(void)
1063 {
1064 	return platform_driver_register(&ipq8074_pinctrl_driver);
1065 }
1066 arch_initcall(ipq8074_pinctrl_init);
1067 
1068 static void __exit ipq8074_pinctrl_exit(void)
1069 {
1070 	platform_driver_unregister(&ipq8074_pinctrl_driver);
1071 }
1072 module_exit(ipq8074_pinctrl_exit);
1073 
1074 MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver");
1075 MODULE_LICENSE("GPL v2");
1076 MODULE_DEVICE_TABLE(of, ipq8074_pinctrl_of_match);
1077