1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2019-2021, 2023 The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/mod_devicetable.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9 \ 29 }, \ 30 .nfuncs = 10, \ 31 .ctl_reg = REG_SIZE * id, \ 32 .io_reg = 0x4 + REG_SIZE * id, \ 33 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 34 .intr_status_reg = 0xc + REG_SIZE * id, \ 35 .intr_target_reg = 0x8 + REG_SIZE * id, \ 36 .mux_bit = 2, \ 37 .pull_bit = 0, \ 38 .drv_bit = 6, \ 39 .oe_bit = 9, \ 40 .in_bit = 0, \ 41 .out_bit = 1, \ 42 .intr_enable_bit = 0, \ 43 .intr_status_bit = 0, \ 44 .intr_target_bit = 5, \ 45 .intr_target_kpss_val = 3, \ 46 .intr_raw_status_bit = 4, \ 47 .intr_polarity_bit = 1, \ 48 .intr_detection_bit = 2, \ 49 .intr_detection_width = 2, \ 50 } 51 52 static const struct pinctrl_pin_desc ipq5018_pins[] = { 53 PINCTRL_PIN(0, "GPIO_0"), 54 PINCTRL_PIN(1, "GPIO_1"), 55 PINCTRL_PIN(2, "GPIO_2"), 56 PINCTRL_PIN(3, "GPIO_3"), 57 PINCTRL_PIN(4, "GPIO_4"), 58 PINCTRL_PIN(5, "GPIO_5"), 59 PINCTRL_PIN(6, "GPIO_6"), 60 PINCTRL_PIN(7, "GPIO_7"), 61 PINCTRL_PIN(8, "GPIO_8"), 62 PINCTRL_PIN(9, "GPIO_9"), 63 PINCTRL_PIN(10, "GPIO_10"), 64 PINCTRL_PIN(11, "GPIO_11"), 65 PINCTRL_PIN(12, "GPIO_12"), 66 PINCTRL_PIN(13, "GPIO_13"), 67 PINCTRL_PIN(14, "GPIO_14"), 68 PINCTRL_PIN(15, "GPIO_15"), 69 PINCTRL_PIN(16, "GPIO_16"), 70 PINCTRL_PIN(17, "GPIO_17"), 71 PINCTRL_PIN(18, "GPIO_18"), 72 PINCTRL_PIN(19, "GPIO_19"), 73 PINCTRL_PIN(20, "GPIO_20"), 74 PINCTRL_PIN(21, "GPIO_21"), 75 PINCTRL_PIN(22, "GPIO_22"), 76 PINCTRL_PIN(23, "GPIO_23"), 77 PINCTRL_PIN(24, "GPIO_24"), 78 PINCTRL_PIN(25, "GPIO_25"), 79 PINCTRL_PIN(26, "GPIO_26"), 80 PINCTRL_PIN(27, "GPIO_27"), 81 PINCTRL_PIN(28, "GPIO_28"), 82 PINCTRL_PIN(29, "GPIO_29"), 83 PINCTRL_PIN(30, "GPIO_30"), 84 PINCTRL_PIN(31, "GPIO_31"), 85 PINCTRL_PIN(32, "GPIO_32"), 86 PINCTRL_PIN(33, "GPIO_33"), 87 PINCTRL_PIN(34, "GPIO_34"), 88 PINCTRL_PIN(35, "GPIO_35"), 89 PINCTRL_PIN(36, "GPIO_36"), 90 PINCTRL_PIN(37, "GPIO_37"), 91 PINCTRL_PIN(38, "GPIO_38"), 92 PINCTRL_PIN(39, "GPIO_39"), 93 PINCTRL_PIN(40, "GPIO_40"), 94 PINCTRL_PIN(41, "GPIO_41"), 95 PINCTRL_PIN(42, "GPIO_42"), 96 PINCTRL_PIN(43, "GPIO_43"), 97 PINCTRL_PIN(44, "GPIO_44"), 98 PINCTRL_PIN(45, "GPIO_45"), 99 PINCTRL_PIN(46, "GPIO_46"), 100 }; 101 102 #define DECLARE_MSM_GPIO_PINS(pin) \ 103 static const unsigned int gpio##pin##_pins[] = { pin } 104 DECLARE_MSM_GPIO_PINS(0); 105 DECLARE_MSM_GPIO_PINS(1); 106 DECLARE_MSM_GPIO_PINS(2); 107 DECLARE_MSM_GPIO_PINS(3); 108 DECLARE_MSM_GPIO_PINS(4); 109 DECLARE_MSM_GPIO_PINS(5); 110 DECLARE_MSM_GPIO_PINS(6); 111 DECLARE_MSM_GPIO_PINS(7); 112 DECLARE_MSM_GPIO_PINS(8); 113 DECLARE_MSM_GPIO_PINS(9); 114 DECLARE_MSM_GPIO_PINS(10); 115 DECLARE_MSM_GPIO_PINS(11); 116 DECLARE_MSM_GPIO_PINS(12); 117 DECLARE_MSM_GPIO_PINS(13); 118 DECLARE_MSM_GPIO_PINS(14); 119 DECLARE_MSM_GPIO_PINS(15); 120 DECLARE_MSM_GPIO_PINS(16); 121 DECLARE_MSM_GPIO_PINS(17); 122 DECLARE_MSM_GPIO_PINS(18); 123 DECLARE_MSM_GPIO_PINS(19); 124 DECLARE_MSM_GPIO_PINS(20); 125 DECLARE_MSM_GPIO_PINS(21); 126 DECLARE_MSM_GPIO_PINS(22); 127 DECLARE_MSM_GPIO_PINS(23); 128 DECLARE_MSM_GPIO_PINS(24); 129 DECLARE_MSM_GPIO_PINS(25); 130 DECLARE_MSM_GPIO_PINS(26); 131 DECLARE_MSM_GPIO_PINS(27); 132 DECLARE_MSM_GPIO_PINS(28); 133 DECLARE_MSM_GPIO_PINS(29); 134 DECLARE_MSM_GPIO_PINS(30); 135 DECLARE_MSM_GPIO_PINS(31); 136 DECLARE_MSM_GPIO_PINS(32); 137 DECLARE_MSM_GPIO_PINS(33); 138 DECLARE_MSM_GPIO_PINS(34); 139 DECLARE_MSM_GPIO_PINS(35); 140 DECLARE_MSM_GPIO_PINS(36); 141 DECLARE_MSM_GPIO_PINS(37); 142 DECLARE_MSM_GPIO_PINS(38); 143 DECLARE_MSM_GPIO_PINS(39); 144 DECLARE_MSM_GPIO_PINS(40); 145 DECLARE_MSM_GPIO_PINS(41); 146 DECLARE_MSM_GPIO_PINS(42); 147 DECLARE_MSM_GPIO_PINS(43); 148 DECLARE_MSM_GPIO_PINS(44); 149 DECLARE_MSM_GPIO_PINS(45); 150 DECLARE_MSM_GPIO_PINS(46); 151 152 enum ipq5018_functions { 153 msm_mux_atest_char, 154 msm_mux_audio_pdm0, 155 msm_mux_audio_pdm1, 156 msm_mux_audio_rxbclk, 157 msm_mux_audio_rxd, 158 msm_mux_audio_rxfsync, 159 msm_mux_audio_rxmclk, 160 msm_mux_audio_txbclk, 161 msm_mux_audio_txd, 162 msm_mux_audio_txfsync, 163 msm_mux_audio_txmclk, 164 msm_mux_blsp0_i2c, 165 msm_mux_blsp0_spi, 166 msm_mux_blsp0_uart0, 167 msm_mux_blsp0_uart1, 168 msm_mux_blsp1_i2c0, 169 msm_mux_blsp1_i2c1, 170 msm_mux_blsp1_spi0, 171 msm_mux_blsp1_spi1, 172 msm_mux_blsp1_uart0, 173 msm_mux_blsp1_uart1, 174 msm_mux_blsp1_uart2, 175 msm_mux_blsp2_i2c0, 176 msm_mux_blsp2_i2c1, 177 msm_mux_blsp2_spi, 178 msm_mux_blsp2_spi0, 179 msm_mux_blsp2_spi1, 180 msm_mux_btss, 181 msm_mux_burn0, 182 msm_mux_burn1, 183 msm_mux_cri_trng, 184 msm_mux_cri_trng0, 185 msm_mux_cri_trng1, 186 msm_mux_cxc_clk, 187 msm_mux_cxc_data, 188 msm_mux_dbg_out, 189 msm_mux_eud_gpio, 190 msm_mux_gcc_plltest, 191 msm_mux_gcc_tlmm, 192 msm_mux_gpio, 193 msm_mux_led0, 194 msm_mux_led2, 195 msm_mux_mac0, 196 msm_mux_mac1, 197 msm_mux_mdc, 198 msm_mux_mdio, 199 msm_mux_pcie0_clk, 200 msm_mux_pcie0_wake, 201 msm_mux_pcie1_clk, 202 msm_mux_pcie1_wake, 203 msm_mux_pll_test, 204 msm_mux_prng_rosc, 205 msm_mux_pwm0, 206 msm_mux_pwm1, 207 msm_mux_pwm2, 208 msm_mux_pwm3, 209 msm_mux_qdss_cti_trig_in_a0, 210 msm_mux_qdss_cti_trig_in_a1, 211 msm_mux_qdss_cti_trig_in_b0, 212 msm_mux_qdss_cti_trig_in_b1, 213 msm_mux_qdss_cti_trig_out_a0, 214 msm_mux_qdss_cti_trig_out_a1, 215 msm_mux_qdss_cti_trig_out_b0, 216 msm_mux_qdss_cti_trig_out_b1, 217 msm_mux_qdss_traceclk_a, 218 msm_mux_qdss_traceclk_b, 219 msm_mux_qdss_tracectl_a, 220 msm_mux_qdss_tracectl_b, 221 msm_mux_qdss_tracedata_a, 222 msm_mux_qdss_tracedata_b, 223 msm_mux_qspi_clk, 224 msm_mux_qspi_cs, 225 msm_mux_qspi_data, 226 msm_mux_reset_out, 227 msm_mux_sdc1_clk, 228 msm_mux_sdc1_cmd, 229 msm_mux_sdc1_data, 230 msm_mux_wci_txd, 231 msm_mux_wci_rxd, 232 msm_mux_wsa_swrm, 233 msm_mux_wsi_clk3, 234 msm_mux_wsi_data3, 235 msm_mux_wsis_reset, 236 msm_mux_xfem, 237 msm_mux__, 238 }; 239 240 static const char * const atest_char_groups[] = { 241 "gpio0", "gpio1", "gpio2", "gpio3", "gpio37", 242 }; 243 244 static const char * const _groups[] = { 245 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 246 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 247 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 248 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 249 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 250 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 251 "gpio43", "gpio44", "gpio45", "gpio46", 252 }; 253 254 static const char * const wci_txd_groups[] = { 255 "gpio0", "gpio1", "gpio2", "gpio3", 256 "gpio42", "gpio43", "gpio44", "gpio45", 257 }; 258 259 static const char * const wci_rxd_groups[] = { 260 "gpio0", "gpio1", "gpio2", "gpio3", 261 "gpio42", "gpio43", "gpio44", "gpio45", 262 }; 263 264 static const char * const xfem_groups[] = { 265 "gpio0", "gpio1", "gpio2", "gpio3", 266 "gpio42", "gpio43", "gpio44", "gpio45", 267 }; 268 269 static const char * const qdss_cti_trig_out_a0_groups[] = { 270 "gpio0", 271 }; 272 273 static const char * const qdss_cti_trig_in_a0_groups[] = { 274 "gpio1", 275 }; 276 277 static const char * const qdss_cti_trig_out_a1_groups[] = { 278 "gpio2", 279 }; 280 281 static const char * const qdss_cti_trig_in_a1_groups[] = { 282 "gpio3", 283 }; 284 285 static const char * const sdc1_data_groups[] = { 286 "gpio4", "gpio5", "gpio6", "gpio7", 287 }; 288 289 static const char * const qspi_data_groups[] = { 290 "gpio4", 291 "gpio5", 292 "gpio6", 293 "gpio7", 294 }; 295 296 static const char * const blsp1_spi1_groups[] = { 297 "gpio4", "gpio5", "gpio6", "gpio7", 298 }; 299 300 static const char * const btss_groups[] = { 301 "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio17", "gpio18", 302 "gpio19", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 303 }; 304 305 static const char * const dbg_out_groups[] = { 306 "gpio4", 307 }; 308 309 static const char * const qdss_traceclk_a_groups[] = { 310 "gpio4", 311 }; 312 313 static const char * const burn0_groups[] = { 314 "gpio4", 315 }; 316 317 static const char * const cxc_clk_groups[] = { 318 "gpio5", 319 }; 320 321 static const char * const blsp1_i2c1_groups[] = { 322 "gpio5", "gpio6", 323 }; 324 325 static const char * const qdss_tracectl_a_groups[] = { 326 "gpio5", 327 }; 328 329 static const char * const burn1_groups[] = { 330 "gpio5", 331 }; 332 333 static const char * const cxc_data_groups[] = { 334 "gpio6", 335 }; 336 337 static const char * const qdss_tracedata_a_groups[] = { 338 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", 339 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", 340 "gpio20", "gpio21", 341 }; 342 343 static const char * const mac0_groups[] = { 344 "gpio7", 345 }; 346 347 static const char * const sdc1_cmd_groups[] = { 348 "gpio8", 349 }; 350 351 static const char * const qspi_cs_groups[] = { 352 "gpio8", 353 }; 354 355 static const char * const mac1_groups[] = { 356 "gpio8", 357 }; 358 359 static const char * const sdc1_clk_groups[] = { 360 "gpio9", 361 }; 362 363 static const char * const qspi_clk_groups[] = { 364 "gpio9", 365 }; 366 367 static const char * const blsp0_spi_groups[] = { 368 "gpio10", "gpio11", "gpio12", "gpio13", 369 }; 370 371 static const char * const blsp1_uart0_groups[] = { 372 "gpio10", "gpio11", "gpio12", "gpio13", 373 }; 374 375 static const char * const gcc_plltest_groups[] = { 376 "gpio10", "gpio12", 377 }; 378 379 static const char * const gcc_tlmm_groups[] = { 380 "gpio11", 381 }; 382 383 static const char * const blsp0_i2c_groups[] = { 384 "gpio12", "gpio13", 385 }; 386 387 static const char * const pcie0_clk_groups[] = { 388 "gpio14", 389 }; 390 391 static const char * const cri_trng0_groups[] = { 392 "gpio14", 393 }; 394 395 static const char * const cri_trng1_groups[] = { 396 "gpio15", 397 }; 398 399 static const char * const pcie0_wake_groups[] = { 400 "gpio16", 401 }; 402 403 static const char * const cri_trng_groups[] = { 404 "gpio16", 405 }; 406 407 static const char * const pcie1_clk_groups[] = { 408 "gpio17", 409 }; 410 411 static const char * const prng_rosc_groups[] = { 412 "gpio17", 413 }; 414 415 static const char * const blsp1_spi0_groups[] = { 416 "gpio18", "gpio19", "gpio20", "gpio21", 417 }; 418 419 static const char * const pcie1_wake_groups[] = { 420 "gpio19", 421 }; 422 423 static const char * const blsp1_i2c0_groups[] = { 424 "gpio19", "gpio20", 425 }; 426 427 static const char * const blsp0_uart0_groups[] = { 428 "gpio20", "gpio21", 429 }; 430 431 static const char * const pll_test_groups[] = { 432 "gpio22", 433 }; 434 435 static const char * const eud_gpio_groups[] = { 436 "gpio22", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 437 }; 438 439 static const char * const audio_rxmclk_groups[] = { 440 "gpio23", "gpio23", 441 }; 442 443 static const char * const audio_pdm0_groups[] = { 444 "gpio23", "gpio24", 445 }; 446 447 static const char * const blsp2_spi1_groups[] = { 448 "gpio23", "gpio24", "gpio25", "gpio26", 449 }; 450 451 static const char * const blsp1_uart2_groups[] = { 452 "gpio23", "gpio24", "gpio25", "gpio26", 453 }; 454 455 static const char * const qdss_tracedata_b_groups[] = { 456 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 457 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio36", 458 "gpio37", "gpio38", 459 }; 460 461 static const char * const audio_rxbclk_groups[] = { 462 "gpio24", 463 }; 464 465 static const char * const audio_rxfsync_groups[] = { 466 "gpio25", 467 }; 468 469 static const char * const audio_pdm1_groups[] = { 470 "gpio25", "gpio26", 471 }; 472 473 static const char * const blsp2_i2c1_groups[] = { 474 "gpio25", "gpio26", 475 }; 476 477 static const char * const audio_rxd_groups[] = { 478 "gpio26", 479 }; 480 481 static const char * const audio_txmclk_groups[] = { 482 "gpio27", "gpio27", 483 }; 484 485 static const char * const wsa_swrm_groups[] = { 486 "gpio27", "gpio28", 487 }; 488 489 static const char * const blsp2_spi_groups[] = { 490 "gpio27", 491 }; 492 493 static const char * const audio_txbclk_groups[] = { 494 "gpio28", 495 }; 496 497 static const char * const blsp0_uart1_groups[] = { 498 "gpio28", "gpio29", 499 }; 500 501 static const char * const audio_txfsync_groups[] = { 502 "gpio29", 503 }; 504 505 static const char * const audio_txd_groups[] = { 506 "gpio30", 507 }; 508 509 static const char * const wsis_reset_groups[] = { 510 "gpio30", 511 }; 512 513 static const char * const blsp2_spi0_groups[] = { 514 "gpio31", "gpio32", "gpio33", "gpio34", 515 }; 516 517 static const char * const blsp1_uart1_groups[] = { 518 "gpio31", "gpio32", "gpio33", "gpio34", 519 }; 520 521 static const char * const blsp2_i2c0_groups[] = { 522 "gpio33", "gpio34", 523 }; 524 525 static const char * const mdc_groups[] = { 526 "gpio36", 527 }; 528 529 static const char * const wsi_clk3_groups[] = { 530 "gpio36", 531 }; 532 533 static const char * const mdio_groups[] = { 534 "gpio37", 535 }; 536 537 static const char * const wsi_data3_groups[] = { 538 "gpio37", 539 }; 540 541 static const char * const qdss_traceclk_b_groups[] = { 542 "gpio39", 543 }; 544 545 static const char * const reset_out_groups[] = { 546 "gpio40", 547 }; 548 549 static const char * const qdss_tracectl_b_groups[] = { 550 "gpio40", 551 }; 552 553 static const char * const pwm0_groups[] = { 554 "gpio42", 555 }; 556 557 static const char * const qdss_cti_trig_out_b0_groups[] = { 558 "gpio42", 559 }; 560 561 static const char * const pwm1_groups[] = { 562 "gpio43", 563 }; 564 565 static const char * const qdss_cti_trig_in_b0_groups[] = { 566 "gpio43", 567 }; 568 569 static const char * const pwm2_groups[] = { 570 "gpio44", 571 }; 572 573 static const char * const qdss_cti_trig_out_b1_groups[] = { 574 "gpio44", 575 }; 576 577 static const char * const pwm3_groups[] = { 578 "gpio45", 579 }; 580 581 static const char * const qdss_cti_trig_in_b1_groups[] = { 582 "gpio45", 583 }; 584 585 static const char * const led0_groups[] = { 586 "gpio46", "gpio30", "gpio10", 587 }; 588 589 static const char * const led2_groups[] = { 590 "gpio30", 591 }; 592 593 static const char * const gpio_groups[] = { 594 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 595 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 596 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 597 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 598 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 599 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 600 "gpio43", "gpio44", "gpio45", "gpio46", 601 }; 602 603 static const struct pinfunction ipq5018_functions[] = { 604 MSM_PIN_FUNCTION(atest_char), 605 MSM_PIN_FUNCTION(audio_pdm0), 606 MSM_PIN_FUNCTION(audio_pdm1), 607 MSM_PIN_FUNCTION(audio_rxbclk), 608 MSM_PIN_FUNCTION(audio_rxd), 609 MSM_PIN_FUNCTION(audio_rxfsync), 610 MSM_PIN_FUNCTION(audio_rxmclk), 611 MSM_PIN_FUNCTION(audio_txbclk), 612 MSM_PIN_FUNCTION(audio_txd), 613 MSM_PIN_FUNCTION(audio_txfsync), 614 MSM_PIN_FUNCTION(audio_txmclk), 615 MSM_PIN_FUNCTION(blsp0_i2c), 616 MSM_PIN_FUNCTION(blsp0_spi), 617 MSM_PIN_FUNCTION(blsp0_uart0), 618 MSM_PIN_FUNCTION(blsp0_uart1), 619 MSM_PIN_FUNCTION(blsp1_i2c0), 620 MSM_PIN_FUNCTION(blsp1_i2c1), 621 MSM_PIN_FUNCTION(blsp1_spi0), 622 MSM_PIN_FUNCTION(blsp1_spi1), 623 MSM_PIN_FUNCTION(blsp1_uart0), 624 MSM_PIN_FUNCTION(blsp1_uart1), 625 MSM_PIN_FUNCTION(blsp1_uart2), 626 MSM_PIN_FUNCTION(blsp2_i2c0), 627 MSM_PIN_FUNCTION(blsp2_i2c1), 628 MSM_PIN_FUNCTION(blsp2_spi), 629 MSM_PIN_FUNCTION(blsp2_spi0), 630 MSM_PIN_FUNCTION(blsp2_spi1), 631 MSM_PIN_FUNCTION(btss), 632 MSM_PIN_FUNCTION(burn0), 633 MSM_PIN_FUNCTION(burn1), 634 MSM_PIN_FUNCTION(cri_trng), 635 MSM_PIN_FUNCTION(cri_trng0), 636 MSM_PIN_FUNCTION(cri_trng1), 637 MSM_PIN_FUNCTION(cxc_clk), 638 MSM_PIN_FUNCTION(cxc_data), 639 MSM_PIN_FUNCTION(dbg_out), 640 MSM_PIN_FUNCTION(eud_gpio), 641 MSM_PIN_FUNCTION(gcc_plltest), 642 MSM_PIN_FUNCTION(gcc_tlmm), 643 MSM_PIN_FUNCTION(gpio), 644 MSM_PIN_FUNCTION(led0), 645 MSM_PIN_FUNCTION(led2), 646 MSM_PIN_FUNCTION(mac0), 647 MSM_PIN_FUNCTION(mac1), 648 MSM_PIN_FUNCTION(mdc), 649 MSM_PIN_FUNCTION(mdio), 650 MSM_PIN_FUNCTION(pcie0_clk), 651 MSM_PIN_FUNCTION(pcie0_wake), 652 MSM_PIN_FUNCTION(pcie1_clk), 653 MSM_PIN_FUNCTION(pcie1_wake), 654 MSM_PIN_FUNCTION(pll_test), 655 MSM_PIN_FUNCTION(prng_rosc), 656 MSM_PIN_FUNCTION(pwm0), 657 MSM_PIN_FUNCTION(pwm1), 658 MSM_PIN_FUNCTION(pwm2), 659 MSM_PIN_FUNCTION(pwm3), 660 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), 661 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), 662 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), 663 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), 664 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), 665 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), 666 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), 667 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), 668 MSM_PIN_FUNCTION(qdss_traceclk_a), 669 MSM_PIN_FUNCTION(qdss_traceclk_b), 670 MSM_PIN_FUNCTION(qdss_tracectl_a), 671 MSM_PIN_FUNCTION(qdss_tracectl_b), 672 MSM_PIN_FUNCTION(qdss_tracedata_a), 673 MSM_PIN_FUNCTION(qdss_tracedata_b), 674 MSM_PIN_FUNCTION(qspi_clk), 675 MSM_PIN_FUNCTION(qspi_cs), 676 MSM_PIN_FUNCTION(qspi_data), 677 MSM_PIN_FUNCTION(reset_out), 678 MSM_PIN_FUNCTION(sdc1_clk), 679 MSM_PIN_FUNCTION(sdc1_cmd), 680 MSM_PIN_FUNCTION(sdc1_data), 681 MSM_PIN_FUNCTION(wci_txd), 682 MSM_PIN_FUNCTION(wci_rxd), 683 MSM_PIN_FUNCTION(wsa_swrm), 684 MSM_PIN_FUNCTION(wsi_clk3), 685 MSM_PIN_FUNCTION(wsi_data3), 686 MSM_PIN_FUNCTION(wsis_reset), 687 MSM_PIN_FUNCTION(xfem), 688 }; 689 690 static const struct msm_pingroup ipq5018_groups[] = { 691 PINGROUP(0, atest_char, _, qdss_cti_trig_out_a0, wci_txd, wci_rxd, xfem, _, _, _), 692 PINGROUP(1, atest_char, _, qdss_cti_trig_in_a0, wci_txd, wci_rxd, xfem, _, _, _), 693 PINGROUP(2, atest_char, _, qdss_cti_trig_out_a1, wci_txd, wci_rxd, xfem, _, _, _), 694 PINGROUP(3, atest_char, _, qdss_cti_trig_in_a1, wci_txd, wci_rxd, xfem, _, _, _), 695 PINGROUP(4, sdc1_data, qspi_data, blsp1_spi1, btss, dbg_out, qdss_traceclk_a, _, burn0, _), 696 PINGROUP(5, sdc1_data, qspi_data, cxc_clk, blsp1_spi1, blsp1_i2c1, btss, _, qdss_tracectl_a, _), 697 PINGROUP(6, sdc1_data, qspi_data, cxc_data, blsp1_spi1, blsp1_i2c1, btss, _, qdss_tracedata_a, _), 698 PINGROUP(7, sdc1_data, qspi_data, mac0, blsp1_spi1, btss, _, qdss_tracedata_a, _, _), 699 PINGROUP(8, sdc1_cmd, qspi_cs, mac1, btss, _, qdss_tracedata_a, _, _, _), 700 PINGROUP(9, sdc1_clk, qspi_clk, _, qdss_tracedata_a, _, _, _, _, _), 701 PINGROUP(10, blsp0_spi, blsp1_uart0, led0, gcc_plltest, qdss_tracedata_a, _, _, _, _), 702 PINGROUP(11, blsp0_spi, blsp1_uart0, _, gcc_tlmm, qdss_tracedata_a, _, _, _, _), 703 PINGROUP(12, blsp0_spi, blsp0_i2c, blsp1_uart0, _, gcc_plltest, qdss_tracedata_a, _, _, _), 704 PINGROUP(13, blsp0_spi, blsp0_i2c, blsp1_uart0, _, qdss_tracedata_a, _, _, _, _), 705 PINGROUP(14, pcie0_clk, _, _, cri_trng0, qdss_tracedata_a, _, _, _, _), 706 PINGROUP(15, _, _, cri_trng1, qdss_tracedata_a, _, _, _, _, _), 707 PINGROUP(16, pcie0_wake, _, _, cri_trng, qdss_tracedata_a, _, _, _, _), 708 PINGROUP(17, pcie1_clk, btss, _, prng_rosc, qdss_tracedata_a, _, _, _, _), 709 PINGROUP(18, blsp1_spi0, btss, _, qdss_tracedata_a, _, _, _, _, _), 710 PINGROUP(19, pcie1_wake, blsp1_spi0, blsp1_i2c0, btss, _, qdss_tracedata_a, _, _, _), 711 PINGROUP(20, blsp0_uart0, blsp1_spi0, blsp1_i2c0, _, qdss_tracedata_a, _, _, _, _), 712 PINGROUP(21, blsp0_uart0, blsp1_spi0, _, qdss_tracedata_a, _, _, _, _, _), 713 PINGROUP(22, _, pll_test, eud_gpio, _, _, _, _, _, _), 714 PINGROUP(23, audio_rxmclk, audio_pdm0, audio_rxmclk, blsp2_spi1, blsp1_uart2, btss, _, qdss_tracedata_b, _), 715 PINGROUP(24, audio_rxbclk, audio_pdm0, blsp2_spi1, blsp1_uart2, btss, _, qdss_tracedata_b, _, _), 716 PINGROUP(25, audio_rxfsync, audio_pdm1, blsp2_i2c1, blsp2_spi1, blsp1_uart2, btss, _, qdss_tracedata_b, _), 717 PINGROUP(26, audio_rxd, audio_pdm1, blsp2_i2c1, blsp2_spi1, blsp1_uart2, btss, _, qdss_tracedata_b, _), 718 PINGROUP(27, audio_txmclk, wsa_swrm, audio_txmclk, blsp2_spi, btss, _, qdss_tracedata_b, _, _), 719 PINGROUP(28, audio_txbclk, wsa_swrm, blsp0_uart1, btss, qdss_tracedata_b, _, _, _, _), 720 PINGROUP(29, audio_txfsync, _, blsp0_uart1, _, qdss_tracedata_b, _, _, _, _), 721 PINGROUP(30, audio_txd, led2, led0, _, _, _, _, _, _), 722 PINGROUP(31, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _, _), 723 PINGROUP(32, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _, _), 724 PINGROUP(33, blsp2_i2c0, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _), 725 PINGROUP(34, blsp2_i2c0, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _), 726 PINGROUP(35, _, qdss_tracedata_b, eud_gpio, _, _, _, _, _, _), 727 PINGROUP(36, mdc, qdss_tracedata_b, _, wsi_clk3, _, _, _, _, _), 728 PINGROUP(37, mdio, atest_char, qdss_tracedata_b, _, wsi_data3, _, _, _, _), 729 PINGROUP(38, qdss_tracedata_b, _, _, _, _, _, _, _, _), 730 PINGROUP(39, qdss_traceclk_b, _, _, _, _, _, _, _, _), 731 PINGROUP(40, reset_out, qdss_tracectl_b, _, _, _, _, _, _, _), 732 PINGROUP(41, _, _, _, _, _, _, _, _, _), 733 PINGROUP(42, pwm0, qdss_cti_trig_out_b0, wci_txd, wci_rxd, xfem, _, _, _, _), 734 PINGROUP(43, pwm1, qdss_cti_trig_in_b0, wci_txd, wci_rxd, xfem, _, _, _, _), 735 PINGROUP(44, pwm2, qdss_cti_trig_out_b1, wci_txd, wci_rxd, xfem, _, _, _, _), 736 PINGROUP(45, pwm3, qdss_cti_trig_in_b1, wci_txd, wci_rxd, xfem, _, _, _, _), 737 PINGROUP(46, led0, _, _, _, _, _, _, _, _), 738 }; 739 740 static const struct msm_pinctrl_soc_data ipq5018_pinctrl = { 741 .pins = ipq5018_pins, 742 .npins = ARRAY_SIZE(ipq5018_pins), 743 .functions = ipq5018_functions, 744 .nfunctions = ARRAY_SIZE(ipq5018_functions), 745 .groups = ipq5018_groups, 746 .ngroups = ARRAY_SIZE(ipq5018_groups), 747 .ngpios = 47, 748 }; 749 750 static int ipq5018_pinctrl_probe(struct platform_device *pdev) 751 { 752 return msm_pinctrl_probe(pdev, &ipq5018_pinctrl); 753 } 754 755 static const struct of_device_id ipq5018_pinctrl_of_match[] = { 756 { .compatible = "qcom,ipq5018-tlmm", }, 757 { } 758 }; 759 MODULE_DEVICE_TABLE(of, ipq5018_pinctrl_of_match); 760 761 static struct platform_driver ipq5018_pinctrl_driver = { 762 .driver = { 763 .name = "ipq5018-tlmm", 764 .of_match_table = ipq5018_pinctrl_of_match, 765 }, 766 .probe = ipq5018_pinctrl_probe, 767 .remove = msm_pinctrl_remove, 768 }; 769 770 static int __init ipq5018_pinctrl_init(void) 771 { 772 return platform_driver_register(&ipq5018_pinctrl_driver); 773 } 774 arch_initcall(ipq5018_pinctrl_init); 775 776 static void __exit ipq5018_pinctrl_exit(void) 777 { 778 platform_driver_unregister(&ipq5018_pinctrl_driver); 779 } 780 module_exit(ipq5018_pinctrl_exit); 781 782 MODULE_DESCRIPTION("Qualcomm Technologies Inc ipq5018 pinctrl driver"); 783 MODULE_LICENSE("GPL"); 784