1 /* 2 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 #include <linux/pinctrl/pinctrl.h> 18 19 #include "pinctrl-msm.h" 20 21 static const struct pinctrl_pin_desc ipq4019_pins[] = { 22 PINCTRL_PIN(0, "GPIO_0"), 23 PINCTRL_PIN(1, "GPIO_1"), 24 PINCTRL_PIN(2, "GPIO_2"), 25 PINCTRL_PIN(3, "GPIO_3"), 26 PINCTRL_PIN(4, "GPIO_4"), 27 PINCTRL_PIN(5, "GPIO_5"), 28 PINCTRL_PIN(6, "GPIO_6"), 29 PINCTRL_PIN(7, "GPIO_7"), 30 PINCTRL_PIN(8, "GPIO_8"), 31 PINCTRL_PIN(9, "GPIO_9"), 32 PINCTRL_PIN(10, "GPIO_10"), 33 PINCTRL_PIN(11, "GPIO_11"), 34 PINCTRL_PIN(12, "GPIO_12"), 35 PINCTRL_PIN(13, "GPIO_13"), 36 PINCTRL_PIN(14, "GPIO_14"), 37 PINCTRL_PIN(15, "GPIO_15"), 38 PINCTRL_PIN(16, "GPIO_16"), 39 PINCTRL_PIN(17, "GPIO_17"), 40 PINCTRL_PIN(18, "GPIO_18"), 41 PINCTRL_PIN(19, "GPIO_19"), 42 PINCTRL_PIN(20, "GPIO_20"), 43 PINCTRL_PIN(21, "GPIO_21"), 44 PINCTRL_PIN(22, "GPIO_22"), 45 PINCTRL_PIN(23, "GPIO_23"), 46 PINCTRL_PIN(24, "GPIO_24"), 47 PINCTRL_PIN(25, "GPIO_25"), 48 PINCTRL_PIN(26, "GPIO_26"), 49 PINCTRL_PIN(27, "GPIO_27"), 50 PINCTRL_PIN(28, "GPIO_28"), 51 PINCTRL_PIN(29, "GPIO_29"), 52 PINCTRL_PIN(30, "GPIO_30"), 53 PINCTRL_PIN(31, "GPIO_31"), 54 PINCTRL_PIN(32, "GPIO_32"), 55 PINCTRL_PIN(33, "GPIO_33"), 56 PINCTRL_PIN(34, "GPIO_34"), 57 PINCTRL_PIN(35, "GPIO_35"), 58 PINCTRL_PIN(36, "GPIO_36"), 59 PINCTRL_PIN(37, "GPIO_37"), 60 PINCTRL_PIN(38, "GPIO_38"), 61 PINCTRL_PIN(39, "GPIO_39"), 62 PINCTRL_PIN(40, "GPIO_40"), 63 PINCTRL_PIN(41, "GPIO_41"), 64 PINCTRL_PIN(42, "GPIO_42"), 65 PINCTRL_PIN(43, "GPIO_43"), 66 PINCTRL_PIN(44, "GPIO_44"), 67 PINCTRL_PIN(45, "GPIO_45"), 68 PINCTRL_PIN(46, "GPIO_46"), 69 PINCTRL_PIN(47, "GPIO_47"), 70 PINCTRL_PIN(48, "GPIO_48"), 71 PINCTRL_PIN(49, "GPIO_49"), 72 PINCTRL_PIN(50, "GPIO_50"), 73 PINCTRL_PIN(51, "GPIO_51"), 74 PINCTRL_PIN(52, "GPIO_52"), 75 PINCTRL_PIN(53, "GPIO_53"), 76 PINCTRL_PIN(54, "GPIO_54"), 77 PINCTRL_PIN(55, "GPIO_55"), 78 PINCTRL_PIN(56, "GPIO_56"), 79 PINCTRL_PIN(57, "GPIO_57"), 80 PINCTRL_PIN(58, "GPIO_58"), 81 PINCTRL_PIN(59, "GPIO_59"), 82 PINCTRL_PIN(60, "GPIO_60"), 83 PINCTRL_PIN(61, "GPIO_61"), 84 PINCTRL_PIN(62, "GPIO_62"), 85 PINCTRL_PIN(63, "GPIO_63"), 86 PINCTRL_PIN(64, "GPIO_64"), 87 PINCTRL_PIN(65, "GPIO_65"), 88 PINCTRL_PIN(66, "GPIO_66"), 89 PINCTRL_PIN(67, "GPIO_67"), 90 PINCTRL_PIN(68, "GPIO_68"), 91 PINCTRL_PIN(69, "GPIO_69"), 92 PINCTRL_PIN(70, "GPIO_70"), 93 PINCTRL_PIN(71, "GPIO_71"), 94 PINCTRL_PIN(72, "GPIO_72"), 95 PINCTRL_PIN(73, "GPIO_73"), 96 PINCTRL_PIN(74, "GPIO_74"), 97 PINCTRL_PIN(75, "GPIO_75"), 98 PINCTRL_PIN(76, "GPIO_76"), 99 PINCTRL_PIN(77, "GPIO_77"), 100 PINCTRL_PIN(78, "GPIO_78"), 101 PINCTRL_PIN(79, "GPIO_79"), 102 PINCTRL_PIN(80, "GPIO_80"), 103 PINCTRL_PIN(81, "GPIO_81"), 104 PINCTRL_PIN(82, "GPIO_82"), 105 PINCTRL_PIN(83, "GPIO_83"), 106 PINCTRL_PIN(84, "GPIO_84"), 107 PINCTRL_PIN(85, "GPIO_85"), 108 PINCTRL_PIN(86, "GPIO_86"), 109 PINCTRL_PIN(87, "GPIO_87"), 110 PINCTRL_PIN(88, "GPIO_88"), 111 PINCTRL_PIN(89, "GPIO_89"), 112 PINCTRL_PIN(90, "GPIO_90"), 113 PINCTRL_PIN(91, "GPIO_91"), 114 PINCTRL_PIN(92, "GPIO_92"), 115 PINCTRL_PIN(93, "GPIO_93"), 116 PINCTRL_PIN(94, "GPIO_94"), 117 PINCTRL_PIN(95, "GPIO_95"), 118 PINCTRL_PIN(96, "GPIO_96"), 119 PINCTRL_PIN(97, "GPIO_97"), 120 PINCTRL_PIN(98, "GPIO_98"), 121 PINCTRL_PIN(99, "GPIO_99"), 122 }; 123 124 #define DECLARE_QCA_GPIO_PINS(pin) \ 125 static const unsigned int gpio##pin##_pins[] = { pin } 126 DECLARE_QCA_GPIO_PINS(0); 127 DECLARE_QCA_GPIO_PINS(1); 128 DECLARE_QCA_GPIO_PINS(2); 129 DECLARE_QCA_GPIO_PINS(3); 130 DECLARE_QCA_GPIO_PINS(4); 131 DECLARE_QCA_GPIO_PINS(5); 132 DECLARE_QCA_GPIO_PINS(6); 133 DECLARE_QCA_GPIO_PINS(7); 134 DECLARE_QCA_GPIO_PINS(8); 135 DECLARE_QCA_GPIO_PINS(9); 136 DECLARE_QCA_GPIO_PINS(10); 137 DECLARE_QCA_GPIO_PINS(11); 138 DECLARE_QCA_GPIO_PINS(12); 139 DECLARE_QCA_GPIO_PINS(13); 140 DECLARE_QCA_GPIO_PINS(14); 141 DECLARE_QCA_GPIO_PINS(15); 142 DECLARE_QCA_GPIO_PINS(16); 143 DECLARE_QCA_GPIO_PINS(17); 144 DECLARE_QCA_GPIO_PINS(18); 145 DECLARE_QCA_GPIO_PINS(19); 146 DECLARE_QCA_GPIO_PINS(20); 147 DECLARE_QCA_GPIO_PINS(21); 148 DECLARE_QCA_GPIO_PINS(22); 149 DECLARE_QCA_GPIO_PINS(23); 150 DECLARE_QCA_GPIO_PINS(24); 151 DECLARE_QCA_GPIO_PINS(25); 152 DECLARE_QCA_GPIO_PINS(26); 153 DECLARE_QCA_GPIO_PINS(27); 154 DECLARE_QCA_GPIO_PINS(28); 155 DECLARE_QCA_GPIO_PINS(29); 156 DECLARE_QCA_GPIO_PINS(30); 157 DECLARE_QCA_GPIO_PINS(31); 158 DECLARE_QCA_GPIO_PINS(32); 159 DECLARE_QCA_GPIO_PINS(33); 160 DECLARE_QCA_GPIO_PINS(34); 161 DECLARE_QCA_GPIO_PINS(35); 162 DECLARE_QCA_GPIO_PINS(36); 163 DECLARE_QCA_GPIO_PINS(37); 164 DECLARE_QCA_GPIO_PINS(38); 165 DECLARE_QCA_GPIO_PINS(39); 166 DECLARE_QCA_GPIO_PINS(40); 167 DECLARE_QCA_GPIO_PINS(41); 168 DECLARE_QCA_GPIO_PINS(42); 169 DECLARE_QCA_GPIO_PINS(43); 170 DECLARE_QCA_GPIO_PINS(44); 171 DECLARE_QCA_GPIO_PINS(45); 172 DECLARE_QCA_GPIO_PINS(46); 173 DECLARE_QCA_GPIO_PINS(47); 174 DECLARE_QCA_GPIO_PINS(48); 175 DECLARE_QCA_GPIO_PINS(49); 176 DECLARE_QCA_GPIO_PINS(50); 177 DECLARE_QCA_GPIO_PINS(51); 178 DECLARE_QCA_GPIO_PINS(52); 179 DECLARE_QCA_GPIO_PINS(53); 180 DECLARE_QCA_GPIO_PINS(54); 181 DECLARE_QCA_GPIO_PINS(55); 182 DECLARE_QCA_GPIO_PINS(56); 183 DECLARE_QCA_GPIO_PINS(57); 184 DECLARE_QCA_GPIO_PINS(58); 185 DECLARE_QCA_GPIO_PINS(59); 186 DECLARE_QCA_GPIO_PINS(60); 187 DECLARE_QCA_GPIO_PINS(61); 188 DECLARE_QCA_GPIO_PINS(62); 189 DECLARE_QCA_GPIO_PINS(63); 190 DECLARE_QCA_GPIO_PINS(64); 191 DECLARE_QCA_GPIO_PINS(65); 192 DECLARE_QCA_GPIO_PINS(66); 193 DECLARE_QCA_GPIO_PINS(67); 194 DECLARE_QCA_GPIO_PINS(68); 195 DECLARE_QCA_GPIO_PINS(69); 196 DECLARE_QCA_GPIO_PINS(70); 197 DECLARE_QCA_GPIO_PINS(71); 198 DECLARE_QCA_GPIO_PINS(72); 199 DECLARE_QCA_GPIO_PINS(73); 200 DECLARE_QCA_GPIO_PINS(74); 201 DECLARE_QCA_GPIO_PINS(75); 202 DECLARE_QCA_GPIO_PINS(76); 203 DECLARE_QCA_GPIO_PINS(77); 204 DECLARE_QCA_GPIO_PINS(78); 205 DECLARE_QCA_GPIO_PINS(79); 206 DECLARE_QCA_GPIO_PINS(80); 207 DECLARE_QCA_GPIO_PINS(81); 208 DECLARE_QCA_GPIO_PINS(82); 209 DECLARE_QCA_GPIO_PINS(83); 210 DECLARE_QCA_GPIO_PINS(84); 211 DECLARE_QCA_GPIO_PINS(85); 212 DECLARE_QCA_GPIO_PINS(86); 213 DECLARE_QCA_GPIO_PINS(87); 214 DECLARE_QCA_GPIO_PINS(88); 215 DECLARE_QCA_GPIO_PINS(89); 216 DECLARE_QCA_GPIO_PINS(90); 217 DECLARE_QCA_GPIO_PINS(91); 218 DECLARE_QCA_GPIO_PINS(92); 219 DECLARE_QCA_GPIO_PINS(93); 220 DECLARE_QCA_GPIO_PINS(94); 221 DECLARE_QCA_GPIO_PINS(95); 222 DECLARE_QCA_GPIO_PINS(96); 223 DECLARE_QCA_GPIO_PINS(97); 224 DECLARE_QCA_GPIO_PINS(98); 225 DECLARE_QCA_GPIO_PINS(99); 226 227 #define FUNCTION(fname) \ 228 [qca_mux_##fname] = { \ 229 .name = #fname, \ 230 .groups = fname##_groups, \ 231 .ngroups = ARRAY_SIZE(fname##_groups), \ 232 } 233 234 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \ 235 { \ 236 .name = "gpio" #id, \ 237 .pins = gpio##id##_pins, \ 238 .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \ 239 .funcs = (int[]){ \ 240 qca_mux_gpio, /* gpio mode */ \ 241 qca_mux_##f1, \ 242 qca_mux_##f2, \ 243 qca_mux_##f3, \ 244 qca_mux_##f4, \ 245 qca_mux_##f5, \ 246 qca_mux_##f6, \ 247 qca_mux_##f7, \ 248 qca_mux_##f8, \ 249 qca_mux_##f9, \ 250 qca_mux_##f10, \ 251 qca_mux_##f11, \ 252 qca_mux_##f12, \ 253 qca_mux_##f13, \ 254 qca_mux_##f14 \ 255 }, \ 256 .nfuncs = 15, \ 257 .ctl_reg = 0x0 + 0x1000 * id, \ 258 .io_reg = 0x4 + 0x1000 * id, \ 259 .intr_cfg_reg = 0x8 + 0x1000 * id, \ 260 .intr_status_reg = 0xc + 0x1000 * id, \ 261 .intr_target_reg = 0x8 + 0x1000 * id, \ 262 .mux_bit = 2, \ 263 .pull_bit = 0, \ 264 .drv_bit = 6, \ 265 .oe_bit = 9, \ 266 .in_bit = 0, \ 267 .out_bit = 1, \ 268 .intr_enable_bit = 0, \ 269 .intr_status_bit = 0, \ 270 .intr_target_bit = 5, \ 271 .intr_raw_status_bit = 4, \ 272 .intr_polarity_bit = 1, \ 273 .intr_detection_bit = 2, \ 274 .intr_detection_width = 2, \ 275 } 276 277 278 enum ipq4019_functions { 279 qca_mux_gpio, 280 qca_mux_aud_pin, 281 qca_mux_audio_pwm, 282 qca_mux_blsp_i2c0, 283 qca_mux_blsp_i2c1, 284 qca_mux_blsp_spi0, 285 qca_mux_blsp_spi1, 286 qca_mux_blsp_uart0, 287 qca_mux_blsp_uart1, 288 qca_mux_chip_rst, 289 qca_mux_i2s_rx, 290 qca_mux_i2s_spdif_in, 291 qca_mux_i2s_spdif_out, 292 qca_mux_i2s_td, 293 qca_mux_i2s_tx, 294 qca_mux_jtag, 295 qca_mux_led0, 296 qca_mux_led1, 297 qca_mux_led2, 298 qca_mux_led3, 299 qca_mux_led4, 300 qca_mux_led5, 301 qca_mux_led6, 302 qca_mux_led7, 303 qca_mux_led8, 304 qca_mux_led9, 305 qca_mux_led10, 306 qca_mux_led11, 307 qca_mux_mdc, 308 qca_mux_mdio, 309 qca_mux_pcie, 310 qca_mux_pmu, 311 qca_mux_prng_rosc, 312 qca_mux_qpic, 313 qca_mux_rgmii, 314 qca_mux_rmii, 315 qca_mux_sdio, 316 qca_mux_smart0, 317 qca_mux_smart1, 318 qca_mux_smart2, 319 qca_mux_smart3, 320 qca_mux_tm, 321 qca_mux_wifi0, 322 qca_mux_wifi1, 323 qca_mux_NA, 324 }; 325 326 static const char * const gpio_groups[] = { 327 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 328 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 329 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 330 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 331 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 332 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 333 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 334 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 335 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 336 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 337 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 338 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 339 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 340 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 341 "gpio99", 342 }; 343 static const char * const aud_pin_groups[] = { 344 "gpio48", "gpio49", "gpio50", "gpio51", 345 }; 346 static const char * const audio_pwm_groups[] = { 347 "gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66", 348 "gpio67", 349 }; 350 static const char * const blsp_i2c0_groups[] = { 351 "gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59", 352 }; 353 static const char * const blsp_i2c1_groups[] = { 354 "gpio12", "gpio13", "gpio34", "gpio35", 355 }; 356 static const char * const blsp_spi0_groups[] = { 357 "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55", 358 "gpio56", "gpio57", 359 }; 360 static const char * const blsp_spi1_groups[] = { 361 "gpio44", "gpio45", "gpio46", "gpio47", 362 }; 363 static const char * const blsp_uart0_groups[] = { 364 "gpio16", "gpio17", "gpio60", "gpio61", 365 }; 366 static const char * const blsp_uart1_groups[] = { 367 "gpio8", "gpio9", "gpio10", "gpio11", 368 }; 369 static const char * const chip_rst_groups[] = { 370 "gpio62", 371 }; 372 static const char * const i2s_rx_groups[] = { 373 "gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23", 374 "gpio58", "gpio60", "gpio61", "gpio63", 375 }; 376 static const char * const i2s_spdif_in_groups[] = { 377 "gpio34", "gpio59", "gpio63", 378 }; 379 static const char * const i2s_spdif_out_groups[] = { 380 "gpio35", "gpio62", "gpio63", 381 }; 382 static const char * const i2s_td_groups[] = { 383 "gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63", 384 }; 385 static const char * const i2s_tx_groups[] = { 386 "gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60", 387 "gpio61", 388 }; 389 static const char * const jtag_groups[] = { 390 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 391 }; 392 static const char * const led0_groups[] = { 393 "gpio16", "gpio36", "gpio60", 394 }; 395 static const char * const led1_groups[] = { 396 "gpio17", "gpio37", "gpio61", 397 }; 398 static const char * const led2_groups[] = { 399 "gpio36", "gpio38", "gpio58", 400 }; 401 static const char * const led3_groups[] = { 402 "gpio39", 403 }; 404 static const char * const led4_groups[] = { 405 "gpio40", 406 }; 407 static const char * const led5_groups[] = { 408 "gpio44", 409 }; 410 static const char * const led6_groups[] = { 411 "gpio45", 412 }; 413 static const char * const led7_groups[] = { 414 "gpio46", 415 }; 416 static const char * const led8_groups[] = { 417 "gpio47", 418 }; 419 static const char * const led9_groups[] = { 420 "gpio48", 421 }; 422 static const char * const led10_groups[] = { 423 "gpio49", 424 }; 425 static const char * const led11_groups[] = { 426 "gpio50", 427 }; 428 static const char * const mdc_groups[] = { 429 "gpio7", "gpio52", 430 }; 431 static const char * const mdio_groups[] = { 432 "gpio6", "gpio53", 433 }; 434 static const char * const pcie_groups[] = { 435 "gpio39", "gpio52", 436 }; 437 static const char * const pmu_groups[] = { 438 "gpio54", "gpio55", 439 }; 440 static const char * const prng_rosc_groups[] = { 441 "gpio53", 442 }; 443 static const char * const qpic_groups[] = { 444 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", 445 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 446 "gpio66", "gpio67", "gpio68", "gpio69", 447 }; 448 static const char * const rgmii_groups[] = { 449 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 450 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 451 }; 452 static const char * const rmii_groups[] = { 453 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 454 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 455 "gpio50", "gpio51", 456 }; 457 static const char * const sdio_groups[] = { 458 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 459 "gpio30", "gpio31", "gpio32", 460 }; 461 static const char * const smart0_groups[] = { 462 "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46", 463 "gpio47", 464 }; 465 static const char * const smart1_groups[] = { 466 "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60", 467 "gpio61", 468 }; 469 static const char * const smart2_groups[] = { 470 "gpio40", "gpio41", "gpio48", "gpio49", 471 }; 472 static const char * const smart3_groups[] = { 473 "gpio58", "gpio59", "gpio60", "gpio61", 474 }; 475 static const char * const tm_groups[] = { 476 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", 477 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 478 }; 479 static const char * const wifi0_groups[] = { 480 "gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52", 481 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98", 482 }; 483 static const char * const wifi1_groups[] = { 484 "gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52", 485 "gpio53", "gpio56", "gpio57", "gpio58", "gpio98", 486 }; 487 488 static const struct msm_function ipq4019_functions[] = { 489 FUNCTION(aud_pin), 490 FUNCTION(audio_pwm), 491 FUNCTION(blsp_i2c0), 492 FUNCTION(blsp_i2c1), 493 FUNCTION(blsp_spi0), 494 FUNCTION(blsp_spi1), 495 FUNCTION(blsp_uart0), 496 FUNCTION(blsp_uart1), 497 FUNCTION(chip_rst), 498 FUNCTION(gpio), 499 FUNCTION(i2s_rx), 500 FUNCTION(i2s_spdif_in), 501 FUNCTION(i2s_spdif_out), 502 FUNCTION(i2s_td), 503 FUNCTION(i2s_tx), 504 FUNCTION(jtag), 505 FUNCTION(led0), 506 FUNCTION(led1), 507 FUNCTION(led2), 508 FUNCTION(led3), 509 FUNCTION(led4), 510 FUNCTION(led5), 511 FUNCTION(led6), 512 FUNCTION(led7), 513 FUNCTION(led8), 514 FUNCTION(led9), 515 FUNCTION(led10), 516 FUNCTION(led11), 517 FUNCTION(mdc), 518 FUNCTION(mdio), 519 FUNCTION(pcie), 520 FUNCTION(pmu), 521 FUNCTION(prng_rosc), 522 FUNCTION(qpic), 523 FUNCTION(rgmii), 524 FUNCTION(rmii), 525 FUNCTION(sdio), 526 FUNCTION(smart0), 527 FUNCTION(smart1), 528 FUNCTION(smart2), 529 FUNCTION(smart3), 530 FUNCTION(tm), 531 FUNCTION(wifi0), 532 FUNCTION(wifi1), 533 }; 534 535 static const struct msm_pingroup ipq4019_groups[] = { 536 PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 537 NA, NA), 538 PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 539 NA, NA), 540 PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 541 NA, NA), 542 PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 543 PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 544 PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 545 NA), 546 PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 547 PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 548 PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, 549 NA, NA, NA), 550 PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, 551 NA, NA, NA), 552 PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, 553 NA, NA, NA), 554 PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, 555 NA, NA, NA), 556 PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, 557 NA, NA, NA), 558 PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, 559 NA, NA, NA), 560 PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 561 NA), 562 PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 563 NA), 564 PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA, 565 NA, NA, NA), 566 PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA, 567 NA, NA, NA), 568 PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 569 PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 570 PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 571 NA, NA), 572 PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 573 NA, NA), 574 PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 575 NA), 576 PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 577 NA, NA), 578 PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 579 NA, NA), 580 PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 581 NA, NA), 582 PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, 583 NA, NA), 584 PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 585 NA, NA), 586 PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 587 NA, NA), 588 PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, 589 NA, NA), 590 PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 591 NA, NA, NA), 592 PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 593 NA, NA, NA), 594 PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, 595 NA, NA, NA), 596 PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 597 NA, NA), 598 PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA, 599 NA, NA, NA, NA), 600 PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA, 601 NA, NA, NA, NA), 602 PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 603 NA), 604 PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA, 605 NA, NA), 606 PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 607 NA), 608 PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 609 NA), 610 PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA, 611 NA, NA, NA), 612 PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA, 613 NA, NA, NA), 614 PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 615 NA), 616 PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 617 NA), 618 PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA, 619 NA, NA, NA), 620 PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA, 621 NA, NA, NA, NA, NA), 622 PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA, 623 NA, NA, NA), 624 PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA, 625 NA, NA, NA), 626 PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA, 627 NA, NA, NA), 628 PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA, 629 NA, NA, NA), 630 PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA, 631 NA, NA, NA, NA), 632 PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, 633 NA, NA, NA), 634 PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA, 635 NA, NA, NA), 636 PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA, 637 NA, NA, NA, NA, NA), 638 PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, 639 NA, NA, NA), 640 PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, 641 NA, NA, NA), 642 PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA, 643 NA, NA, NA, NA), 644 PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA, 645 NA, NA, NA, NA), 646 PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm, 647 wifi0, wifi1, NA, NA, NA), 648 PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA, 649 NA, NA, tm, NA, NA, NA), 650 PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx, 651 NA, NA, NA, NA, NA, tm, NA), 652 PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx, 653 NA, NA, NA, NA, NA, tm, NA), 654 PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA, 655 tm, NA, NA, NA), 656 PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out, 657 i2s_spdif_in, NA, NA, NA, NA, tm, NA), 658 PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 659 NA, NA), 660 PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 661 NA, NA), 662 PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 663 NA, NA), 664 PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 665 NA, NA), 666 PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 667 PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 668 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 669 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 670 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 671 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 672 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 673 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 674 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 675 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 676 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 677 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 678 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 679 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 680 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 681 PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 682 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 683 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 684 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 685 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 686 PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 687 PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 688 PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 689 PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 690 PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 691 PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 692 PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 693 PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 694 PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 695 PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 696 PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, 697 NA), 698 PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 699 }; 700 701 static const struct msm_pinctrl_soc_data ipq4019_pinctrl = { 702 .pins = ipq4019_pins, 703 .npins = ARRAY_SIZE(ipq4019_pins), 704 .functions = ipq4019_functions, 705 .nfunctions = ARRAY_SIZE(ipq4019_functions), 706 .groups = ipq4019_groups, 707 .ngroups = ARRAY_SIZE(ipq4019_groups), 708 .ngpios = 100, 709 }; 710 711 static int ipq4019_pinctrl_probe(struct platform_device *pdev) 712 { 713 return msm_pinctrl_probe(pdev, &ipq4019_pinctrl); 714 } 715 716 static const struct of_device_id ipq4019_pinctrl_of_match[] = { 717 { .compatible = "qcom,ipq4019-pinctrl", }, 718 { }, 719 }; 720 721 static struct platform_driver ipq4019_pinctrl_driver = { 722 .driver = { 723 .name = "ipq4019-pinctrl", 724 .of_match_table = ipq4019_pinctrl_of_match, 725 }, 726 .probe = ipq4019_pinctrl_probe, 727 .remove = msm_pinctrl_remove, 728 }; 729 730 static int __init ipq4019_pinctrl_init(void) 731 { 732 return platform_driver_register(&ipq4019_pinctrl_driver); 733 } 734 arch_initcall(ipq4019_pinctrl_init); 735 736 static void __exit ipq4019_pinctrl_exit(void) 737 { 738 platform_driver_unregister(&ipq4019_pinctrl_driver); 739 } 740 module_exit(ipq4019_pinctrl_exit); 741 742 MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver"); 743 MODULE_LICENSE("GPL v2"); 744 MODULE_DEVICE_TABLE(of, ipq4019_pinctrl_of_match); 745