1b886d83cSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
21951384cSRobert Jarzmik /*
31951384cSRobert Jarzmik * Marvell PXA25x family pin control
41951384cSRobert Jarzmik *
51951384cSRobert Jarzmik * Copyright (C) 2016 Robert Jarzmik
61951384cSRobert Jarzmik */
71951384cSRobert Jarzmik #include <linux/module.h>
81951384cSRobert Jarzmik #include <linux/platform_device.h>
91951384cSRobert Jarzmik #include <linux/of.h>
101951384cSRobert Jarzmik #include <linux/pinctrl/pinctrl.h>
111951384cSRobert Jarzmik
121951384cSRobert Jarzmik #include "pinctrl-pxa2xx.h"
131951384cSRobert Jarzmik
141951384cSRobert Jarzmik static const struct pxa_desc_pin pxa25x_pins[] = {
151951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
161951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(1),
171951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "GP_RST")),
181951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(2)),
191951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(3)),
201951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(4)),
211951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(5)),
221951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(6),
231951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCLK")),
241951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(7),
251951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "48_MHz")),
261951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(8),
271951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCS0")),
281951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
291951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCS1")),
301951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
311951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "RTCCLK")),
321951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
331951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "3_6_MHz")),
341951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
351951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "32_kHz")),
361951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
371951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "MBGNT")),
381951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
391951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "MBREQ")),
401951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(15),
411951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nCS_1")),
421951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
431951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "PWM0")),
441951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
451951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "PWM1")),
461951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
471951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "RDY")),
481951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
491951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "DREQ[1]")),
501951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
511951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "DREQ[0]")),
521951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(21)),
531951384cSRobert Jarzmik PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(22)),
541951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
551951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "SCLK")),
561951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
571951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "SFRM")),
581951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),
591951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "TXD")),
601951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(26),
611951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "RXD")),
621951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(27),
631951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "EXTCLK")),
641951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(28),
651951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "BITCLK"),
661951384cSRobert Jarzmik PXA_FUNCTION(0, 2, "BITCLK"),
671951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "BITCLK")),
681951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(29),
691951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "SDATA_IN0"),
701951384cSRobert Jarzmik PXA_FUNCTION(0, 2, "SDATA_IN")),
711951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(30),
721951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "SDATA_OUT"),
731951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "SDATA_OUT")),
741951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(31),
751951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "SYNC"),
761951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "SYNC")),
771951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(32),
781951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "SDATA_IN1"),
791951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "SYSCLK")),
801951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(33),
811951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nCS[5]")),
821951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(34),
831951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "FFRXD"),
841951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "MMCCS0")),
851951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(35),
861951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "CTS")),
871951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(36),
881951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "DCD")),
891951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(37),
901951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "DSR")),
911951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(38),
921951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "RI")),
931951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(39),
941951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCC1"),
951951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "FFTXD")),
961951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(40),
971951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "DTR")),
981951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(41),
991951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "RTS")),
1001951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(42),
1011951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "BTRXD"),
1021951384cSRobert Jarzmik PXA_FUNCTION(0, 3, "HWRXD")),
1031951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(43),
1041951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "BTTXD"),
1051951384cSRobert Jarzmik PXA_FUNCTION(1, 3, "HWTXD")),
1061951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(44),
1071951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "BTCTS"),
1081951384cSRobert Jarzmik PXA_FUNCTION(0, 3, "HWCTS")),
1091951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(45),
1101951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "BTRTS"),
1111951384cSRobert Jarzmik PXA_FUNCTION(1, 3, "HWRTS")),
1121951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(46),
1131951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "ICP_RXD"),
1141951384cSRobert Jarzmik PXA_FUNCTION(0, 2, "RXD")),
1151951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(47),
1161951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "TXD"),
1171951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "ICP_TXD")),
1181951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(48),
1191951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "HWTXD"),
1201951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPOE")),
1211951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(49),
1221951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "HWRXD"),
1231951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPWE")),
1241951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(50),
1251951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "HWCTS"),
1261951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPIOR")),
1271951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(51),
1281951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "HWRTS"),
1291951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPIOW")),
1301951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(52),
1311951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPCE[1]")),
1321951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(53),
1331951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCLK"),
1341951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPCE[2]")),
1351951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(54),
1361951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCLK"),
1371951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPSKTSEL")),
1381951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(55),
1391951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nPREG")),
1401951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(56),
1411951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "nPWAIT")),
1421951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(57),
1431951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "nIOIS16")),
1441951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(58),
1451951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<0>")),
1461951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(59),
1471951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<1>")),
1481951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(60),
1491951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<2>")),
1501951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(61),
1511951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<3>")),
1521951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(62),
1531951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<4>")),
1541951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(63),
1551951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<5>")),
1561951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(64),
1571951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<6>")),
1581951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(65),
1591951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<7>")),
1601951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(66),
1611951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "MBREQ"),
1621951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<8>")),
1631951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(67),
1641951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCS0"),
1651951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<9>")),
1661951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(68),
1671951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCS1"),
1681951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<10>")),
1691951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(69),
1701951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MMCCLK"),
1711951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<11>")),
1721951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(70),
1731951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "RTCCLK"),
1741951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<12>")),
1751951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(71),
1761951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "3_6_MHz"),
1771951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<13>")),
1781951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(72),
1791951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "32_kHz"),
1801951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<14>")),
1811951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(73),
1821951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "MBGNT"),
1831951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LDD<15>")),
1841951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(74),
1851951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LCD_FCLK")),
1861951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(75),
1871951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LCD_LCLK")),
1881951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(76),
1891951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LCD_PCLK")),
1901951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(77),
1911951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "LCD_ACBIAS")),
1921951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(78),
1931951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nCS<2>")),
1941951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(79),
1951951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nCS<3>")),
1961951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(80),
1971951384cSRobert Jarzmik PXA_FUNCTION(1, 2, "nCS<4>")),
1981951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(81),
1991951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "NSSPSCLK"),
2001951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "NSSPSCLK")),
2011951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(82),
2021951384cSRobert Jarzmik PXA_FUNCTION(0, 1, "NSSPSFRM"),
2031951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "NSSPSFRM")),
2041951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(83),
2051951384cSRobert Jarzmik PXA_FUNCTION(0, 2, "NSSPRXD"),
2061951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "NSSPTXD")),
2071951384cSRobert Jarzmik PXA_GPIO_PIN(PXA_PINCTRL_PIN(84),
2081951384cSRobert Jarzmik PXA_FUNCTION(0, 2, "NSSPRXD"),
2091951384cSRobert Jarzmik PXA_FUNCTION(1, 1, "NSSPTXD")),
2101951384cSRobert Jarzmik };
2111951384cSRobert Jarzmik
pxa25x_pinctrl_probe(struct platform_device * pdev)2121951384cSRobert Jarzmik static int pxa25x_pinctrl_probe(struct platform_device *pdev)
2131951384cSRobert Jarzmik {
2141951384cSRobert Jarzmik int ret, i;
2151951384cSRobert Jarzmik void __iomem *base_af[8];
2161951384cSRobert Jarzmik void __iomem *base_dir[4];
2171951384cSRobert Jarzmik void __iomem *base_sleep[4];
2181951384cSRobert Jarzmik
2194b024225SYueHaibing base_af[0] = devm_platform_ioremap_resource(pdev, 0);
2201951384cSRobert Jarzmik if (IS_ERR(base_af[0]))
2211951384cSRobert Jarzmik return PTR_ERR(base_af[0]);
2221951384cSRobert Jarzmik
2234b024225SYueHaibing base_dir[0] = devm_platform_ioremap_resource(pdev, 1);
2241951384cSRobert Jarzmik if (IS_ERR(base_dir[0]))
2251951384cSRobert Jarzmik return PTR_ERR(base_dir[0]);
2261951384cSRobert Jarzmik
2274b024225SYueHaibing base_dir[3] = devm_platform_ioremap_resource(pdev, 2);
2281951384cSRobert Jarzmik if (IS_ERR(base_dir[3]))
2291951384cSRobert Jarzmik return PTR_ERR(base_dir[3]);
2301951384cSRobert Jarzmik
2314b024225SYueHaibing base_sleep[0] = devm_platform_ioremap_resource(pdev, 3);
2321951384cSRobert Jarzmik if (IS_ERR(base_sleep[0]))
2331951384cSRobert Jarzmik return PTR_ERR(base_sleep[0]);
2341951384cSRobert Jarzmik
2351951384cSRobert Jarzmik for (i = 0; i < ARRAY_SIZE(base_af); i++)
2361951384cSRobert Jarzmik base_af[i] = base_af[0] + sizeof(base_af[0]) * i;
2371951384cSRobert Jarzmik for (i = 0; i < 3; i++)
2381951384cSRobert Jarzmik base_dir[i] = base_dir[0] + sizeof(base_dir[0]) * i;
2391951384cSRobert Jarzmik for (i = 0; i < ARRAY_SIZE(base_sleep); i++)
2401951384cSRobert Jarzmik base_sleep[i] = base_sleep[0] + sizeof(base_af[0]) * i;
2411951384cSRobert Jarzmik
2421951384cSRobert Jarzmik ret = pxa2xx_pinctrl_init(pdev, pxa25x_pins, ARRAY_SIZE(pxa25x_pins),
2431951384cSRobert Jarzmik base_af, base_dir, base_sleep);
2441951384cSRobert Jarzmik return ret;
2451951384cSRobert Jarzmik }
2461951384cSRobert Jarzmik
2471951384cSRobert Jarzmik static const struct of_device_id pxa25x_pinctrl_match[] = {
2481951384cSRobert Jarzmik { .compatible = "marvell,pxa25x-pinctrl", },
2491951384cSRobert Jarzmik {}
2501951384cSRobert Jarzmik };
2511951384cSRobert Jarzmik MODULE_DEVICE_TABLE(of, pxa25x_pinctrl_match);
2521951384cSRobert Jarzmik
2531951384cSRobert Jarzmik static struct platform_driver pxa25x_pinctrl_driver = {
2541951384cSRobert Jarzmik .probe = pxa25x_pinctrl_probe,
2551951384cSRobert Jarzmik .driver = {
2561951384cSRobert Jarzmik .name = "pxa25x-pinctrl",
2571951384cSRobert Jarzmik .of_match_table = pxa25x_pinctrl_match,
2581951384cSRobert Jarzmik },
2591951384cSRobert Jarzmik };
2601951384cSRobert Jarzmik module_platform_driver(pxa25x_pinctrl_driver);
2611951384cSRobert Jarzmik
2621951384cSRobert Jarzmik MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
2631951384cSRobert Jarzmik MODULE_DESCRIPTION("Marvell PXA25x pinctrl driver");
2641951384cSRobert Jarzmik MODULE_LICENSE("GPL v2");
265