1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP pin controller 4 * 5 * Copyright (C) 2020, 2021 Xilinx, Inc. 6 * 7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> 8 * Rajan Vaja <rajan.vaja@xilinx.com> 9 */ 10 11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 12 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/of_address.h> 16 #include <linux/platform_device.h> 17 18 #include <linux/firmware/xlnx-zynqmp.h> 19 20 #include <linux/pinctrl/pinconf-generic.h> 21 #include <linux/pinctrl/pinconf.h> 22 #include <linux/pinctrl/pinctrl.h> 23 #include <linux/pinctrl/pinmux.h> 24 25 #include "core.h" 26 #include "pinctrl-utils.h" 27 28 #define ZYNQMP_PIN_PREFIX "MIO" 29 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16 30 #define MAX_FUNC_NAME_LEN 16 31 #define MAX_GROUP_PIN 50 32 #define MAX_PIN_GROUPS 50 33 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS" 34 #define NUM_GROUPS_PER_RESP 6 35 36 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 37 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 38 #define NA_GROUP 0xFFFF 39 #define RESERVED_GROUP 0xFFFE 40 41 #define DRIVE_STRENGTH_2MA 2 42 #define DRIVE_STRENGTH_4MA 4 43 #define DRIVE_STRENGTH_8MA 8 44 #define DRIVE_STRENGTH_12MA 12 45 46 /** 47 * struct zynqmp_pmux_function - a pinmux function 48 * @name: Name of the pin mux function 49 * @groups: List of pin groups for this function 50 * @ngroups: Number of entries in @groups 51 * 52 * This structure holds information about pin control function 53 * and function group names supporting that function. 54 */ 55 struct zynqmp_pmux_function { 56 char name[MAX_FUNC_NAME_LEN]; 57 const char * const *groups; 58 unsigned int ngroups; 59 }; 60 61 /** 62 * struct zynqmp_pinctrl - driver data 63 * @pctrl: Pin control device 64 * @groups: Pin groups 65 * @ngroups: Number of @groups 66 * @funcs: Pin mux functions 67 * @nfuncs: Number of @funcs 68 * 69 * This struct is stored as driver data and used to retrieve 70 * information regarding pin control functions, groups and 71 * group pins. 72 */ 73 struct zynqmp_pinctrl { 74 struct pinctrl_dev *pctrl; 75 const struct zynqmp_pctrl_group *groups; 76 unsigned int ngroups; 77 const struct zynqmp_pmux_function *funcs; 78 unsigned int nfuncs; 79 }; 80 81 /** 82 * struct zynqmp_pctrl_group - Pin control group info 83 * @name: Group name 84 * @pins: Group pin numbers 85 * @npins: Number of pins in the group 86 */ 87 struct zynqmp_pctrl_group { 88 const char *name; 89 unsigned int pins[MAX_GROUP_PIN]; 90 unsigned int npins; 91 }; 92 93 static struct pinctrl_desc zynqmp_desc; 94 95 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 96 { 97 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 98 99 return pctrl->ngroups; 100 } 101 102 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, 103 unsigned int selector) 104 { 105 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 106 107 return pctrl->groups[selector].name; 108 } 109 110 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 111 unsigned int selector, 112 const unsigned int **pins, 113 unsigned int *npins) 114 { 115 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 116 117 *pins = pctrl->groups[selector].pins; 118 *npins = pctrl->groups[selector].npins; 119 120 return 0; 121 } 122 123 static const struct pinctrl_ops zynqmp_pctrl_ops = { 124 .get_groups_count = zynqmp_pctrl_get_groups_count, 125 .get_group_name = zynqmp_pctrl_get_group_name, 126 .get_group_pins = zynqmp_pctrl_get_group_pins, 127 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 128 .dt_free_map = pinctrl_utils_free_map, 129 }; 130 131 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, 132 unsigned int pin) 133 { 134 int ret; 135 136 ret = zynqmp_pm_pinctrl_request(pin); 137 if (ret) { 138 dev_err(pctldev->dev, "request failed for pin %u\n", pin); 139 return ret; 140 } 141 142 return 0; 143 } 144 145 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) 146 { 147 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 148 149 return pctrl->nfuncs; 150 } 151 152 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, 153 unsigned int selector) 154 { 155 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 156 157 return pctrl->funcs[selector].name; 158 } 159 160 /** 161 * zynqmp_pmux_get_function_groups() - Get groups for the function 162 * @pctldev: Pincontrol device pointer. 163 * @selector: Function ID 164 * @groups: Group names. 165 * @num_groups: Number of function groups. 166 * 167 * Get function's group count and group names. 168 * 169 * Return: 0 170 */ 171 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, 172 unsigned int selector, 173 const char * const **groups, 174 unsigned * const num_groups) 175 { 176 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 177 178 *groups = pctrl->funcs[selector].groups; 179 *num_groups = pctrl->funcs[selector].ngroups; 180 181 return 0; 182 } 183 184 /** 185 * zynqmp_pinmux_set_mux() - Set requested function for the group 186 * @pctldev: Pincontrol device pointer. 187 * @function: Function ID. 188 * @group: Group ID. 189 * 190 * Loop through all pins of the group and call firmware API 191 * to set requested function for all pins in the group. 192 * 193 * Return: 0 on success else error code. 194 */ 195 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, 196 unsigned int function, 197 unsigned int group) 198 { 199 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 200 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group]; 201 int ret, i; 202 203 for (i = 0; i < pgrp->npins; i++) { 204 unsigned int pin = pgrp->pins[i]; 205 206 ret = zynqmp_pm_pinctrl_set_function(pin, function); 207 if (ret) { 208 dev_err(pctldev->dev, "set mux failed for pin %u\n", 209 pin); 210 return ret; 211 } 212 } 213 214 return 0; 215 } 216 217 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, 218 unsigned int pin) 219 { 220 int ret; 221 222 ret = zynqmp_pm_pinctrl_release(pin); 223 if (ret) { 224 dev_err(pctldev->dev, "free pin failed for pin %u\n", 225 pin); 226 return ret; 227 } 228 229 return 0; 230 } 231 232 static const struct pinmux_ops zynqmp_pinmux_ops = { 233 .request = zynqmp_pinmux_request_pin, 234 .get_functions_count = zynqmp_pmux_get_functions_count, 235 .get_function_name = zynqmp_pmux_get_function_name, 236 .get_function_groups = zynqmp_pmux_get_function_groups, 237 .set_mux = zynqmp_pinmux_set_mux, 238 .free = zynqmp_pinmux_release_pin, 239 }; 240 241 /** 242 * zynqmp_pinconf_cfg_get() - get config value for the pin 243 * @pctldev: Pin control device pointer. 244 * @pin: Pin number. 245 * @config: Value of config param. 246 * 247 * Get value of the requested configuration parameter for the 248 * given pin. 249 * 250 * Return: 0 on success else error code. 251 */ 252 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, 253 unsigned int pin, 254 unsigned long *config) 255 { 256 unsigned int arg, param = pinconf_to_config_param(*config); 257 int ret; 258 259 switch (param) { 260 case PIN_CONFIG_SLEW_RATE: 261 param = PM_PINCTRL_CONFIG_SLEW_RATE; 262 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 263 break; 264 case PIN_CONFIG_BIAS_PULL_UP: 265 param = PM_PINCTRL_CONFIG_PULL_CTRL; 266 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 267 if (arg != PM_PINCTRL_BIAS_PULL_UP) 268 return -EINVAL; 269 270 arg = 1; 271 break; 272 case PIN_CONFIG_BIAS_PULL_DOWN: 273 param = PM_PINCTRL_CONFIG_PULL_CTRL; 274 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 275 if (arg != PM_PINCTRL_BIAS_PULL_DOWN) 276 return -EINVAL; 277 278 arg = 1; 279 break; 280 case PIN_CONFIG_BIAS_DISABLE: 281 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 282 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 283 if (arg != PM_PINCTRL_BIAS_DISABLE) 284 return -EINVAL; 285 286 arg = 1; 287 break; 288 case PIN_CONFIG_POWER_SOURCE: 289 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 290 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 291 break; 292 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 293 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 294 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 295 break; 296 case PIN_CONFIG_DRIVE_STRENGTH: 297 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 298 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 299 switch (arg) { 300 case PM_PINCTRL_DRIVE_STRENGTH_2MA: 301 arg = DRIVE_STRENGTH_2MA; 302 break; 303 case PM_PINCTRL_DRIVE_STRENGTH_4MA: 304 arg = DRIVE_STRENGTH_4MA; 305 break; 306 case PM_PINCTRL_DRIVE_STRENGTH_8MA: 307 arg = DRIVE_STRENGTH_8MA; 308 break; 309 case PM_PINCTRL_DRIVE_STRENGTH_12MA: 310 arg = DRIVE_STRENGTH_12MA; 311 break; 312 default: 313 /* Invalid drive strength */ 314 dev_warn(pctldev->dev, 315 "Invalid drive strength for pin %d\n", 316 pin); 317 return -EINVAL; 318 } 319 break; 320 default: 321 ret = -ENOTSUPP; 322 break; 323 } 324 325 if (ret) 326 return ret; 327 328 param = pinconf_to_config_param(*config); 329 *config = pinconf_to_config_packed(param, arg); 330 331 return 0; 332 } 333 334 /** 335 * zynqmp_pinconf_cfg_set() - Set requested config for the pin 336 * @pctldev: Pincontrol device pointer. 337 * @pin: Pin number. 338 * @configs: Configuration to set. 339 * @num_configs: Number of configurations. 340 * 341 * Loop through all configurations and call firmware API 342 * to set requested configurations for the pin. 343 * 344 * Return: 0 on success else error code. 345 */ 346 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, 347 unsigned int pin, unsigned long *configs, 348 unsigned int num_configs) 349 { 350 int i, ret; 351 352 for (i = 0; i < num_configs; i++) { 353 unsigned int param = pinconf_to_config_param(configs[i]); 354 unsigned int arg = pinconf_to_config_argument(configs[i]); 355 unsigned int value; 356 357 switch (param) { 358 case PIN_CONFIG_SLEW_RATE: 359 param = PM_PINCTRL_CONFIG_SLEW_RATE; 360 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 361 break; 362 case PIN_CONFIG_BIAS_PULL_UP: 363 param = PM_PINCTRL_CONFIG_PULL_CTRL; 364 arg = PM_PINCTRL_BIAS_PULL_UP; 365 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 366 break; 367 case PIN_CONFIG_BIAS_PULL_DOWN: 368 param = PM_PINCTRL_CONFIG_PULL_CTRL; 369 arg = PM_PINCTRL_BIAS_PULL_DOWN; 370 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 371 break; 372 case PIN_CONFIG_BIAS_DISABLE: 373 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 374 arg = PM_PINCTRL_BIAS_DISABLE; 375 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 376 break; 377 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 378 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 379 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 380 break; 381 case PIN_CONFIG_DRIVE_STRENGTH: 382 switch (arg) { 383 case DRIVE_STRENGTH_2MA: 384 value = PM_PINCTRL_DRIVE_STRENGTH_2MA; 385 break; 386 case DRIVE_STRENGTH_4MA: 387 value = PM_PINCTRL_DRIVE_STRENGTH_4MA; 388 break; 389 case DRIVE_STRENGTH_8MA: 390 value = PM_PINCTRL_DRIVE_STRENGTH_8MA; 391 break; 392 case DRIVE_STRENGTH_12MA: 393 value = PM_PINCTRL_DRIVE_STRENGTH_12MA; 394 break; 395 default: 396 /* Invalid drive strength */ 397 dev_warn(pctldev->dev, 398 "Invalid drive strength for pin %d\n", 399 pin); 400 return -EINVAL; 401 } 402 403 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 404 ret = zynqmp_pm_pinctrl_set_config(pin, param, value); 405 break; 406 case PIN_CONFIG_POWER_SOURCE: 407 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 408 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); 409 410 if (arg != value) 411 dev_warn(pctldev->dev, 412 "Invalid IO Standard requested for pin %d\n", 413 pin); 414 415 break; 416 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 417 param = PM_PINCTRL_CONFIG_TRI_STATE; 418 arg = PM_PINCTRL_TRI_STATE_ENABLE; 419 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 420 break; 421 case PIN_CONFIG_MODE_LOW_POWER: 422 /* 423 * These cases are mentioned in dts but configurable 424 * registers are unknown. So falling through to ignore 425 * boot time warnings as of now. 426 */ 427 ret = 0; 428 break; 429 case PIN_CONFIG_OUTPUT_ENABLE: 430 param = PM_PINCTRL_CONFIG_TRI_STATE; 431 arg = PM_PINCTRL_TRI_STATE_DISABLE; 432 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 433 break; 434 default: 435 dev_warn(pctldev->dev, 436 "unsupported configuration parameter '%u'\n", 437 param); 438 ret = -ENOTSUPP; 439 break; 440 } 441 442 param = pinconf_to_config_param(configs[i]); 443 arg = pinconf_to_config_argument(configs[i]); 444 if (ret) 445 dev_warn(pctldev->dev, 446 "failed to set: pin %u param %u value %u\n", 447 pin, param, arg); 448 } 449 450 return 0; 451 } 452 453 /** 454 * zynqmp_pinconf_group_set() - Set requested config for the group 455 * @pctldev: Pincontrol device pointer. 456 * @selector: Group ID. 457 * @configs: Configuration to set. 458 * @num_configs: Number of configurations. 459 * 460 * Call function to set configs for each pin in the group. 461 * 462 * Return: 0 on success else error code. 463 */ 464 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, 465 unsigned int selector, 466 unsigned long *configs, 467 unsigned int num_configs) 468 { 469 int i, ret; 470 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 471 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector]; 472 473 for (i = 0; i < pgrp->npins; i++) { 474 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs, 475 num_configs); 476 if (ret) 477 return ret; 478 } 479 480 return 0; 481 } 482 483 static const struct pinconf_ops zynqmp_pinconf_ops = { 484 .is_generic = true, 485 .pin_config_get = zynqmp_pinconf_cfg_get, 486 .pin_config_set = zynqmp_pinconf_cfg_set, 487 .pin_config_group_set = zynqmp_pinconf_group_set, 488 }; 489 490 static struct pinctrl_desc zynqmp_desc = { 491 .name = "zynqmp_pinctrl", 492 .owner = THIS_MODULE, 493 .pctlops = &zynqmp_pctrl_ops, 494 .pmxops = &zynqmp_pinmux_ops, 495 .confops = &zynqmp_pinconf_ops, 496 }; 497 498 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) 499 { 500 struct zynqmp_pm_query_data qdata = {0}; 501 u32 payload[PAYLOAD_ARG_CNT]; 502 int ret; 503 504 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS; 505 qdata.arg1 = fid; 506 qdata.arg2 = index; 507 508 ret = zynqmp_pm_query_data(qdata, payload); 509 if (ret) 510 return ret; 511 512 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); 513 514 return 0; 515 } 516 517 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) 518 { 519 struct zynqmp_pm_query_data qdata = {0}; 520 u32 payload[PAYLOAD_ARG_CNT]; 521 int ret; 522 523 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS; 524 qdata.arg1 = fid; 525 526 ret = zynqmp_pm_query_data(qdata, payload); 527 if (ret) 528 return ret; 529 530 *ngroups = payload[1]; 531 532 return 0; 533 } 534 535 /** 536 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data 537 * @dev: Device pointer. 538 * @fid: Function ID. 539 * @func: Function data. 540 * @groups: Groups data. 541 * 542 * Query firmware to get group IDs for each function. Firmware returns 543 * group IDs. Based on the group index for the function, group names in 544 * the function are stored. For example, the first group in "eth0" function 545 * is named as "eth0_0" and the second group as "eth0_1" and so on. 546 * 547 * Based on the group ID received from the firmware, function stores name of 548 * the group for that group ID. For example, if "eth0" first group ID 549 * is x, groups[x] name will be stored as "eth0_0". 550 * 551 * Once done for each function, each function would have its group names 552 * and each group would also have their names. 553 * 554 * Return: 0 on success else error code. 555 */ 556 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, 557 struct zynqmp_pmux_function *func, 558 struct zynqmp_pctrl_group *groups) 559 { 560 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 561 const char **fgroups; 562 int ret, index, i; 563 564 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL); 565 if (!fgroups) 566 return -ENOMEM; 567 568 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { 569 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); 570 if (ret) 571 return ret; 572 573 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 574 if (resp[i] == NA_GROUP) 575 goto done; 576 577 if (resp[i] == RESERVED_GROUP) 578 continue; 579 580 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL, 581 "%s_%d_grp", 582 func->name, 583 index + i); 584 if (!fgroups[index + i]) 585 return -ENOMEM; 586 587 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL, 588 "%s_%d_grp", 589 func->name, 590 index + i); 591 if (!groups[resp[i]].name) 592 return -ENOMEM; 593 } 594 } 595 done: 596 func->groups = fgroups; 597 598 return 0; 599 } 600 601 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) 602 { 603 struct zynqmp_pm_query_data qdata = {0}; 604 u32 payload[PAYLOAD_ARG_CNT]; 605 606 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME; 607 qdata.arg1 = fid; 608 609 /* 610 * Name of the function is maximum 16 bytes and cannot 611 * accommodate the return value in SMC buffers, hence ignoring 612 * the return value for this specific qid. 613 */ 614 zynqmp_pm_query_data(qdata, payload); 615 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN); 616 } 617 618 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) 619 { 620 struct zynqmp_pm_query_data qdata = {0}; 621 u32 payload[PAYLOAD_ARG_CNT]; 622 int ret; 623 624 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS; 625 626 ret = zynqmp_pm_query_data(qdata, payload); 627 if (ret) 628 return ret; 629 630 *nfuncs = payload[1]; 631 632 return 0; 633 } 634 635 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) 636 { 637 struct zynqmp_pm_query_data qdata = {0}; 638 u32 payload[PAYLOAD_ARG_CNT]; 639 int ret; 640 641 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS; 642 qdata.arg1 = pin; 643 qdata.arg2 = index; 644 645 ret = zynqmp_pm_query_data(qdata, payload); 646 if (ret) 647 return ret; 648 649 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); 650 651 return 0; 652 } 653 654 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, 655 unsigned int pin) 656 { 657 group->pins[group->npins++] = pin; 658 } 659 660 /** 661 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups 662 * @dev: Device pointer. 663 * @groups: Groups data. 664 * @pin: Pin number. 665 * 666 * Query firmware to get groups available for the given pin. 667 * Based on the firmware response(group IDs for the pin), add 668 * pin number to the respective group's pin array. 669 * 670 * Once all pins are queries, each group would have its number 671 * of pins and pin numbers data. 672 * 673 * Return: 0 on success else error code. 674 */ 675 static int zynqmp_pinctrl_create_pin_groups(struct device *dev, 676 struct zynqmp_pctrl_group *groups, 677 unsigned int pin) 678 { 679 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 680 int ret, i, index = 0; 681 682 do { 683 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); 684 if (ret) 685 return ret; 686 687 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 688 if (resp[i] == NA_GROUP) 689 return ret; 690 691 if (resp[i] == RESERVED_GROUP) 692 continue; 693 694 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); 695 } 696 index += NUM_GROUPS_PER_RESP; 697 } while (index <= MAX_PIN_GROUPS); 698 699 return 0; 700 } 701 702 /** 703 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data 704 * @dev: Device pointer. 705 * @groups: Groups data. 706 * @ngroups: Number of groups. 707 * 708 * Prepare pin number and number of pins data for each pins. 709 * 710 * Return: 0 on success else error code. 711 */ 712 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, 713 struct zynqmp_pctrl_group *groups, 714 unsigned int ngroups) 715 { 716 unsigned int pin; 717 int ret; 718 719 for (pin = 0; pin < zynqmp_desc.npins; pin++) { 720 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin); 721 if (ret) 722 return ret; 723 } 724 725 return 0; 726 } 727 728 /** 729 * zynqmp_pinctrl_prepare_function_info() - prepare function info 730 * @dev: Device pointer. 731 * @pctrl: Pin control driver data. 732 * 733 * Query firmware for functions, groups and pin information and 734 * prepare pin control driver data. 735 * 736 * Query number of functions and number of function groups (number 737 * of groups in the given function) to allocate required memory buffers 738 * for functions and groups. Once buffers are allocated to store 739 * functions and groups data, query and store required information 740 * (number of groups and group names for each function, number of 741 * pins and pin numbers for each group). 742 * 743 * Return: 0 on success else error code. 744 */ 745 static int zynqmp_pinctrl_prepare_function_info(struct device *dev, 746 struct zynqmp_pinctrl *pctrl) 747 { 748 struct zynqmp_pmux_function *funcs; 749 struct zynqmp_pctrl_group *groups; 750 int ret, i; 751 752 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); 753 if (ret) 754 return ret; 755 756 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL); 757 if (!funcs) 758 return -ENOMEM; 759 760 for (i = 0; i < pctrl->nfuncs; i++) { 761 zynqmp_pinctrl_get_function_name(i, funcs[i].name); 762 763 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); 764 if (ret) 765 return ret; 766 767 pctrl->ngroups += funcs[i].ngroups; 768 } 769 770 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL); 771 if (!groups) 772 return -ENOMEM; 773 774 for (i = 0; i < pctrl->nfuncs; i++) { 775 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], 776 groups); 777 if (ret) 778 return ret; 779 } 780 781 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); 782 if (ret) 783 return ret; 784 785 pctrl->funcs = funcs; 786 pctrl->groups = groups; 787 788 return 0; 789 } 790 791 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) 792 { 793 struct zynqmp_pm_query_data qdata = {0}; 794 u32 payload[PAYLOAD_ARG_CNT]; 795 int ret; 796 797 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS; 798 799 ret = zynqmp_pm_query_data(qdata, payload); 800 if (ret) 801 return ret; 802 803 *npins = payload[1]; 804 805 return 0; 806 } 807 808 /** 809 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info 810 * @dev: Device pointer. 811 * @zynqmp_pins: Pin information. 812 * @npins: Number of pins. 813 * 814 * Query number of pins information from firmware and prepare pin 815 * description containing pin number and pin name. 816 * 817 * Return: 0 on success else error code. 818 */ 819 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, 820 const struct pinctrl_pin_desc 821 **zynqmp_pins, 822 unsigned int *npins) 823 { 824 struct pinctrl_pin_desc *pins, *pin; 825 int ret; 826 int i; 827 828 ret = zynqmp_pinctrl_get_num_pins(npins); 829 if (ret) 830 return ret; 831 832 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL); 833 if (!pins) 834 return -ENOMEM; 835 836 for (i = 0; i < *npins; i++) { 837 pin = &pins[i]; 838 pin->number = i; 839 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 840 ZYNQMP_PIN_PREFIX, i); 841 if (!pin->name) 842 return -ENOMEM; 843 } 844 845 *zynqmp_pins = pins; 846 847 return 0; 848 } 849 850 static int zynqmp_pinctrl_probe(struct platform_device *pdev) 851 { 852 struct zynqmp_pinctrl *pctrl; 853 int ret; 854 855 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 856 if (!pctrl) 857 return -ENOMEM; 858 859 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, 860 &zynqmp_desc.pins, 861 &zynqmp_desc.npins); 862 if (ret) { 863 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret); 864 return ret; 865 } 866 867 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); 868 if (ret) { 869 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret); 870 return ret; 871 } 872 873 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl); 874 if (IS_ERR(pctrl->pctrl)) 875 return PTR_ERR(pctrl->pctrl); 876 877 platform_set_drvdata(pdev, pctrl); 878 879 return ret; 880 } 881 882 static const struct of_device_id zynqmp_pinctrl_of_match[] = { 883 { .compatible = "xlnx,zynqmp-pinctrl" }, 884 { } 885 }; 886 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); 887 888 static struct platform_driver zynqmp_pinctrl_driver = { 889 .driver = { 890 .name = "zynqmp-pinctrl", 891 .of_match_table = zynqmp_pinctrl_of_match, 892 }, 893 .probe = zynqmp_pinctrl_probe, 894 }; 895 module_platform_driver(zynqmp_pinctrl_driver); 896 897 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); 898 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver"); 899 MODULE_LICENSE("GPL v2"); 900