1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP pin controller 4 * 5 * Copyright (C) 2020, 2021 Xilinx, Inc. 6 * 7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> 8 * Rajan Vaja <rajan.vaja@xilinx.com> 9 */ 10 11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 12 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/of_address.h> 16 #include <linux/platform_device.h> 17 #include <linux/firmware/xlnx-zynqmp.h> 18 19 #include <linux/pinctrl/pinmux.h> 20 #include <linux/pinctrl/pinconf-generic.h> 21 22 #include "core.h" 23 #include "pinctrl-utils.h" 24 25 #define ZYNQMP_PIN_PREFIX "MIO" 26 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16 27 #define MAX_FUNC_NAME_LEN 16 28 #define MAX_GROUP_PIN 50 29 #define MAX_PIN_GROUPS 50 30 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS" 31 #define NUM_GROUPS_PER_RESP 6 32 33 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 34 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 35 #define NA_GROUP 0xFFFF 36 #define RESERVED_GROUP 0xFFFE 37 38 #define DRIVE_STRENGTH_2MA 2 39 #define DRIVE_STRENGTH_4MA 4 40 #define DRIVE_STRENGTH_8MA 8 41 #define DRIVE_STRENGTH_12MA 12 42 43 /** 44 * struct zynqmp_pmux_function - a pinmux function 45 * @name: Name of the pin mux function 46 * @groups: List of pin groups for this function 47 * @ngroups: Number of entries in @groups 48 * @node: Firmware node matching with the function 49 * 50 * This structure holds information about pin control function 51 * and function group names supporting that function. 52 */ 53 struct zynqmp_pmux_function { 54 char name[MAX_FUNC_NAME_LEN]; 55 const char * const *groups; 56 unsigned int ngroups; 57 }; 58 59 /** 60 * struct zynqmp_pinctrl - driver data 61 * @pctrl: Pin control device 62 * @groups: Pin groups 63 * @ngroups: Number of @groups 64 * @funcs: Pin mux functions 65 * @nfuncs: Number of @funcs 66 * 67 * This struct is stored as driver data and used to retrieve 68 * information regarding pin control functions, groups and 69 * group pins. 70 */ 71 struct zynqmp_pinctrl { 72 struct pinctrl_dev *pctrl; 73 const struct zynqmp_pctrl_group *groups; 74 unsigned int ngroups; 75 const struct zynqmp_pmux_function *funcs; 76 unsigned int nfuncs; 77 }; 78 79 /** 80 * struct zynqmp_pctrl_group - Pin control group info 81 * @name: Group name 82 * @pins: Group pin numbers 83 * @npins: Number of pins in the group 84 */ 85 struct zynqmp_pctrl_group { 86 const char *name; 87 unsigned int pins[MAX_GROUP_PIN]; 88 unsigned int npins; 89 }; 90 91 static struct pinctrl_desc zynqmp_desc; 92 93 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 94 { 95 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 96 97 return pctrl->ngroups; 98 } 99 100 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, 101 unsigned int selector) 102 { 103 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 104 105 return pctrl->groups[selector].name; 106 } 107 108 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 109 unsigned int selector, 110 const unsigned int **pins, 111 unsigned int *npins) 112 { 113 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 114 115 *pins = pctrl->groups[selector].pins; 116 *npins = pctrl->groups[selector].npins; 117 118 return 0; 119 } 120 121 static const struct pinctrl_ops zynqmp_pctrl_ops = { 122 .get_groups_count = zynqmp_pctrl_get_groups_count, 123 .get_group_name = zynqmp_pctrl_get_group_name, 124 .get_group_pins = zynqmp_pctrl_get_group_pins, 125 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 126 .dt_free_map = pinctrl_utils_free_map, 127 }; 128 129 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, 130 unsigned int pin) 131 { 132 int ret; 133 134 ret = zynqmp_pm_pinctrl_request(pin); 135 if (ret) { 136 dev_err(pctldev->dev, "request failed for pin %u\n", pin); 137 return ret; 138 } 139 140 return 0; 141 } 142 143 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) 144 { 145 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 146 147 return pctrl->nfuncs; 148 } 149 150 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, 151 unsigned int selector) 152 { 153 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 154 155 return pctrl->funcs[selector].name; 156 } 157 158 /** 159 * zynqmp_pmux_get_function_groups() - Get groups for the function 160 * @pctldev: Pincontrol device pointer. 161 * @selector: Function ID 162 * @groups: Group names. 163 * @num_groups: Number of function groups. 164 * 165 * Get function's group count and group names. 166 * 167 * Return: 0 168 */ 169 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, 170 unsigned int selector, 171 const char * const **groups, 172 unsigned * const num_groups) 173 { 174 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 175 176 *groups = pctrl->funcs[selector].groups; 177 *num_groups = pctrl->funcs[selector].ngroups; 178 179 return 0; 180 } 181 182 /** 183 * zynqmp_pinmux_set_mux() - Set requested function for the group 184 * @pctldev: Pincontrol device pointer. 185 * @function: Function ID. 186 * @group: Group ID. 187 * 188 * Loop through all pins of the group and call firmware API 189 * to set requested function for all pins in the group. 190 * 191 * Return: 0 on success else error code. 192 */ 193 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, 194 unsigned int function, 195 unsigned int group) 196 { 197 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 198 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group]; 199 int ret, i; 200 201 for (i = 0; i < pgrp->npins; i++) { 202 unsigned int pin = pgrp->pins[i]; 203 204 ret = zynqmp_pm_pinctrl_set_function(pin, function); 205 if (ret) { 206 dev_err(pctldev->dev, "set mux failed for pin %u\n", 207 pin); 208 return ret; 209 } 210 } 211 212 return 0; 213 } 214 215 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, 216 unsigned int pin) 217 { 218 int ret; 219 220 ret = zynqmp_pm_pinctrl_release(pin); 221 if (ret) { 222 dev_err(pctldev->dev, "free pin failed for pin %u\n", 223 pin); 224 return ret; 225 } 226 227 return 0; 228 } 229 230 static const struct pinmux_ops zynqmp_pinmux_ops = { 231 .request = zynqmp_pinmux_request_pin, 232 .get_functions_count = zynqmp_pmux_get_functions_count, 233 .get_function_name = zynqmp_pmux_get_function_name, 234 .get_function_groups = zynqmp_pmux_get_function_groups, 235 .set_mux = zynqmp_pinmux_set_mux, 236 .free = zynqmp_pinmux_release_pin, 237 }; 238 239 /** 240 * zynqmp_pinconf_cfg_get() - get config value for the pin 241 * @pctldev: Pin control device pointer. 242 * @pin: Pin number. 243 * @config: Value of config param. 244 * 245 * Get value of the requested configuration parameter for the 246 * given pin. 247 * 248 * Return: 0 on success else error code. 249 */ 250 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, 251 unsigned int pin, 252 unsigned long *config) 253 { 254 unsigned int arg, param = pinconf_to_config_param(*config); 255 int ret; 256 257 switch (param) { 258 case PIN_CONFIG_SLEW_RATE: 259 param = PM_PINCTRL_CONFIG_SLEW_RATE; 260 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 261 break; 262 case PIN_CONFIG_BIAS_PULL_UP: 263 param = PM_PINCTRL_CONFIG_PULL_CTRL; 264 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 265 if (arg != PM_PINCTRL_BIAS_PULL_UP) 266 return -EINVAL; 267 268 arg = 1; 269 break; 270 case PIN_CONFIG_BIAS_PULL_DOWN: 271 param = PM_PINCTRL_CONFIG_PULL_CTRL; 272 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 273 if (arg != PM_PINCTRL_BIAS_PULL_DOWN) 274 return -EINVAL; 275 276 arg = 1; 277 break; 278 case PIN_CONFIG_BIAS_DISABLE: 279 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 280 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 281 if (arg != PM_PINCTRL_BIAS_DISABLE) 282 return -EINVAL; 283 284 arg = 1; 285 break; 286 case PIN_CONFIG_POWER_SOURCE: 287 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 288 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 289 break; 290 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 291 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 292 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 293 break; 294 case PIN_CONFIG_DRIVE_STRENGTH: 295 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 296 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 297 switch (arg) { 298 case PM_PINCTRL_DRIVE_STRENGTH_2MA: 299 arg = DRIVE_STRENGTH_2MA; 300 break; 301 case PM_PINCTRL_DRIVE_STRENGTH_4MA: 302 arg = DRIVE_STRENGTH_4MA; 303 break; 304 case PM_PINCTRL_DRIVE_STRENGTH_8MA: 305 arg = DRIVE_STRENGTH_8MA; 306 break; 307 case PM_PINCTRL_DRIVE_STRENGTH_12MA: 308 arg = DRIVE_STRENGTH_12MA; 309 break; 310 default: 311 /* Invalid drive strength */ 312 dev_warn(pctldev->dev, 313 "Invalid drive strength for pin %d\n", 314 pin); 315 return -EINVAL; 316 } 317 break; 318 default: 319 ret = -ENOTSUPP; 320 break; 321 } 322 323 if (ret) 324 return ret; 325 326 param = pinconf_to_config_param(*config); 327 *config = pinconf_to_config_packed(param, arg); 328 329 return 0; 330 } 331 332 /** 333 * zynqmp_pinconf_cfg_set() - Set requested config for the pin 334 * @pctldev: Pincontrol device pointer. 335 * @pin: Pin number. 336 * @configs: Configuration to set. 337 * @num_configs: Number of configurations. 338 * 339 * Loop through all configurations and call firmware API 340 * to set requested configurations for the pin. 341 * 342 * Return: 0 on success else error code. 343 */ 344 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, 345 unsigned int pin, unsigned long *configs, 346 unsigned int num_configs) 347 { 348 int i, ret; 349 350 for (i = 0; i < num_configs; i++) { 351 unsigned int param = pinconf_to_config_param(configs[i]); 352 unsigned int arg = pinconf_to_config_argument(configs[i]); 353 unsigned int value; 354 355 switch (param) { 356 case PIN_CONFIG_SLEW_RATE: 357 param = PM_PINCTRL_CONFIG_SLEW_RATE; 358 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 359 break; 360 case PIN_CONFIG_BIAS_PULL_UP: 361 param = PM_PINCTRL_CONFIG_PULL_CTRL; 362 arg = PM_PINCTRL_BIAS_PULL_UP; 363 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 364 break; 365 case PIN_CONFIG_BIAS_PULL_DOWN: 366 param = PM_PINCTRL_CONFIG_PULL_CTRL; 367 arg = PM_PINCTRL_BIAS_PULL_DOWN; 368 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 369 break; 370 case PIN_CONFIG_BIAS_DISABLE: 371 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 372 arg = PM_PINCTRL_BIAS_DISABLE; 373 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 374 break; 375 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 376 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 377 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 378 break; 379 case PIN_CONFIG_DRIVE_STRENGTH: 380 switch (arg) { 381 case DRIVE_STRENGTH_2MA: 382 value = PM_PINCTRL_DRIVE_STRENGTH_2MA; 383 break; 384 case DRIVE_STRENGTH_4MA: 385 value = PM_PINCTRL_DRIVE_STRENGTH_4MA; 386 break; 387 case DRIVE_STRENGTH_8MA: 388 value = PM_PINCTRL_DRIVE_STRENGTH_8MA; 389 break; 390 case DRIVE_STRENGTH_12MA: 391 value = PM_PINCTRL_DRIVE_STRENGTH_12MA; 392 break; 393 default: 394 /* Invalid drive strength */ 395 dev_warn(pctldev->dev, 396 "Invalid drive strength for pin %d\n", 397 pin); 398 return -EINVAL; 399 } 400 401 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 402 ret = zynqmp_pm_pinctrl_set_config(pin, param, value); 403 break; 404 case PIN_CONFIG_POWER_SOURCE: 405 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 406 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); 407 408 if (arg != value) 409 dev_warn(pctldev->dev, 410 "Invalid IO Standard requested for pin %d\n", 411 pin); 412 413 break; 414 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 415 param = PM_PINCTRL_CONFIG_TRI_STATE; 416 arg = PM_PINCTRL_TRI_STATE_ENABLE; 417 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 418 break; 419 case PIN_CONFIG_MODE_LOW_POWER: 420 /* 421 * These cases are mentioned in dts but configurable 422 * registers are unknown. So falling through to ignore 423 * boot time warnings as of now. 424 */ 425 ret = 0; 426 break; 427 case PIN_CONFIG_OUTPUT_ENABLE: 428 param = PM_PINCTRL_CONFIG_TRI_STATE; 429 arg = PM_PINCTRL_TRI_STATE_DISABLE; 430 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 431 break; 432 default: 433 dev_warn(pctldev->dev, 434 "unsupported configuration parameter '%u'\n", 435 param); 436 ret = -ENOTSUPP; 437 break; 438 } 439 440 param = pinconf_to_config_param(configs[i]); 441 arg = pinconf_to_config_argument(configs[i]); 442 if (ret) 443 dev_warn(pctldev->dev, 444 "failed to set: pin %u param %u value %u\n", 445 pin, param, arg); 446 } 447 448 return 0; 449 } 450 451 /** 452 * zynqmp_pinconf_group_set() - Set requested config for the group 453 * @pctldev: Pincontrol device pointer. 454 * @selector: Group ID. 455 * @configs: Configuration to set. 456 * @num_configs: Number of configurations. 457 * 458 * Call function to set configs for each pin in the group. 459 * 460 * Return: 0 on success else error code. 461 */ 462 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, 463 unsigned int selector, 464 unsigned long *configs, 465 unsigned int num_configs) 466 { 467 int i, ret; 468 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 469 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector]; 470 471 for (i = 0; i < pgrp->npins; i++) { 472 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs, 473 num_configs); 474 if (ret) 475 return ret; 476 } 477 478 return 0; 479 } 480 481 static const struct pinconf_ops zynqmp_pinconf_ops = { 482 .is_generic = true, 483 .pin_config_get = zynqmp_pinconf_cfg_get, 484 .pin_config_set = zynqmp_pinconf_cfg_set, 485 .pin_config_group_set = zynqmp_pinconf_group_set, 486 }; 487 488 static struct pinctrl_desc zynqmp_desc = { 489 .name = "zynqmp_pinctrl", 490 .owner = THIS_MODULE, 491 .pctlops = &zynqmp_pctrl_ops, 492 .pmxops = &zynqmp_pinmux_ops, 493 .confops = &zynqmp_pinconf_ops, 494 }; 495 496 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) 497 { 498 struct zynqmp_pm_query_data qdata = {0}; 499 u32 payload[PAYLOAD_ARG_CNT]; 500 int ret; 501 502 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS; 503 qdata.arg1 = fid; 504 qdata.arg2 = index; 505 506 ret = zynqmp_pm_query_data(qdata, payload); 507 if (ret) 508 return ret; 509 510 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); 511 512 return 0; 513 } 514 515 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) 516 { 517 struct zynqmp_pm_query_data qdata = {0}; 518 u32 payload[PAYLOAD_ARG_CNT]; 519 int ret; 520 521 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS; 522 qdata.arg1 = fid; 523 524 ret = zynqmp_pm_query_data(qdata, payload); 525 if (ret) 526 return ret; 527 528 *ngroups = payload[1]; 529 530 return 0; 531 } 532 533 /** 534 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data 535 * @dev: Device pointer. 536 * @fid: Function ID. 537 * @func: Function data. 538 * @groups: Groups data. 539 * 540 * Query firmware to get group IDs for each function. Firmware returns 541 * group IDs. Based on the group index for the function, group names in 542 * the function are stored. For example, the first group in "eth0" function 543 * is named as "eth0_0" and the second group as "eth0_1" and so on. 544 * 545 * Based on the group ID received from the firmware, function stores name of 546 * the group for that group ID. For example, if "eth0" first group ID 547 * is x, groups[x] name will be stored as "eth0_0". 548 * 549 * Once done for each function, each function would have its group names 550 * and each group would also have their names. 551 * 552 * Return: 0 on success else error code. 553 */ 554 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, 555 struct zynqmp_pmux_function *func, 556 struct zynqmp_pctrl_group *groups) 557 { 558 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 559 const char **fgroups; 560 int ret, index, i; 561 562 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL); 563 if (!fgroups) 564 return -ENOMEM; 565 566 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { 567 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); 568 if (ret) 569 return ret; 570 571 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 572 if (resp[i] == NA_GROUP) 573 goto done; 574 575 if (resp[i] == RESERVED_GROUP) 576 continue; 577 578 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL, 579 "%s_%d_grp", 580 func->name, 581 index + i); 582 if (!fgroups[index + i]) 583 return -ENOMEM; 584 585 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL, 586 "%s_%d_grp", 587 func->name, 588 index + i); 589 if (!groups[resp[i]].name) 590 return -ENOMEM; 591 } 592 } 593 done: 594 func->groups = fgroups; 595 596 return 0; 597 } 598 599 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) 600 { 601 struct zynqmp_pm_query_data qdata = {0}; 602 u32 payload[PAYLOAD_ARG_CNT]; 603 604 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME; 605 qdata.arg1 = fid; 606 607 /* 608 * Name of the function is maximum 16 bytes and cannot 609 * accommodate the return value in SMC buffers, hence ignoring 610 * the return value for this specific qid. 611 */ 612 zynqmp_pm_query_data(qdata, payload); 613 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN); 614 } 615 616 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) 617 { 618 struct zynqmp_pm_query_data qdata = {0}; 619 u32 payload[PAYLOAD_ARG_CNT]; 620 int ret; 621 622 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS; 623 624 ret = zynqmp_pm_query_data(qdata, payload); 625 if (ret) 626 return ret; 627 628 *nfuncs = payload[1]; 629 630 return 0; 631 } 632 633 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) 634 { 635 struct zynqmp_pm_query_data qdata = {0}; 636 u32 payload[PAYLOAD_ARG_CNT]; 637 int ret; 638 639 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS; 640 qdata.arg1 = pin; 641 qdata.arg2 = index; 642 643 ret = zynqmp_pm_query_data(qdata, payload); 644 if (ret) 645 return ret; 646 647 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); 648 649 return 0; 650 } 651 652 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, 653 unsigned int pin) 654 { 655 group->pins[group->npins++] = pin; 656 } 657 658 /** 659 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups 660 * @dev: Device pointer. 661 * @groups: Groups data. 662 * @pin: Pin number. 663 * 664 * Query firmware to get groups available for the given pin. 665 * Based on the firmware response(group IDs for the pin), add 666 * pin number to the respective group's pin array. 667 * 668 * Once all pins are queries, each group would have its number 669 * of pins and pin numbers data. 670 * 671 * Return: 0 on success else error code. 672 */ 673 static int zynqmp_pinctrl_create_pin_groups(struct device *dev, 674 struct zynqmp_pctrl_group *groups, 675 unsigned int pin) 676 { 677 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 678 int ret, i, index = 0; 679 680 do { 681 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); 682 if (ret) 683 return ret; 684 685 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 686 if (resp[i] == NA_GROUP) 687 return ret; 688 689 if (resp[i] == RESERVED_GROUP) 690 continue; 691 692 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); 693 } 694 index += NUM_GROUPS_PER_RESP; 695 } while (index <= MAX_PIN_GROUPS); 696 697 return 0; 698 } 699 700 /** 701 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data 702 * @dev: Device pointer. 703 * @groups: Groups data. 704 * @ngroups: Number of groups. 705 * 706 * Prepare pin number and number of pins data for each pins. 707 * 708 * Return: 0 on success else error code. 709 */ 710 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, 711 struct zynqmp_pctrl_group *groups, 712 unsigned int ngroups) 713 { 714 unsigned int pin; 715 int ret; 716 717 for (pin = 0; pin < zynqmp_desc.npins; pin++) { 718 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin); 719 if (ret) 720 return ret; 721 } 722 723 return 0; 724 } 725 726 /** 727 * zynqmp_pinctrl_prepare_function_info() - prepare function info 728 * @dev: Device pointer. 729 * @pctrl: Pin control driver data. 730 * 731 * Query firmware for functions, groups and pin information and 732 * prepare pin control driver data. 733 * 734 * Query number of functions and number of function groups (number 735 * of groups in the given function) to allocate required memory buffers 736 * for functions and groups. Once buffers are allocated to store 737 * functions and groups data, query and store required information 738 * (number of groups and group names for each function, number of 739 * pins and pin numbers for each group). 740 * 741 * Return: 0 on success else error code. 742 */ 743 static int zynqmp_pinctrl_prepare_function_info(struct device *dev, 744 struct zynqmp_pinctrl *pctrl) 745 { 746 struct zynqmp_pmux_function *funcs; 747 struct zynqmp_pctrl_group *groups; 748 int ret, i; 749 750 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); 751 if (ret) 752 return ret; 753 754 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL); 755 if (!funcs) 756 return -ENOMEM; 757 758 for (i = 0; i < pctrl->nfuncs; i++) { 759 zynqmp_pinctrl_get_function_name(i, funcs[i].name); 760 761 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); 762 if (ret) 763 return ret; 764 765 pctrl->ngroups += funcs[i].ngroups; 766 } 767 768 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL); 769 if (!groups) 770 return -ENOMEM; 771 772 for (i = 0; i < pctrl->nfuncs; i++) { 773 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], 774 groups); 775 if (ret) 776 return ret; 777 } 778 779 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); 780 if (ret) 781 return ret; 782 783 pctrl->funcs = funcs; 784 pctrl->groups = groups; 785 786 return 0; 787 } 788 789 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) 790 { 791 struct zynqmp_pm_query_data qdata = {0}; 792 u32 payload[PAYLOAD_ARG_CNT]; 793 int ret; 794 795 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS; 796 797 ret = zynqmp_pm_query_data(qdata, payload); 798 if (ret) 799 return ret; 800 801 *npins = payload[1]; 802 803 return 0; 804 } 805 806 /** 807 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info 808 * @dev: Device pointer. 809 * @zynqmp_pins: Pin information. 810 * @npins: Number of pins. 811 * 812 * Query number of pins information from firmware and prepare pin 813 * description containing pin number and pin name. 814 * 815 * Return: 0 on success else error code. 816 */ 817 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, 818 const struct pinctrl_pin_desc 819 **zynqmp_pins, 820 unsigned int *npins) 821 { 822 struct pinctrl_pin_desc *pins, *pin; 823 int ret; 824 int i; 825 826 ret = zynqmp_pinctrl_get_num_pins(npins); 827 if (ret) 828 return ret; 829 830 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL); 831 if (!pins) 832 return -ENOMEM; 833 834 for (i = 0; i < *npins; i++) { 835 pin = &pins[i]; 836 pin->number = i; 837 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 838 ZYNQMP_PIN_PREFIX, i); 839 if (!pin->name) 840 return -ENOMEM; 841 } 842 843 *zynqmp_pins = pins; 844 845 return 0; 846 } 847 848 static int zynqmp_pinctrl_probe(struct platform_device *pdev) 849 { 850 struct zynqmp_pinctrl *pctrl; 851 int ret; 852 853 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 854 if (!pctrl) 855 return -ENOMEM; 856 857 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, 858 &zynqmp_desc.pins, 859 &zynqmp_desc.npins); 860 if (ret) { 861 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret); 862 return ret; 863 } 864 865 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); 866 if (ret) { 867 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret); 868 return ret; 869 } 870 871 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl); 872 if (IS_ERR(pctrl->pctrl)) 873 return PTR_ERR(pctrl->pctrl); 874 875 platform_set_drvdata(pdev, pctrl); 876 877 return ret; 878 } 879 880 static const struct of_device_id zynqmp_pinctrl_of_match[] = { 881 { .compatible = "xlnx,zynqmp-pinctrl" }, 882 { } 883 }; 884 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); 885 886 static struct platform_driver zynqmp_pinctrl_driver = { 887 .driver = { 888 .name = "zynqmp-pinctrl", 889 .of_match_table = zynqmp_pinctrl_of_match, 890 }, 891 .probe = zynqmp_pinctrl_probe, 892 }; 893 module_platform_driver(zynqmp_pinctrl_driver); 894 895 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); 896 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver"); 897 MODULE_LICENSE("GPL v2"); 898