1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP pin controller 4 * 5 * Copyright (C) 2020 Xilinx, Inc. 6 * 7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> 8 * Rajan Vaja <rajan.vaja@xilinx.com> 9 */ 10 11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 12 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/of_address.h> 16 #include <linux/platform_device.h> 17 #include <linux/firmware/xlnx-zynqmp.h> 18 19 #include <linux/pinctrl/pinmux.h> 20 #include <linux/pinctrl/pinconf-generic.h> 21 22 #include "core.h" 23 #include "pinctrl-utils.h" 24 25 #define ZYNQMP_PIN_PREFIX "MIO" 26 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16 27 #define MAX_FUNC_NAME_LEN 16 28 #define MAX_GROUP_PIN 50 29 #define MAX_PIN_GROUPS 50 30 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS" 31 #define NUM_GROUPS_PER_RESP 6 32 33 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 34 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 35 #define NA_GROUP 0xFFFF 36 #define RESERVED_GROUP 0xFFFE 37 38 #define DRIVE_STRENGTH_2MA 2 39 #define DRIVE_STRENGTH_4MA 4 40 #define DRIVE_STRENGTH_8MA 8 41 #define DRIVE_STRENGTH_12MA 12 42 43 /** 44 * struct zynqmp_pmux_function - a pinmux function 45 * @name: Name of the pin mux function 46 * @groups: List of pin groups for this function 47 * @ngroups: Number of entries in @groups 48 * @node: Firmware node matching with the function 49 * 50 * This structure holds information about pin control function 51 * and function group names supporting that function. 52 */ 53 struct zynqmp_pmux_function { 54 char name[MAX_FUNC_NAME_LEN]; 55 const char * const *groups; 56 unsigned int ngroups; 57 }; 58 59 /** 60 * struct zynqmp_pinctrl - driver data 61 * @pctrl: Pin control device 62 * @groups: Pin groups 63 * @ngroups: Number of @groups 64 * @funcs: Pin mux functions 65 * @nfuncs: Number of @funcs 66 * 67 * This struct is stored as driver data and used to retrieve 68 * information regarding pin control functions, groups and 69 * group pins. 70 */ 71 struct zynqmp_pinctrl { 72 struct pinctrl_dev *pctrl; 73 const struct zynqmp_pctrl_group *groups; 74 unsigned int ngroups; 75 const struct zynqmp_pmux_function *funcs; 76 unsigned int nfuncs; 77 }; 78 79 /** 80 * struct zynqmp_pctrl_group - Pin control group info 81 * @name: Group name 82 * @pins: Group pin numbers 83 * @npins: Number of pins in the group 84 */ 85 struct zynqmp_pctrl_group { 86 const char *name; 87 unsigned int pins[MAX_GROUP_PIN]; 88 unsigned int npins; 89 }; 90 91 static struct pinctrl_desc zynqmp_desc; 92 93 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 94 { 95 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 96 97 return pctrl->ngroups; 98 } 99 100 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, 101 unsigned int selector) 102 { 103 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 104 105 return pctrl->groups[selector].name; 106 } 107 108 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 109 unsigned int selector, 110 const unsigned int **pins, 111 unsigned int *npins) 112 { 113 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 114 115 *pins = pctrl->groups[selector].pins; 116 *npins = pctrl->groups[selector].npins; 117 118 return 0; 119 } 120 121 static const struct pinctrl_ops zynqmp_pctrl_ops = { 122 .get_groups_count = zynqmp_pctrl_get_groups_count, 123 .get_group_name = zynqmp_pctrl_get_group_name, 124 .get_group_pins = zynqmp_pctrl_get_group_pins, 125 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 126 .dt_free_map = pinctrl_utils_free_map, 127 }; 128 129 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, 130 unsigned int pin) 131 { 132 int ret; 133 134 ret = zynqmp_pm_pinctrl_request(pin); 135 if (ret) { 136 dev_err(pctldev->dev, "request failed for pin %u\n", pin); 137 return ret; 138 } 139 140 return 0; 141 } 142 143 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) 144 { 145 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 146 147 return pctrl->nfuncs; 148 } 149 150 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, 151 unsigned int selector) 152 { 153 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 154 155 return pctrl->funcs[selector].name; 156 } 157 158 /** 159 * zynqmp_pmux_get_function_groups() - Get groups for the function 160 * @pctldev: Pincontrol device pointer. 161 * @selector: Function ID 162 * @groups: Group names. 163 * @num_groups: Number of function groups. 164 * 165 * Get function's group count and group names. 166 */ 167 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, 168 unsigned int selector, 169 const char * const **groups, 170 unsigned * const num_groups) 171 { 172 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 173 174 *groups = pctrl->funcs[selector].groups; 175 *num_groups = pctrl->funcs[selector].ngroups; 176 177 return 0; 178 } 179 180 /** 181 * zynqmp_pinmux_set_mux() - Set requested function for the group 182 * @pctldev: Pincontrol device pointer. 183 * @function: Function ID. 184 * @group: Group ID. 185 * 186 * Loop through all pins of the group and call firmware API 187 * to set requested function for all pins in the group. 188 * 189 * Return: 0 on success else error code. 190 */ 191 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, 192 unsigned int function, 193 unsigned int group) 194 { 195 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 196 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group]; 197 int ret, i; 198 199 for (i = 0; i < pgrp->npins; i++) { 200 unsigned int pin = pgrp->pins[i]; 201 202 ret = zynqmp_pm_pinctrl_set_function(pin, function); 203 if (ret) { 204 dev_err(pctldev->dev, "set mux failed for pin %u\n", 205 pin); 206 return ret; 207 } 208 } 209 210 return 0; 211 } 212 213 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, 214 unsigned int pin) 215 { 216 int ret; 217 218 ret = zynqmp_pm_pinctrl_release(pin); 219 if (ret) { 220 dev_err(pctldev->dev, "free pin failed for pin %u\n", 221 pin); 222 return ret; 223 } 224 225 return 0; 226 } 227 228 static const struct pinmux_ops zynqmp_pinmux_ops = { 229 .request = zynqmp_pinmux_request_pin, 230 .get_functions_count = zynqmp_pmux_get_functions_count, 231 .get_function_name = zynqmp_pmux_get_function_name, 232 .get_function_groups = zynqmp_pmux_get_function_groups, 233 .set_mux = zynqmp_pinmux_set_mux, 234 .free = zynqmp_pinmux_release_pin, 235 }; 236 237 /** 238 * zynqmp_pinconf_cfg_get() - get config value for the pin 239 * @pctldev: Pin control device pointer. 240 * @pin: Pin number. 241 * @config: Value of config param. 242 * 243 * Get value of the requested configuration parameter for the 244 * given pin. 245 * 246 * Return: 0 on success else error code. 247 */ 248 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, 249 unsigned int pin, 250 unsigned long *config) 251 { 252 unsigned int arg, param = pinconf_to_config_param(*config); 253 int ret; 254 255 if (pin >= zynqmp_desc.npins) 256 return -EOPNOTSUPP; 257 258 switch (param) { 259 case PIN_CONFIG_SLEW_RATE: 260 param = PM_PINCTRL_CONFIG_SLEW_RATE; 261 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 262 break; 263 case PIN_CONFIG_BIAS_PULL_UP: 264 param = PM_PINCTRL_CONFIG_PULL_CTRL; 265 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 266 if (arg != PM_PINCTRL_BIAS_PULL_UP) 267 return -EINVAL; 268 269 arg = 1; 270 break; 271 case PIN_CONFIG_BIAS_PULL_DOWN: 272 param = PM_PINCTRL_CONFIG_PULL_CTRL; 273 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 274 if (arg != PM_PINCTRL_BIAS_PULL_DOWN) 275 return -EINVAL; 276 277 arg = 1; 278 break; 279 case PIN_CONFIG_BIAS_DISABLE: 280 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 281 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 282 if (arg != PM_PINCTRL_BIAS_DISABLE) 283 return -EINVAL; 284 285 arg = 1; 286 break; 287 case PIN_CONFIG_POWER_SOURCE: 288 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 289 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 290 break; 291 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 292 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 293 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 294 break; 295 case PIN_CONFIG_DRIVE_STRENGTH: 296 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 297 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 298 switch (arg) { 299 case PM_PINCTRL_DRIVE_STRENGTH_2MA: 300 arg = DRIVE_STRENGTH_2MA; 301 break; 302 case PM_PINCTRL_DRIVE_STRENGTH_4MA: 303 arg = DRIVE_STRENGTH_4MA; 304 break; 305 case PM_PINCTRL_DRIVE_STRENGTH_8MA: 306 arg = DRIVE_STRENGTH_8MA; 307 break; 308 case PM_PINCTRL_DRIVE_STRENGTH_12MA: 309 arg = DRIVE_STRENGTH_12MA; 310 break; 311 default: 312 /* Invalid drive strength */ 313 dev_warn(pctldev->dev, 314 "Invalid drive strength for pin %d\n", 315 pin); 316 return -EINVAL; 317 } 318 break; 319 default: 320 ret = -EOPNOTSUPP; 321 break; 322 } 323 324 if (ret) 325 return ret; 326 327 param = pinconf_to_config_param(*config); 328 *config = pinconf_to_config_packed(param, arg); 329 330 return 0; 331 } 332 333 /** 334 * zynqmp_pinconf_cfg_set() - Set requested config for the pin 335 * @pctldev: Pincontrol device pointer. 336 * @pin: Pin number. 337 * @configs: Configuration to set. 338 * @num_configs: Number of configurations. 339 * 340 * Loop through all configurations and call firmware API 341 * to set requested configurations for the pin. 342 * 343 * Return: 0 on success else error code. 344 */ 345 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, 346 unsigned int pin, unsigned long *configs, 347 unsigned int num_configs) 348 { 349 int i, ret; 350 351 if (pin >= zynqmp_desc.npins) 352 return -EOPNOTSUPP; 353 354 for (i = 0; i < num_configs; i++) { 355 unsigned int param = pinconf_to_config_param(configs[i]); 356 unsigned int arg = pinconf_to_config_argument(configs[i]); 357 unsigned int value; 358 359 switch (param) { 360 case PIN_CONFIG_SLEW_RATE: 361 param = PM_PINCTRL_CONFIG_SLEW_RATE; 362 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 363 break; 364 case PIN_CONFIG_BIAS_PULL_UP: 365 param = PM_PINCTRL_CONFIG_PULL_CTRL; 366 arg = PM_PINCTRL_BIAS_PULL_UP; 367 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 368 break; 369 case PIN_CONFIG_BIAS_PULL_DOWN: 370 param = PM_PINCTRL_CONFIG_PULL_CTRL; 371 arg = PM_PINCTRL_BIAS_PULL_DOWN; 372 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 373 break; 374 case PIN_CONFIG_BIAS_DISABLE: 375 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 376 arg = PM_PINCTRL_BIAS_DISABLE; 377 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 378 break; 379 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 380 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 381 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 382 break; 383 case PIN_CONFIG_DRIVE_STRENGTH: 384 switch (arg) { 385 case DRIVE_STRENGTH_2MA: 386 value = PM_PINCTRL_DRIVE_STRENGTH_2MA; 387 break; 388 case DRIVE_STRENGTH_4MA: 389 value = PM_PINCTRL_DRIVE_STRENGTH_4MA; 390 break; 391 case DRIVE_STRENGTH_8MA: 392 value = PM_PINCTRL_DRIVE_STRENGTH_8MA; 393 break; 394 case DRIVE_STRENGTH_12MA: 395 value = PM_PINCTRL_DRIVE_STRENGTH_12MA; 396 break; 397 default: 398 /* Invalid drive strength */ 399 dev_warn(pctldev->dev, 400 "Invalid drive strength for pin %d\n", 401 pin); 402 return -EINVAL; 403 } 404 405 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 406 ret = zynqmp_pm_pinctrl_set_config(pin, param, value); 407 break; 408 case PIN_CONFIG_POWER_SOURCE: 409 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 410 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); 411 412 if (arg != value) 413 dev_warn(pctldev->dev, 414 "Invalid IO Standard requested for pin %d\n", 415 pin); 416 417 break; 418 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 419 case PIN_CONFIG_MODE_LOW_POWER: 420 /* 421 * These cases are mentioned in dts but configurable 422 * registers are unknown. So falling through to ignore 423 * boot time warnings as of now. 424 */ 425 ret = 0; 426 break; 427 default: 428 dev_warn(pctldev->dev, 429 "unsupported configuration parameter '%u'\n", 430 param); 431 ret = -EOPNOTSUPP; 432 break; 433 } 434 435 param = pinconf_to_config_param(configs[i]); 436 arg = pinconf_to_config_argument(configs[i]); 437 if (ret) 438 dev_warn(pctldev->dev, 439 "failed to set: pin %u param %u value %u\n", 440 pin, param, arg); 441 } 442 443 return 0; 444 } 445 446 /** 447 * zynqmp_pinconf_group_set() - Set requested config for the group 448 * @pctldev: Pincontrol device pointer. 449 * @selector: Group ID. 450 * @configs: Configuration to set. 451 * @num_configs: Number of configurations. 452 * 453 * Call function to set configs for each pin in the group. 454 * 455 * Return: 0 on success else error code. 456 */ 457 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, 458 unsigned int selector, 459 unsigned long *configs, 460 unsigned int num_configs) 461 { 462 int i, ret; 463 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 464 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector]; 465 466 for (i = 0; i < pgrp->npins; i++) { 467 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs, 468 num_configs); 469 if (ret) 470 return ret; 471 } 472 473 return 0; 474 } 475 476 static const struct pinconf_ops zynqmp_pinconf_ops = { 477 .is_generic = true, 478 .pin_config_get = zynqmp_pinconf_cfg_get, 479 .pin_config_set = zynqmp_pinconf_cfg_set, 480 .pin_config_group_set = zynqmp_pinconf_group_set, 481 }; 482 483 static struct pinctrl_desc zynqmp_desc = { 484 .name = "zynqmp_pinctrl", 485 .owner = THIS_MODULE, 486 .pctlops = &zynqmp_pctrl_ops, 487 .pmxops = &zynqmp_pinmux_ops, 488 .confops = &zynqmp_pinconf_ops, 489 }; 490 491 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) 492 { 493 struct zynqmp_pm_query_data qdata = {0}; 494 u32 payload[PAYLOAD_ARG_CNT]; 495 int ret; 496 497 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS; 498 qdata.arg1 = fid; 499 qdata.arg2 = index; 500 501 ret = zynqmp_pm_query_data(qdata, payload); 502 if (ret) 503 return ret; 504 505 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); 506 507 return ret; 508 } 509 510 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) 511 { 512 struct zynqmp_pm_query_data qdata = {0}; 513 u32 payload[PAYLOAD_ARG_CNT]; 514 int ret; 515 516 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS; 517 qdata.arg1 = fid; 518 519 ret = zynqmp_pm_query_data(qdata, payload); 520 if (ret) 521 return ret; 522 523 *ngroups = payload[1]; 524 525 return ret; 526 } 527 528 /** 529 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data 530 * @dev: Device pointer. 531 * @fid: Function ID. 532 * @func: Function data. 533 * @groups: Groups data. 534 * 535 * Query firmware to get group IDs for each function. Firmware returns 536 * group IDs. Based on group index for the function, group names in 537 * the function are stored. For example, the first group in "eth0" function 538 * is named as "eth0_0" and second group as "eth0_1" and so on. 539 * 540 * Based on the group ID received from the firmware, function stores name of 541 * the group for that group ID. For example, if "eth0" first group ID 542 * is x, groups[x] name will be stored as "eth0_0". 543 * 544 * Once done for each function, each function would have its group names 545 * and each groups would also have their names. 546 * 547 * Return: 0 on success else error code. 548 */ 549 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, 550 struct zynqmp_pmux_function *func, 551 struct zynqmp_pctrl_group *groups) 552 { 553 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 554 const char **fgroups; 555 int ret = 0, index, i; 556 557 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL); 558 if (!fgroups) 559 return -ENOMEM; 560 561 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { 562 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); 563 if (ret) 564 return ret; 565 566 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 567 if (resp[i] == NA_GROUP) 568 goto done; 569 570 if (resp[i] == RESERVED_GROUP) 571 continue; 572 573 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL, 574 "%s_%d_grp", 575 func->name, 576 index + i); 577 if (!fgroups[index + i]) 578 return -ENOMEM; 579 580 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL, 581 "%s_%d_grp", 582 func->name, 583 index + i); 584 if (!groups[resp[i]].name) 585 return -ENOMEM; 586 } 587 } 588 done: 589 func->groups = fgroups; 590 591 return ret; 592 } 593 594 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) 595 { 596 struct zynqmp_pm_query_data qdata = {0}; 597 u32 payload[PAYLOAD_ARG_CNT]; 598 599 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME; 600 qdata.arg1 = fid; 601 602 /* 603 * Name of the function is maximum 16 bytes and cannot 604 * accommodate the return value in SMC buffers, hence ignoring 605 * the return value for this specific qid. 606 */ 607 zynqmp_pm_query_data(qdata, payload); 608 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN); 609 } 610 611 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) 612 { 613 struct zynqmp_pm_query_data qdata = {0}; 614 u32 payload[PAYLOAD_ARG_CNT]; 615 int ret; 616 617 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS; 618 619 ret = zynqmp_pm_query_data(qdata, payload); 620 if (ret) 621 return ret; 622 623 *nfuncs = payload[1]; 624 625 return ret; 626 } 627 628 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) 629 { 630 struct zynqmp_pm_query_data qdata = {0}; 631 u32 payload[PAYLOAD_ARG_CNT]; 632 int ret; 633 634 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS; 635 qdata.arg1 = pin; 636 qdata.arg2 = index; 637 638 ret = zynqmp_pm_query_data(qdata, payload); 639 if (ret) 640 return ret; 641 642 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); 643 644 return ret; 645 } 646 647 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, 648 unsigned int pin) 649 { 650 group->pins[group->npins++] = pin; 651 } 652 653 /** 654 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups 655 * @dev: Device pointer. 656 * @groups: Groups data. 657 * @pin: Pin number. 658 * 659 * Query firmware to get groups available for the given pin. 660 * Based on the firmware response(group IDs for the pin), add 661 * pin number to the respective group's pin array. 662 * 663 * Once all pins are queries, each groups would have its number 664 * of pins and pin numbers data. 665 * 666 * Return: 0 on success else error code. 667 */ 668 static int zynqmp_pinctrl_create_pin_groups(struct device *dev, 669 struct zynqmp_pctrl_group *groups, 670 unsigned int pin) 671 { 672 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 673 int ret, i, index = 0; 674 675 do { 676 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); 677 if (ret) 678 return ret; 679 680 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 681 if (resp[i] == NA_GROUP) 682 return ret; 683 684 if (resp[i] == RESERVED_GROUP) 685 continue; 686 687 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); 688 } 689 index += NUM_GROUPS_PER_RESP; 690 } while (index <= MAX_PIN_GROUPS); 691 692 return ret; 693 } 694 695 /** 696 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data 697 * @dev: Device pointer. 698 * @groups: Groups data. 699 * @ngroups: Number of groups. 700 * 701 * Prepare pin number and number of pins data for each pins. 702 * 703 * Return: 0 on success else error code. 704 */ 705 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, 706 struct zynqmp_pctrl_group *groups, 707 unsigned int ngroups) 708 { 709 unsigned int pin; 710 int ret; 711 712 for (pin = 0; pin < zynqmp_desc.npins; pin++) { 713 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin); 714 if (ret) 715 return ret; 716 } 717 718 return 0; 719 } 720 721 /** 722 * zynqmp_pinctrl_prepare_function_info() - prepare function info 723 * @dev: Device pointer. 724 * @pctrl: Pin control driver data. 725 * 726 * Query firmware for functions, groups and pin information and 727 * prepare pin control driver data. 728 * 729 * Query number of functions and number of function groups (number 730 * of groups in given function) to allocate required memory buffers 731 * for functions and groups. Once buffers are allocated to store 732 * functions and groups data, query and store required information 733 * (number of groups and group names for each function, number of 734 * pins and pin numbers for each group). 735 * 736 * Return: 0 on success else error code. 737 */ 738 static int zynqmp_pinctrl_prepare_function_info(struct device *dev, 739 struct zynqmp_pinctrl *pctrl) 740 { 741 struct zynqmp_pmux_function *funcs; 742 struct zynqmp_pctrl_group *groups; 743 int ret, i; 744 745 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); 746 if (ret) 747 return ret; 748 749 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL); 750 if (!funcs) 751 return -ENOMEM; 752 753 for (i = 0; i < pctrl->nfuncs; i++) { 754 zynqmp_pinctrl_get_function_name(i, funcs[i].name); 755 756 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); 757 if (ret) 758 return ret; 759 760 pctrl->ngroups += funcs[i].ngroups; 761 } 762 763 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL); 764 if (!groups) 765 return -ENOMEM; 766 767 for (i = 0; i < pctrl->nfuncs; i++) { 768 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], 769 groups); 770 if (ret) 771 return ret; 772 } 773 774 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); 775 if (ret) 776 return ret; 777 778 pctrl->funcs = funcs; 779 pctrl->groups = groups; 780 781 return ret; 782 } 783 784 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) 785 { 786 struct zynqmp_pm_query_data qdata = {0}; 787 u32 payload[PAYLOAD_ARG_CNT]; 788 int ret; 789 790 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS; 791 792 ret = zynqmp_pm_query_data(qdata, payload); 793 if (ret) 794 return ret; 795 796 *npins = payload[1]; 797 798 return ret; 799 } 800 801 /** 802 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info 803 * @dev: Device pointer. 804 * @zynqmp_pins: Pin information. 805 * @npins: Number of pins. 806 * 807 * Query number of pins information from firmware and prepare pin 808 * description containing pin number and pin name. 809 * 810 * Return: 0 on success else error code. 811 */ 812 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, 813 const struct pinctrl_pin_desc 814 **zynqmp_pins, 815 unsigned int *npins) 816 { 817 struct pinctrl_pin_desc *pins, *pin; 818 int ret; 819 int i; 820 821 ret = zynqmp_pinctrl_get_num_pins(npins); 822 if (ret) 823 return ret; 824 825 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL); 826 if (!pins) 827 return -ENOMEM; 828 829 for (i = 0; i < *npins; i++) { 830 pin = &pins[i]; 831 pin->number = i; 832 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 833 ZYNQMP_PIN_PREFIX, i); 834 if (!pin->name) 835 return -ENOMEM; 836 } 837 838 *zynqmp_pins = pins; 839 840 return 0; 841 } 842 843 static int zynqmp_pinctrl_probe(struct platform_device *pdev) 844 { 845 struct zynqmp_pinctrl *pctrl; 846 int ret; 847 848 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 849 if (!pctrl) 850 return -ENOMEM; 851 852 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, 853 &zynqmp_desc.pins, 854 &zynqmp_desc.npins); 855 if (ret) { 856 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", 857 ret); 858 return ret; 859 } 860 861 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); 862 if (ret) { 863 dev_err(&pdev->dev, "function info prepare fail with %d\n", 864 ret); 865 return ret; 866 } 867 868 pctrl->pctrl = pinctrl_register(&zynqmp_desc, &pdev->dev, pctrl); 869 if (IS_ERR(pctrl->pctrl)) 870 return PTR_ERR(pctrl->pctrl); 871 872 platform_set_drvdata(pdev, pctrl); 873 874 return ret; 875 } 876 877 static int zynqmp_pinctrl_remove(struct platform_device *pdev) 878 { 879 struct zynqmp_pinctrl *pctrl = platform_get_drvdata(pdev); 880 881 pinctrl_unregister(pctrl->pctrl); 882 883 return 0; 884 } 885 886 static const struct of_device_id zynqmp_pinctrl_of_match[] = { 887 { .compatible = "xlnx,zynqmp-pinctrl" }, 888 { } 889 }; 890 891 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); 892 893 static struct platform_driver zynqmp_pinctrl_driver = { 894 .driver = { 895 .name = "zynqmp-pinctrl", 896 .of_match_table = zynqmp_pinctrl_of_match, 897 }, 898 .probe = zynqmp_pinctrl_probe, 899 .remove = zynqmp_pinctrl_remove, 900 }; 901 902 module_platform_driver(zynqmp_pinctrl_driver); 903 904 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); 905 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver"); 906 MODULE_LICENSE("GPL v2"); 907