1 /* 2 * Pinctrl driver for Rockchip RK805 PMIC 3 * 4 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd 5 * 6 * Author: Joseph Chen <chenjh@rock-chips.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * Based on the pinctrl-as3722 driver 14 */ 15 16 #include <linux/gpio/driver.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/mfd/rk808.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 #include <linux/platform_device.h> 23 #include <linux/pinctrl/consumer.h> 24 #include <linux/pinctrl/machine.h> 25 #include <linux/pinctrl/pinctrl.h> 26 #include <linux/pinctrl/pinconf-generic.h> 27 #include <linux/pinctrl/pinconf.h> 28 #include <linux/pinctrl/pinmux.h> 29 #include <linux/pm.h> 30 #include <linux/slab.h> 31 32 #include "core.h" 33 #include "pinconf.h" 34 #include "pinctrl-utils.h" 35 36 struct rk805_pin_function { 37 const char *name; 38 const char *const *groups; 39 unsigned int ngroups; 40 int mux_option; 41 }; 42 43 struct rk805_pin_group { 44 const char *name; 45 const unsigned int pins[1]; 46 unsigned int npins; 47 }; 48 49 /* 50 * @reg: gpio setting register; 51 * @fun_mask: functions select mask value, when set is gpio; 52 * @dir_mask: input or output mask value, when set is output, otherwise input; 53 * @val_mask: gpio set value, when set is level high, otherwise low; 54 * 55 * Different PMIC has different pin features, belowing 3 mask members are not 56 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used 57 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1 58 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all 59 * necessary. 60 */ 61 struct rk805_pin_config { 62 u8 reg; 63 u8 fun_msk; 64 u8 dir_msk; 65 u8 val_msk; 66 }; 67 68 struct rk805_pctrl_info { 69 struct rk808 *rk808; 70 struct device *dev; 71 struct pinctrl_dev *pctl; 72 struct gpio_chip gpio_chip; 73 struct pinctrl_desc pinctrl_desc; 74 const struct rk805_pin_function *functions; 75 unsigned int num_functions; 76 const struct rk805_pin_group *groups; 77 int num_pin_groups; 78 const struct pinctrl_pin_desc *pins; 79 unsigned int num_pins; 80 struct rk805_pin_config *pin_cfg; 81 }; 82 83 enum rk805_pinmux_option { 84 RK805_PINMUX_GPIO, 85 }; 86 87 enum { 88 RK805_GPIO0, 89 RK805_GPIO1, 90 }; 91 92 static const char *const rk805_gpio_groups[] = { 93 "gpio0", 94 "gpio1", 95 }; 96 97 /* RK805: 2 output only GPIOs */ 98 static const struct pinctrl_pin_desc rk805_pins_desc[] = { 99 PINCTRL_PIN(RK805_GPIO0, "gpio0"), 100 PINCTRL_PIN(RK805_GPIO1, "gpio1"), 101 }; 102 103 static const struct rk805_pin_function rk805_pin_functions[] = { 104 { 105 .name = "gpio", 106 .groups = rk805_gpio_groups, 107 .ngroups = ARRAY_SIZE(rk805_gpio_groups), 108 .mux_option = RK805_PINMUX_GPIO, 109 }, 110 }; 111 112 static const struct rk805_pin_group rk805_pin_groups[] = { 113 { 114 .name = "gpio0", 115 .pins = { RK805_GPIO0 }, 116 .npins = 1, 117 }, 118 { 119 .name = "gpio1", 120 .pins = { RK805_GPIO1 }, 121 .npins = 1, 122 }, 123 }; 124 125 #define RK805_GPIO0_VAL_MSK BIT(0) 126 #define RK805_GPIO1_VAL_MSK BIT(1) 127 128 static struct rk805_pin_config rk805_gpio_cfgs[] = { 129 { 130 .reg = RK805_OUT_REG, 131 .val_msk = RK805_GPIO0_VAL_MSK, 132 }, 133 { 134 .reg = RK805_OUT_REG, 135 .val_msk = RK805_GPIO1_VAL_MSK, 136 }, 137 }; 138 139 /* generic gpio chip */ 140 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) 141 { 142 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 143 int ret, val; 144 145 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); 146 if (ret) { 147 dev_err(pci->dev, "get gpio%d value failed\n", offset); 148 return ret; 149 } 150 151 return !!(val & pci->pin_cfg[offset].val_msk); 152 } 153 154 static void rk805_gpio_set(struct gpio_chip *chip, 155 unsigned int offset, 156 int value) 157 { 158 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 159 int ret; 160 161 ret = regmap_update_bits(pci->rk808->regmap, 162 pci->pin_cfg[offset].reg, 163 pci->pin_cfg[offset].val_msk, 164 value ? pci->pin_cfg[offset].val_msk : 0); 165 if (ret) 166 dev_err(pci->dev, "set gpio%d value %d failed\n", 167 offset, value); 168 } 169 170 static int rk805_gpio_direction_input(struct gpio_chip *chip, 171 unsigned int offset) 172 { 173 return pinctrl_gpio_direction_input(chip->base + offset); 174 } 175 176 static int rk805_gpio_direction_output(struct gpio_chip *chip, 177 unsigned int offset, int value) 178 { 179 rk805_gpio_set(chip, offset, value); 180 return pinctrl_gpio_direction_output(chip->base + offset); 181 } 182 183 static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 184 { 185 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 186 unsigned int val; 187 int ret; 188 189 /* default output*/ 190 if (!pci->pin_cfg[offset].dir_msk) 191 return 0; 192 193 ret = regmap_read(pci->rk808->regmap, 194 pci->pin_cfg[offset].reg, 195 &val); 196 if (ret) { 197 dev_err(pci->dev, "get gpio%d direction failed\n", offset); 198 return ret; 199 } 200 201 return !(val & pci->pin_cfg[offset].dir_msk); 202 } 203 204 static struct gpio_chip rk805_gpio_chip = { 205 .label = "rk805-gpio", 206 .request = gpiochip_generic_request, 207 .free = gpiochip_generic_free, 208 .get_direction = rk805_gpio_get_direction, 209 .get = rk805_gpio_get, 210 .set = rk805_gpio_set, 211 .direction_input = rk805_gpio_direction_input, 212 .direction_output = rk805_gpio_direction_output, 213 .can_sleep = true, 214 .base = -1, 215 .owner = THIS_MODULE, 216 }; 217 218 /* generic pinctrl */ 219 static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 220 { 221 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 222 223 return pci->num_pin_groups; 224 } 225 226 static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 227 unsigned int group) 228 { 229 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 230 231 return pci->groups[group].name; 232 } 233 234 static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 235 unsigned int group, 236 const unsigned int **pins, 237 unsigned int *num_pins) 238 { 239 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 240 241 *pins = pci->groups[group].pins; 242 *num_pins = pci->groups[group].npins; 243 244 return 0; 245 } 246 247 static const struct pinctrl_ops rk805_pinctrl_ops = { 248 .get_groups_count = rk805_pinctrl_get_groups_count, 249 .get_group_name = rk805_pinctrl_get_group_name, 250 .get_group_pins = rk805_pinctrl_get_group_pins, 251 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 252 .dt_free_map = pinctrl_utils_free_map, 253 }; 254 255 static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) 256 { 257 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 258 259 return pci->num_functions; 260 } 261 262 static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev, 263 unsigned int function) 264 { 265 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 266 267 return pci->functions[function].name; 268 } 269 270 static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, 271 unsigned int function, 272 const char *const **groups, 273 unsigned int *const num_groups) 274 { 275 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 276 277 *groups = pci->functions[function].groups; 278 *num_groups = pci->functions[function].ngroups; 279 280 return 0; 281 } 282 283 static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 284 unsigned int offset, 285 int mux) 286 { 287 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 288 int ret; 289 290 if (!pci->pin_cfg[offset].fun_msk) 291 return 0; 292 293 if (mux == RK805_PINMUX_GPIO) { 294 ret = regmap_update_bits(pci->rk808->regmap, 295 pci->pin_cfg[offset].reg, 296 pci->pin_cfg[offset].fun_msk, 297 pci->pin_cfg[offset].fun_msk); 298 if (ret) { 299 dev_err(pci->dev, "set gpio%d GPIO failed\n", offset); 300 return ret; 301 } 302 } else { 303 dev_err(pci->dev, "Couldn't find function mux %d\n", mux); 304 return -EINVAL; 305 } 306 307 return 0; 308 } 309 310 static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 311 unsigned int function, 312 unsigned int group) 313 { 314 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 315 int mux = pci->functions[function].mux_option; 316 int offset = group; 317 318 return _rk805_pinctrl_set_mux(pctldev, offset, mux); 319 } 320 321 static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 322 struct pinctrl_gpio_range *range, 323 unsigned int offset, bool input) 324 { 325 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 326 int ret; 327 328 /* switch to gpio function */ 329 ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); 330 if (ret) { 331 dev_err(pci->dev, "set gpio%d mux failed\n", offset); 332 return ret; 333 } 334 335 /* set direction */ 336 if (!pci->pin_cfg[offset].dir_msk) 337 return 0; 338 339 ret = regmap_update_bits(pci->rk808->regmap, 340 pci->pin_cfg[offset].reg, 341 pci->pin_cfg[offset].dir_msk, 342 input ? 0 : pci->pin_cfg[offset].dir_msk); 343 if (ret) { 344 dev_err(pci->dev, "set gpio%d direction failed\n", offset); 345 return ret; 346 } 347 348 return ret; 349 } 350 351 static const struct pinmux_ops rk805_pinmux_ops = { 352 .get_functions_count = rk805_pinctrl_get_funcs_count, 353 .get_function_name = rk805_pinctrl_get_func_name, 354 .get_function_groups = rk805_pinctrl_get_func_groups, 355 .set_mux = rk805_pinctrl_set_mux, 356 .gpio_set_direction = rk805_pmx_gpio_set_direction, 357 }; 358 359 static int rk805_pinconf_get(struct pinctrl_dev *pctldev, 360 unsigned int pin, unsigned long *config) 361 { 362 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 363 enum pin_config_param param = pinconf_to_config_param(*config); 364 u32 arg = 0; 365 366 switch (param) { 367 case PIN_CONFIG_OUTPUT: 368 arg = rk805_gpio_get(&pci->gpio_chip, pin); 369 break; 370 default: 371 dev_err(pci->dev, "Properties not supported\n"); 372 return -ENOTSUPP; 373 } 374 375 *config = pinconf_to_config_packed(param, (u16)arg); 376 377 return 0; 378 } 379 380 static int rk805_pinconf_set(struct pinctrl_dev *pctldev, 381 unsigned int pin, unsigned long *configs, 382 unsigned int num_configs) 383 { 384 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 385 enum pin_config_param param; 386 u32 i, arg = 0; 387 388 for (i = 0; i < num_configs; i++) { 389 param = pinconf_to_config_param(configs[i]); 390 arg = pinconf_to_config_argument(configs[i]); 391 392 switch (param) { 393 case PIN_CONFIG_OUTPUT: 394 rk805_gpio_set(&pci->gpio_chip, pin, arg); 395 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false); 396 break; 397 default: 398 dev_err(pci->dev, "Properties not supported\n"); 399 return -ENOTSUPP; 400 } 401 } 402 403 return 0; 404 } 405 406 static const struct pinconf_ops rk805_pinconf_ops = { 407 .pin_config_get = rk805_pinconf_get, 408 .pin_config_set = rk805_pinconf_set, 409 }; 410 411 static struct pinctrl_desc rk805_pinctrl_desc = { 412 .name = "rk805-pinctrl", 413 .pctlops = &rk805_pinctrl_ops, 414 .pmxops = &rk805_pinmux_ops, 415 .confops = &rk805_pinconf_ops, 416 .owner = THIS_MODULE, 417 }; 418 419 static int rk805_pinctrl_probe(struct platform_device *pdev) 420 { 421 struct rk805_pctrl_info *pci; 422 int ret; 423 424 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL); 425 if (!pci) 426 return -ENOMEM; 427 428 pci->dev = &pdev->dev; 429 pci->dev->of_node = pdev->dev.parent->of_node; 430 pci->rk808 = dev_get_drvdata(pdev->dev.parent); 431 432 pci->pinctrl_desc = rk805_pinctrl_desc; 433 pci->gpio_chip = rk805_gpio_chip; 434 pci->gpio_chip.parent = &pdev->dev; 435 pci->gpio_chip.of_node = pdev->dev.parent->of_node; 436 437 platform_set_drvdata(pdev, pci); 438 439 switch (pci->rk808->variant) { 440 case RK805_ID: 441 pci->pins = rk805_pins_desc; 442 pci->num_pins = ARRAY_SIZE(rk805_pins_desc); 443 pci->functions = rk805_pin_functions; 444 pci->num_functions = ARRAY_SIZE(rk805_pin_functions); 445 pci->groups = rk805_pin_groups; 446 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups); 447 pci->pinctrl_desc.pins = rk805_pins_desc; 448 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc); 449 pci->pin_cfg = rk805_gpio_cfgs; 450 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs); 451 break; 452 default: 453 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", 454 pci->rk808->variant); 455 return -EINVAL; 456 } 457 458 /* Add gpio chip */ 459 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci); 460 if (ret < 0) { 461 dev_err(&pdev->dev, "Couldn't add gpiochip\n"); 462 return ret; 463 } 464 465 /* Add pinctrl */ 466 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci); 467 if (IS_ERR(pci->pctl)) { 468 dev_err(&pdev->dev, "Couldn't add pinctrl\n"); 469 return PTR_ERR(pci->pctl); 470 } 471 472 /* Add pin range */ 473 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev), 474 0, 0, pci->gpio_chip.ngpio); 475 if (ret < 0) { 476 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n"); 477 return ret; 478 } 479 480 return 0; 481 } 482 483 static struct platform_driver rk805_pinctrl_driver = { 484 .probe = rk805_pinctrl_probe, 485 .driver = { 486 .name = "rk805-pinctrl", 487 }, 488 }; 489 module_platform_driver(rk805_pinctrl_driver); 490 491 MODULE_DESCRIPTION("RK805 pin control and GPIO driver"); 492 MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>"); 493 MODULE_LICENSE("GPL v2"); 494