1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Pinctrl driver for Rockchip RK805 PMIC 4 * 5 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd 6 * 7 * Author: Joseph Chen <chenjh@rock-chips.com> 8 * 9 * Based on the pinctrl-as3722 driver 10 */ 11 12 #include <linux/gpio/driver.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/mfd/rk808.h> 16 #include <linux/of.h> 17 #include <linux/of_device.h> 18 #include <linux/platform_device.h> 19 #include <linux/pinctrl/consumer.h> 20 #include <linux/pinctrl/machine.h> 21 #include <linux/pinctrl/pinctrl.h> 22 #include <linux/pinctrl/pinconf-generic.h> 23 #include <linux/pinctrl/pinconf.h> 24 #include <linux/pinctrl/pinmux.h> 25 #include <linux/pm.h> 26 #include <linux/slab.h> 27 28 #include "core.h" 29 #include "pinconf.h" 30 #include "pinctrl-utils.h" 31 32 struct rk805_pin_function { 33 const char *name; 34 const char *const *groups; 35 unsigned int ngroups; 36 int mux_option; 37 }; 38 39 struct rk805_pin_group { 40 const char *name; 41 const unsigned int pins[1]; 42 unsigned int npins; 43 }; 44 45 /* 46 * @reg: gpio setting register; 47 * @fun_mask: functions select mask value, when set is gpio; 48 * @dir_mask: input or output mask value, when set is output, otherwise input; 49 * @val_mask: gpio set value, when set is level high, otherwise low; 50 * 51 * Different PMIC has different pin features, belowing 3 mask members are not 52 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used 53 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1 54 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all 55 * necessary. 56 */ 57 struct rk805_pin_config { 58 u8 reg; 59 u8 fun_msk; 60 u8 dir_msk; 61 u8 val_msk; 62 }; 63 64 struct rk805_pctrl_info { 65 struct rk808 *rk808; 66 struct device *dev; 67 struct pinctrl_dev *pctl; 68 struct gpio_chip gpio_chip; 69 struct pinctrl_desc pinctrl_desc; 70 const struct rk805_pin_function *functions; 71 unsigned int num_functions; 72 const struct rk805_pin_group *groups; 73 int num_pin_groups; 74 const struct pinctrl_pin_desc *pins; 75 unsigned int num_pins; 76 struct rk805_pin_config *pin_cfg; 77 }; 78 79 enum rk805_pinmux_option { 80 RK805_PINMUX_GPIO, 81 }; 82 83 enum { 84 RK805_GPIO0, 85 RK805_GPIO1, 86 }; 87 88 static const char *const rk805_gpio_groups[] = { 89 "gpio0", 90 "gpio1", 91 }; 92 93 /* RK805: 2 output only GPIOs */ 94 static const struct pinctrl_pin_desc rk805_pins_desc[] = { 95 PINCTRL_PIN(RK805_GPIO0, "gpio0"), 96 PINCTRL_PIN(RK805_GPIO1, "gpio1"), 97 }; 98 99 static const struct rk805_pin_function rk805_pin_functions[] = { 100 { 101 .name = "gpio", 102 .groups = rk805_gpio_groups, 103 .ngroups = ARRAY_SIZE(rk805_gpio_groups), 104 .mux_option = RK805_PINMUX_GPIO, 105 }, 106 }; 107 108 static const struct rk805_pin_group rk805_pin_groups[] = { 109 { 110 .name = "gpio0", 111 .pins = { RK805_GPIO0 }, 112 .npins = 1, 113 }, 114 { 115 .name = "gpio1", 116 .pins = { RK805_GPIO1 }, 117 .npins = 1, 118 }, 119 }; 120 121 #define RK805_GPIO0_VAL_MSK BIT(0) 122 #define RK805_GPIO1_VAL_MSK BIT(1) 123 124 static struct rk805_pin_config rk805_gpio_cfgs[] = { 125 { 126 .reg = RK805_OUT_REG, 127 .val_msk = RK805_GPIO0_VAL_MSK, 128 }, 129 { 130 .reg = RK805_OUT_REG, 131 .val_msk = RK805_GPIO1_VAL_MSK, 132 }, 133 }; 134 135 /* generic gpio chip */ 136 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) 137 { 138 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 139 int ret, val; 140 141 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); 142 if (ret) { 143 dev_err(pci->dev, "get gpio%d value failed\n", offset); 144 return ret; 145 } 146 147 return !!(val & pci->pin_cfg[offset].val_msk); 148 } 149 150 static void rk805_gpio_set(struct gpio_chip *chip, 151 unsigned int offset, 152 int value) 153 { 154 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 155 int ret; 156 157 ret = regmap_update_bits(pci->rk808->regmap, 158 pci->pin_cfg[offset].reg, 159 pci->pin_cfg[offset].val_msk, 160 value ? pci->pin_cfg[offset].val_msk : 0); 161 if (ret) 162 dev_err(pci->dev, "set gpio%d value %d failed\n", 163 offset, value); 164 } 165 166 static int rk805_gpio_direction_input(struct gpio_chip *chip, 167 unsigned int offset) 168 { 169 return pinctrl_gpio_direction_input(chip->base + offset); 170 } 171 172 static int rk805_gpio_direction_output(struct gpio_chip *chip, 173 unsigned int offset, int value) 174 { 175 rk805_gpio_set(chip, offset, value); 176 return pinctrl_gpio_direction_output(chip->base + offset); 177 } 178 179 static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 180 { 181 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 182 unsigned int val; 183 int ret; 184 185 /* default output*/ 186 if (!pci->pin_cfg[offset].dir_msk) 187 return 0; 188 189 ret = regmap_read(pci->rk808->regmap, 190 pci->pin_cfg[offset].reg, 191 &val); 192 if (ret) { 193 dev_err(pci->dev, "get gpio%d direction failed\n", offset); 194 return ret; 195 } 196 197 return !(val & pci->pin_cfg[offset].dir_msk); 198 } 199 200 static struct gpio_chip rk805_gpio_chip = { 201 .label = "rk805-gpio", 202 .request = gpiochip_generic_request, 203 .free = gpiochip_generic_free, 204 .get_direction = rk805_gpio_get_direction, 205 .get = rk805_gpio_get, 206 .set = rk805_gpio_set, 207 .direction_input = rk805_gpio_direction_input, 208 .direction_output = rk805_gpio_direction_output, 209 .can_sleep = true, 210 .base = -1, 211 .owner = THIS_MODULE, 212 }; 213 214 /* generic pinctrl */ 215 static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 216 { 217 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 218 219 return pci->num_pin_groups; 220 } 221 222 static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 223 unsigned int group) 224 { 225 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 226 227 return pci->groups[group].name; 228 } 229 230 static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 231 unsigned int group, 232 const unsigned int **pins, 233 unsigned int *num_pins) 234 { 235 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 236 237 *pins = pci->groups[group].pins; 238 *num_pins = pci->groups[group].npins; 239 240 return 0; 241 } 242 243 static const struct pinctrl_ops rk805_pinctrl_ops = { 244 .get_groups_count = rk805_pinctrl_get_groups_count, 245 .get_group_name = rk805_pinctrl_get_group_name, 246 .get_group_pins = rk805_pinctrl_get_group_pins, 247 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 248 .dt_free_map = pinctrl_utils_free_map, 249 }; 250 251 static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) 252 { 253 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 254 255 return pci->num_functions; 256 } 257 258 static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev, 259 unsigned int function) 260 { 261 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 262 263 return pci->functions[function].name; 264 } 265 266 static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, 267 unsigned int function, 268 const char *const **groups, 269 unsigned int *const num_groups) 270 { 271 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 272 273 *groups = pci->functions[function].groups; 274 *num_groups = pci->functions[function].ngroups; 275 276 return 0; 277 } 278 279 static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 280 unsigned int offset, 281 int mux) 282 { 283 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 284 int ret; 285 286 if (!pci->pin_cfg[offset].fun_msk) 287 return 0; 288 289 if (mux == RK805_PINMUX_GPIO) { 290 ret = regmap_update_bits(pci->rk808->regmap, 291 pci->pin_cfg[offset].reg, 292 pci->pin_cfg[offset].fun_msk, 293 pci->pin_cfg[offset].fun_msk); 294 if (ret) { 295 dev_err(pci->dev, "set gpio%d GPIO failed\n", offset); 296 return ret; 297 } 298 } else { 299 dev_err(pci->dev, "Couldn't find function mux %d\n", mux); 300 return -EINVAL; 301 } 302 303 return 0; 304 } 305 306 static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 307 unsigned int function, 308 unsigned int group) 309 { 310 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 311 int mux = pci->functions[function].mux_option; 312 int offset = group; 313 314 return _rk805_pinctrl_set_mux(pctldev, offset, mux); 315 } 316 317 static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 318 struct pinctrl_gpio_range *range, 319 unsigned int offset, bool input) 320 { 321 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 322 int ret; 323 324 /* switch to gpio function */ 325 ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); 326 if (ret) { 327 dev_err(pci->dev, "set gpio%d mux failed\n", offset); 328 return ret; 329 } 330 331 /* set direction */ 332 if (!pci->pin_cfg[offset].dir_msk) 333 return 0; 334 335 ret = regmap_update_bits(pci->rk808->regmap, 336 pci->pin_cfg[offset].reg, 337 pci->pin_cfg[offset].dir_msk, 338 input ? 0 : pci->pin_cfg[offset].dir_msk); 339 if (ret) { 340 dev_err(pci->dev, "set gpio%d direction failed\n", offset); 341 return ret; 342 } 343 344 return ret; 345 } 346 347 static const struct pinmux_ops rk805_pinmux_ops = { 348 .get_functions_count = rk805_pinctrl_get_funcs_count, 349 .get_function_name = rk805_pinctrl_get_func_name, 350 .get_function_groups = rk805_pinctrl_get_func_groups, 351 .set_mux = rk805_pinctrl_set_mux, 352 .gpio_set_direction = rk805_pmx_gpio_set_direction, 353 }; 354 355 static int rk805_pinconf_get(struct pinctrl_dev *pctldev, 356 unsigned int pin, unsigned long *config) 357 { 358 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 359 enum pin_config_param param = pinconf_to_config_param(*config); 360 u32 arg = 0; 361 362 switch (param) { 363 case PIN_CONFIG_OUTPUT: 364 arg = rk805_gpio_get(&pci->gpio_chip, pin); 365 break; 366 default: 367 dev_err(pci->dev, "Properties not supported\n"); 368 return -ENOTSUPP; 369 } 370 371 *config = pinconf_to_config_packed(param, (u16)arg); 372 373 return 0; 374 } 375 376 static int rk805_pinconf_set(struct pinctrl_dev *pctldev, 377 unsigned int pin, unsigned long *configs, 378 unsigned int num_configs) 379 { 380 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 381 enum pin_config_param param; 382 u32 i, arg = 0; 383 384 for (i = 0; i < num_configs; i++) { 385 param = pinconf_to_config_param(configs[i]); 386 arg = pinconf_to_config_argument(configs[i]); 387 388 switch (param) { 389 case PIN_CONFIG_OUTPUT: 390 rk805_gpio_set(&pci->gpio_chip, pin, arg); 391 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false); 392 break; 393 default: 394 dev_err(pci->dev, "Properties not supported\n"); 395 return -ENOTSUPP; 396 } 397 } 398 399 return 0; 400 } 401 402 static const struct pinconf_ops rk805_pinconf_ops = { 403 .pin_config_get = rk805_pinconf_get, 404 .pin_config_set = rk805_pinconf_set, 405 }; 406 407 static struct pinctrl_desc rk805_pinctrl_desc = { 408 .name = "rk805-pinctrl", 409 .pctlops = &rk805_pinctrl_ops, 410 .pmxops = &rk805_pinmux_ops, 411 .confops = &rk805_pinconf_ops, 412 .owner = THIS_MODULE, 413 }; 414 415 static int rk805_pinctrl_probe(struct platform_device *pdev) 416 { 417 struct rk805_pctrl_info *pci; 418 int ret; 419 420 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL); 421 if (!pci) 422 return -ENOMEM; 423 424 pci->dev = &pdev->dev; 425 pci->dev->of_node = pdev->dev.parent->of_node; 426 pci->rk808 = dev_get_drvdata(pdev->dev.parent); 427 428 pci->pinctrl_desc = rk805_pinctrl_desc; 429 pci->gpio_chip = rk805_gpio_chip; 430 pci->gpio_chip.parent = &pdev->dev; 431 pci->gpio_chip.of_node = pdev->dev.parent->of_node; 432 433 platform_set_drvdata(pdev, pci); 434 435 switch (pci->rk808->variant) { 436 case RK805_ID: 437 pci->pins = rk805_pins_desc; 438 pci->num_pins = ARRAY_SIZE(rk805_pins_desc); 439 pci->functions = rk805_pin_functions; 440 pci->num_functions = ARRAY_SIZE(rk805_pin_functions); 441 pci->groups = rk805_pin_groups; 442 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups); 443 pci->pinctrl_desc.pins = rk805_pins_desc; 444 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc); 445 pci->pin_cfg = rk805_gpio_cfgs; 446 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs); 447 break; 448 default: 449 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", 450 pci->rk808->variant); 451 return -EINVAL; 452 } 453 454 /* Add gpio chip */ 455 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci); 456 if (ret < 0) { 457 dev_err(&pdev->dev, "Couldn't add gpiochip\n"); 458 return ret; 459 } 460 461 /* Add pinctrl */ 462 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci); 463 if (IS_ERR(pci->pctl)) { 464 dev_err(&pdev->dev, "Couldn't add pinctrl\n"); 465 return PTR_ERR(pci->pctl); 466 } 467 468 /* Add pin range */ 469 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev), 470 0, 0, pci->gpio_chip.ngpio); 471 if (ret < 0) { 472 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n"); 473 return ret; 474 } 475 476 return 0; 477 } 478 479 static struct platform_driver rk805_pinctrl_driver = { 480 .probe = rk805_pinctrl_probe, 481 .driver = { 482 .name = "rk805-pinctrl", 483 }, 484 }; 485 module_platform_driver(rk805_pinctrl_driver); 486 487 MODULE_DESCRIPTION("RK805 pin control and GPIO driver"); 488 MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>"); 489 MODULE_LICENSE("GPL v2"); 490