1ce8dc094SAlexandre Belloni // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2ce8dc094SAlexandre Belloni /* 3ce8dc094SAlexandre Belloni * Microsemi SoCs pinctrl driver 4ce8dc094SAlexandre Belloni * 5ce8dc094SAlexandre Belloni * Author: <alexandre.belloni@free-electrons.com> 6ce8dc094SAlexandre Belloni * License: Dual MIT/GPL 7ce8dc094SAlexandre Belloni * Copyright (c) 2017 Microsemi Corporation 8ce8dc094SAlexandre Belloni */ 9ce8dc094SAlexandre Belloni 10ce8dc094SAlexandre Belloni #include <linux/gpio/driver.h> 11ce8dc094SAlexandre Belloni #include <linux/interrupt.h> 12ce8dc094SAlexandre Belloni #include <linux/io.h> 13ce8dc094SAlexandre Belloni #include <linux/of_device.h> 14be36abb7SQuentin Schulz #include <linux/of_irq.h> 15ce8dc094SAlexandre Belloni #include <linux/of_platform.h> 16ce8dc094SAlexandre Belloni #include <linux/pinctrl/pinctrl.h> 17ce8dc094SAlexandre Belloni #include <linux/pinctrl/pinmux.h> 18ce8dc094SAlexandre Belloni #include <linux/pinctrl/pinconf.h> 19ce8dc094SAlexandre Belloni #include <linux/pinctrl/pinconf-generic.h> 20ce8dc094SAlexandre Belloni #include <linux/platform_device.h> 21ce8dc094SAlexandre Belloni #include <linux/regmap.h> 22ce8dc094SAlexandre Belloni #include <linux/slab.h> 23ce8dc094SAlexandre Belloni 24ce8dc094SAlexandre Belloni #include "core.h" 25ce8dc094SAlexandre Belloni #include "pinconf.h" 26ce8dc094SAlexandre Belloni #include "pinmux.h" 27ce8dc094SAlexandre Belloni 28f8a74760SLars Povlsen #define ocelot_clrsetbits(addr, clear, set) \ 29f8a74760SLars Povlsen writel((readl(addr) & ~(clear)) | (set), (addr)) 30f8a74760SLars Povlsen 31f8a74760SLars Povlsen /* PINCONFIG bits (sparx5 only) */ 32f8a74760SLars Povlsen enum { 33f8a74760SLars Povlsen PINCONF_BIAS, 34f8a74760SLars Povlsen PINCONF_SCHMITT, 35f8a74760SLars Povlsen PINCONF_DRIVE_STRENGTH, 36f8a74760SLars Povlsen }; 37f8a74760SLars Povlsen 38f8a74760SLars Povlsen #define BIAS_PD_BIT BIT(4) 39f8a74760SLars Povlsen #define BIAS_PU_BIT BIT(3) 40f8a74760SLars Povlsen #define BIAS_BITS (BIAS_PD_BIT|BIAS_PU_BIT) 41f8a74760SLars Povlsen #define SCHMITT_BIT BIT(2) 42f8a74760SLars Povlsen #define DRIVE_BITS GENMASK(1, 0) 43f8a74760SLars Povlsen 44f8a74760SLars Povlsen /* GPIO standard registers */ 45ce8dc094SAlexandre Belloni #define OCELOT_GPIO_OUT_SET 0x0 46ce8dc094SAlexandre Belloni #define OCELOT_GPIO_OUT_CLR 0x4 47ce8dc094SAlexandre Belloni #define OCELOT_GPIO_OUT 0x8 48ce8dc094SAlexandre Belloni #define OCELOT_GPIO_IN 0xc 49ce8dc094SAlexandre Belloni #define OCELOT_GPIO_OE 0x10 50ce8dc094SAlexandre Belloni #define OCELOT_GPIO_INTR 0x14 51ce8dc094SAlexandre Belloni #define OCELOT_GPIO_INTR_ENA 0x18 52ce8dc094SAlexandre Belloni #define OCELOT_GPIO_INTR_IDENT 0x1c 53ce8dc094SAlexandre Belloni #define OCELOT_GPIO_ALT0 0x20 54ce8dc094SAlexandre Belloni #define OCELOT_GPIO_ALT1 0x24 55ce8dc094SAlexandre Belloni #define OCELOT_GPIO_SD_MAP 0x28 56ce8dc094SAlexandre Belloni 57ce8dc094SAlexandre Belloni #define OCELOT_FUNC_PER_PIN 4 58ce8dc094SAlexandre Belloni 59ce8dc094SAlexandre Belloni enum { 60ce8dc094SAlexandre Belloni FUNC_NONE, 61ce8dc094SAlexandre Belloni FUNC_GPIO, 62f8a74760SLars Povlsen FUNC_IRQ0, 63ce8dc094SAlexandre Belloni FUNC_IRQ0_IN, 64ce8dc094SAlexandre Belloni FUNC_IRQ0_OUT, 65f8a74760SLars Povlsen FUNC_IRQ1, 66ce8dc094SAlexandre Belloni FUNC_IRQ1_IN, 67ce8dc094SAlexandre Belloni FUNC_IRQ1_OUT, 68f8a74760SLars Povlsen FUNC_EXT_IRQ, 69edc72546SLars Povlsen FUNC_MIIM, 70f8a74760SLars Povlsen FUNC_PHY_LED, 71ce8dc094SAlexandre Belloni FUNC_PCI_WAKE, 72f8a74760SLars Povlsen FUNC_MD, 73ce8dc094SAlexandre Belloni FUNC_PTP0, 74ce8dc094SAlexandre Belloni FUNC_PTP1, 75ce8dc094SAlexandre Belloni FUNC_PTP2, 76ce8dc094SAlexandre Belloni FUNC_PTP3, 77ce8dc094SAlexandre Belloni FUNC_PWM, 78edc72546SLars Povlsen FUNC_RECO_CLK, 79edc72546SLars Povlsen FUNC_SFP, 80ce8dc094SAlexandre Belloni FUNC_SG0, 81da801ab5SAlexandre Belloni FUNC_SG1, 82da801ab5SAlexandre Belloni FUNC_SG2, 83ce8dc094SAlexandre Belloni FUNC_SI, 84f8a74760SLars Povlsen FUNC_SI2, 85ce8dc094SAlexandre Belloni FUNC_TACHO, 86ce8dc094SAlexandre Belloni FUNC_TWI, 87da801ab5SAlexandre Belloni FUNC_TWI2, 88f8a74760SLars Povlsen FUNC_TWI3, 89ce8dc094SAlexandre Belloni FUNC_TWI_SCL_M, 90ce8dc094SAlexandre Belloni FUNC_UART, 91ce8dc094SAlexandre Belloni FUNC_UART2, 92f8a74760SLars Povlsen FUNC_UART3, 93f8a74760SLars Povlsen FUNC_PLL_STAT, 94f8a74760SLars Povlsen FUNC_EMMC, 95f8a74760SLars Povlsen FUNC_REF_CLK, 96f8a74760SLars Povlsen FUNC_RCVRD_CLK, 97ce8dc094SAlexandre Belloni FUNC_MAX 98ce8dc094SAlexandre Belloni }; 99ce8dc094SAlexandre Belloni 100ce8dc094SAlexandre Belloni static const char *const ocelot_function_names[] = { 101ce8dc094SAlexandre Belloni [FUNC_NONE] = "none", 102ce8dc094SAlexandre Belloni [FUNC_GPIO] = "gpio", 103f8a74760SLars Povlsen [FUNC_IRQ0] = "irq0", 104ce8dc094SAlexandre Belloni [FUNC_IRQ0_IN] = "irq0_in", 105ce8dc094SAlexandre Belloni [FUNC_IRQ0_OUT] = "irq0_out", 106f8a74760SLars Povlsen [FUNC_IRQ1] = "irq1", 107ce8dc094SAlexandre Belloni [FUNC_IRQ1_IN] = "irq1_in", 108ce8dc094SAlexandre Belloni [FUNC_IRQ1_OUT] = "irq1_out", 109f8a74760SLars Povlsen [FUNC_EXT_IRQ] = "ext_irq", 110edc72546SLars Povlsen [FUNC_MIIM] = "miim", 111f8a74760SLars Povlsen [FUNC_PHY_LED] = "phy_led", 112ce8dc094SAlexandre Belloni [FUNC_PCI_WAKE] = "pci_wake", 113f8a74760SLars Povlsen [FUNC_MD] = "md", 114ce8dc094SAlexandre Belloni [FUNC_PTP0] = "ptp0", 115ce8dc094SAlexandre Belloni [FUNC_PTP1] = "ptp1", 116ce8dc094SAlexandre Belloni [FUNC_PTP2] = "ptp2", 117ce8dc094SAlexandre Belloni [FUNC_PTP3] = "ptp3", 118ce8dc094SAlexandre Belloni [FUNC_PWM] = "pwm", 119edc72546SLars Povlsen [FUNC_RECO_CLK] = "reco_clk", 120edc72546SLars Povlsen [FUNC_SFP] = "sfp", 121ce8dc094SAlexandre Belloni [FUNC_SG0] = "sg0", 122da801ab5SAlexandre Belloni [FUNC_SG1] = "sg1", 123da801ab5SAlexandre Belloni [FUNC_SG2] = "sg2", 124ce8dc094SAlexandre Belloni [FUNC_SI] = "si", 125f8a74760SLars Povlsen [FUNC_SI2] = "si2", 126ce8dc094SAlexandre Belloni [FUNC_TACHO] = "tacho", 127ce8dc094SAlexandre Belloni [FUNC_TWI] = "twi", 128da801ab5SAlexandre Belloni [FUNC_TWI2] = "twi2", 129f8a74760SLars Povlsen [FUNC_TWI3] = "twi3", 130ce8dc094SAlexandre Belloni [FUNC_TWI_SCL_M] = "twi_scl_m", 131ce8dc094SAlexandre Belloni [FUNC_UART] = "uart", 132ce8dc094SAlexandre Belloni [FUNC_UART2] = "uart2", 133f8a74760SLars Povlsen [FUNC_UART3] = "uart3", 134f8a74760SLars Povlsen [FUNC_PLL_STAT] = "pll_stat", 135f8a74760SLars Povlsen [FUNC_EMMC] = "emmc", 136f8a74760SLars Povlsen [FUNC_REF_CLK] = "ref_clk", 137f8a74760SLars Povlsen [FUNC_RCVRD_CLK] = "rcvrd_clk", 138ce8dc094SAlexandre Belloni }; 139ce8dc094SAlexandre Belloni 140ce8dc094SAlexandre Belloni struct ocelot_pmx_func { 141ce8dc094SAlexandre Belloni const char **groups; 142ce8dc094SAlexandre Belloni unsigned int ngroups; 143ce8dc094SAlexandre Belloni }; 144ce8dc094SAlexandre Belloni 145ce8dc094SAlexandre Belloni struct ocelot_pin_caps { 146ce8dc094SAlexandre Belloni unsigned int pin; 147ce8dc094SAlexandre Belloni unsigned char functions[OCELOT_FUNC_PER_PIN]; 148ce8dc094SAlexandre Belloni }; 149ce8dc094SAlexandre Belloni 150ce8dc094SAlexandre Belloni struct ocelot_pinctrl { 151ce8dc094SAlexandre Belloni struct device *dev; 152ce8dc094SAlexandre Belloni struct pinctrl_dev *pctl; 153ce8dc094SAlexandre Belloni struct gpio_chip gpio_chip; 154ce8dc094SAlexandre Belloni struct regmap *map; 155f8a74760SLars Povlsen void __iomem *pincfg; 156da801ab5SAlexandre Belloni struct pinctrl_desc *desc; 157ce8dc094SAlexandre Belloni struct ocelot_pmx_func func[FUNC_MAX]; 158da801ab5SAlexandre Belloni u8 stride; 159ce8dc094SAlexandre Belloni }; 160ce8dc094SAlexandre Belloni 1618f27440dSLars Povlsen #define LUTON_P(p, f0, f1) \ 1628f27440dSLars Povlsen static struct ocelot_pin_caps luton_pin_##p = { \ 1638f27440dSLars Povlsen .pin = p, \ 1648f27440dSLars Povlsen .functions = { \ 1658f27440dSLars Povlsen FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_NONE, \ 1668f27440dSLars Povlsen }, \ 1678f27440dSLars Povlsen } 1688f27440dSLars Povlsen 1698f27440dSLars Povlsen LUTON_P(0, SG0, NONE); 1708f27440dSLars Povlsen LUTON_P(1, SG0, NONE); 1718f27440dSLars Povlsen LUTON_P(2, SG0, NONE); 1728f27440dSLars Povlsen LUTON_P(3, SG0, NONE); 1738f27440dSLars Povlsen LUTON_P(4, TACHO, NONE); 1748f27440dSLars Povlsen LUTON_P(5, TWI, PHY_LED); 1758f27440dSLars Povlsen LUTON_P(6, TWI, PHY_LED); 1768f27440dSLars Povlsen LUTON_P(7, NONE, PHY_LED); 1778f27440dSLars Povlsen LUTON_P(8, EXT_IRQ, PHY_LED); 1788f27440dSLars Povlsen LUTON_P(9, EXT_IRQ, PHY_LED); 1798f27440dSLars Povlsen LUTON_P(10, SFP, PHY_LED); 1808f27440dSLars Povlsen LUTON_P(11, SFP, PHY_LED); 1818f27440dSLars Povlsen LUTON_P(12, SFP, PHY_LED); 1828f27440dSLars Povlsen LUTON_P(13, SFP, PHY_LED); 1838f27440dSLars Povlsen LUTON_P(14, SI, PHY_LED); 1848f27440dSLars Povlsen LUTON_P(15, SI, PHY_LED); 1858f27440dSLars Povlsen LUTON_P(16, SI, PHY_LED); 1868f27440dSLars Povlsen LUTON_P(17, SFP, PHY_LED); 1878f27440dSLars Povlsen LUTON_P(18, SFP, PHY_LED); 1888f27440dSLars Povlsen LUTON_P(19, SFP, PHY_LED); 1898f27440dSLars Povlsen LUTON_P(20, SFP, PHY_LED); 1908f27440dSLars Povlsen LUTON_P(21, SFP, PHY_LED); 1918f27440dSLars Povlsen LUTON_P(22, SFP, PHY_LED); 1928f27440dSLars Povlsen LUTON_P(23, SFP, PHY_LED); 1938f27440dSLars Povlsen LUTON_P(24, SFP, PHY_LED); 1948f27440dSLars Povlsen LUTON_P(25, SFP, PHY_LED); 1958f27440dSLars Povlsen LUTON_P(26, SFP, PHY_LED); 1968f27440dSLars Povlsen LUTON_P(27, SFP, PHY_LED); 1978f27440dSLars Povlsen LUTON_P(28, SFP, PHY_LED); 1988f27440dSLars Povlsen LUTON_P(29, PWM, NONE); 1998f27440dSLars Povlsen LUTON_P(30, UART, NONE); 2008f27440dSLars Povlsen LUTON_P(31, UART, NONE); 2018f27440dSLars Povlsen 2028f27440dSLars Povlsen #define LUTON_PIN(n) { \ 2038f27440dSLars Povlsen .number = n, \ 2048f27440dSLars Povlsen .name = "GPIO_"#n, \ 2058f27440dSLars Povlsen .drv_data = &luton_pin_##n \ 2068f27440dSLars Povlsen } 2078f27440dSLars Povlsen 2088f27440dSLars Povlsen static const struct pinctrl_pin_desc luton_pins[] = { 2098f27440dSLars Povlsen LUTON_PIN(0), 2108f27440dSLars Povlsen LUTON_PIN(1), 2118f27440dSLars Povlsen LUTON_PIN(2), 2128f27440dSLars Povlsen LUTON_PIN(3), 2138f27440dSLars Povlsen LUTON_PIN(4), 2148f27440dSLars Povlsen LUTON_PIN(5), 2158f27440dSLars Povlsen LUTON_PIN(6), 2168f27440dSLars Povlsen LUTON_PIN(7), 2178f27440dSLars Povlsen LUTON_PIN(8), 2188f27440dSLars Povlsen LUTON_PIN(9), 2198f27440dSLars Povlsen LUTON_PIN(10), 2208f27440dSLars Povlsen LUTON_PIN(11), 2218f27440dSLars Povlsen LUTON_PIN(12), 2228f27440dSLars Povlsen LUTON_PIN(13), 2238f27440dSLars Povlsen LUTON_PIN(14), 2248f27440dSLars Povlsen LUTON_PIN(15), 2258f27440dSLars Povlsen LUTON_PIN(16), 2268f27440dSLars Povlsen LUTON_PIN(17), 2278f27440dSLars Povlsen LUTON_PIN(18), 2288f27440dSLars Povlsen LUTON_PIN(19), 2298f27440dSLars Povlsen LUTON_PIN(20), 2308f27440dSLars Povlsen LUTON_PIN(21), 2318f27440dSLars Povlsen LUTON_PIN(22), 2328f27440dSLars Povlsen LUTON_PIN(23), 2338f27440dSLars Povlsen LUTON_PIN(24), 2348f27440dSLars Povlsen LUTON_PIN(25), 2358f27440dSLars Povlsen LUTON_PIN(26), 2368f27440dSLars Povlsen LUTON_PIN(27), 2378f27440dSLars Povlsen LUTON_PIN(28), 2388f27440dSLars Povlsen LUTON_PIN(29), 2398f27440dSLars Povlsen LUTON_PIN(30), 2408f27440dSLars Povlsen LUTON_PIN(31), 2418f27440dSLars Povlsen }; 2428f27440dSLars Povlsen 2436e6347e2SLars Povlsen #define SERVAL_P(p, f0, f1, f2) \ 2446e6347e2SLars Povlsen static struct ocelot_pin_caps serval_pin_##p = { \ 2456e6347e2SLars Povlsen .pin = p, \ 2466e6347e2SLars Povlsen .functions = { \ 2476e6347e2SLars Povlsen FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \ 2486e6347e2SLars Povlsen }, \ 2496e6347e2SLars Povlsen } 2506e6347e2SLars Povlsen 2516e6347e2SLars Povlsen SERVAL_P(0, SG0, NONE, NONE); 2526e6347e2SLars Povlsen SERVAL_P(1, SG0, NONE, NONE); 2536e6347e2SLars Povlsen SERVAL_P(2, SG0, NONE, NONE); 2546e6347e2SLars Povlsen SERVAL_P(3, SG0, NONE, NONE); 2556e6347e2SLars Povlsen SERVAL_P(4, TACHO, NONE, NONE); 2566e6347e2SLars Povlsen SERVAL_P(5, PWM, NONE, NONE); 2576e6347e2SLars Povlsen SERVAL_P(6, TWI, NONE, NONE); 2586e6347e2SLars Povlsen SERVAL_P(7, TWI, NONE, NONE); 2596e6347e2SLars Povlsen SERVAL_P(8, SI, NONE, NONE); 2606e6347e2SLars Povlsen SERVAL_P(9, SI, MD, NONE); 2616e6347e2SLars Povlsen SERVAL_P(10, SI, MD, NONE); 2626e6347e2SLars Povlsen SERVAL_P(11, SFP, MD, TWI_SCL_M); 2636e6347e2SLars Povlsen SERVAL_P(12, SFP, MD, TWI_SCL_M); 2646e6347e2SLars Povlsen SERVAL_P(13, SFP, UART2, TWI_SCL_M); 2656e6347e2SLars Povlsen SERVAL_P(14, SFP, UART2, TWI_SCL_M); 2666e6347e2SLars Povlsen SERVAL_P(15, SFP, PTP0, TWI_SCL_M); 2676e6347e2SLars Povlsen SERVAL_P(16, SFP, PTP0, TWI_SCL_M); 2686e6347e2SLars Povlsen SERVAL_P(17, SFP, PCI_WAKE, TWI_SCL_M); 2696e6347e2SLars Povlsen SERVAL_P(18, SFP, NONE, TWI_SCL_M); 2706e6347e2SLars Povlsen SERVAL_P(19, SFP, NONE, TWI_SCL_M); 2716e6347e2SLars Povlsen SERVAL_P(20, SFP, NONE, TWI_SCL_M); 2726e6347e2SLars Povlsen SERVAL_P(21, SFP, NONE, TWI_SCL_M); 2736e6347e2SLars Povlsen SERVAL_P(22, NONE, NONE, NONE); 2746e6347e2SLars Povlsen SERVAL_P(23, NONE, NONE, NONE); 2756e6347e2SLars Povlsen SERVAL_P(24, NONE, NONE, NONE); 2766e6347e2SLars Povlsen SERVAL_P(25, NONE, NONE, NONE); 2776e6347e2SLars Povlsen SERVAL_P(26, UART, NONE, NONE); 2786e6347e2SLars Povlsen SERVAL_P(27, UART, NONE, NONE); 2796e6347e2SLars Povlsen SERVAL_P(28, IRQ0, NONE, NONE); 2806e6347e2SLars Povlsen SERVAL_P(29, IRQ1, NONE, NONE); 2816e6347e2SLars Povlsen SERVAL_P(30, PTP0, NONE, NONE); 2826e6347e2SLars Povlsen SERVAL_P(31, PTP0, NONE, NONE); 2836e6347e2SLars Povlsen 2846e6347e2SLars Povlsen #define SERVAL_PIN(n) { \ 2856e6347e2SLars Povlsen .number = n, \ 2866e6347e2SLars Povlsen .name = "GPIO_"#n, \ 2876e6347e2SLars Povlsen .drv_data = &serval_pin_##n \ 2886e6347e2SLars Povlsen } 2896e6347e2SLars Povlsen 2906e6347e2SLars Povlsen static const struct pinctrl_pin_desc serval_pins[] = { 2916e6347e2SLars Povlsen SERVAL_PIN(0), 2926e6347e2SLars Povlsen SERVAL_PIN(1), 2936e6347e2SLars Povlsen SERVAL_PIN(2), 2946e6347e2SLars Povlsen SERVAL_PIN(3), 2956e6347e2SLars Povlsen SERVAL_PIN(4), 2966e6347e2SLars Povlsen SERVAL_PIN(5), 2976e6347e2SLars Povlsen SERVAL_PIN(6), 2986e6347e2SLars Povlsen SERVAL_PIN(7), 2996e6347e2SLars Povlsen SERVAL_PIN(8), 3006e6347e2SLars Povlsen SERVAL_PIN(9), 3016e6347e2SLars Povlsen SERVAL_PIN(10), 3026e6347e2SLars Povlsen SERVAL_PIN(11), 3036e6347e2SLars Povlsen SERVAL_PIN(12), 3046e6347e2SLars Povlsen SERVAL_PIN(13), 3056e6347e2SLars Povlsen SERVAL_PIN(14), 3066e6347e2SLars Povlsen SERVAL_PIN(15), 3076e6347e2SLars Povlsen SERVAL_PIN(16), 3086e6347e2SLars Povlsen SERVAL_PIN(17), 3096e6347e2SLars Povlsen SERVAL_PIN(18), 3106e6347e2SLars Povlsen SERVAL_PIN(19), 3116e6347e2SLars Povlsen SERVAL_PIN(20), 3126e6347e2SLars Povlsen SERVAL_PIN(21), 3136e6347e2SLars Povlsen SERVAL_PIN(22), 3146e6347e2SLars Povlsen SERVAL_PIN(23), 3156e6347e2SLars Povlsen SERVAL_PIN(24), 3166e6347e2SLars Povlsen SERVAL_PIN(25), 3176e6347e2SLars Povlsen SERVAL_PIN(26), 3186e6347e2SLars Povlsen SERVAL_PIN(27), 3196e6347e2SLars Povlsen SERVAL_PIN(28), 3206e6347e2SLars Povlsen SERVAL_PIN(29), 3216e6347e2SLars Povlsen SERVAL_PIN(30), 3226e6347e2SLars Povlsen SERVAL_PIN(31), 3236e6347e2SLars Povlsen }; 3246e6347e2SLars Povlsen 325ce8dc094SAlexandre Belloni #define OCELOT_P(p, f0, f1, f2) \ 326ce8dc094SAlexandre Belloni static struct ocelot_pin_caps ocelot_pin_##p = { \ 327ce8dc094SAlexandre Belloni .pin = p, \ 328ce8dc094SAlexandre Belloni .functions = { \ 329ce8dc094SAlexandre Belloni FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \ 330ce8dc094SAlexandre Belloni }, \ 331ce8dc094SAlexandre Belloni } 332ce8dc094SAlexandre Belloni 333ce8dc094SAlexandre Belloni OCELOT_P(0, SG0, NONE, NONE); 334ce8dc094SAlexandre Belloni OCELOT_P(1, SG0, NONE, NONE); 335ce8dc094SAlexandre Belloni OCELOT_P(2, SG0, NONE, NONE); 336ce8dc094SAlexandre Belloni OCELOT_P(3, SG0, NONE, NONE); 33717f79084SAlexandre Belloni OCELOT_P(4, IRQ0_IN, IRQ0_OUT, TWI_SCL_M); 338ce8dc094SAlexandre Belloni OCELOT_P(5, IRQ1_IN, IRQ1_OUT, PCI_WAKE); 339ce8dc094SAlexandre Belloni OCELOT_P(6, UART, TWI_SCL_M, NONE); 340ce8dc094SAlexandre Belloni OCELOT_P(7, UART, TWI_SCL_M, NONE); 341ce8dc094SAlexandre Belloni OCELOT_P(8, SI, TWI_SCL_M, IRQ0_OUT); 342ce8dc094SAlexandre Belloni OCELOT_P(9, SI, TWI_SCL_M, IRQ1_OUT); 343edc72546SLars Povlsen OCELOT_P(10, PTP2, TWI_SCL_M, SFP); 344edc72546SLars Povlsen OCELOT_P(11, PTP3, TWI_SCL_M, SFP); 345edc72546SLars Povlsen OCELOT_P(12, UART2, TWI_SCL_M, SFP); 346edc72546SLars Povlsen OCELOT_P(13, UART2, TWI_SCL_M, SFP); 347edc72546SLars Povlsen OCELOT_P(14, MIIM, TWI_SCL_M, SFP); 348edc72546SLars Povlsen OCELOT_P(15, MIIM, TWI_SCL_M, SFP); 349ce8dc094SAlexandre Belloni OCELOT_P(16, TWI, NONE, SI); 350ce8dc094SAlexandre Belloni OCELOT_P(17, TWI, TWI_SCL_M, SI); 351ce8dc094SAlexandre Belloni OCELOT_P(18, PTP0, TWI_SCL_M, NONE); 352ce8dc094SAlexandre Belloni OCELOT_P(19, PTP1, TWI_SCL_M, NONE); 353edc72546SLars Povlsen OCELOT_P(20, RECO_CLK, TACHO, TWI_SCL_M); 354edc72546SLars Povlsen OCELOT_P(21, RECO_CLK, PWM, TWI_SCL_M); 355ce8dc094SAlexandre Belloni 356ce8dc094SAlexandre Belloni #define OCELOT_PIN(n) { \ 357ce8dc094SAlexandre Belloni .number = n, \ 358ce8dc094SAlexandre Belloni .name = "GPIO_"#n, \ 359ce8dc094SAlexandre Belloni .drv_data = &ocelot_pin_##n \ 360ce8dc094SAlexandre Belloni } 361ce8dc094SAlexandre Belloni 362ce8dc094SAlexandre Belloni static const struct pinctrl_pin_desc ocelot_pins[] = { 363ce8dc094SAlexandre Belloni OCELOT_PIN(0), 364ce8dc094SAlexandre Belloni OCELOT_PIN(1), 365ce8dc094SAlexandre Belloni OCELOT_PIN(2), 366ce8dc094SAlexandre Belloni OCELOT_PIN(3), 367ce8dc094SAlexandre Belloni OCELOT_PIN(4), 368ce8dc094SAlexandre Belloni OCELOT_PIN(5), 369ce8dc094SAlexandre Belloni OCELOT_PIN(6), 370ce8dc094SAlexandre Belloni OCELOT_PIN(7), 371ce8dc094SAlexandre Belloni OCELOT_PIN(8), 372ce8dc094SAlexandre Belloni OCELOT_PIN(9), 373ce8dc094SAlexandre Belloni OCELOT_PIN(10), 374ce8dc094SAlexandre Belloni OCELOT_PIN(11), 375ce8dc094SAlexandre Belloni OCELOT_PIN(12), 376ce8dc094SAlexandre Belloni OCELOT_PIN(13), 377ce8dc094SAlexandre Belloni OCELOT_PIN(14), 378ce8dc094SAlexandre Belloni OCELOT_PIN(15), 379ce8dc094SAlexandre Belloni OCELOT_PIN(16), 380ce8dc094SAlexandre Belloni OCELOT_PIN(17), 381ce8dc094SAlexandre Belloni OCELOT_PIN(18), 382ce8dc094SAlexandre Belloni OCELOT_PIN(19), 383ce8dc094SAlexandre Belloni OCELOT_PIN(20), 384ce8dc094SAlexandre Belloni OCELOT_PIN(21), 385ce8dc094SAlexandre Belloni }; 386ce8dc094SAlexandre Belloni 387da801ab5SAlexandre Belloni #define JAGUAR2_P(p, f0, f1) \ 388da801ab5SAlexandre Belloni static struct ocelot_pin_caps jaguar2_pin_##p = { \ 389da801ab5SAlexandre Belloni .pin = p, \ 390da801ab5SAlexandre Belloni .functions = { \ 391da801ab5SAlexandre Belloni FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_NONE \ 392da801ab5SAlexandre Belloni }, \ 393da801ab5SAlexandre Belloni } 394da801ab5SAlexandre Belloni 395da801ab5SAlexandre Belloni JAGUAR2_P(0, SG0, NONE); 396da801ab5SAlexandre Belloni JAGUAR2_P(1, SG0, NONE); 397da801ab5SAlexandre Belloni JAGUAR2_P(2, SG0, NONE); 398da801ab5SAlexandre Belloni JAGUAR2_P(3, SG0, NONE); 399da801ab5SAlexandre Belloni JAGUAR2_P(4, SG1, NONE); 400da801ab5SAlexandre Belloni JAGUAR2_P(5, SG1, NONE); 401da801ab5SAlexandre Belloni JAGUAR2_P(6, IRQ0_IN, IRQ0_OUT); 402da801ab5SAlexandre Belloni JAGUAR2_P(7, IRQ1_IN, IRQ1_OUT); 403da801ab5SAlexandre Belloni JAGUAR2_P(8, PTP0, NONE); 404da801ab5SAlexandre Belloni JAGUAR2_P(9, PTP1, NONE); 405da801ab5SAlexandre Belloni JAGUAR2_P(10, UART, NONE); 406da801ab5SAlexandre Belloni JAGUAR2_P(11, UART, NONE); 407da801ab5SAlexandre Belloni JAGUAR2_P(12, SG1, NONE); 408da801ab5SAlexandre Belloni JAGUAR2_P(13, SG1, NONE); 409da801ab5SAlexandre Belloni JAGUAR2_P(14, TWI, TWI_SCL_M); 410da801ab5SAlexandre Belloni JAGUAR2_P(15, TWI, NONE); 411da801ab5SAlexandre Belloni JAGUAR2_P(16, SI, TWI_SCL_M); 412da801ab5SAlexandre Belloni JAGUAR2_P(17, SI, TWI_SCL_M); 413da801ab5SAlexandre Belloni JAGUAR2_P(18, SI, TWI_SCL_M); 414da801ab5SAlexandre Belloni JAGUAR2_P(19, PCI_WAKE, NONE); 415da801ab5SAlexandre Belloni JAGUAR2_P(20, IRQ0_OUT, TWI_SCL_M); 416da801ab5SAlexandre Belloni JAGUAR2_P(21, IRQ1_OUT, TWI_SCL_M); 417da801ab5SAlexandre Belloni JAGUAR2_P(22, TACHO, NONE); 418da801ab5SAlexandre Belloni JAGUAR2_P(23, PWM, NONE); 419da801ab5SAlexandre Belloni JAGUAR2_P(24, UART2, NONE); 420da801ab5SAlexandre Belloni JAGUAR2_P(25, UART2, SI); 421da801ab5SAlexandre Belloni JAGUAR2_P(26, PTP2, SI); 422da801ab5SAlexandre Belloni JAGUAR2_P(27, PTP3, SI); 423da801ab5SAlexandre Belloni JAGUAR2_P(28, TWI2, SI); 424da801ab5SAlexandre Belloni JAGUAR2_P(29, TWI2, SI); 425da801ab5SAlexandre Belloni JAGUAR2_P(30, SG2, SI); 426da801ab5SAlexandre Belloni JAGUAR2_P(31, SG2, SI); 427da801ab5SAlexandre Belloni JAGUAR2_P(32, SG2, SI); 428da801ab5SAlexandre Belloni JAGUAR2_P(33, SG2, SI); 429da801ab5SAlexandre Belloni JAGUAR2_P(34, NONE, TWI_SCL_M); 430da801ab5SAlexandre Belloni JAGUAR2_P(35, NONE, TWI_SCL_M); 431da801ab5SAlexandre Belloni JAGUAR2_P(36, NONE, TWI_SCL_M); 432da801ab5SAlexandre Belloni JAGUAR2_P(37, NONE, TWI_SCL_M); 433da801ab5SAlexandre Belloni JAGUAR2_P(38, NONE, TWI_SCL_M); 434da801ab5SAlexandre Belloni JAGUAR2_P(39, NONE, TWI_SCL_M); 435da801ab5SAlexandre Belloni JAGUAR2_P(40, NONE, TWI_SCL_M); 436da801ab5SAlexandre Belloni JAGUAR2_P(41, NONE, TWI_SCL_M); 437da801ab5SAlexandre Belloni JAGUAR2_P(42, NONE, TWI_SCL_M); 438da801ab5SAlexandre Belloni JAGUAR2_P(43, NONE, TWI_SCL_M); 439edc72546SLars Povlsen JAGUAR2_P(44, NONE, SFP); 440edc72546SLars Povlsen JAGUAR2_P(45, NONE, SFP); 441edc72546SLars Povlsen JAGUAR2_P(46, NONE, SFP); 442edc72546SLars Povlsen JAGUAR2_P(47, NONE, SFP); 443edc72546SLars Povlsen JAGUAR2_P(48, SFP, NONE); 444edc72546SLars Povlsen JAGUAR2_P(49, SFP, SI); 445edc72546SLars Povlsen JAGUAR2_P(50, SFP, SI); 446edc72546SLars Povlsen JAGUAR2_P(51, SFP, SI); 447edc72546SLars Povlsen JAGUAR2_P(52, SFP, NONE); 448edc72546SLars Povlsen JAGUAR2_P(53, SFP, NONE); 449edc72546SLars Povlsen JAGUAR2_P(54, SFP, NONE); 450edc72546SLars Povlsen JAGUAR2_P(55, SFP, NONE); 451edc72546SLars Povlsen JAGUAR2_P(56, MIIM, SFP); 452edc72546SLars Povlsen JAGUAR2_P(57, MIIM, SFP); 453edc72546SLars Povlsen JAGUAR2_P(58, MIIM, SFP); 454edc72546SLars Povlsen JAGUAR2_P(59, MIIM, SFP); 455da801ab5SAlexandre Belloni JAGUAR2_P(60, NONE, NONE); 456da801ab5SAlexandre Belloni JAGUAR2_P(61, NONE, NONE); 457da801ab5SAlexandre Belloni JAGUAR2_P(62, NONE, NONE); 458da801ab5SAlexandre Belloni JAGUAR2_P(63, NONE, NONE); 459da801ab5SAlexandre Belloni 460da801ab5SAlexandre Belloni #define JAGUAR2_PIN(n) { \ 461da801ab5SAlexandre Belloni .number = n, \ 462da801ab5SAlexandre Belloni .name = "GPIO_"#n, \ 463da801ab5SAlexandre Belloni .drv_data = &jaguar2_pin_##n \ 464da801ab5SAlexandre Belloni } 465da801ab5SAlexandre Belloni 466da801ab5SAlexandre Belloni static const struct pinctrl_pin_desc jaguar2_pins[] = { 467da801ab5SAlexandre Belloni JAGUAR2_PIN(0), 468da801ab5SAlexandre Belloni JAGUAR2_PIN(1), 469da801ab5SAlexandre Belloni JAGUAR2_PIN(2), 470da801ab5SAlexandre Belloni JAGUAR2_PIN(3), 471da801ab5SAlexandre Belloni JAGUAR2_PIN(4), 472da801ab5SAlexandre Belloni JAGUAR2_PIN(5), 473da801ab5SAlexandre Belloni JAGUAR2_PIN(6), 474da801ab5SAlexandre Belloni JAGUAR2_PIN(7), 475da801ab5SAlexandre Belloni JAGUAR2_PIN(8), 476da801ab5SAlexandre Belloni JAGUAR2_PIN(9), 477da801ab5SAlexandre Belloni JAGUAR2_PIN(10), 478da801ab5SAlexandre Belloni JAGUAR2_PIN(11), 479da801ab5SAlexandre Belloni JAGUAR2_PIN(12), 480da801ab5SAlexandre Belloni JAGUAR2_PIN(13), 481da801ab5SAlexandre Belloni JAGUAR2_PIN(14), 482da801ab5SAlexandre Belloni JAGUAR2_PIN(15), 483da801ab5SAlexandre Belloni JAGUAR2_PIN(16), 484da801ab5SAlexandre Belloni JAGUAR2_PIN(17), 485da801ab5SAlexandre Belloni JAGUAR2_PIN(18), 486da801ab5SAlexandre Belloni JAGUAR2_PIN(19), 487da801ab5SAlexandre Belloni JAGUAR2_PIN(20), 488da801ab5SAlexandre Belloni JAGUAR2_PIN(21), 489da801ab5SAlexandre Belloni JAGUAR2_PIN(22), 490da801ab5SAlexandre Belloni JAGUAR2_PIN(23), 491da801ab5SAlexandre Belloni JAGUAR2_PIN(24), 492da801ab5SAlexandre Belloni JAGUAR2_PIN(25), 493da801ab5SAlexandre Belloni JAGUAR2_PIN(26), 494da801ab5SAlexandre Belloni JAGUAR2_PIN(27), 495da801ab5SAlexandre Belloni JAGUAR2_PIN(28), 496da801ab5SAlexandre Belloni JAGUAR2_PIN(29), 497da801ab5SAlexandre Belloni JAGUAR2_PIN(30), 498da801ab5SAlexandre Belloni JAGUAR2_PIN(31), 499da801ab5SAlexandre Belloni JAGUAR2_PIN(32), 500da801ab5SAlexandre Belloni JAGUAR2_PIN(33), 501da801ab5SAlexandre Belloni JAGUAR2_PIN(34), 502da801ab5SAlexandre Belloni JAGUAR2_PIN(35), 503da801ab5SAlexandre Belloni JAGUAR2_PIN(36), 504da801ab5SAlexandre Belloni JAGUAR2_PIN(37), 505da801ab5SAlexandre Belloni JAGUAR2_PIN(38), 506da801ab5SAlexandre Belloni JAGUAR2_PIN(39), 507da801ab5SAlexandre Belloni JAGUAR2_PIN(40), 508da801ab5SAlexandre Belloni JAGUAR2_PIN(41), 509da801ab5SAlexandre Belloni JAGUAR2_PIN(42), 510da801ab5SAlexandre Belloni JAGUAR2_PIN(43), 511da801ab5SAlexandre Belloni JAGUAR2_PIN(44), 512da801ab5SAlexandre Belloni JAGUAR2_PIN(45), 513da801ab5SAlexandre Belloni JAGUAR2_PIN(46), 514da801ab5SAlexandre Belloni JAGUAR2_PIN(47), 515da801ab5SAlexandre Belloni JAGUAR2_PIN(48), 516da801ab5SAlexandre Belloni JAGUAR2_PIN(49), 517da801ab5SAlexandre Belloni JAGUAR2_PIN(50), 518da801ab5SAlexandre Belloni JAGUAR2_PIN(51), 519da801ab5SAlexandre Belloni JAGUAR2_PIN(52), 520da801ab5SAlexandre Belloni JAGUAR2_PIN(53), 521da801ab5SAlexandre Belloni JAGUAR2_PIN(54), 522da801ab5SAlexandre Belloni JAGUAR2_PIN(55), 523da801ab5SAlexandre Belloni JAGUAR2_PIN(56), 524da801ab5SAlexandre Belloni JAGUAR2_PIN(57), 525da801ab5SAlexandre Belloni JAGUAR2_PIN(58), 526da801ab5SAlexandre Belloni JAGUAR2_PIN(59), 527da801ab5SAlexandre Belloni JAGUAR2_PIN(60), 528da801ab5SAlexandre Belloni JAGUAR2_PIN(61), 529da801ab5SAlexandre Belloni JAGUAR2_PIN(62), 530da801ab5SAlexandre Belloni JAGUAR2_PIN(63), 531da801ab5SAlexandre Belloni }; 532da801ab5SAlexandre Belloni 533f8a74760SLars Povlsen #define SPARX5_P(p, f0, f1, f2) \ 534f8a74760SLars Povlsen static struct ocelot_pin_caps sparx5_pin_##p = { \ 535f8a74760SLars Povlsen .pin = p, \ 536f8a74760SLars Povlsen .functions = { \ 537f8a74760SLars Povlsen FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2 \ 538f8a74760SLars Povlsen }, \ 539f8a74760SLars Povlsen } 540f8a74760SLars Povlsen 541f8a74760SLars Povlsen SPARX5_P(0, SG0, PLL_STAT, NONE); 542f8a74760SLars Povlsen SPARX5_P(1, SG0, NONE, NONE); 543f8a74760SLars Povlsen SPARX5_P(2, SG0, NONE, NONE); 544f8a74760SLars Povlsen SPARX5_P(3, SG0, NONE, NONE); 545f8a74760SLars Povlsen SPARX5_P(4, SG1, NONE, NONE); 546f8a74760SLars Povlsen SPARX5_P(5, SG1, NONE, NONE); 547f8a74760SLars Povlsen SPARX5_P(6, IRQ0_IN, IRQ0_OUT, SFP); 548f8a74760SLars Povlsen SPARX5_P(7, IRQ1_IN, IRQ1_OUT, SFP); 549f8a74760SLars Povlsen SPARX5_P(8, PTP0, NONE, SFP); 550f8a74760SLars Povlsen SPARX5_P(9, PTP1, SFP, TWI_SCL_M); 551f8a74760SLars Povlsen SPARX5_P(10, UART, NONE, NONE); 552f8a74760SLars Povlsen SPARX5_P(11, UART, NONE, NONE); 553f8a74760SLars Povlsen SPARX5_P(12, SG1, NONE, NONE); 554f8a74760SLars Povlsen SPARX5_P(13, SG1, NONE, NONE); 555f8a74760SLars Povlsen SPARX5_P(14, TWI, TWI_SCL_M, NONE); 556f8a74760SLars Povlsen SPARX5_P(15, TWI, NONE, NONE); 557f8a74760SLars Povlsen SPARX5_P(16, SI, TWI_SCL_M, SFP); 558f8a74760SLars Povlsen SPARX5_P(17, SI, TWI_SCL_M, SFP); 559f8a74760SLars Povlsen SPARX5_P(18, SI, TWI_SCL_M, SFP); 560f8a74760SLars Povlsen SPARX5_P(19, PCI_WAKE, TWI_SCL_M, SFP); 561f8a74760SLars Povlsen SPARX5_P(20, IRQ0_OUT, TWI_SCL_M, SFP); 562f8a74760SLars Povlsen SPARX5_P(21, IRQ1_OUT, TACHO, SFP); 563f8a74760SLars Povlsen SPARX5_P(22, TACHO, IRQ0_OUT, TWI_SCL_M); 564f8a74760SLars Povlsen SPARX5_P(23, PWM, UART3, TWI_SCL_M); 565f8a74760SLars Povlsen SPARX5_P(24, PTP2, UART3, TWI_SCL_M); 566f8a74760SLars Povlsen SPARX5_P(25, PTP3, SI, TWI_SCL_M); 567f8a74760SLars Povlsen SPARX5_P(26, UART2, SI, TWI_SCL_M); 568f8a74760SLars Povlsen SPARX5_P(27, UART2, SI, TWI_SCL_M); 569f8a74760SLars Povlsen SPARX5_P(28, TWI2, SI, SFP); 570f8a74760SLars Povlsen SPARX5_P(29, TWI2, SI, SFP); 571f8a74760SLars Povlsen SPARX5_P(30, SG2, SI, PWM); 572f8a74760SLars Povlsen SPARX5_P(31, SG2, SI, TWI_SCL_M); 573f8a74760SLars Povlsen SPARX5_P(32, SG2, SI, TWI_SCL_M); 574f8a74760SLars Povlsen SPARX5_P(33, SG2, SI, SFP); 575f8a74760SLars Povlsen SPARX5_P(34, NONE, TWI_SCL_M, EMMC); 576f8a74760SLars Povlsen SPARX5_P(35, SFP, TWI_SCL_M, EMMC); 577f8a74760SLars Povlsen SPARX5_P(36, SFP, TWI_SCL_M, EMMC); 578f8a74760SLars Povlsen SPARX5_P(37, SFP, NONE, EMMC); 579f8a74760SLars Povlsen SPARX5_P(38, NONE, TWI_SCL_M, EMMC); 580f8a74760SLars Povlsen SPARX5_P(39, SI2, TWI_SCL_M, EMMC); 581f8a74760SLars Povlsen SPARX5_P(40, SI2, TWI_SCL_M, EMMC); 582f8a74760SLars Povlsen SPARX5_P(41, SI2, TWI_SCL_M, EMMC); 583f8a74760SLars Povlsen SPARX5_P(42, SI2, TWI_SCL_M, EMMC); 584f8a74760SLars Povlsen SPARX5_P(43, SI2, TWI_SCL_M, EMMC); 585f8a74760SLars Povlsen SPARX5_P(44, SI, SFP, EMMC); 586f8a74760SLars Povlsen SPARX5_P(45, SI, SFP, EMMC); 587f8a74760SLars Povlsen SPARX5_P(46, NONE, SFP, EMMC); 588f8a74760SLars Povlsen SPARX5_P(47, NONE, SFP, EMMC); 589f8a74760SLars Povlsen SPARX5_P(48, TWI3, SI, SFP); 590f8a74760SLars Povlsen SPARX5_P(49, TWI3, NONE, SFP); 591f8a74760SLars Povlsen SPARX5_P(50, SFP, NONE, TWI_SCL_M); 592f8a74760SLars Povlsen SPARX5_P(51, SFP, SI, TWI_SCL_M); 593f8a74760SLars Povlsen SPARX5_P(52, SFP, MIIM, TWI_SCL_M); 594f8a74760SLars Povlsen SPARX5_P(53, SFP, MIIM, TWI_SCL_M); 595f8a74760SLars Povlsen SPARX5_P(54, SFP, PTP2, TWI_SCL_M); 596f8a74760SLars Povlsen SPARX5_P(55, SFP, PTP3, PCI_WAKE); 597f8a74760SLars Povlsen SPARX5_P(56, MIIM, SFP, TWI_SCL_M); 598f8a74760SLars Povlsen SPARX5_P(57, MIIM, SFP, TWI_SCL_M); 599f8a74760SLars Povlsen SPARX5_P(58, MIIM, SFP, TWI_SCL_M); 600f8a74760SLars Povlsen SPARX5_P(59, MIIM, SFP, NONE); 601f8a74760SLars Povlsen SPARX5_P(60, RECO_CLK, NONE, NONE); 602f8a74760SLars Povlsen SPARX5_P(61, RECO_CLK, NONE, NONE); 603f8a74760SLars Povlsen SPARX5_P(62, RECO_CLK, PLL_STAT, NONE); 604f8a74760SLars Povlsen SPARX5_P(63, RECO_CLK, NONE, NONE); 605f8a74760SLars Povlsen 606f8a74760SLars Povlsen #define SPARX5_PIN(n) { \ 607f8a74760SLars Povlsen .number = n, \ 608f8a74760SLars Povlsen .name = "GPIO_"#n, \ 609f8a74760SLars Povlsen .drv_data = &sparx5_pin_##n \ 610f8a74760SLars Povlsen } 611f8a74760SLars Povlsen 612f8a74760SLars Povlsen static const struct pinctrl_pin_desc sparx5_pins[] = { 613f8a74760SLars Povlsen SPARX5_PIN(0), 614f8a74760SLars Povlsen SPARX5_PIN(1), 615f8a74760SLars Povlsen SPARX5_PIN(2), 616f8a74760SLars Povlsen SPARX5_PIN(3), 617f8a74760SLars Povlsen SPARX5_PIN(4), 618f8a74760SLars Povlsen SPARX5_PIN(5), 619f8a74760SLars Povlsen SPARX5_PIN(6), 620f8a74760SLars Povlsen SPARX5_PIN(7), 621f8a74760SLars Povlsen SPARX5_PIN(8), 622f8a74760SLars Povlsen SPARX5_PIN(9), 623f8a74760SLars Povlsen SPARX5_PIN(10), 624f8a74760SLars Povlsen SPARX5_PIN(11), 625f8a74760SLars Povlsen SPARX5_PIN(12), 626f8a74760SLars Povlsen SPARX5_PIN(13), 627f8a74760SLars Povlsen SPARX5_PIN(14), 628f8a74760SLars Povlsen SPARX5_PIN(15), 629f8a74760SLars Povlsen SPARX5_PIN(16), 630f8a74760SLars Povlsen SPARX5_PIN(17), 631f8a74760SLars Povlsen SPARX5_PIN(18), 632f8a74760SLars Povlsen SPARX5_PIN(19), 633f8a74760SLars Povlsen SPARX5_PIN(20), 634f8a74760SLars Povlsen SPARX5_PIN(21), 635f8a74760SLars Povlsen SPARX5_PIN(22), 636f8a74760SLars Povlsen SPARX5_PIN(23), 637f8a74760SLars Povlsen SPARX5_PIN(24), 638f8a74760SLars Povlsen SPARX5_PIN(25), 639f8a74760SLars Povlsen SPARX5_PIN(26), 640f8a74760SLars Povlsen SPARX5_PIN(27), 641f8a74760SLars Povlsen SPARX5_PIN(28), 642f8a74760SLars Povlsen SPARX5_PIN(29), 643f8a74760SLars Povlsen SPARX5_PIN(30), 644f8a74760SLars Povlsen SPARX5_PIN(31), 645f8a74760SLars Povlsen SPARX5_PIN(32), 646f8a74760SLars Povlsen SPARX5_PIN(33), 647f8a74760SLars Povlsen SPARX5_PIN(34), 648f8a74760SLars Povlsen SPARX5_PIN(35), 649f8a74760SLars Povlsen SPARX5_PIN(36), 650f8a74760SLars Povlsen SPARX5_PIN(37), 651f8a74760SLars Povlsen SPARX5_PIN(38), 652f8a74760SLars Povlsen SPARX5_PIN(39), 653f8a74760SLars Povlsen SPARX5_PIN(40), 654f8a74760SLars Povlsen SPARX5_PIN(41), 655f8a74760SLars Povlsen SPARX5_PIN(42), 656f8a74760SLars Povlsen SPARX5_PIN(43), 657f8a74760SLars Povlsen SPARX5_PIN(44), 658f8a74760SLars Povlsen SPARX5_PIN(45), 659f8a74760SLars Povlsen SPARX5_PIN(46), 660f8a74760SLars Povlsen SPARX5_PIN(47), 661f8a74760SLars Povlsen SPARX5_PIN(48), 662f8a74760SLars Povlsen SPARX5_PIN(49), 663f8a74760SLars Povlsen SPARX5_PIN(50), 664f8a74760SLars Povlsen SPARX5_PIN(51), 665f8a74760SLars Povlsen SPARX5_PIN(52), 666f8a74760SLars Povlsen SPARX5_PIN(53), 667f8a74760SLars Povlsen SPARX5_PIN(54), 668f8a74760SLars Povlsen SPARX5_PIN(55), 669f8a74760SLars Povlsen SPARX5_PIN(56), 670f8a74760SLars Povlsen SPARX5_PIN(57), 671f8a74760SLars Povlsen SPARX5_PIN(58), 672f8a74760SLars Povlsen SPARX5_PIN(59), 673f8a74760SLars Povlsen SPARX5_PIN(60), 674f8a74760SLars Povlsen SPARX5_PIN(61), 675f8a74760SLars Povlsen SPARX5_PIN(62), 676f8a74760SLars Povlsen SPARX5_PIN(63), 677f8a74760SLars Povlsen }; 678f8a74760SLars Povlsen 679ce8dc094SAlexandre Belloni static int ocelot_get_functions_count(struct pinctrl_dev *pctldev) 680ce8dc094SAlexandre Belloni { 681ce8dc094SAlexandre Belloni return ARRAY_SIZE(ocelot_function_names); 682ce8dc094SAlexandre Belloni } 683ce8dc094SAlexandre Belloni 684ce8dc094SAlexandre Belloni static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev, 685ce8dc094SAlexandre Belloni unsigned int function) 686ce8dc094SAlexandre Belloni { 687ce8dc094SAlexandre Belloni return ocelot_function_names[function]; 688ce8dc094SAlexandre Belloni } 689ce8dc094SAlexandre Belloni 690ce8dc094SAlexandre Belloni static int ocelot_get_function_groups(struct pinctrl_dev *pctldev, 691ce8dc094SAlexandre Belloni unsigned int function, 692ce8dc094SAlexandre Belloni const char *const **groups, 693ce8dc094SAlexandre Belloni unsigned *const num_groups) 694ce8dc094SAlexandre Belloni { 695ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 696ce8dc094SAlexandre Belloni 697ce8dc094SAlexandre Belloni *groups = info->func[function].groups; 698ce8dc094SAlexandre Belloni *num_groups = info->func[function].ngroups; 699ce8dc094SAlexandre Belloni 700ce8dc094SAlexandre Belloni return 0; 701ce8dc094SAlexandre Belloni } 702ce8dc094SAlexandre Belloni 703da801ab5SAlexandre Belloni static int ocelot_pin_function_idx(struct ocelot_pinctrl *info, 704da801ab5SAlexandre Belloni unsigned int pin, unsigned int function) 705ce8dc094SAlexandre Belloni { 706da801ab5SAlexandre Belloni struct ocelot_pin_caps *p = info->desc->pins[pin].drv_data; 707ce8dc094SAlexandre Belloni int i; 708ce8dc094SAlexandre Belloni 709ce8dc094SAlexandre Belloni for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) { 710ce8dc094SAlexandre Belloni if (function == p->functions[i]) 711ce8dc094SAlexandre Belloni return i; 712ce8dc094SAlexandre Belloni } 713ce8dc094SAlexandre Belloni 714ce8dc094SAlexandre Belloni return -1; 715ce8dc094SAlexandre Belloni } 716ce8dc094SAlexandre Belloni 7174b36082eSAlexandre Belloni #define REG_ALT(msb, info, p) (OCELOT_GPIO_ALT0 * (info)->stride + 4 * ((msb) + ((info)->stride * ((p) / 32)))) 718da801ab5SAlexandre Belloni 719ce8dc094SAlexandre Belloni static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev, 720ce8dc094SAlexandre Belloni unsigned int selector, unsigned int group) 721ce8dc094SAlexandre Belloni { 722ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 723da801ab5SAlexandre Belloni struct ocelot_pin_caps *pin = info->desc->pins[group].drv_data; 724da801ab5SAlexandre Belloni unsigned int p = pin->pin % 32; 725ce8dc094SAlexandre Belloni int f; 726ce8dc094SAlexandre Belloni 727da801ab5SAlexandre Belloni f = ocelot_pin_function_idx(info, group, selector); 728ce8dc094SAlexandre Belloni if (f < 0) 729ce8dc094SAlexandre Belloni return -EINVAL; 730ce8dc094SAlexandre Belloni 731ce8dc094SAlexandre Belloni /* 732ce8dc094SAlexandre Belloni * f is encoded on two bits. 7334b36082eSAlexandre Belloni * bit 0 of f goes in BIT(pin) of ALT[0], bit 1 of f goes in BIT(pin) of 7344b36082eSAlexandre Belloni * ALT[1] 735ce8dc094SAlexandre Belloni * This is racy because both registers can't be updated at the same time 736ce8dc094SAlexandre Belloni * but it doesn't matter much for now. 737f8a74760SLars Povlsen * Note: ALT0/ALT1 are organized specially for 64 gpio targets 738ce8dc094SAlexandre Belloni */ 7394b36082eSAlexandre Belloni regmap_update_bits(info->map, REG_ALT(0, info, pin->pin), 740da801ab5SAlexandre Belloni BIT(p), f << p); 7414b36082eSAlexandre Belloni regmap_update_bits(info->map, REG_ALT(1, info, pin->pin), 742da801ab5SAlexandre Belloni BIT(p), f << (p - 1)); 743ce8dc094SAlexandre Belloni 744ce8dc094SAlexandre Belloni return 0; 745ce8dc094SAlexandre Belloni } 746ce8dc094SAlexandre Belloni 7474b36082eSAlexandre Belloni #define REG(r, info, p) ((r) * (info)->stride + (4 * ((p) / 32))) 7484b36082eSAlexandre Belloni 749ce8dc094SAlexandre Belloni static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev, 750ce8dc094SAlexandre Belloni struct pinctrl_gpio_range *range, 751ce8dc094SAlexandre Belloni unsigned int pin, bool input) 752ce8dc094SAlexandre Belloni { 753ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 754da801ab5SAlexandre Belloni unsigned int p = pin % 32; 755ce8dc094SAlexandre Belloni 756f2818ba3SAlexandre Belloni regmap_update_bits(info->map, REG(OCELOT_GPIO_OE, info, pin), BIT(p), 757da801ab5SAlexandre Belloni input ? 0 : BIT(p)); 758ce8dc094SAlexandre Belloni 759ce8dc094SAlexandre Belloni return 0; 760ce8dc094SAlexandre Belloni } 761ce8dc094SAlexandre Belloni 762ce8dc094SAlexandre Belloni static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev, 763ce8dc094SAlexandre Belloni struct pinctrl_gpio_range *range, 764ce8dc094SAlexandre Belloni unsigned int offset) 765ce8dc094SAlexandre Belloni { 766ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 767da801ab5SAlexandre Belloni unsigned int p = offset % 32; 768ce8dc094SAlexandre Belloni 7694b36082eSAlexandre Belloni regmap_update_bits(info->map, REG_ALT(0, info, offset), 770da801ab5SAlexandre Belloni BIT(p), 0); 7714b36082eSAlexandre Belloni regmap_update_bits(info->map, REG_ALT(1, info, offset), 772da801ab5SAlexandre Belloni BIT(p), 0); 773ce8dc094SAlexandre Belloni 774ce8dc094SAlexandre Belloni return 0; 775ce8dc094SAlexandre Belloni } 776ce8dc094SAlexandre Belloni 777ce8dc094SAlexandre Belloni static const struct pinmux_ops ocelot_pmx_ops = { 778ce8dc094SAlexandre Belloni .get_functions_count = ocelot_get_functions_count, 779ce8dc094SAlexandre Belloni .get_function_name = ocelot_get_function_name, 780ce8dc094SAlexandre Belloni .get_function_groups = ocelot_get_function_groups, 781ce8dc094SAlexandre Belloni .set_mux = ocelot_pinmux_set_mux, 782ce8dc094SAlexandre Belloni .gpio_set_direction = ocelot_gpio_set_direction, 783ce8dc094SAlexandre Belloni .gpio_request_enable = ocelot_gpio_request_enable, 784ce8dc094SAlexandre Belloni }; 785ce8dc094SAlexandre Belloni 786ce8dc094SAlexandre Belloni static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev) 787ce8dc094SAlexandre Belloni { 788da801ab5SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 789da801ab5SAlexandre Belloni 790da801ab5SAlexandre Belloni return info->desc->npins; 791ce8dc094SAlexandre Belloni } 792ce8dc094SAlexandre Belloni 793ce8dc094SAlexandre Belloni static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev, 794ce8dc094SAlexandre Belloni unsigned int group) 795ce8dc094SAlexandre Belloni { 796da801ab5SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 797da801ab5SAlexandre Belloni 798da801ab5SAlexandre Belloni return info->desc->pins[group].name; 799ce8dc094SAlexandre Belloni } 800ce8dc094SAlexandre Belloni 801ce8dc094SAlexandre Belloni static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev, 802ce8dc094SAlexandre Belloni unsigned int group, 803ce8dc094SAlexandre Belloni const unsigned int **pins, 804ce8dc094SAlexandre Belloni unsigned int *num_pins) 805ce8dc094SAlexandre Belloni { 806da801ab5SAlexandre Belloni struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 807da801ab5SAlexandre Belloni 808da801ab5SAlexandre Belloni *pins = &info->desc->pins[group].number; 809ce8dc094SAlexandre Belloni *num_pins = 1; 810ce8dc094SAlexandre Belloni 811ce8dc094SAlexandre Belloni return 0; 812ce8dc094SAlexandre Belloni } 813ce8dc094SAlexandre Belloni 814f8a74760SLars Povlsen static int ocelot_hw_get_value(struct ocelot_pinctrl *info, 815f8a74760SLars Povlsen unsigned int pin, 816f8a74760SLars Povlsen unsigned int reg, 817f8a74760SLars Povlsen int *val) 818f8a74760SLars Povlsen { 819f8a74760SLars Povlsen int ret = -EOPNOTSUPP; 820f8a74760SLars Povlsen 821f8a74760SLars Povlsen if (info->pincfg) { 822f8a74760SLars Povlsen u32 regcfg = readl(info->pincfg + (pin * sizeof(u32))); 823f8a74760SLars Povlsen 824f8a74760SLars Povlsen ret = 0; 825f8a74760SLars Povlsen switch (reg) { 826f8a74760SLars Povlsen case PINCONF_BIAS: 827f8a74760SLars Povlsen *val = regcfg & BIAS_BITS; 828f8a74760SLars Povlsen break; 829f8a74760SLars Povlsen 830f8a74760SLars Povlsen case PINCONF_SCHMITT: 831f8a74760SLars Povlsen *val = regcfg & SCHMITT_BIT; 832f8a74760SLars Povlsen break; 833f8a74760SLars Povlsen 834f8a74760SLars Povlsen case PINCONF_DRIVE_STRENGTH: 835f8a74760SLars Povlsen *val = regcfg & DRIVE_BITS; 836f8a74760SLars Povlsen break; 837f8a74760SLars Povlsen 838f8a74760SLars Povlsen default: 839f8a74760SLars Povlsen ret = -EOPNOTSUPP; 840f8a74760SLars Povlsen break; 841f8a74760SLars Povlsen } 842f8a74760SLars Povlsen } 843f8a74760SLars Povlsen return ret; 844f8a74760SLars Povlsen } 845f8a74760SLars Povlsen 846f8a74760SLars Povlsen static int ocelot_hw_set_value(struct ocelot_pinctrl *info, 847f8a74760SLars Povlsen unsigned int pin, 848f8a74760SLars Povlsen unsigned int reg, 849f8a74760SLars Povlsen int val) 850f8a74760SLars Povlsen { 851f8a74760SLars Povlsen int ret = -EOPNOTSUPP; 852f8a74760SLars Povlsen 853f8a74760SLars Povlsen if (info->pincfg) { 854f8a74760SLars Povlsen void __iomem *regaddr = info->pincfg + (pin * sizeof(u32)); 855f8a74760SLars Povlsen 856f8a74760SLars Povlsen ret = 0; 857f8a74760SLars Povlsen switch (reg) { 858f8a74760SLars Povlsen case PINCONF_BIAS: 859f8a74760SLars Povlsen ocelot_clrsetbits(regaddr, BIAS_BITS, val); 860f8a74760SLars Povlsen break; 861f8a74760SLars Povlsen 862f8a74760SLars Povlsen case PINCONF_SCHMITT: 863f8a74760SLars Povlsen ocelot_clrsetbits(regaddr, SCHMITT_BIT, val); 864f8a74760SLars Povlsen break; 865f8a74760SLars Povlsen 866f8a74760SLars Povlsen case PINCONF_DRIVE_STRENGTH: 867f8a74760SLars Povlsen if (val <= 3) 868f8a74760SLars Povlsen ocelot_clrsetbits(regaddr, DRIVE_BITS, val); 869f8a74760SLars Povlsen else 870f8a74760SLars Povlsen ret = -EINVAL; 871f8a74760SLars Povlsen break; 872f8a74760SLars Povlsen 873f8a74760SLars Povlsen default: 874f8a74760SLars Povlsen ret = -EOPNOTSUPP; 875f8a74760SLars Povlsen break; 876f8a74760SLars Povlsen } 877f8a74760SLars Povlsen } 878f8a74760SLars Povlsen return ret; 879f8a74760SLars Povlsen } 880f8a74760SLars Povlsen 881f8a74760SLars Povlsen static int ocelot_pinconf_get(struct pinctrl_dev *pctldev, 882f8a74760SLars Povlsen unsigned int pin, unsigned long *config) 883f8a74760SLars Povlsen { 884f8a74760SLars Povlsen struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 885f8a74760SLars Povlsen u32 param = pinconf_to_config_param(*config); 886f8a74760SLars Povlsen int val, err; 887f8a74760SLars Povlsen 888f8a74760SLars Povlsen switch (param) { 889f8a74760SLars Povlsen case PIN_CONFIG_BIAS_DISABLE: 890f8a74760SLars Povlsen case PIN_CONFIG_BIAS_PULL_UP: 891f8a74760SLars Povlsen case PIN_CONFIG_BIAS_PULL_DOWN: 892f8a74760SLars Povlsen err = ocelot_hw_get_value(info, pin, PINCONF_BIAS, &val); 893f8a74760SLars Povlsen if (err) 894f8a74760SLars Povlsen return err; 895f8a74760SLars Povlsen if (param == PIN_CONFIG_BIAS_DISABLE) 89654515257SKaixu Xia val = (val == 0); 897f8a74760SLars Povlsen else if (param == PIN_CONFIG_BIAS_PULL_DOWN) 898f8a74760SLars Povlsen val = (val & BIAS_PD_BIT ? true : false); 899f8a74760SLars Povlsen else /* PIN_CONFIG_BIAS_PULL_UP */ 900f8a74760SLars Povlsen val = (val & BIAS_PU_BIT ? true : false); 901f8a74760SLars Povlsen break; 902f8a74760SLars Povlsen 903f8a74760SLars Povlsen case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 904f8a74760SLars Povlsen err = ocelot_hw_get_value(info, pin, PINCONF_SCHMITT, &val); 905f8a74760SLars Povlsen if (err) 906f8a74760SLars Povlsen return err; 907f8a74760SLars Povlsen 908f8a74760SLars Povlsen val = (val & SCHMITT_BIT ? true : false); 909f8a74760SLars Povlsen break; 910f8a74760SLars Povlsen 911f8a74760SLars Povlsen case PIN_CONFIG_DRIVE_STRENGTH: 912f8a74760SLars Povlsen err = ocelot_hw_get_value(info, pin, PINCONF_DRIVE_STRENGTH, 913f8a74760SLars Povlsen &val); 914f8a74760SLars Povlsen if (err) 915f8a74760SLars Povlsen return err; 916f8a74760SLars Povlsen break; 917f8a74760SLars Povlsen 918f8a74760SLars Povlsen case PIN_CONFIG_OUTPUT: 919f8a74760SLars Povlsen err = regmap_read(info->map, REG(OCELOT_GPIO_OUT, info, pin), 920f8a74760SLars Povlsen &val); 921f8a74760SLars Povlsen if (err) 922f8a74760SLars Povlsen return err; 923f8a74760SLars Povlsen val = !!(val & BIT(pin % 32)); 924f8a74760SLars Povlsen break; 925f8a74760SLars Povlsen 926f8a74760SLars Povlsen case PIN_CONFIG_INPUT_ENABLE: 927f8a74760SLars Povlsen case PIN_CONFIG_OUTPUT_ENABLE: 928f8a74760SLars Povlsen err = regmap_read(info->map, REG(OCELOT_GPIO_OE, info, pin), 929f8a74760SLars Povlsen &val); 930f8a74760SLars Povlsen if (err) 931f8a74760SLars Povlsen return err; 932f8a74760SLars Povlsen val = val & BIT(pin % 32); 933f8a74760SLars Povlsen if (param == PIN_CONFIG_OUTPUT_ENABLE) 934f8a74760SLars Povlsen val = !!val; 935f8a74760SLars Povlsen else 936f8a74760SLars Povlsen val = !val; 937f8a74760SLars Povlsen break; 938f8a74760SLars Povlsen 939f8a74760SLars Povlsen default: 940f8a74760SLars Povlsen return -EOPNOTSUPP; 941f8a74760SLars Povlsen } 942f8a74760SLars Povlsen 943f8a74760SLars Povlsen *config = pinconf_to_config_packed(param, val); 944f8a74760SLars Povlsen 945f8a74760SLars Povlsen return 0; 946f8a74760SLars Povlsen } 947f8a74760SLars Povlsen 948f8a74760SLars Povlsen static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 949f8a74760SLars Povlsen unsigned long *configs, unsigned int num_configs) 950f8a74760SLars Povlsen { 951f8a74760SLars Povlsen struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); 952f8a74760SLars Povlsen u32 param, arg, p; 953f8a74760SLars Povlsen int cfg, err = 0; 954f8a74760SLars Povlsen 955f8a74760SLars Povlsen for (cfg = 0; cfg < num_configs; cfg++) { 956f8a74760SLars Povlsen param = pinconf_to_config_param(configs[cfg]); 957f8a74760SLars Povlsen arg = pinconf_to_config_argument(configs[cfg]); 958f8a74760SLars Povlsen 959f8a74760SLars Povlsen switch (param) { 960f8a74760SLars Povlsen case PIN_CONFIG_BIAS_DISABLE: 961f8a74760SLars Povlsen case PIN_CONFIG_BIAS_PULL_UP: 962f8a74760SLars Povlsen case PIN_CONFIG_BIAS_PULL_DOWN: 963f8a74760SLars Povlsen arg = (param == PIN_CONFIG_BIAS_DISABLE) ? 0 : 964f8a74760SLars Povlsen (param == PIN_CONFIG_BIAS_PULL_UP) ? BIAS_PU_BIT : 965f8a74760SLars Povlsen BIAS_PD_BIT; 966f8a74760SLars Povlsen 967f8a74760SLars Povlsen err = ocelot_hw_set_value(info, pin, PINCONF_BIAS, arg); 968f8a74760SLars Povlsen if (err) 969f8a74760SLars Povlsen goto err; 970f8a74760SLars Povlsen 971f8a74760SLars Povlsen break; 972f8a74760SLars Povlsen 973f8a74760SLars Povlsen case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 974f8a74760SLars Povlsen arg = arg ? SCHMITT_BIT : 0; 975f8a74760SLars Povlsen err = ocelot_hw_set_value(info, pin, PINCONF_SCHMITT, 976f8a74760SLars Povlsen arg); 977f8a74760SLars Povlsen if (err) 978f8a74760SLars Povlsen goto err; 979f8a74760SLars Povlsen 980f8a74760SLars Povlsen break; 981f8a74760SLars Povlsen 982f8a74760SLars Povlsen case PIN_CONFIG_DRIVE_STRENGTH: 983f8a74760SLars Povlsen err = ocelot_hw_set_value(info, pin, 984f8a74760SLars Povlsen PINCONF_DRIVE_STRENGTH, 985f8a74760SLars Povlsen arg); 986f8a74760SLars Povlsen if (err) 987f8a74760SLars Povlsen goto err; 988f8a74760SLars Povlsen 989f8a74760SLars Povlsen break; 990f8a74760SLars Povlsen 991f8a74760SLars Povlsen case PIN_CONFIG_OUTPUT_ENABLE: 992f8a74760SLars Povlsen case PIN_CONFIG_INPUT_ENABLE: 993f8a74760SLars Povlsen case PIN_CONFIG_OUTPUT: 994f8a74760SLars Povlsen p = pin % 32; 995f8a74760SLars Povlsen if (arg) 996f8a74760SLars Povlsen regmap_write(info->map, 997f8a74760SLars Povlsen REG(OCELOT_GPIO_OUT_SET, info, 998f8a74760SLars Povlsen pin), 999f8a74760SLars Povlsen BIT(p)); 1000f8a74760SLars Povlsen else 1001f8a74760SLars Povlsen regmap_write(info->map, 1002f8a74760SLars Povlsen REG(OCELOT_GPIO_OUT_CLR, info, 1003f8a74760SLars Povlsen pin), 1004f8a74760SLars Povlsen BIT(p)); 1005f8a74760SLars Povlsen regmap_update_bits(info->map, 1006f8a74760SLars Povlsen REG(OCELOT_GPIO_OE, info, pin), 1007f8a74760SLars Povlsen BIT(p), 1008f8a74760SLars Povlsen param == PIN_CONFIG_INPUT_ENABLE ? 1009f8a74760SLars Povlsen 0 : BIT(p)); 1010f8a74760SLars Povlsen break; 1011f8a74760SLars Povlsen 1012f8a74760SLars Povlsen default: 1013f8a74760SLars Povlsen err = -EOPNOTSUPP; 1014f8a74760SLars Povlsen } 1015f8a74760SLars Povlsen } 1016f8a74760SLars Povlsen err: 1017f8a74760SLars Povlsen return err; 1018f8a74760SLars Povlsen } 1019f8a74760SLars Povlsen 1020f8a74760SLars Povlsen static const struct pinconf_ops ocelot_confops = { 1021f8a74760SLars Povlsen .is_generic = true, 1022f8a74760SLars Povlsen .pin_config_get = ocelot_pinconf_get, 1023f8a74760SLars Povlsen .pin_config_set = ocelot_pinconf_set, 1024f8a74760SLars Povlsen .pin_config_config_dbg_show = pinconf_generic_dump_config, 1025f8a74760SLars Povlsen }; 1026f8a74760SLars Povlsen 1027ce8dc094SAlexandre Belloni static const struct pinctrl_ops ocelot_pctl_ops = { 1028ce8dc094SAlexandre Belloni .get_groups_count = ocelot_pctl_get_groups_count, 1029ce8dc094SAlexandre Belloni .get_group_name = ocelot_pctl_get_group_name, 1030ce8dc094SAlexandre Belloni .get_group_pins = ocelot_pctl_get_group_pins, 1031ce8dc094SAlexandre Belloni .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 1032ce8dc094SAlexandre Belloni .dt_free_map = pinconf_generic_dt_free_map, 1033ce8dc094SAlexandre Belloni }; 1034ce8dc094SAlexandre Belloni 10358f27440dSLars Povlsen static struct pinctrl_desc luton_desc = { 10368f27440dSLars Povlsen .name = "luton-pinctrl", 10378f27440dSLars Povlsen .pins = luton_pins, 10388f27440dSLars Povlsen .npins = ARRAY_SIZE(luton_pins), 10398f27440dSLars Povlsen .pctlops = &ocelot_pctl_ops, 10408f27440dSLars Povlsen .pmxops = &ocelot_pmx_ops, 10418f27440dSLars Povlsen .owner = THIS_MODULE, 10428f27440dSLars Povlsen }; 10438f27440dSLars Povlsen 10446e6347e2SLars Povlsen static struct pinctrl_desc serval_desc = { 10456e6347e2SLars Povlsen .name = "serval-pinctrl", 10466e6347e2SLars Povlsen .pins = serval_pins, 10476e6347e2SLars Povlsen .npins = ARRAY_SIZE(serval_pins), 10486e6347e2SLars Povlsen .pctlops = &ocelot_pctl_ops, 10496e6347e2SLars Povlsen .pmxops = &ocelot_pmx_ops, 10506e6347e2SLars Povlsen .owner = THIS_MODULE, 10516e6347e2SLars Povlsen }; 10526e6347e2SLars Povlsen 1053ce8dc094SAlexandre Belloni static struct pinctrl_desc ocelot_desc = { 1054ce8dc094SAlexandre Belloni .name = "ocelot-pinctrl", 1055ce8dc094SAlexandre Belloni .pins = ocelot_pins, 1056ce8dc094SAlexandre Belloni .npins = ARRAY_SIZE(ocelot_pins), 1057ce8dc094SAlexandre Belloni .pctlops = &ocelot_pctl_ops, 1058ce8dc094SAlexandre Belloni .pmxops = &ocelot_pmx_ops, 1059ce8dc094SAlexandre Belloni .owner = THIS_MODULE, 1060ce8dc094SAlexandre Belloni }; 1061ce8dc094SAlexandre Belloni 1062da801ab5SAlexandre Belloni static struct pinctrl_desc jaguar2_desc = { 1063da801ab5SAlexandre Belloni .name = "jaguar2-pinctrl", 1064da801ab5SAlexandre Belloni .pins = jaguar2_pins, 1065da801ab5SAlexandre Belloni .npins = ARRAY_SIZE(jaguar2_pins), 1066da801ab5SAlexandre Belloni .pctlops = &ocelot_pctl_ops, 1067da801ab5SAlexandre Belloni .pmxops = &ocelot_pmx_ops, 1068da801ab5SAlexandre Belloni .owner = THIS_MODULE, 1069da801ab5SAlexandre Belloni }; 1070da801ab5SAlexandre Belloni 1071f8a74760SLars Povlsen static struct pinctrl_desc sparx5_desc = { 1072f8a74760SLars Povlsen .name = "sparx5-pinctrl", 1073f8a74760SLars Povlsen .pins = sparx5_pins, 1074f8a74760SLars Povlsen .npins = ARRAY_SIZE(sparx5_pins), 1075f8a74760SLars Povlsen .pctlops = &ocelot_pctl_ops, 1076f8a74760SLars Povlsen .pmxops = &ocelot_pmx_ops, 1077f8a74760SLars Povlsen .confops = &ocelot_confops, 1078f8a74760SLars Povlsen .owner = THIS_MODULE, 1079f8a74760SLars Povlsen }; 1080f8a74760SLars Povlsen 1081ce8dc094SAlexandre Belloni static int ocelot_create_group_func_map(struct device *dev, 1082ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info) 1083ce8dc094SAlexandre Belloni { 1084ce8dc094SAlexandre Belloni int f, npins, i; 1085da801ab5SAlexandre Belloni u8 *pins = kcalloc(info->desc->npins, sizeof(u8), GFP_KERNEL); 1086da801ab5SAlexandre Belloni 1087da801ab5SAlexandre Belloni if (!pins) 1088da801ab5SAlexandre Belloni return -ENOMEM; 1089ce8dc094SAlexandre Belloni 1090ce8dc094SAlexandre Belloni for (f = 0; f < FUNC_MAX; f++) { 1091da801ab5SAlexandre Belloni for (npins = 0, i = 0; i < info->desc->npins; i++) { 1092da801ab5SAlexandre Belloni if (ocelot_pin_function_idx(info, i, f) >= 0) 1093ce8dc094SAlexandre Belloni pins[npins++] = i; 1094ce8dc094SAlexandre Belloni } 1095ce8dc094SAlexandre Belloni 1096da801ab5SAlexandre Belloni if (!npins) 1097da801ab5SAlexandre Belloni continue; 1098da801ab5SAlexandre Belloni 1099ce8dc094SAlexandre Belloni info->func[f].ngroups = npins; 1100da801ab5SAlexandre Belloni info->func[f].groups = devm_kcalloc(dev, npins, sizeof(char *), 1101ce8dc094SAlexandre Belloni GFP_KERNEL); 1102da801ab5SAlexandre Belloni if (!info->func[f].groups) { 1103da801ab5SAlexandre Belloni kfree(pins); 1104ce8dc094SAlexandre Belloni return -ENOMEM; 1105da801ab5SAlexandre Belloni } 1106ce8dc094SAlexandre Belloni 1107ce8dc094SAlexandre Belloni for (i = 0; i < npins; i++) 1108f8a74760SLars Povlsen info->func[f].groups[i] = 1109f8a74760SLars Povlsen info->desc->pins[pins[i]].name; 1110ce8dc094SAlexandre Belloni } 1111ce8dc094SAlexandre Belloni 1112da801ab5SAlexandre Belloni kfree(pins); 1113da801ab5SAlexandre Belloni 1114ce8dc094SAlexandre Belloni return 0; 1115ce8dc094SAlexandre Belloni } 1116ce8dc094SAlexandre Belloni 1117ce8dc094SAlexandre Belloni static int ocelot_pinctrl_register(struct platform_device *pdev, 1118ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info) 1119ce8dc094SAlexandre Belloni { 1120ce8dc094SAlexandre Belloni int ret; 1121ce8dc094SAlexandre Belloni 1122ce8dc094SAlexandre Belloni ret = ocelot_create_group_func_map(&pdev->dev, info); 1123ce8dc094SAlexandre Belloni if (ret) { 1124ce8dc094SAlexandre Belloni dev_err(&pdev->dev, "Unable to create group func map.\n"); 1125ce8dc094SAlexandre Belloni return ret; 1126ce8dc094SAlexandre Belloni } 1127ce8dc094SAlexandre Belloni 1128da801ab5SAlexandre Belloni info->pctl = devm_pinctrl_register(&pdev->dev, info->desc, info); 1129ce8dc094SAlexandre Belloni if (IS_ERR(info->pctl)) { 1130ce8dc094SAlexandre Belloni dev_err(&pdev->dev, "Failed to register pinctrl\n"); 1131ce8dc094SAlexandre Belloni return PTR_ERR(info->pctl); 1132ce8dc094SAlexandre Belloni } 1133ce8dc094SAlexandre Belloni 1134ce8dc094SAlexandre Belloni return 0; 1135ce8dc094SAlexandre Belloni } 1136ce8dc094SAlexandre Belloni 1137ce8dc094SAlexandre Belloni static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset) 1138ce8dc094SAlexandre Belloni { 1139ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1140ce8dc094SAlexandre Belloni unsigned int val; 1141ce8dc094SAlexandre Belloni 1142da801ab5SAlexandre Belloni regmap_read(info->map, REG(OCELOT_GPIO_IN, info, offset), &val); 1143ce8dc094SAlexandre Belloni 1144da801ab5SAlexandre Belloni return !!(val & BIT(offset % 32)); 1145ce8dc094SAlexandre Belloni } 1146ce8dc094SAlexandre Belloni 1147ce8dc094SAlexandre Belloni static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset, 1148ce8dc094SAlexandre Belloni int value) 1149ce8dc094SAlexandre Belloni { 1150ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1151ce8dc094SAlexandre Belloni 1152ce8dc094SAlexandre Belloni if (value) 1153da801ab5SAlexandre Belloni regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset), 1154da801ab5SAlexandre Belloni BIT(offset % 32)); 1155ce8dc094SAlexandre Belloni else 1156da801ab5SAlexandre Belloni regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset), 1157da801ab5SAlexandre Belloni BIT(offset % 32)); 1158ce8dc094SAlexandre Belloni } 1159ce8dc094SAlexandre Belloni 1160ce8dc094SAlexandre Belloni static int ocelot_gpio_get_direction(struct gpio_chip *chip, 1161ce8dc094SAlexandre Belloni unsigned int offset) 1162ce8dc094SAlexandre Belloni { 1163ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1164ce8dc094SAlexandre Belloni unsigned int val; 1165ce8dc094SAlexandre Belloni 1166da801ab5SAlexandre Belloni regmap_read(info->map, REG(OCELOT_GPIO_OE, info, offset), &val); 1167ce8dc094SAlexandre Belloni 11683c827873SMatti Vaittinen if (val & BIT(offset % 32)) 11693c827873SMatti Vaittinen return GPIO_LINE_DIRECTION_OUT; 11703c827873SMatti Vaittinen 11713c827873SMatti Vaittinen return GPIO_LINE_DIRECTION_IN; 1172ce8dc094SAlexandre Belloni } 1173ce8dc094SAlexandre Belloni 1174ce8dc094SAlexandre Belloni static int ocelot_gpio_direction_input(struct gpio_chip *chip, 1175ce8dc094SAlexandre Belloni unsigned int offset) 1176ce8dc094SAlexandre Belloni { 1177ce8dc094SAlexandre Belloni return pinctrl_gpio_direction_input(chip->base + offset); 1178ce8dc094SAlexandre Belloni } 1179ce8dc094SAlexandre Belloni 1180ce8dc094SAlexandre Belloni static int ocelot_gpio_direction_output(struct gpio_chip *chip, 1181ce8dc094SAlexandre Belloni unsigned int offset, int value) 1182ce8dc094SAlexandre Belloni { 1183ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1184da801ab5SAlexandre Belloni unsigned int pin = BIT(offset % 32); 1185ce8dc094SAlexandre Belloni 1186ce8dc094SAlexandre Belloni if (value) 1187da801ab5SAlexandre Belloni regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset), 1188da801ab5SAlexandre Belloni pin); 1189ce8dc094SAlexandre Belloni else 1190da801ab5SAlexandre Belloni regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset), 1191da801ab5SAlexandre Belloni pin); 1192ce8dc094SAlexandre Belloni 1193ce8dc094SAlexandre Belloni return pinctrl_gpio_direction_output(chip->base + offset); 1194ce8dc094SAlexandre Belloni } 1195ce8dc094SAlexandre Belloni 1196ce8dc094SAlexandre Belloni static const struct gpio_chip ocelot_gpiolib_chip = { 1197ce8dc094SAlexandre Belloni .request = gpiochip_generic_request, 1198ce8dc094SAlexandre Belloni .free = gpiochip_generic_free, 1199ce8dc094SAlexandre Belloni .set = ocelot_gpio_set, 1200ce8dc094SAlexandre Belloni .get = ocelot_gpio_get, 1201ce8dc094SAlexandre Belloni .get_direction = ocelot_gpio_get_direction, 1202ce8dc094SAlexandre Belloni .direction_input = ocelot_gpio_direction_input, 1203ce8dc094SAlexandre Belloni .direction_output = ocelot_gpio_direction_output, 1204ce8dc094SAlexandre Belloni .owner = THIS_MODULE, 1205ce8dc094SAlexandre Belloni }; 1206ce8dc094SAlexandre Belloni 1207be36abb7SQuentin Schulz static void ocelot_irq_mask(struct irq_data *data) 1208be36abb7SQuentin Schulz { 1209be36abb7SQuentin Schulz struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 1210be36abb7SQuentin Schulz struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1211be36abb7SQuentin Schulz unsigned int gpio = irqd_to_hwirq(data); 1212be36abb7SQuentin Schulz 1213da801ab5SAlexandre Belloni regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio), 1214da801ab5SAlexandre Belloni BIT(gpio % 32), 0); 1215be36abb7SQuentin Schulz } 1216be36abb7SQuentin Schulz 1217be36abb7SQuentin Schulz static void ocelot_irq_unmask(struct irq_data *data) 1218be36abb7SQuentin Schulz { 1219be36abb7SQuentin Schulz struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 1220be36abb7SQuentin Schulz struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1221be36abb7SQuentin Schulz unsigned int gpio = irqd_to_hwirq(data); 1222be36abb7SQuentin Schulz 1223da801ab5SAlexandre Belloni regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio), 1224da801ab5SAlexandre Belloni BIT(gpio % 32), BIT(gpio % 32)); 1225be36abb7SQuentin Schulz } 1226be36abb7SQuentin Schulz 1227be36abb7SQuentin Schulz static void ocelot_irq_ack(struct irq_data *data) 1228be36abb7SQuentin Schulz { 1229be36abb7SQuentin Schulz struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 1230be36abb7SQuentin Schulz struct ocelot_pinctrl *info = gpiochip_get_data(chip); 1231be36abb7SQuentin Schulz unsigned int gpio = irqd_to_hwirq(data); 1232be36abb7SQuentin Schulz 1233da801ab5SAlexandre Belloni regmap_write_bits(info->map, REG(OCELOT_GPIO_INTR, info, gpio), 1234da801ab5SAlexandre Belloni BIT(gpio % 32), BIT(gpio % 32)); 1235be36abb7SQuentin Schulz } 1236be36abb7SQuentin Schulz 1237be36abb7SQuentin Schulz static int ocelot_irq_set_type(struct irq_data *data, unsigned int type); 1238be36abb7SQuentin Schulz 1239be36abb7SQuentin Schulz static struct irq_chip ocelot_eoi_irqchip = { 1240be36abb7SQuentin Schulz .name = "gpio", 1241be36abb7SQuentin Schulz .irq_mask = ocelot_irq_mask, 1242be36abb7SQuentin Schulz .irq_eoi = ocelot_irq_ack, 1243be36abb7SQuentin Schulz .irq_unmask = ocelot_irq_unmask, 1244be36abb7SQuentin Schulz .flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED, 1245be36abb7SQuentin Schulz .irq_set_type = ocelot_irq_set_type, 1246be36abb7SQuentin Schulz }; 1247be36abb7SQuentin Schulz 1248be36abb7SQuentin Schulz static struct irq_chip ocelot_irqchip = { 1249be36abb7SQuentin Schulz .name = "gpio", 1250be36abb7SQuentin Schulz .irq_mask = ocelot_irq_mask, 1251be36abb7SQuentin Schulz .irq_ack = ocelot_irq_ack, 1252be36abb7SQuentin Schulz .irq_unmask = ocelot_irq_unmask, 1253be36abb7SQuentin Schulz .irq_set_type = ocelot_irq_set_type, 1254be36abb7SQuentin Schulz }; 1255be36abb7SQuentin Schulz 1256be36abb7SQuentin Schulz static int ocelot_irq_set_type(struct irq_data *data, unsigned int type) 1257be36abb7SQuentin Schulz { 1258be36abb7SQuentin Schulz type &= IRQ_TYPE_SENSE_MASK; 1259be36abb7SQuentin Schulz 1260be36abb7SQuentin Schulz if (!(type & (IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_HIGH))) 1261be36abb7SQuentin Schulz return -EINVAL; 1262be36abb7SQuentin Schulz 1263be36abb7SQuentin Schulz if (type & IRQ_TYPE_LEVEL_HIGH) 1264be36abb7SQuentin Schulz irq_set_chip_handler_name_locked(data, &ocelot_eoi_irqchip, 1265be36abb7SQuentin Schulz handle_fasteoi_irq, NULL); 1266be36abb7SQuentin Schulz if (type & IRQ_TYPE_EDGE_BOTH) 1267be36abb7SQuentin Schulz irq_set_chip_handler_name_locked(data, &ocelot_irqchip, 1268be36abb7SQuentin Schulz handle_edge_irq, NULL); 1269be36abb7SQuentin Schulz 1270be36abb7SQuentin Schulz return 0; 1271be36abb7SQuentin Schulz } 1272be36abb7SQuentin Schulz 1273be36abb7SQuentin Schulz static void ocelot_irq_handler(struct irq_desc *desc) 1274be36abb7SQuentin Schulz { 1275be36abb7SQuentin Schulz struct irq_chip *parent_chip = irq_desc_get_chip(desc); 1276be36abb7SQuentin Schulz struct gpio_chip *chip = irq_desc_get_handler_data(desc); 1277be36abb7SQuentin Schulz struct ocelot_pinctrl *info = gpiochip_get_data(chip); 12780b47afc6SLars Povlsen unsigned int id_reg = OCELOT_GPIO_INTR_IDENT * info->stride; 1279da801ab5SAlexandre Belloni unsigned int reg = 0, irq, i; 1280be36abb7SQuentin Schulz unsigned long irqs; 1281be36abb7SQuentin Schulz 1282da801ab5SAlexandre Belloni for (i = 0; i < info->stride; i++) { 12830b47afc6SLars Povlsen regmap_read(info->map, id_reg + 4 * i, ®); 1284be36abb7SQuentin Schulz if (!reg) 1285da801ab5SAlexandre Belloni continue; 1286be36abb7SQuentin Schulz 1287be36abb7SQuentin Schulz chained_irq_enter(parent_chip, desc); 1288be36abb7SQuentin Schulz 1289be36abb7SQuentin Schulz irqs = reg; 1290be36abb7SQuentin Schulz 1291da801ab5SAlexandre Belloni for_each_set_bit(irq, &irqs, 1292da801ab5SAlexandre Belloni min(32U, info->desc->npins - 32 * i)) 1293da801ab5SAlexandre Belloni generic_handle_irq(irq_linear_revmap(chip->irq.domain, 1294da801ab5SAlexandre Belloni irq + 32 * i)); 1295be36abb7SQuentin Schulz 1296be36abb7SQuentin Schulz chained_irq_exit(parent_chip, desc); 1297be36abb7SQuentin Schulz } 1298da801ab5SAlexandre Belloni } 1299be36abb7SQuentin Schulz 1300ce8dc094SAlexandre Belloni static int ocelot_gpiochip_register(struct platform_device *pdev, 1301ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info) 1302ce8dc094SAlexandre Belloni { 1303ce8dc094SAlexandre Belloni struct gpio_chip *gc; 1304d874becaSLinus Walleij struct gpio_irq_chip *girq; 130517f2c8d3SQinglang Miao int irq; 1306ce8dc094SAlexandre Belloni 1307ce8dc094SAlexandre Belloni info->gpio_chip = ocelot_gpiolib_chip; 1308ce8dc094SAlexandre Belloni 1309ce8dc094SAlexandre Belloni gc = &info->gpio_chip; 1310da801ab5SAlexandre Belloni gc->ngpio = info->desc->npins; 1311ce8dc094SAlexandre Belloni gc->parent = &pdev->dev; 1312ce8dc094SAlexandre Belloni gc->base = 0; 1313ce8dc094SAlexandre Belloni gc->of_node = info->dev->of_node; 1314ce8dc094SAlexandre Belloni gc->label = "ocelot-gpio"; 1315ce8dc094SAlexandre Belloni 1316550713e3SLars Povlsen irq = irq_of_parse_and_map(gc->of_node, 0); 1317550713e3SLars Povlsen if (irq) { 1318d874becaSLinus Walleij girq = &gc->irq; 1319d874becaSLinus Walleij girq->chip = &ocelot_irqchip; 1320d874becaSLinus Walleij girq->parent_handler = ocelot_irq_handler; 1321d874becaSLinus Walleij girq->num_parents = 1; 1322550713e3SLars Povlsen girq->parents = devm_kcalloc(&pdev->dev, 1, 1323550713e3SLars Povlsen sizeof(*girq->parents), 1324d874becaSLinus Walleij GFP_KERNEL); 1325d874becaSLinus Walleij if (!girq->parents) 1326d874becaSLinus Walleij return -ENOMEM; 1327d874becaSLinus Walleij girq->parents[0] = irq; 1328d874becaSLinus Walleij girq->default_type = IRQ_TYPE_NONE; 1329d874becaSLinus Walleij girq->handler = handle_edge_irq; 1330550713e3SLars Povlsen } 1331d874becaSLinus Walleij 133217f2c8d3SQinglang Miao return devm_gpiochip_add_data(&pdev->dev, gc, info); 1333ce8dc094SAlexandre Belloni } 1334ce8dc094SAlexandre Belloni 1335ce8dc094SAlexandre Belloni static const struct of_device_id ocelot_pinctrl_of_match[] = { 13368f27440dSLars Povlsen { .compatible = "mscc,luton-pinctrl", .data = &luton_desc }, 13376e6347e2SLars Povlsen { .compatible = "mscc,serval-pinctrl", .data = &serval_desc }, 1338da801ab5SAlexandre Belloni { .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc }, 1339da801ab5SAlexandre Belloni { .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc }, 1340f8a74760SLars Povlsen { .compatible = "microchip,sparx5-pinctrl", .data = &sparx5_desc }, 1341ce8dc094SAlexandre Belloni {}, 1342ce8dc094SAlexandre Belloni }; 1343ce8dc094SAlexandre Belloni 1344ce3e7f0eSColin Ian King static int ocelot_pinctrl_probe(struct platform_device *pdev) 1345ce8dc094SAlexandre Belloni { 1346ce8dc094SAlexandre Belloni struct device *dev = &pdev->dev; 1347ce8dc094SAlexandre Belloni struct ocelot_pinctrl *info; 1348ce8dc094SAlexandre Belloni void __iomem *base; 1349f8a74760SLars Povlsen struct resource *res; 1350ce8dc094SAlexandre Belloni int ret; 1351da801ab5SAlexandre Belloni struct regmap_config regmap_config = { 1352da801ab5SAlexandre Belloni .reg_bits = 32, 1353da801ab5SAlexandre Belloni .val_bits = 32, 1354da801ab5SAlexandre Belloni .reg_stride = 4, 1355da801ab5SAlexandre Belloni }; 1356ce8dc094SAlexandre Belloni 1357ce8dc094SAlexandre Belloni info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); 1358ce8dc094SAlexandre Belloni if (!info) 1359ce8dc094SAlexandre Belloni return -ENOMEM; 1360ce8dc094SAlexandre Belloni 1361da801ab5SAlexandre Belloni info->desc = (struct pinctrl_desc *)device_get_match_data(dev); 1362da801ab5SAlexandre Belloni 1363ce8dc094SAlexandre Belloni base = devm_ioremap_resource(dev, 1364ce8dc094SAlexandre Belloni platform_get_resource(pdev, IORESOURCE_MEM, 0)); 1365*0f9facdbSZhen Lei if (IS_ERR(base)) 1366ce8dc094SAlexandre Belloni return PTR_ERR(base); 1367ce8dc094SAlexandre Belloni 1368da801ab5SAlexandre Belloni info->stride = 1 + (info->desc->npins - 1) / 32; 1369f8a74760SLars Povlsen 1370da801ab5SAlexandre Belloni regmap_config.max_register = OCELOT_GPIO_SD_MAP * info->stride + 15 * 4; 1371da801ab5SAlexandre Belloni 1372da801ab5SAlexandre Belloni info->map = devm_regmap_init_mmio(dev, base, ®map_config); 1373ce8dc094SAlexandre Belloni if (IS_ERR(info->map)) { 1374ce8dc094SAlexandre Belloni dev_err(dev, "Failed to create regmap\n"); 1375ce8dc094SAlexandre Belloni return PTR_ERR(info->map); 1376ce8dc094SAlexandre Belloni } 1377ce8dc094SAlexandre Belloni dev_set_drvdata(dev, info->map); 1378ce8dc094SAlexandre Belloni info->dev = dev; 1379ce8dc094SAlexandre Belloni 1380f8a74760SLars Povlsen /* Pinconf registers */ 1381f8a74760SLars Povlsen if (info->desc->confops) { 1382f8a74760SLars Povlsen res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1383f8a74760SLars Povlsen base = devm_ioremap_resource(dev, res); 1384f8a74760SLars Povlsen if (IS_ERR(base)) 1385f8a74760SLars Povlsen dev_dbg(dev, "Failed to ioremap config registers (no extended pinconf)\n"); 1386f8a74760SLars Povlsen else 1387f8a74760SLars Povlsen info->pincfg = base; 1388f8a74760SLars Povlsen } 1389f8a74760SLars Povlsen 1390ce8dc094SAlexandre Belloni ret = ocelot_pinctrl_register(pdev, info); 1391ce8dc094SAlexandre Belloni if (ret) 1392ce8dc094SAlexandre Belloni return ret; 1393ce8dc094SAlexandre Belloni 1394ce8dc094SAlexandre Belloni ret = ocelot_gpiochip_register(pdev, info); 1395ce8dc094SAlexandre Belloni if (ret) 1396ce8dc094SAlexandre Belloni return ret; 1397ce8dc094SAlexandre Belloni 1398f8a74760SLars Povlsen dev_info(dev, "driver registered\n"); 1399f8a74760SLars Povlsen 1400ce8dc094SAlexandre Belloni return 0; 1401ce8dc094SAlexandre Belloni } 1402ce8dc094SAlexandre Belloni 1403ce8dc094SAlexandre Belloni static struct platform_driver ocelot_pinctrl_driver = { 1404ce8dc094SAlexandre Belloni .driver = { 1405ce8dc094SAlexandre Belloni .name = "pinctrl-ocelot", 1406ce8dc094SAlexandre Belloni .of_match_table = of_match_ptr(ocelot_pinctrl_of_match), 1407ce8dc094SAlexandre Belloni .suppress_bind_attrs = true, 1408ce8dc094SAlexandre Belloni }, 1409ce8dc094SAlexandre Belloni .probe = ocelot_pinctrl_probe, 1410ce8dc094SAlexandre Belloni }; 1411ce8dc094SAlexandre Belloni builtin_platform_driver(ocelot_pinctrl_driver); 1412