1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2020 Sean Anderson <seanga2@gmail.com> 4 * Copyright (c) 2020 Western Digital Corporation or its affiliates. 5 */ 6 #include <linux/io.h> 7 #include <linux/of_device.h> 8 #include <linux/clk.h> 9 #include <linux/mfd/syscon.h> 10 #include <linux/platform_device.h> 11 #include <linux/bitfield.h> 12 #include <linux/regmap.h> 13 #include <linux/slab.h> 14 #include <linux/pinctrl/pinctrl.h> 15 #include <linux/pinctrl/pinmux.h> 16 #include <linux/pinctrl/pinconf.h> 17 #include <linux/pinctrl/pinconf-generic.h> 18 19 #include <dt-bindings/pinctrl/k210-fpioa.h> 20 21 #include "core.h" 22 #include "pinconf.h" 23 #include "pinctrl-utils.h" 24 25 /* 26 * The K210 only implements 8 drive levels, even though 27 * there is register space for 16 28 */ 29 #define K210_PC_DRIVE_MASK GENMASK(11, 8) 30 #define K210_PC_DRIVE_SHIFT 8 31 #define K210_PC_DRIVE_0 (0 << K210_PC_DRIVE_SHIFT) 32 #define K210_PC_DRIVE_1 (1 << K210_PC_DRIVE_SHIFT) 33 #define K210_PC_DRIVE_2 (2 << K210_PC_DRIVE_SHIFT) 34 #define K210_PC_DRIVE_3 (3 << K210_PC_DRIVE_SHIFT) 35 #define K210_PC_DRIVE_4 (4 << K210_PC_DRIVE_SHIFT) 36 #define K210_PC_DRIVE_5 (5 << K210_PC_DRIVE_SHIFT) 37 #define K210_PC_DRIVE_6 (6 << K210_PC_DRIVE_SHIFT) 38 #define K210_PC_DRIVE_7 (7 << K210_PC_DRIVE_SHIFT) 39 #define K210_PC_DRIVE_MAX 7 40 #define K210_PC_MODE_MASK GENMASK(23, 12) 41 42 /* 43 * output enabled == PC_OE & (PC_OE_INV ^ FUNCTION_OE) 44 * where FUNCTION_OE is a physical signal from the function. 45 */ 46 #define K210_PC_OE BIT(12) /* Output Enable */ 47 #define K210_PC_OE_INV BIT(13) /* INVert Output Enable */ 48 #define K210_PC_DO_OE BIT(14) /* set Data Out to Output Enable sig */ 49 #define K210_PC_DO_INV BIT(15) /* INVert final Data Output */ 50 #define K210_PC_PU BIT(16) /* Pull Up */ 51 #define K210_PC_PD BIT(17) /* Pull Down */ 52 /* Strong pull up not implemented on K210 */ 53 #define K210_PC_SL BIT(19) /* reduce SLew rate */ 54 /* Same semantics as OE above */ 55 #define K210_PC_IE BIT(20) /* Input Enable */ 56 #define K210_PC_IE_INV BIT(21) /* INVert Input Enable */ 57 #define K210_PC_DI_INV BIT(22) /* INVert Data Input */ 58 #define K210_PC_ST BIT(23) /* Schmitt Trigger */ 59 #define K210_PC_DI BIT(31) /* raw Data Input */ 60 61 #define K210_PC_BIAS_MASK (K210_PC_PU & K210_PC_PD) 62 63 #define K210_PC_MODE_IN (K210_PC_IE | K210_PC_ST) 64 #define K210_PC_MODE_OUT (K210_PC_DRIVE_7 | K210_PC_OE) 65 #define K210_PC_MODE_I2C (K210_PC_MODE_IN | K210_PC_SL | \ 66 K210_PC_OE | K210_PC_PU) 67 #define K210_PC_MODE_SCCB (K210_PC_MODE_I2C | \ 68 K210_PC_OE_INV | K210_PC_IE_INV) 69 #define K210_PC_MODE_SPI (K210_PC_MODE_IN | K210_PC_IE_INV | \ 70 K210_PC_MODE_OUT | K210_PC_OE_INV) 71 #define K210_PC_MODE_GPIO (K210_PC_MODE_IN | K210_PC_MODE_OUT) 72 73 #define K210_PG_FUNC GENMASK(7, 0) 74 #define K210_PG_DO BIT(8) 75 #define K210_PG_PIN GENMASK(22, 16) 76 77 /* 78 * struct k210_fpioa: Kendryte K210 FPIOA memory mapped registers 79 * @pins: 48 32-bits IO pin registers 80 * @tie_en: 256 (one per function) input tie enable bits 81 * @tie_val: 256 (one per function) input tie value bits 82 */ 83 struct k210_fpioa { 84 u32 pins[48]; 85 u32 tie_en[8]; 86 u32 tie_val[8]; 87 }; 88 89 struct k210_fpioa_data { 90 91 struct device *dev; 92 struct pinctrl_dev *pctl; 93 94 struct k210_fpioa __iomem *fpioa; 95 struct regmap *sysctl_map; 96 u32 power_offset; 97 struct clk *clk; 98 struct clk *pclk; 99 }; 100 101 #define K210_PIN_NAME(i) ("IO_" #i) 102 #define K210_PIN(i) [(i)] = PINCTRL_PIN((i), K210_PIN_NAME(i)) 103 104 static const struct pinctrl_pin_desc k210_pins[] = { 105 K210_PIN(0), K210_PIN(1), K210_PIN(2), 106 K210_PIN(3), K210_PIN(4), K210_PIN(5), 107 K210_PIN(6), K210_PIN(7), K210_PIN(8), 108 K210_PIN(9), K210_PIN(10), K210_PIN(11), 109 K210_PIN(12), K210_PIN(13), K210_PIN(14), 110 K210_PIN(15), K210_PIN(16), K210_PIN(17), 111 K210_PIN(18), K210_PIN(19), K210_PIN(20), 112 K210_PIN(21), K210_PIN(22), K210_PIN(23), 113 K210_PIN(24), K210_PIN(25), K210_PIN(26), 114 K210_PIN(27), K210_PIN(28), K210_PIN(29), 115 K210_PIN(30), K210_PIN(31), K210_PIN(32), 116 K210_PIN(33), K210_PIN(34), K210_PIN(35), 117 K210_PIN(36), K210_PIN(37), K210_PIN(38), 118 K210_PIN(39), K210_PIN(40), K210_PIN(41), 119 K210_PIN(42), K210_PIN(43), K210_PIN(44), 120 K210_PIN(45), K210_PIN(46), K210_PIN(47) 121 }; 122 123 #define K210_NPINS ARRAY_SIZE(k210_pins) 124 125 /* 126 * Pin groups: each of the 48 programmable pins is a group. 127 * To this are added 8 power domain groups, which for the purposes of 128 * the pin subsystem, contain no pins. The power domain groups only exist 129 * to set the power level. The id should never be used (since there are 130 * no pins 48-55). 131 */ 132 static const char *const k210_group_names[] = { 133 /* The first 48 groups are for pins, one each */ 134 K210_PIN_NAME(0), K210_PIN_NAME(1), K210_PIN_NAME(2), 135 K210_PIN_NAME(3), K210_PIN_NAME(4), K210_PIN_NAME(5), 136 K210_PIN_NAME(6), K210_PIN_NAME(7), K210_PIN_NAME(8), 137 K210_PIN_NAME(9), K210_PIN_NAME(10), K210_PIN_NAME(11), 138 K210_PIN_NAME(12), K210_PIN_NAME(13), K210_PIN_NAME(14), 139 K210_PIN_NAME(15), K210_PIN_NAME(16), K210_PIN_NAME(17), 140 K210_PIN_NAME(18), K210_PIN_NAME(19), K210_PIN_NAME(20), 141 K210_PIN_NAME(21), K210_PIN_NAME(22), K210_PIN_NAME(23), 142 K210_PIN_NAME(24), K210_PIN_NAME(25), K210_PIN_NAME(26), 143 K210_PIN_NAME(27), K210_PIN_NAME(28), K210_PIN_NAME(29), 144 K210_PIN_NAME(30), K210_PIN_NAME(31), K210_PIN_NAME(32), 145 K210_PIN_NAME(33), K210_PIN_NAME(34), K210_PIN_NAME(35), 146 K210_PIN_NAME(36), K210_PIN_NAME(37), K210_PIN_NAME(38), 147 K210_PIN_NAME(39), K210_PIN_NAME(40), K210_PIN_NAME(41), 148 K210_PIN_NAME(42), K210_PIN_NAME(43), K210_PIN_NAME(44), 149 K210_PIN_NAME(45), K210_PIN_NAME(46), K210_PIN_NAME(47), 150 [48] = "A0", [49] = "A1", [50] = "A2", 151 [51] = "B3", [52] = "B4", [53] = "B5", 152 [54] = "C6", [55] = "C7" 153 }; 154 155 #define K210_NGROUPS ARRAY_SIZE(k210_group_names) 156 157 enum k210_pinctrl_mode_id { 158 K210_PC_DEFAULT_DISABLED, 159 K210_PC_DEFAULT_IN, 160 K210_PC_DEFAULT_IN_TIE, 161 K210_PC_DEFAULT_OUT, 162 K210_PC_DEFAULT_I2C, 163 K210_PC_DEFAULT_SCCB, 164 K210_PC_DEFAULT_SPI, 165 K210_PC_DEFAULT_GPIO, 166 K210_PC_DEFAULT_INT13, 167 }; 168 169 #define K210_PC_DEFAULT(mode) \ 170 [K210_PC_DEFAULT_##mode] = K210_PC_MODE_##mode 171 172 static const u32 k210_pinconf_mode_id_to_mode[] = { 173 [K210_PC_DEFAULT_DISABLED] = 0, 174 K210_PC_DEFAULT(IN), 175 [K210_PC_DEFAULT_IN_TIE] = K210_PC_MODE_IN, 176 K210_PC_DEFAULT(OUT), 177 K210_PC_DEFAULT(I2C), 178 K210_PC_DEFAULT(SCCB), 179 K210_PC_DEFAULT(SPI), 180 K210_PC_DEFAULT(GPIO), 181 [K210_PC_DEFAULT_INT13] = K210_PC_MODE_IN | K210_PC_PU, 182 }; 183 184 #undef DEFAULT 185 186 /* 187 * Pin functions configuration information. 188 */ 189 struct k210_pcf_info { 190 char name[15]; 191 u8 mode_id; 192 }; 193 194 #define K210_FUNC(id, mode) \ 195 [K210_PCF_##id] = { \ 196 .name = #id, \ 197 .mode_id = K210_PC_DEFAULT_##mode \ 198 } 199 200 static const struct k210_pcf_info k210_pcf_infos[] = { 201 K210_FUNC(JTAG_TCLK, IN), 202 K210_FUNC(JTAG_TDI, IN), 203 K210_FUNC(JTAG_TMS, IN), 204 K210_FUNC(JTAG_TDO, OUT), 205 K210_FUNC(SPI0_D0, SPI), 206 K210_FUNC(SPI0_D1, SPI), 207 K210_FUNC(SPI0_D2, SPI), 208 K210_FUNC(SPI0_D3, SPI), 209 K210_FUNC(SPI0_D4, SPI), 210 K210_FUNC(SPI0_D5, SPI), 211 K210_FUNC(SPI0_D6, SPI), 212 K210_FUNC(SPI0_D7, SPI), 213 K210_FUNC(SPI0_SS0, OUT), 214 K210_FUNC(SPI0_SS1, OUT), 215 K210_FUNC(SPI0_SS2, OUT), 216 K210_FUNC(SPI0_SS3, OUT), 217 K210_FUNC(SPI0_ARB, IN_TIE), 218 K210_FUNC(SPI0_SCLK, OUT), 219 K210_FUNC(UARTHS_RX, IN), 220 K210_FUNC(UARTHS_TX, OUT), 221 K210_FUNC(RESV6, IN), 222 K210_FUNC(RESV7, IN), 223 K210_FUNC(CLK_SPI1, OUT), 224 K210_FUNC(CLK_I2C1, OUT), 225 K210_FUNC(GPIOHS0, GPIO), 226 K210_FUNC(GPIOHS1, GPIO), 227 K210_FUNC(GPIOHS2, GPIO), 228 K210_FUNC(GPIOHS3, GPIO), 229 K210_FUNC(GPIOHS4, GPIO), 230 K210_FUNC(GPIOHS5, GPIO), 231 K210_FUNC(GPIOHS6, GPIO), 232 K210_FUNC(GPIOHS7, GPIO), 233 K210_FUNC(GPIOHS8, GPIO), 234 K210_FUNC(GPIOHS9, GPIO), 235 K210_FUNC(GPIOHS10, GPIO), 236 K210_FUNC(GPIOHS11, GPIO), 237 K210_FUNC(GPIOHS12, GPIO), 238 K210_FUNC(GPIOHS13, GPIO), 239 K210_FUNC(GPIOHS14, GPIO), 240 K210_FUNC(GPIOHS15, GPIO), 241 K210_FUNC(GPIOHS16, GPIO), 242 K210_FUNC(GPIOHS17, GPIO), 243 K210_FUNC(GPIOHS18, GPIO), 244 K210_FUNC(GPIOHS19, GPIO), 245 K210_FUNC(GPIOHS20, GPIO), 246 K210_FUNC(GPIOHS21, GPIO), 247 K210_FUNC(GPIOHS22, GPIO), 248 K210_FUNC(GPIOHS23, GPIO), 249 K210_FUNC(GPIOHS24, GPIO), 250 K210_FUNC(GPIOHS25, GPIO), 251 K210_FUNC(GPIOHS26, GPIO), 252 K210_FUNC(GPIOHS27, GPIO), 253 K210_FUNC(GPIOHS28, GPIO), 254 K210_FUNC(GPIOHS29, GPIO), 255 K210_FUNC(GPIOHS30, GPIO), 256 K210_FUNC(GPIOHS31, GPIO), 257 K210_FUNC(GPIO0, GPIO), 258 K210_FUNC(GPIO1, GPIO), 259 K210_FUNC(GPIO2, GPIO), 260 K210_FUNC(GPIO3, GPIO), 261 K210_FUNC(GPIO4, GPIO), 262 K210_FUNC(GPIO5, GPIO), 263 K210_FUNC(GPIO6, GPIO), 264 K210_FUNC(GPIO7, GPIO), 265 K210_FUNC(UART1_RX, IN), 266 K210_FUNC(UART1_TX, OUT), 267 K210_FUNC(UART2_RX, IN), 268 K210_FUNC(UART2_TX, OUT), 269 K210_FUNC(UART3_RX, IN), 270 K210_FUNC(UART3_TX, OUT), 271 K210_FUNC(SPI1_D0, SPI), 272 K210_FUNC(SPI1_D1, SPI), 273 K210_FUNC(SPI1_D2, SPI), 274 K210_FUNC(SPI1_D3, SPI), 275 K210_FUNC(SPI1_D4, SPI), 276 K210_FUNC(SPI1_D5, SPI), 277 K210_FUNC(SPI1_D6, SPI), 278 K210_FUNC(SPI1_D7, SPI), 279 K210_FUNC(SPI1_SS0, OUT), 280 K210_FUNC(SPI1_SS1, OUT), 281 K210_FUNC(SPI1_SS2, OUT), 282 K210_FUNC(SPI1_SS3, OUT), 283 K210_FUNC(SPI1_ARB, IN_TIE), 284 K210_FUNC(SPI1_SCLK, OUT), 285 K210_FUNC(SPI2_D0, SPI), 286 K210_FUNC(SPI2_SS, IN), 287 K210_FUNC(SPI2_SCLK, IN), 288 K210_FUNC(I2S0_MCLK, OUT), 289 K210_FUNC(I2S0_SCLK, OUT), 290 K210_FUNC(I2S0_WS, OUT), 291 K210_FUNC(I2S0_IN_D0, IN), 292 K210_FUNC(I2S0_IN_D1, IN), 293 K210_FUNC(I2S0_IN_D2, IN), 294 K210_FUNC(I2S0_IN_D3, IN), 295 K210_FUNC(I2S0_OUT_D0, OUT), 296 K210_FUNC(I2S0_OUT_D1, OUT), 297 K210_FUNC(I2S0_OUT_D2, OUT), 298 K210_FUNC(I2S0_OUT_D3, OUT), 299 K210_FUNC(I2S1_MCLK, OUT), 300 K210_FUNC(I2S1_SCLK, OUT), 301 K210_FUNC(I2S1_WS, OUT), 302 K210_FUNC(I2S1_IN_D0, IN), 303 K210_FUNC(I2S1_IN_D1, IN), 304 K210_FUNC(I2S1_IN_D2, IN), 305 K210_FUNC(I2S1_IN_D3, IN), 306 K210_FUNC(I2S1_OUT_D0, OUT), 307 K210_FUNC(I2S1_OUT_D1, OUT), 308 K210_FUNC(I2S1_OUT_D2, OUT), 309 K210_FUNC(I2S1_OUT_D3, OUT), 310 K210_FUNC(I2S2_MCLK, OUT), 311 K210_FUNC(I2S2_SCLK, OUT), 312 K210_FUNC(I2S2_WS, OUT), 313 K210_FUNC(I2S2_IN_D0, IN), 314 K210_FUNC(I2S2_IN_D1, IN), 315 K210_FUNC(I2S2_IN_D2, IN), 316 K210_FUNC(I2S2_IN_D3, IN), 317 K210_FUNC(I2S2_OUT_D0, OUT), 318 K210_FUNC(I2S2_OUT_D1, OUT), 319 K210_FUNC(I2S2_OUT_D2, OUT), 320 K210_FUNC(I2S2_OUT_D3, OUT), 321 K210_FUNC(RESV0, DISABLED), 322 K210_FUNC(RESV1, DISABLED), 323 K210_FUNC(RESV2, DISABLED), 324 K210_FUNC(RESV3, DISABLED), 325 K210_FUNC(RESV4, DISABLED), 326 K210_FUNC(RESV5, DISABLED), 327 K210_FUNC(I2C0_SCLK, I2C), 328 K210_FUNC(I2C0_SDA, I2C), 329 K210_FUNC(I2C1_SCLK, I2C), 330 K210_FUNC(I2C1_SDA, I2C), 331 K210_FUNC(I2C2_SCLK, I2C), 332 K210_FUNC(I2C2_SDA, I2C), 333 K210_FUNC(DVP_XCLK, OUT), 334 K210_FUNC(DVP_RST, OUT), 335 K210_FUNC(DVP_PWDN, OUT), 336 K210_FUNC(DVP_VSYNC, IN), 337 K210_FUNC(DVP_HSYNC, IN), 338 K210_FUNC(DVP_PCLK, IN), 339 K210_FUNC(DVP_D0, IN), 340 K210_FUNC(DVP_D1, IN), 341 K210_FUNC(DVP_D2, IN), 342 K210_FUNC(DVP_D3, IN), 343 K210_FUNC(DVP_D4, IN), 344 K210_FUNC(DVP_D5, IN), 345 K210_FUNC(DVP_D6, IN), 346 K210_FUNC(DVP_D7, IN), 347 K210_FUNC(SCCB_SCLK, SCCB), 348 K210_FUNC(SCCB_SDA, SCCB), 349 K210_FUNC(UART1_CTS, IN), 350 K210_FUNC(UART1_DSR, IN), 351 K210_FUNC(UART1_DCD, IN), 352 K210_FUNC(UART1_RI, IN), 353 K210_FUNC(UART1_SIR_IN, IN), 354 K210_FUNC(UART1_DTR, OUT), 355 K210_FUNC(UART1_RTS, OUT), 356 K210_FUNC(UART1_OUT2, OUT), 357 K210_FUNC(UART1_OUT1, OUT), 358 K210_FUNC(UART1_SIR_OUT, OUT), 359 K210_FUNC(UART1_BAUD, OUT), 360 K210_FUNC(UART1_RE, OUT), 361 K210_FUNC(UART1_DE, OUT), 362 K210_FUNC(UART1_RS485_EN, OUT), 363 K210_FUNC(UART2_CTS, IN), 364 K210_FUNC(UART2_DSR, IN), 365 K210_FUNC(UART2_DCD, IN), 366 K210_FUNC(UART2_RI, IN), 367 K210_FUNC(UART2_SIR_IN, IN), 368 K210_FUNC(UART2_DTR, OUT), 369 K210_FUNC(UART2_RTS, OUT), 370 K210_FUNC(UART2_OUT2, OUT), 371 K210_FUNC(UART2_OUT1, OUT), 372 K210_FUNC(UART2_SIR_OUT, OUT), 373 K210_FUNC(UART2_BAUD, OUT), 374 K210_FUNC(UART2_RE, OUT), 375 K210_FUNC(UART2_DE, OUT), 376 K210_FUNC(UART2_RS485_EN, OUT), 377 K210_FUNC(UART3_CTS, IN), 378 K210_FUNC(UART3_DSR, IN), 379 K210_FUNC(UART3_DCD, IN), 380 K210_FUNC(UART3_RI, IN), 381 K210_FUNC(UART3_SIR_IN, IN), 382 K210_FUNC(UART3_DTR, OUT), 383 K210_FUNC(UART3_RTS, OUT), 384 K210_FUNC(UART3_OUT2, OUT), 385 K210_FUNC(UART3_OUT1, OUT), 386 K210_FUNC(UART3_SIR_OUT, OUT), 387 K210_FUNC(UART3_BAUD, OUT), 388 K210_FUNC(UART3_RE, OUT), 389 K210_FUNC(UART3_DE, OUT), 390 K210_FUNC(UART3_RS485_EN, OUT), 391 K210_FUNC(TIMER0_TOGGLE1, OUT), 392 K210_FUNC(TIMER0_TOGGLE2, OUT), 393 K210_FUNC(TIMER0_TOGGLE3, OUT), 394 K210_FUNC(TIMER0_TOGGLE4, OUT), 395 K210_FUNC(TIMER1_TOGGLE1, OUT), 396 K210_FUNC(TIMER1_TOGGLE2, OUT), 397 K210_FUNC(TIMER1_TOGGLE3, OUT), 398 K210_FUNC(TIMER1_TOGGLE4, OUT), 399 K210_FUNC(TIMER2_TOGGLE1, OUT), 400 K210_FUNC(TIMER2_TOGGLE2, OUT), 401 K210_FUNC(TIMER2_TOGGLE3, OUT), 402 K210_FUNC(TIMER2_TOGGLE4, OUT), 403 K210_FUNC(CLK_SPI2, OUT), 404 K210_FUNC(CLK_I2C2, OUT), 405 K210_FUNC(INTERNAL0, OUT), 406 K210_FUNC(INTERNAL1, OUT), 407 K210_FUNC(INTERNAL2, OUT), 408 K210_FUNC(INTERNAL3, OUT), 409 K210_FUNC(INTERNAL4, OUT), 410 K210_FUNC(INTERNAL5, OUT), 411 K210_FUNC(INTERNAL6, OUT), 412 K210_FUNC(INTERNAL7, OUT), 413 K210_FUNC(INTERNAL8, OUT), 414 K210_FUNC(INTERNAL9, IN), 415 K210_FUNC(INTERNAL10, IN), 416 K210_FUNC(INTERNAL11, IN), 417 K210_FUNC(INTERNAL12, IN), 418 K210_FUNC(INTERNAL13, INT13), 419 K210_FUNC(INTERNAL14, I2C), 420 K210_FUNC(INTERNAL15, IN), 421 K210_FUNC(INTERNAL16, IN), 422 K210_FUNC(INTERNAL17, IN), 423 K210_FUNC(CONSTANT, DISABLED), 424 K210_FUNC(INTERNAL18, IN), 425 K210_FUNC(DEBUG0, OUT), 426 K210_FUNC(DEBUG1, OUT), 427 K210_FUNC(DEBUG2, OUT), 428 K210_FUNC(DEBUG3, OUT), 429 K210_FUNC(DEBUG4, OUT), 430 K210_FUNC(DEBUG5, OUT), 431 K210_FUNC(DEBUG6, OUT), 432 K210_FUNC(DEBUG7, OUT), 433 K210_FUNC(DEBUG8, OUT), 434 K210_FUNC(DEBUG9, OUT), 435 K210_FUNC(DEBUG10, OUT), 436 K210_FUNC(DEBUG11, OUT), 437 K210_FUNC(DEBUG12, OUT), 438 K210_FUNC(DEBUG13, OUT), 439 K210_FUNC(DEBUG14, OUT), 440 K210_FUNC(DEBUG15, OUT), 441 K210_FUNC(DEBUG16, OUT), 442 K210_FUNC(DEBUG17, OUT), 443 K210_FUNC(DEBUG18, OUT), 444 K210_FUNC(DEBUG19, OUT), 445 K210_FUNC(DEBUG20, OUT), 446 K210_FUNC(DEBUG21, OUT), 447 K210_FUNC(DEBUG22, OUT), 448 K210_FUNC(DEBUG23, OUT), 449 K210_FUNC(DEBUG24, OUT), 450 K210_FUNC(DEBUG25, OUT), 451 K210_FUNC(DEBUG26, OUT), 452 K210_FUNC(DEBUG27, OUT), 453 K210_FUNC(DEBUG28, OUT), 454 K210_FUNC(DEBUG29, OUT), 455 K210_FUNC(DEBUG30, OUT), 456 K210_FUNC(DEBUG31, OUT), 457 }; 458 459 #define PIN_CONFIG_OUTPUT_INVERT (PIN_CONFIG_END + 1) 460 #define PIN_CONFIG_INPUT_INVERT (PIN_CONFIG_END + 2) 461 462 static const struct pinconf_generic_params k210_pinconf_custom_params[] = { 463 { "output-polarity-invert", PIN_CONFIG_OUTPUT_INVERT, 1 }, 464 { "input-polarity-invert", PIN_CONFIG_INPUT_INVERT, 1 }, 465 }; 466 467 /* 468 * Max drive strength in uA. 469 */ 470 static const int k210_pinconf_drive_strength[] = { 471 [0] = 11200, 472 [1] = 16800, 473 [2] = 22300, 474 [3] = 27800, 475 [4] = 33300, 476 [5] = 38700, 477 [6] = 44100, 478 [7] = 49500, 479 }; 480 481 static int k210_pinconf_get_drive(unsigned int max_strength_ua) 482 { 483 int i; 484 485 for (i = K210_PC_DRIVE_MAX; i; i--) { 486 if (k210_pinconf_drive_strength[i] <= max_strength_ua) 487 return i; 488 } 489 490 return -EINVAL; 491 } 492 493 static void k210_pinmux_set_pin_function(struct pinctrl_dev *pctldev, 494 u32 pin, u32 func) 495 { 496 struct k210_fpioa_data *pdata = pinctrl_dev_get_drvdata(pctldev); 497 const struct k210_pcf_info *info = &k210_pcf_infos[func]; 498 u32 mode = k210_pinconf_mode_id_to_mode[info->mode_id]; 499 u32 val = func | mode; 500 501 dev_dbg(pdata->dev, "set pin %u function %s (%u) -> 0x%08x\n", 502 pin, info->name, func, val); 503 504 writel(val, &pdata->fpioa->pins[pin]); 505 } 506 507 static int k210_pinconf_set_param(struct pinctrl_dev *pctldev, 508 unsigned int pin, 509 unsigned int param, unsigned int arg) 510 { 511 struct k210_fpioa_data *pdata = pinctrl_dev_get_drvdata(pctldev); 512 u32 val = readl(&pdata->fpioa->pins[pin]); 513 int drive; 514 515 dev_dbg(pdata->dev, "set pin %u param %u, arg 0x%x\n", 516 pin, param, arg); 517 518 switch (param) { 519 case PIN_CONFIG_BIAS_DISABLE: 520 val &= ~K210_PC_BIAS_MASK; 521 break; 522 case PIN_CONFIG_BIAS_PULL_DOWN: 523 if (!arg) 524 return -EINVAL; 525 val |= K210_PC_PD; 526 break; 527 case PIN_CONFIG_BIAS_PULL_UP: 528 if (!arg) 529 return -EINVAL; 530 val |= K210_PC_PD; 531 break; 532 case PIN_CONFIG_DRIVE_STRENGTH: 533 arg *= 1000; 534 fallthrough; 535 case PIN_CONFIG_DRIVE_STRENGTH_UA: 536 drive = k210_pinconf_get_drive(arg); 537 if (drive < 0) 538 return drive; 539 val &= ~K210_PC_DRIVE_MASK; 540 val |= FIELD_PREP(K210_PC_DRIVE_MASK, drive); 541 break; 542 case PIN_CONFIG_INPUT_ENABLE: 543 if (arg) 544 val |= K210_PC_IE; 545 else 546 val &= ~K210_PC_IE; 547 break; 548 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 549 if (arg) 550 val |= K210_PC_ST; 551 else 552 val &= ~K210_PC_ST; 553 break; 554 case PIN_CONFIG_OUTPUT: 555 k210_pinmux_set_pin_function(pctldev, pin, K210_PCF_CONSTANT); 556 val = readl(&pdata->fpioa->pins[pin]); 557 val |= K210_PC_MODE_OUT; 558 if (!arg) 559 val |= K210_PC_DO_INV; 560 break; 561 case PIN_CONFIG_OUTPUT_ENABLE: 562 if (arg) 563 val |= K210_PC_OE; 564 else 565 val &= ~K210_PC_OE; 566 break; 567 case PIN_CONFIG_SLEW_RATE: 568 if (arg) 569 val |= K210_PC_SL; 570 else 571 val &= ~K210_PC_SL; 572 break; 573 case PIN_CONFIG_OUTPUT_INVERT: 574 if (arg) 575 val |= K210_PC_DO_INV; 576 else 577 val &= ~K210_PC_DO_INV; 578 break; 579 case PIN_CONFIG_INPUT_INVERT: 580 if (arg) 581 val |= K210_PC_DI_INV; 582 else 583 val &= ~K210_PC_DI_INV; 584 break; 585 default: 586 return -EINVAL; 587 } 588 589 writel(val, &pdata->fpioa->pins[pin]); 590 591 return 0; 592 } 593 594 static int k210_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 595 unsigned long *configs, unsigned int num_configs) 596 { 597 unsigned int param, arg; 598 int i, ret; 599 600 if (WARN_ON(pin >= K210_NPINS)) 601 return -EINVAL; 602 603 for (i = 0; i < num_configs; i++) { 604 param = pinconf_to_config_param(configs[i]); 605 arg = pinconf_to_config_argument(configs[i]); 606 ret = k210_pinconf_set_param(pctldev, pin, param, arg); 607 if (ret) 608 return ret; 609 } 610 611 return 0; 612 } 613 614 static void k210_pinconf_dbg_show(struct pinctrl_dev *pctldev, 615 struct seq_file *s, unsigned int pin) 616 { 617 struct k210_fpioa_data *pdata = pinctrl_dev_get_drvdata(pctldev); 618 619 seq_printf(s, "%#x", readl(&pdata->fpioa->pins[pin])); 620 } 621 622 static int k210_pinconf_group_set(struct pinctrl_dev *pctldev, 623 unsigned int selector, unsigned long *configs, 624 unsigned int num_configs) 625 { 626 struct k210_fpioa_data *pdata = pinctrl_dev_get_drvdata(pctldev); 627 unsigned int param, arg; 628 u32 bit; 629 int i; 630 631 /* Pins should be configured with pinmux, not groups*/ 632 if (selector < K210_NPINS) 633 return -EINVAL; 634 635 /* Otherwise it's a power domain */ 636 for (i = 0; i < num_configs; i++) { 637 param = pinconf_to_config_param(configs[i]); 638 if (param != PIN_CONFIG_POWER_SOURCE) 639 return -EINVAL; 640 641 arg = pinconf_to_config_argument(configs[i]); 642 bit = BIT(selector - K210_NPINS); 643 regmap_update_bits(pdata->sysctl_map, 644 pdata->power_offset, 645 bit, arg ? bit : 0); 646 } 647 648 return 0; 649 } 650 651 static void k210_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 652 struct seq_file *s, 653 unsigned int selector) 654 { 655 struct k210_fpioa_data *pdata = pinctrl_dev_get_drvdata(pctldev); 656 int ret; 657 u32 val; 658 659 if (selector < K210_NPINS) 660 return k210_pinconf_dbg_show(pctldev, s, selector); 661 662 ret = regmap_read(pdata->sysctl_map, pdata->power_offset, &val); 663 if (ret) { 664 dev_err(pdata->dev, "Failed to read power reg\n"); 665 return; 666 } 667 668 seq_printf(s, "%s: %s V", k210_group_names[selector], 669 val & BIT(selector - K210_NPINS) ? "1.8" : "3.3"); 670 } 671 672 static const struct pinconf_ops k210_pinconf_ops = { 673 .is_generic = true, 674 .pin_config_set = k210_pinconf_set, 675 .pin_config_group_set = k210_pinconf_group_set, 676 .pin_config_dbg_show = k210_pinconf_dbg_show, 677 .pin_config_group_dbg_show = k210_pinconf_group_dbg_show, 678 }; 679 680 static int k210_pinmux_get_function_count(struct pinctrl_dev *pctldev) 681 { 682 return ARRAY_SIZE(k210_pcf_infos); 683 } 684 685 static const char *k210_pinmux_get_function_name(struct pinctrl_dev *pctldev, 686 unsigned int selector) 687 { 688 return k210_pcf_infos[selector].name; 689 } 690 691 static int k210_pinmux_get_function_groups(struct pinctrl_dev *pctldev, 692 unsigned int selector, 693 const char * const **groups, 694 unsigned int * const num_groups) 695 { 696 /* Any function can be mapped to any pin */ 697 *groups = k210_group_names; 698 *num_groups = K210_NPINS; 699 700 return 0; 701 } 702 703 static int k210_pinmux_set_mux(struct pinctrl_dev *pctldev, 704 unsigned int function, 705 unsigned int group) 706 { 707 /* Can't mux power domains */ 708 if (group >= K210_NPINS) 709 return -EINVAL; 710 711 k210_pinmux_set_pin_function(pctldev, group, function); 712 713 return 0; 714 } 715 716 static const struct pinmux_ops k210_pinmux_ops = { 717 .get_functions_count = k210_pinmux_get_function_count, 718 .get_function_name = k210_pinmux_get_function_name, 719 .get_function_groups = k210_pinmux_get_function_groups, 720 .set_mux = k210_pinmux_set_mux, 721 .strict = true, 722 }; 723 724 static int k210_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 725 { 726 return K210_NGROUPS; 727 } 728 729 static const char *k210_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 730 unsigned int group) 731 { 732 return k210_group_names[group]; 733 } 734 735 static int k210_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 736 unsigned int group, 737 const unsigned int **pins, 738 unsigned int *npins) 739 { 740 if (group >= K210_NPINS) { 741 *pins = NULL; 742 *npins = 0; 743 return 0; 744 } 745 746 *pins = &k210_pins[group].number; 747 *npins = 1; 748 749 return 0; 750 } 751 752 static void k210_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev, 753 struct seq_file *s, unsigned int offset) 754 { 755 seq_printf(s, "%s", dev_name(pctldev->dev)); 756 } 757 758 static int k210_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, 759 struct device_node *np, 760 struct pinctrl_map **map, 761 unsigned int *reserved_maps, 762 unsigned int *num_maps) 763 { 764 struct property *prop; 765 const __be32 *p; 766 int ret, pinmux_groups; 767 u32 pinmux_group; 768 unsigned long *configs = NULL; 769 unsigned int num_configs = 0; 770 unsigned int reserve = 0; 771 772 ret = of_property_count_strings(np, "groups"); 773 if (!ret) 774 return pinconf_generic_dt_subnode_to_map(pctldev, np, map, 775 reserved_maps, num_maps, 776 PIN_MAP_TYPE_CONFIGS_GROUP); 777 778 pinmux_groups = of_property_count_u32_elems(np, "pinmux"); 779 if (pinmux_groups <= 0) { 780 /* Ignore this node */ 781 return 0; 782 } 783 784 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, 785 &num_configs); 786 if (ret < 0) { 787 dev_err(pctldev->dev, "%pOF: could not parse node property\n", 788 np); 789 return ret; 790 } 791 792 reserve = pinmux_groups * (1 + num_configs); 793 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, 794 reserve); 795 if (ret < 0) 796 goto exit; 797 798 of_property_for_each_u32(np, "pinmux", prop, p, pinmux_group) { 799 const char *group_name, *func_name; 800 u32 pin = FIELD_GET(K210_PG_PIN, pinmux_group); 801 u32 func = FIELD_GET(K210_PG_FUNC, pinmux_group); 802 803 if (pin >= K210_NPINS) { 804 ret = -EINVAL; 805 goto exit; 806 } 807 808 group_name = k210_group_names[pin]; 809 func_name = k210_pcf_infos[func].name; 810 811 dev_dbg(pctldev->dev, "Pinmux %s: pin %u func %s\n", 812 np->name, pin, func_name); 813 814 ret = pinctrl_utils_add_map_mux(pctldev, map, reserved_maps, 815 num_maps, group_name, 816 func_name); 817 if (ret < 0) { 818 dev_err(pctldev->dev, "%pOF add mux map failed %d\n", 819 np, ret); 820 goto exit; 821 } 822 823 if (num_configs) { 824 ret = pinctrl_utils_add_map_configs(pctldev, map, 825 reserved_maps, num_maps, group_name, 826 configs, num_configs, 827 PIN_MAP_TYPE_CONFIGS_PIN); 828 if (ret < 0) { 829 dev_err(pctldev->dev, 830 "%pOF add configs map failed %d\n", 831 np, ret); 832 goto exit; 833 } 834 } 835 } 836 837 ret = 0; 838 839 exit: 840 kfree(configs); 841 return ret; 842 } 843 844 static int k210_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 845 struct device_node *np_config, 846 struct pinctrl_map **map, 847 unsigned int *num_maps) 848 { 849 unsigned int reserved_maps; 850 struct device_node *np; 851 int ret; 852 853 reserved_maps = 0; 854 *map = NULL; 855 *num_maps = 0; 856 857 ret = k210_pinctrl_dt_subnode_to_map(pctldev, np_config, map, 858 &reserved_maps, num_maps); 859 if (ret < 0) 860 goto err; 861 862 for_each_available_child_of_node(np_config, np) { 863 ret = k210_pinctrl_dt_subnode_to_map(pctldev, np, map, 864 &reserved_maps, num_maps); 865 if (ret < 0) 866 goto err; 867 } 868 return 0; 869 870 err: 871 pinctrl_utils_free_map(pctldev, *map, *num_maps); 872 return ret; 873 } 874 875 876 static const struct pinctrl_ops k210_pinctrl_ops = { 877 .get_groups_count = k210_pinctrl_get_groups_count, 878 .get_group_name = k210_pinctrl_get_group_name, 879 .get_group_pins = k210_pinctrl_get_group_pins, 880 .pin_dbg_show = k210_pinctrl_pin_dbg_show, 881 .dt_node_to_map = k210_pinctrl_dt_node_to_map, 882 .dt_free_map = pinconf_generic_dt_free_map, 883 }; 884 885 static struct pinctrl_desc k210_pinctrl_desc = { 886 .name = "k210-pinctrl", 887 .pins = k210_pins, 888 .npins = K210_NPINS, 889 .pctlops = &k210_pinctrl_ops, 890 .pmxops = &k210_pinmux_ops, 891 .confops = &k210_pinconf_ops, 892 .custom_params = k210_pinconf_custom_params, 893 .num_custom_params = ARRAY_SIZE(k210_pinconf_custom_params), 894 }; 895 896 static void k210_fpioa_init_ties(struct k210_fpioa_data *pdata) 897 { 898 struct k210_fpioa __iomem *fpioa = pdata->fpioa; 899 u32 val; 900 int i, j; 901 902 dev_dbg(pdata->dev, "Init pin ties\n"); 903 904 /* Init pin functions input ties */ 905 for (i = 0; i < ARRAY_SIZE(fpioa->tie_en); i++) { 906 val = 0; 907 for (j = 0; j < 32; j++) { 908 if (k210_pcf_infos[i * 32 + j].mode_id == 909 K210_PC_DEFAULT_IN_TIE) { 910 dev_dbg(pdata->dev, 911 "tie_en function %d (%s)\n", 912 i * 32 + j, 913 k210_pcf_infos[i * 32 + j].name); 914 val |= BIT(j); 915 } 916 } 917 918 /* Set value before enable */ 919 writel(val, &fpioa->tie_val[i]); 920 writel(val, &fpioa->tie_en[i]); 921 } 922 } 923 924 static int k210_fpioa_probe(struct platform_device *pdev) 925 { 926 struct device *dev = &pdev->dev; 927 struct device_node *np = dev->of_node; 928 struct k210_fpioa_data *pdata; 929 int ret; 930 931 dev_info(dev, "K210 FPIOA pin controller\n"); 932 933 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 934 if (!pdata) 935 return -ENOMEM; 936 937 pdata->dev = dev; 938 platform_set_drvdata(pdev, pdata); 939 940 pdata->fpioa = devm_platform_ioremap_resource(pdev, 0); 941 if (IS_ERR(pdata->fpioa)) 942 return PTR_ERR(pdata->fpioa); 943 944 pdata->clk = devm_clk_get(dev, "ref"); 945 if (IS_ERR(pdata->clk)) 946 return PTR_ERR(pdata->clk); 947 948 ret = clk_prepare_enable(pdata->clk); 949 if (ret) 950 return ret; 951 952 pdata->pclk = devm_clk_get_optional(dev, "pclk"); 953 if (!IS_ERR(pdata->pclk)) 954 clk_prepare_enable(pdata->pclk); 955 956 pdata->sysctl_map = 957 syscon_regmap_lookup_by_phandle_args(np, 958 "canaan,k210-sysctl-power", 959 1, &pdata->power_offset); 960 if (IS_ERR(pdata->sysctl_map)) 961 return PTR_ERR(pdata->sysctl_map); 962 963 k210_fpioa_init_ties(pdata); 964 965 pdata->pctl = pinctrl_register(&k210_pinctrl_desc, dev, (void *)pdata); 966 if (IS_ERR(pdata->pctl)) 967 return PTR_ERR(pdata->pctl); 968 969 return 0; 970 } 971 972 static const struct of_device_id k210_fpioa_dt_ids[] = { 973 { .compatible = "canaan,k210-fpioa" }, 974 { /* sentinel */ }, 975 }; 976 977 static struct platform_driver k210_fpioa_driver = { 978 .probe = k210_fpioa_probe, 979 .driver = { 980 .name = "k210-fpioa", 981 .of_match_table = k210_fpioa_dt_ids, 982 }, 983 }; 984 builtin_platform_driver(k210_fpioa_driver); 985