1 /*
2  *  Driver for Conexant Digicolor General Purpose Pin Mapping
3  *
4  * Author: Baruch Siach <baruch@tkos.co.il>
5  *
6  * Copyright (C) 2015 Paradox Innovation Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * TODO:
14  * - GPIO interrupt support
15  * - Pin pad configuration (pull up/down, strength)
16  */
17 
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/io.h>
23 #include <linux/gpio/driver.h>
24 #include <linux/spinlock.h>
25 #include <linux/pinctrl/machine.h>
26 #include <linux/pinctrl/pinconf.h>
27 #include <linux/pinctrl/pinconf-generic.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include "pinctrl-utils.h"
31 
32 #define DRIVER_NAME	"pinctrl-digicolor"
33 
34 #define GP_CLIENTSEL(clct)	((clct)*8 + 0x20)
35 #define GP_DRIVE0(clct)		(GP_CLIENTSEL(clct) + 2)
36 #define GP_OUTPUT0(clct)	(GP_CLIENTSEL(clct) + 3)
37 #define GP_INPUT(clct)		(GP_CLIENTSEL(clct) + 6)
38 
39 #define PIN_COLLECTIONS		('R' - 'A' + 1)
40 #define PINS_PER_COLLECTION	8
41 #define PINS_COUNT		(PIN_COLLECTIONS * PINS_PER_COLLECTION)
42 
43 struct dc_pinmap {
44 	void __iomem		*regs;
45 	struct device		*dev;
46 	struct pinctrl_dev	*pctl;
47 
48 	struct pinctrl_desc	*desc;
49 	const char		*pin_names[PINS_COUNT];
50 
51 	struct gpio_chip	chip;
52 	spinlock_t		lock;
53 };
54 
55 static int dc_get_groups_count(struct pinctrl_dev *pctldev)
56 {
57 	return PINS_COUNT;
58 }
59 
60 static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
61 				     unsigned selector)
62 {
63 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
64 
65 	/* Exactly one group per pin */
66 	return pmap->desc->pins[selector].name;
67 }
68 
69 static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
70 			     const unsigned **pins,
71 			     unsigned *num_pins)
72 {
73 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
74 
75 	*pins = &pmap->desc->pins[selector].number;
76 	*num_pins = 1;
77 
78 	return 0;
79 }
80 
81 static const struct pinctrl_ops dc_pinctrl_ops = {
82 	.get_groups_count	= dc_get_groups_count,
83 	.get_group_name		= dc_get_group_name,
84 	.get_group_pins		= dc_get_group_pins,
85 	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
86 	.dt_free_map		= pinctrl_utils_free_map,
87 };
88 
89 static const char *const dc_functions[] = {
90 	"gpio",
91 	"client_a",
92 	"client_b",
93 	"client_c",
94 };
95 
96 static int dc_get_functions_count(struct pinctrl_dev *pctldev)
97 {
98 	return ARRAY_SIZE(dc_functions);
99 }
100 
101 static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
102 {
103 	return dc_functions[selector];
104 }
105 
106 static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
107 			 const char * const **groups,
108 			 unsigned * const num_groups)
109 {
110 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
111 
112 	*groups = pmap->pin_names;
113 	*num_groups = PINS_COUNT;
114 
115 	return 0;
116 }
117 
118 static void dc_client_sel(int pin_num, int *reg, int *bit)
119 {
120 	*bit = (pin_num % PINS_PER_COLLECTION) * 2;
121 	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
122 
123 	if (*bit >= PINS_PER_COLLECTION) {
124 		*bit -= PINS_PER_COLLECTION;
125 		*reg += 1;
126 	}
127 }
128 
129 static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
130 		      unsigned group)
131 {
132 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
133 	int bit_off, reg_off;
134 	u8 reg;
135 
136 	dc_client_sel(group, &reg_off, &bit_off);
137 
138 	reg = readb_relaxed(pmap->regs + reg_off);
139 	reg &= ~(3 << bit_off);
140 	reg |= (selector << bit_off);
141 	writeb_relaxed(reg, pmap->regs + reg_off);
142 
143 	return 0;
144 }
145 
146 static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
147 			       struct pinctrl_gpio_range *range,
148 			       unsigned offset)
149 {
150 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
151 	int bit_off, reg_off;
152 	u8 reg;
153 
154 	dc_client_sel(offset, &reg_off, &bit_off);
155 
156 	reg = readb_relaxed(pmap->regs + reg_off);
157 	if ((reg & (3 << bit_off)) != 0)
158 		return -EBUSY;
159 
160 	return 0;
161 }
162 
163 static const struct pinmux_ops dc_pmxops = {
164 	.get_functions_count	= dc_get_functions_count,
165 	.get_function_name	= dc_get_fname,
166 	.get_function_groups	= dc_get_groups,
167 	.set_mux		= dc_set_mux,
168 	.gpio_request_enable	= dc_pmx_request_gpio,
169 };
170 
171 static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
172 {
173 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
174 	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
175 	int bit_off = gpio % PINS_PER_COLLECTION;
176 	u8 drive;
177 	unsigned long flags;
178 
179 	spin_lock_irqsave(&pmap->lock, flags);
180 	drive = readb_relaxed(pmap->regs + reg_off);
181 	drive &= ~BIT(bit_off);
182 	writeb_relaxed(drive, pmap->regs + reg_off);
183 	spin_unlock_irqrestore(&pmap->lock, flags);
184 
185 	return 0;
186 }
187 
188 static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
189 
190 static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
191 				    int value)
192 {
193 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
194 	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
195 	int bit_off = gpio % PINS_PER_COLLECTION;
196 	u8 drive;
197 	unsigned long flags;
198 
199 	dc_gpio_set(chip, gpio, value);
200 
201 	spin_lock_irqsave(&pmap->lock, flags);
202 	drive = readb_relaxed(pmap->regs + reg_off);
203 	drive |= BIT(bit_off);
204 	writeb_relaxed(drive, pmap->regs + reg_off);
205 	spin_unlock_irqrestore(&pmap->lock, flags);
206 
207 	return 0;
208 }
209 
210 static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
211 {
212 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
213 	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
214 	int bit_off = gpio % PINS_PER_COLLECTION;
215 	u8 input;
216 
217 	input = readb_relaxed(pmap->regs + reg_off);
218 
219 	return !!(input & BIT(bit_off));
220 }
221 
222 static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
223 {
224 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
225 	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
226 	int bit_off = gpio % PINS_PER_COLLECTION;
227 	u8 output;
228 	unsigned long flags;
229 
230 	spin_lock_irqsave(&pmap->lock, flags);
231 	output = readb_relaxed(pmap->regs + reg_off);
232 	if (value)
233 		output |= BIT(bit_off);
234 	else
235 		output &= ~BIT(bit_off);
236 	writeb_relaxed(output, pmap->regs + reg_off);
237 	spin_unlock_irqrestore(&pmap->lock, flags);
238 }
239 
240 static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np)
241 {
242 	struct gpio_chip *chip = &pmap->chip;
243 	int ret;
244 
245 	chip->label		= DRIVER_NAME;
246 	chip->parent		= pmap->dev;
247 	chip->request		= gpiochip_generic_request;
248 	chip->free		= gpiochip_generic_free;
249 	chip->direction_input	= dc_gpio_direction_input;
250 	chip->direction_output	= dc_gpio_direction_output;
251 	chip->get		= dc_gpio_get;
252 	chip->set		= dc_gpio_set;
253 	chip->base		= -1;
254 	chip->ngpio		= PINS_COUNT;
255 	chip->of_node		= np;
256 	chip->of_gpio_n_cells	= 2;
257 
258 	spin_lock_init(&pmap->lock);
259 
260 	ret = gpiochip_add_data(chip, pmap);
261 	if (ret < 0)
262 		return ret;
263 
264 	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
265 				     PINS_COUNT);
266 	if (ret < 0) {
267 		gpiochip_remove(chip);
268 		return ret;
269 	}
270 
271 	return 0;
272 }
273 
274 static int dc_pinctrl_probe(struct platform_device *pdev)
275 {
276 	struct dc_pinmap *pmap;
277 	struct resource *r;
278 	struct pinctrl_pin_desc *pins;
279 	struct pinctrl_desc *pctl_desc;
280 	char *pin_names;
281 	int name_len = strlen("GP_xx") + 1;
282 	int i, j;
283 
284 	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
285 	if (!pmap)
286 		return -ENOMEM;
287 
288 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
289 	pmap->regs = devm_ioremap_resource(&pdev->dev, r);
290 	if (IS_ERR(pmap->regs))
291 		return PTR_ERR(pmap->regs);
292 
293 	pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
294 			    GFP_KERNEL);
295 	if (!pins)
296 		return -ENOMEM;
297 	pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
298 				 GFP_KERNEL);
299 	if (!pin_names)
300 		return -ENOMEM;
301 
302 	for (i = 0; i < PIN_COLLECTIONS; i++) {
303 		for (j = 0; j < PINS_PER_COLLECTION; j++) {
304 			int pin_id = i*PINS_PER_COLLECTION + j;
305 			char *name = &pin_names[pin_id * name_len];
306 
307 			snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
308 
309 			pins[pin_id].number = pin_id;
310 			pins[pin_id].name = name;
311 			pmap->pin_names[pin_id] = name;
312 		}
313 	}
314 
315 	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
316 	if (!pctl_desc)
317 		return -ENOMEM;
318 
319 	pctl_desc->name	= DRIVER_NAME,
320 	pctl_desc->owner = THIS_MODULE,
321 	pctl_desc->pctlops = &dc_pinctrl_ops,
322 	pctl_desc->pmxops = &dc_pmxops,
323 	pctl_desc->npins = PINS_COUNT;
324 	pctl_desc->pins = pins;
325 	pmap->desc = pctl_desc;
326 
327 	pmap->dev = &pdev->dev;
328 
329 	pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
330 	if (IS_ERR(pmap->pctl)) {
331 		dev_err(&pdev->dev, "pinctrl driver registration failed\n");
332 		return PTR_ERR(pmap->pctl);
333 	}
334 
335 	return dc_gpiochip_add(pmap, pdev->dev.of_node);
336 }
337 
338 static const struct of_device_id dc_pinctrl_ids[] = {
339 	{ .compatible = "cnxt,cx92755-pinctrl" },
340 	{ /* sentinel */ }
341 };
342 
343 static struct platform_driver dc_pinctrl_driver = {
344 	.driver = {
345 		.name = DRIVER_NAME,
346 		.of_match_table = dc_pinctrl_ids,
347 		.suppress_bind_attrs = true,
348 	},
349 	.probe = dc_pinctrl_probe,
350 };
351 builtin_platform_driver(dc_pinctrl_driver);
352