12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
238b0e507SBaruch Siach /*
338b0e507SBaruch Siach  *  Driver for Conexant Digicolor General Purpose Pin Mapping
438b0e507SBaruch Siach  *
538b0e507SBaruch Siach  * Author: Baruch Siach <baruch@tkos.co.il>
638b0e507SBaruch Siach  *
738b0e507SBaruch Siach  * Copyright (C) 2015 Paradox Innovation Ltd.
838b0e507SBaruch Siach  *
938b0e507SBaruch Siach  * TODO:
1038b0e507SBaruch Siach  * - GPIO interrupt support
1138b0e507SBaruch Siach  * - Pin pad configuration (pull up/down, strength)
1238b0e507SBaruch Siach  */
1338b0e507SBaruch Siach 
1438b0e507SBaruch Siach #include <linux/gpio/driver.h>
15*083b0230SAndy Shevchenko #include <linux/init.h>
16*083b0230SAndy Shevchenko #include <linux/io.h>
17*083b0230SAndy Shevchenko #include <linux/mod_devicetable.h>
18*083b0230SAndy Shevchenko #include <linux/platform_device.h>
1938b0e507SBaruch Siach #include <linux/spinlock.h>
20*083b0230SAndy Shevchenko 
2138b0e507SBaruch Siach #include <linux/pinctrl/machine.h>
2238b0e507SBaruch Siach #include <linux/pinctrl/pinconf.h>
2338b0e507SBaruch Siach #include <linux/pinctrl/pinconf-generic.h>
2438b0e507SBaruch Siach #include <linux/pinctrl/pinctrl.h>
2538b0e507SBaruch Siach #include <linux/pinctrl/pinmux.h>
26*083b0230SAndy Shevchenko 
2738b0e507SBaruch Siach #include "pinctrl-utils.h"
2838b0e507SBaruch Siach 
2938b0e507SBaruch Siach #define DRIVER_NAME	"pinctrl-digicolor"
3038b0e507SBaruch Siach 
3138b0e507SBaruch Siach #define GP_CLIENTSEL(clct)	((clct)*8 + 0x20)
3238b0e507SBaruch Siach #define GP_DRIVE0(clct)		(GP_CLIENTSEL(clct) + 2)
3338b0e507SBaruch Siach #define GP_OUTPUT0(clct)	(GP_CLIENTSEL(clct) + 3)
3438b0e507SBaruch Siach #define GP_INPUT(clct)		(GP_CLIENTSEL(clct) + 6)
3538b0e507SBaruch Siach 
3638b0e507SBaruch Siach #define PIN_COLLECTIONS		('R' - 'A' + 1)
3738b0e507SBaruch Siach #define PINS_PER_COLLECTION	8
3838b0e507SBaruch Siach #define PINS_COUNT		(PIN_COLLECTIONS * PINS_PER_COLLECTION)
3938b0e507SBaruch Siach 
4038b0e507SBaruch Siach struct dc_pinmap {
4138b0e507SBaruch Siach 	void __iomem		*regs;
4238b0e507SBaruch Siach 	struct device		*dev;
4338b0e507SBaruch Siach 	struct pinctrl_dev	*pctl;
4438b0e507SBaruch Siach 
4538b0e507SBaruch Siach 	struct pinctrl_desc	*desc;
4638b0e507SBaruch Siach 	const char		*pin_names[PINS_COUNT];
4738b0e507SBaruch Siach 
4838b0e507SBaruch Siach 	struct gpio_chip	chip;
4938b0e507SBaruch Siach 	spinlock_t		lock;
5038b0e507SBaruch Siach };
5138b0e507SBaruch Siach 
dc_get_groups_count(struct pinctrl_dev * pctldev)5238b0e507SBaruch Siach static int dc_get_groups_count(struct pinctrl_dev *pctldev)
5338b0e507SBaruch Siach {
5438b0e507SBaruch Siach 	return PINS_COUNT;
5538b0e507SBaruch Siach }
5638b0e507SBaruch Siach 
dc_get_group_name(struct pinctrl_dev * pctldev,unsigned selector)5738b0e507SBaruch Siach static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
5838b0e507SBaruch Siach 				     unsigned selector)
5938b0e507SBaruch Siach {
6038b0e507SBaruch Siach 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
6138b0e507SBaruch Siach 
6238b0e507SBaruch Siach 	/* Exactly one group per pin */
6338b0e507SBaruch Siach 	return pmap->desc->pins[selector].name;
6438b0e507SBaruch Siach }
6538b0e507SBaruch Siach 
dc_get_group_pins(struct pinctrl_dev * pctldev,unsigned selector,const unsigned ** pins,unsigned * num_pins)6638b0e507SBaruch Siach static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
6738b0e507SBaruch Siach 			     const unsigned **pins,
6838b0e507SBaruch Siach 			     unsigned *num_pins)
6938b0e507SBaruch Siach {
7038b0e507SBaruch Siach 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
7138b0e507SBaruch Siach 
7238b0e507SBaruch Siach 	*pins = &pmap->desc->pins[selector].number;
7338b0e507SBaruch Siach 	*num_pins = 1;
7438b0e507SBaruch Siach 
7538b0e507SBaruch Siach 	return 0;
7638b0e507SBaruch Siach }
7738b0e507SBaruch Siach 
78db74f96dSJulia Lawall static const struct pinctrl_ops dc_pinctrl_ops = {
7938b0e507SBaruch Siach 	.get_groups_count	= dc_get_groups_count,
8038b0e507SBaruch Siach 	.get_group_name		= dc_get_group_name,
8138b0e507SBaruch Siach 	.get_group_pins		= dc_get_group_pins,
8238b0e507SBaruch Siach 	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
83d32f7fd3SIrina Tirdea 	.dt_free_map		= pinctrl_utils_free_map,
8438b0e507SBaruch Siach };
8538b0e507SBaruch Siach 
8638b0e507SBaruch Siach static const char *const dc_functions[] = {
8738b0e507SBaruch Siach 	"gpio",
8838b0e507SBaruch Siach 	"client_a",
8938b0e507SBaruch Siach 	"client_b",
9038b0e507SBaruch Siach 	"client_c",
9138b0e507SBaruch Siach };
9238b0e507SBaruch Siach 
dc_get_functions_count(struct pinctrl_dev * pctldev)9338b0e507SBaruch Siach static int dc_get_functions_count(struct pinctrl_dev *pctldev)
9438b0e507SBaruch Siach {
9538b0e507SBaruch Siach 	return ARRAY_SIZE(dc_functions);
9638b0e507SBaruch Siach }
9738b0e507SBaruch Siach 
dc_get_fname(struct pinctrl_dev * pctldev,unsigned selector)9838b0e507SBaruch Siach static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
9938b0e507SBaruch Siach {
10038b0e507SBaruch Siach 	return dc_functions[selector];
10138b0e507SBaruch Siach }
10238b0e507SBaruch Siach 
dc_get_groups(struct pinctrl_dev * pctldev,unsigned selector,const char * const ** groups,unsigned * const num_groups)10338b0e507SBaruch Siach static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
10438b0e507SBaruch Siach 			 const char * const **groups,
10538b0e507SBaruch Siach 			 unsigned * const num_groups)
10638b0e507SBaruch Siach {
10738b0e507SBaruch Siach 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
10838b0e507SBaruch Siach 
10938b0e507SBaruch Siach 	*groups = pmap->pin_names;
11038b0e507SBaruch Siach 	*num_groups = PINS_COUNT;
11138b0e507SBaruch Siach 
11238b0e507SBaruch Siach 	return 0;
11338b0e507SBaruch Siach }
11438b0e507SBaruch Siach 
dc_client_sel(int pin_num,int * reg,int * bit)11538b0e507SBaruch Siach static void dc_client_sel(int pin_num, int *reg, int *bit)
11638b0e507SBaruch Siach {
11738b0e507SBaruch Siach 	*bit = (pin_num % PINS_PER_COLLECTION) * 2;
11838b0e507SBaruch Siach 	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
11938b0e507SBaruch Siach 
12038b0e507SBaruch Siach 	if (*bit >= PINS_PER_COLLECTION) {
12138b0e507SBaruch Siach 		*bit -= PINS_PER_COLLECTION;
12238b0e507SBaruch Siach 		*reg += 1;
12338b0e507SBaruch Siach 	}
12438b0e507SBaruch Siach }
12538b0e507SBaruch Siach 
dc_set_mux(struct pinctrl_dev * pctldev,unsigned selector,unsigned group)12638b0e507SBaruch Siach static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
12738b0e507SBaruch Siach 		      unsigned group)
12838b0e507SBaruch Siach {
12938b0e507SBaruch Siach 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
13038b0e507SBaruch Siach 	int bit_off, reg_off;
13138b0e507SBaruch Siach 	u8 reg;
13238b0e507SBaruch Siach 
13338b0e507SBaruch Siach 	dc_client_sel(group, &reg_off, &bit_off);
13438b0e507SBaruch Siach 
13538b0e507SBaruch Siach 	reg = readb_relaxed(pmap->regs + reg_off);
13638b0e507SBaruch Siach 	reg &= ~(3 << bit_off);
13738b0e507SBaruch Siach 	reg |= (selector << bit_off);
13838b0e507SBaruch Siach 	writeb_relaxed(reg, pmap->regs + reg_off);
13938b0e507SBaruch Siach 
14038b0e507SBaruch Siach 	return 0;
14138b0e507SBaruch Siach }
14238b0e507SBaruch Siach 
dc_pmx_request_gpio(struct pinctrl_dev * pcdev,struct pinctrl_gpio_range * range,unsigned offset)14338b0e507SBaruch Siach static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
14438b0e507SBaruch Siach 			       struct pinctrl_gpio_range *range,
14538b0e507SBaruch Siach 			       unsigned offset)
14638b0e507SBaruch Siach {
14738b0e507SBaruch Siach 	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
14838b0e507SBaruch Siach 	int bit_off, reg_off;
14938b0e507SBaruch Siach 	u8 reg;
15038b0e507SBaruch Siach 
15138b0e507SBaruch Siach 	dc_client_sel(offset, &reg_off, &bit_off);
15238b0e507SBaruch Siach 
15338b0e507SBaruch Siach 	reg = readb_relaxed(pmap->regs + reg_off);
15438b0e507SBaruch Siach 	if ((reg & (3 << bit_off)) != 0)
15538b0e507SBaruch Siach 		return -EBUSY;
15638b0e507SBaruch Siach 
15738b0e507SBaruch Siach 	return 0;
15838b0e507SBaruch Siach }
15938b0e507SBaruch Siach 
160db74f96dSJulia Lawall static const struct pinmux_ops dc_pmxops = {
16138b0e507SBaruch Siach 	.get_functions_count	= dc_get_functions_count,
16238b0e507SBaruch Siach 	.get_function_name	= dc_get_fname,
16338b0e507SBaruch Siach 	.get_function_groups	= dc_get_groups,
16438b0e507SBaruch Siach 	.set_mux		= dc_set_mux,
16538b0e507SBaruch Siach 	.gpio_request_enable	= dc_pmx_request_gpio,
16638b0e507SBaruch Siach };
16738b0e507SBaruch Siach 
dc_gpio_direction_input(struct gpio_chip * chip,unsigned gpio)16838b0e507SBaruch Siach static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
16938b0e507SBaruch Siach {
17057371833SLinus Walleij 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
17138b0e507SBaruch Siach 	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
17238b0e507SBaruch Siach 	int bit_off = gpio % PINS_PER_COLLECTION;
17338b0e507SBaruch Siach 	u8 drive;
17438b0e507SBaruch Siach 	unsigned long flags;
17538b0e507SBaruch Siach 
17638b0e507SBaruch Siach 	spin_lock_irqsave(&pmap->lock, flags);
17738b0e507SBaruch Siach 	drive = readb_relaxed(pmap->regs + reg_off);
17838b0e507SBaruch Siach 	drive &= ~BIT(bit_off);
17938b0e507SBaruch Siach 	writeb_relaxed(drive, pmap->regs + reg_off);
18038b0e507SBaruch Siach 	spin_unlock_irqrestore(&pmap->lock, flags);
18138b0e507SBaruch Siach 
18238b0e507SBaruch Siach 	return 0;
18338b0e507SBaruch Siach }
18438b0e507SBaruch Siach 
18538b0e507SBaruch Siach static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
18638b0e507SBaruch Siach 
dc_gpio_direction_output(struct gpio_chip * chip,unsigned gpio,int value)18738b0e507SBaruch Siach static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
18838b0e507SBaruch Siach 				    int value)
18938b0e507SBaruch Siach {
19057371833SLinus Walleij 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
19138b0e507SBaruch Siach 	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
19238b0e507SBaruch Siach 	int bit_off = gpio % PINS_PER_COLLECTION;
19338b0e507SBaruch Siach 	u8 drive;
19438b0e507SBaruch Siach 	unsigned long flags;
19538b0e507SBaruch Siach 
19638b0e507SBaruch Siach 	dc_gpio_set(chip, gpio, value);
19738b0e507SBaruch Siach 
19838b0e507SBaruch Siach 	spin_lock_irqsave(&pmap->lock, flags);
19938b0e507SBaruch Siach 	drive = readb_relaxed(pmap->regs + reg_off);
20038b0e507SBaruch Siach 	drive |= BIT(bit_off);
20138b0e507SBaruch Siach 	writeb_relaxed(drive, pmap->regs + reg_off);
20238b0e507SBaruch Siach 	spin_unlock_irqrestore(&pmap->lock, flags);
20338b0e507SBaruch Siach 
20438b0e507SBaruch Siach 	return 0;
20538b0e507SBaruch Siach }
20638b0e507SBaruch Siach 
dc_gpio_get(struct gpio_chip * chip,unsigned gpio)20738b0e507SBaruch Siach static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
20838b0e507SBaruch Siach {
20957371833SLinus Walleij 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
21038b0e507SBaruch Siach 	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
21138b0e507SBaruch Siach 	int bit_off = gpio % PINS_PER_COLLECTION;
21238b0e507SBaruch Siach 	u8 input;
21338b0e507SBaruch Siach 
21438b0e507SBaruch Siach 	input = readb_relaxed(pmap->regs + reg_off);
21538b0e507SBaruch Siach 
21638b0e507SBaruch Siach 	return !!(input & BIT(bit_off));
21738b0e507SBaruch Siach }
21838b0e507SBaruch Siach 
dc_gpio_set(struct gpio_chip * chip,unsigned gpio,int value)21938b0e507SBaruch Siach static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
22038b0e507SBaruch Siach {
22157371833SLinus Walleij 	struct dc_pinmap *pmap = gpiochip_get_data(chip);
22238b0e507SBaruch Siach 	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
22338b0e507SBaruch Siach 	int bit_off = gpio % PINS_PER_COLLECTION;
22438b0e507SBaruch Siach 	u8 output;
22538b0e507SBaruch Siach 	unsigned long flags;
22638b0e507SBaruch Siach 
22738b0e507SBaruch Siach 	spin_lock_irqsave(&pmap->lock, flags);
22838b0e507SBaruch Siach 	output = readb_relaxed(pmap->regs + reg_off);
22938b0e507SBaruch Siach 	if (value)
23038b0e507SBaruch Siach 		output |= BIT(bit_off);
23138b0e507SBaruch Siach 	else
23238b0e507SBaruch Siach 		output &= ~BIT(bit_off);
23338b0e507SBaruch Siach 	writeb_relaxed(output, pmap->regs + reg_off);
23438b0e507SBaruch Siach 	spin_unlock_irqrestore(&pmap->lock, flags);
23538b0e507SBaruch Siach }
23638b0e507SBaruch Siach 
dc_gpiochip_add(struct dc_pinmap * pmap)2378a8d6bbeSAndy Shevchenko static int dc_gpiochip_add(struct dc_pinmap *pmap)
23838b0e507SBaruch Siach {
23938b0e507SBaruch Siach 	struct gpio_chip *chip = &pmap->chip;
24038b0e507SBaruch Siach 	int ret;
24138b0e507SBaruch Siach 
24238b0e507SBaruch Siach 	chip->label		= DRIVER_NAME;
24358383c78SLinus Walleij 	chip->parent		= pmap->dev;
24498c85d58SJonas Gorski 	chip->request		= gpiochip_generic_request;
24598c85d58SJonas Gorski 	chip->free		= gpiochip_generic_free;
24638b0e507SBaruch Siach 	chip->direction_input	= dc_gpio_direction_input;
24738b0e507SBaruch Siach 	chip->direction_output	= dc_gpio_direction_output;
24838b0e507SBaruch Siach 	chip->get		= dc_gpio_get;
24938b0e507SBaruch Siach 	chip->set		= dc_gpio_set;
25038b0e507SBaruch Siach 	chip->base		= -1;
25138b0e507SBaruch Siach 	chip->ngpio		= PINS_COUNT;
25238b0e507SBaruch Siach 
25338b0e507SBaruch Siach 	spin_lock_init(&pmap->lock);
25438b0e507SBaruch Siach 
25557371833SLinus Walleij 	ret = gpiochip_add_data(chip, pmap);
25638b0e507SBaruch Siach 	if (ret < 0)
25738b0e507SBaruch Siach 		return ret;
25838b0e507SBaruch Siach 
25938b0e507SBaruch Siach 	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
26038b0e507SBaruch Siach 				     PINS_COUNT);
26138b0e507SBaruch Siach 	if (ret < 0) {
26238b0e507SBaruch Siach 		gpiochip_remove(chip);
26338b0e507SBaruch Siach 		return ret;
26438b0e507SBaruch Siach 	}
26538b0e507SBaruch Siach 
26638b0e507SBaruch Siach 	return 0;
26738b0e507SBaruch Siach }
26838b0e507SBaruch Siach 
dc_pinctrl_probe(struct platform_device * pdev)26938b0e507SBaruch Siach static int dc_pinctrl_probe(struct platform_device *pdev)
27038b0e507SBaruch Siach {
27138b0e507SBaruch Siach 	struct dc_pinmap *pmap;
27238b0e507SBaruch Siach 	struct pinctrl_pin_desc *pins;
27338b0e507SBaruch Siach 	struct pinctrl_desc *pctl_desc;
27438b0e507SBaruch Siach 	char *pin_names;
27538b0e507SBaruch Siach 	int name_len = strlen("GP_xx") + 1;
2768f91ed47SLaxman Dewangan 	int i, j;
27738b0e507SBaruch Siach 
27838b0e507SBaruch Siach 	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
27938b0e507SBaruch Siach 	if (!pmap)
28038b0e507SBaruch Siach 		return -ENOMEM;
28138b0e507SBaruch Siach 
2824b024225SYueHaibing 	pmap->regs = devm_platform_ioremap_resource(pdev, 0);
28338b0e507SBaruch Siach 	if (IS_ERR(pmap->regs))
28438b0e507SBaruch Siach 		return PTR_ERR(pmap->regs);
28538b0e507SBaruch Siach 
286a86854d0SKees Cook 	pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
287a86854d0SKees Cook 			    GFP_KERNEL);
28838b0e507SBaruch Siach 	if (!pins)
28938b0e507SBaruch Siach 		return -ENOMEM;
290a86854d0SKees Cook 	pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
29138b0e507SBaruch Siach 				 GFP_KERNEL);
29238b0e507SBaruch Siach 	if (!pin_names)
29338b0e507SBaruch Siach 		return -ENOMEM;
29438b0e507SBaruch Siach 
29538b0e507SBaruch Siach 	for (i = 0; i < PIN_COLLECTIONS; i++) {
29638b0e507SBaruch Siach 		for (j = 0; j < PINS_PER_COLLECTION; j++) {
29738b0e507SBaruch Siach 			int pin_id = i*PINS_PER_COLLECTION + j;
29838b0e507SBaruch Siach 			char *name = &pin_names[pin_id * name_len];
29938b0e507SBaruch Siach 
30038b0e507SBaruch Siach 			snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
30138b0e507SBaruch Siach 
30238b0e507SBaruch Siach 			pins[pin_id].number = pin_id;
30338b0e507SBaruch Siach 			pins[pin_id].name = name;
30438b0e507SBaruch Siach 			pmap->pin_names[pin_id] = name;
30538b0e507SBaruch Siach 		}
30638b0e507SBaruch Siach 	}
30738b0e507SBaruch Siach 
30838b0e507SBaruch Siach 	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
30938b0e507SBaruch Siach 	if (!pctl_desc)
31038b0e507SBaruch Siach 		return -ENOMEM;
31138b0e507SBaruch Siach 
31238b0e507SBaruch Siach 	pctl_desc->name	= DRIVER_NAME,
31338b0e507SBaruch Siach 	pctl_desc->owner = THIS_MODULE,
31438b0e507SBaruch Siach 	pctl_desc->pctlops = &dc_pinctrl_ops,
31538b0e507SBaruch Siach 	pctl_desc->pmxops = &dc_pmxops,
31638b0e507SBaruch Siach 	pctl_desc->npins = PINS_COUNT;
31738b0e507SBaruch Siach 	pctl_desc->pins = pins;
31838b0e507SBaruch Siach 	pmap->desc = pctl_desc;
31938b0e507SBaruch Siach 
32038b0e507SBaruch Siach 	pmap->dev = &pdev->dev;
32138b0e507SBaruch Siach 
3228f91ed47SLaxman Dewangan 	pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
3235a99233eSJulia Lawall 	if (IS_ERR(pmap->pctl)) {
32438b0e507SBaruch Siach 		dev_err(&pdev->dev, "pinctrl driver registration failed\n");
3255a99233eSJulia Lawall 		return PTR_ERR(pmap->pctl);
32638b0e507SBaruch Siach 	}
32738b0e507SBaruch Siach 
3288a8d6bbeSAndy Shevchenko 	return dc_gpiochip_add(pmap);
32938b0e507SBaruch Siach }
33038b0e507SBaruch Siach 
33138b0e507SBaruch Siach static const struct of_device_id dc_pinctrl_ids[] = {
33238b0e507SBaruch Siach 	{ .compatible = "cnxt,cx92755-pinctrl" },
33338b0e507SBaruch Siach 	{ /* sentinel */ }
33438b0e507SBaruch Siach };
33538b0e507SBaruch Siach 
33638b0e507SBaruch Siach static struct platform_driver dc_pinctrl_driver = {
33738b0e507SBaruch Siach 	.driver = {
33838b0e507SBaruch Siach 		.name = DRIVER_NAME,
33938b0e507SBaruch Siach 		.of_match_table = dc_pinctrl_ids,
340546c6d79SPaul Gortmaker 		.suppress_bind_attrs = true,
34138b0e507SBaruch Siach 	},
34238b0e507SBaruch Siach 	.probe = dc_pinctrl_probe,
34338b0e507SBaruch Siach };
344546c6d79SPaul Gortmaker builtin_platform_driver(dc_pinctrl_driver);
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