1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Dialog DA9062 pinctrl and GPIO driver.
4  * Based on DA9055 GPIO driver.
5  *
6  * TODO:
7  *   - add pinmux and pinctrl support (gpio alternate mode)
8  *
9  * Documents:
10  * [1] https://www.dialog-semiconductor.com/sites/default/files/da9062_datasheet_3v6.pdf
11  *
12  * Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
13  */
14 #include <linux/bits.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/regmap.h>
18 
19 #include <linux/gpio/driver.h>
20 
21 #include <linux/mfd/da9062/core.h>
22 #include <linux/mfd/da9062/registers.h>
23 
24 /*
25  * We need this get the gpio_desc from a <gpio_chip,offset> tuple to decide if
26  * the gpio is active low without a vendor specific dt-binding.
27  */
28 #include "../gpio/gpiolib.h"
29 
30 #define DA9062_TYPE(offset)		(4 * (offset % 2))
31 #define DA9062_PIN_SHIFT(offset)	(4 * (offset % 2))
32 #define DA9062_PIN_ALTERNATE		0x00 /* gpio alternate mode */
33 #define DA9062_PIN_GPI			0x01 /* gpio in */
34 #define DA9062_PIN_GPO_OD		0x02 /* gpio out open-drain */
35 #define DA9062_PIN_GPO_PP		0x03 /* gpio out push-pull */
36 #define DA9062_GPIO_NUM			5
37 
38 struct da9062_pctl {
39 	struct da9062 *da9062;
40 	struct gpio_chip gc;
41 	unsigned int pin_config[DA9062_GPIO_NUM];
42 };
43 
44 static int da9062_pctl_get_pin_mode(struct da9062_pctl *pctl,
45 				    unsigned int offset)
46 {
47 	struct regmap *regmap = pctl->da9062->regmap;
48 	int ret, val;
49 
50 	ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val);
51 	if (ret < 0)
52 		return ret;
53 
54 	val >>= DA9062_PIN_SHIFT(offset);
55 	val &= DA9062AA_GPIO0_PIN_MASK;
56 
57 	return val;
58 }
59 
60 static int da9062_pctl_set_pin_mode(struct da9062_pctl *pctl,
61 				    unsigned int offset, unsigned int mode_req)
62 {
63 	struct regmap *regmap = pctl->da9062->regmap;
64 	unsigned int mode = mode_req;
65 	unsigned int mask;
66 	int ret;
67 
68 	mode &= DA9062AA_GPIO0_PIN_MASK;
69 	mode <<= DA9062_PIN_SHIFT(offset);
70 	mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset);
71 
72 	ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
73 				 mask, mode);
74 	if (!ret)
75 		pctl->pin_config[offset] = mode_req;
76 
77 	return ret;
78 }
79 
80 static int da9062_gpio_get(struct gpio_chip *gc, unsigned int offset)
81 {
82 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
83 	struct regmap *regmap = pctl->da9062->regmap;
84 	int gpio_mode, val;
85 	int ret;
86 
87 	gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
88 	if (gpio_mode < 0)
89 		return gpio_mode;
90 
91 	switch (gpio_mode) {
92 	case DA9062_PIN_ALTERNATE:
93 		return -ENOTSUPP;
94 	case DA9062_PIN_GPI:
95 		ret = regmap_read(regmap, DA9062AA_STATUS_B, &val);
96 		if (ret < 0)
97 			return ret;
98 		break;
99 	case DA9062_PIN_GPO_OD:
100 	case DA9062_PIN_GPO_PP:
101 		ret = regmap_read(regmap, DA9062AA_GPIO_MODE0_4, &val);
102 		if (ret < 0)
103 			return ret;
104 	}
105 
106 	return !!(val & BIT(offset));
107 }
108 
109 static void da9062_gpio_set(struct gpio_chip *gc, unsigned int offset,
110 			    int value)
111 {
112 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
113 	struct regmap *regmap = pctl->da9062->regmap;
114 
115 	regmap_update_bits(regmap, DA9062AA_GPIO_MODE0_4, BIT(offset),
116 			   value << offset);
117 }
118 
119 static int da9062_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
120 {
121 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
122 	int gpio_mode;
123 
124 	gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
125 	if (gpio_mode < 0)
126 		return gpio_mode;
127 
128 	switch (gpio_mode) {
129 	case DA9062_PIN_ALTERNATE:
130 		return -ENOTSUPP;
131 	case DA9062_PIN_GPI:
132 		return GPIO_LINE_DIRECTION_IN;
133 	case DA9062_PIN_GPO_OD:
134 	case DA9062_PIN_GPO_PP:
135 		return GPIO_LINE_DIRECTION_OUT;
136 	}
137 
138 	return -EINVAL;
139 }
140 
141 static int da9062_gpio_direction_input(struct gpio_chip *gc,
142 				       unsigned int offset)
143 {
144 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
145 	struct regmap *regmap = pctl->da9062->regmap;
146 	struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
147 	unsigned int gpi_type;
148 	int ret;
149 
150 	ret = da9062_pctl_set_pin_mode(pctl, offset, DA9062_PIN_GPI);
151 	if (ret)
152 		return ret;
153 
154 	/*
155 	 * If the gpio is active low we should set it in hw too. No worries
156 	 * about gpio_get() because we read and return the gpio-level. So the
157 	 * gpiolib active_low handling is still correct.
158 	 *
159 	 * 0 - active low, 1 - active high
160 	 */
161 	gpi_type = !gpiod_is_active_low(desc);
162 
163 	return regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
164 				DA9062AA_GPIO0_TYPE_MASK << DA9062_TYPE(offset),
165 				gpi_type << DA9062_TYPE(offset));
166 }
167 
168 static int da9062_gpio_direction_output(struct gpio_chip *gc,
169 					unsigned int offset, int value)
170 {
171 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
172 	unsigned int pin_config = pctl->pin_config[offset];
173 	int ret;
174 
175 	ret = da9062_pctl_set_pin_mode(pctl, offset, pin_config);
176 	if (ret)
177 		return ret;
178 
179 	da9062_gpio_set(gc, offset, value);
180 
181 	return 0;
182 }
183 
184 static int da9062_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
185 				  unsigned long config)
186 {
187 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
188 	struct regmap *regmap = pctl->da9062->regmap;
189 	int gpio_mode;
190 
191 	/*
192 	 * We need to meet the following restrictions [1, Figure 18]:
193 	 * - PIN_CONFIG_BIAS_PULL_DOWN -> only allowed if the pin is used as
194 	 *				  gpio input
195 	 * - PIN_CONFIG_BIAS_PULL_UP   -> only allowed if the pin is used as
196 	 *				  gpio output open-drain.
197 	 */
198 
199 	switch (pinconf_to_config_param(config)) {
200 	case PIN_CONFIG_BIAS_DISABLE:
201 		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
202 					  BIT(offset), 0);
203 	case PIN_CONFIG_BIAS_PULL_DOWN:
204 		gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
205 		if (gpio_mode < 0)
206 			return -EINVAL;
207 		else if (gpio_mode != DA9062_PIN_GPI)
208 			return -ENOTSUPP;
209 		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
210 					  BIT(offset), BIT(offset));
211 	case PIN_CONFIG_BIAS_PULL_UP:
212 		gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
213 		if (gpio_mode < 0)
214 			return -EINVAL;
215 		else if (gpio_mode != DA9062_PIN_GPO_OD)
216 			return -ENOTSUPP;
217 		return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
218 					  BIT(offset), BIT(offset));
219 	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
220 		return da9062_pctl_set_pin_mode(pctl, offset,
221 						DA9062_PIN_GPO_OD);
222 	case PIN_CONFIG_DRIVE_PUSH_PULL:
223 		return da9062_pctl_set_pin_mode(pctl, offset,
224 						DA9062_PIN_GPO_PP);
225 	default:
226 		return -ENOTSUPP;
227 	}
228 }
229 
230 static int da9062_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
231 {
232 	struct da9062_pctl *pctl = gpiochip_get_data(gc);
233 	struct da9062 *da9062 = pctl->da9062;
234 
235 	return regmap_irq_get_virq(da9062->regmap_irq,
236 				   DA9062_IRQ_GPI0 + offset);
237 }
238 
239 static const struct gpio_chip reference_gc = {
240 	.owner = THIS_MODULE,
241 	.get = da9062_gpio_get,
242 	.set = da9062_gpio_set,
243 	.get_direction = da9062_gpio_get_direction,
244 	.direction_input = da9062_gpio_direction_input,
245 	.direction_output = da9062_gpio_direction_output,
246 	.set_config = da9062_gpio_set_config,
247 	.to_irq = da9062_gpio_to_irq,
248 	.can_sleep = true,
249 	.ngpio = DA9062_GPIO_NUM,
250 	.base = -1,
251 };
252 
253 static int da9062_pctl_probe(struct platform_device *pdev)
254 {
255 	struct device *parent = pdev->dev.parent;
256 	struct da9062_pctl *pctl;
257 	int i;
258 
259 	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
260 	if (!pctl)
261 		return -ENOMEM;
262 
263 	pctl->da9062 = dev_get_drvdata(parent);
264 	if (!pctl->da9062)
265 		return -EINVAL;
266 
267 	if (!device_property_present(parent, "gpio-controller"))
268 		return 0;
269 
270 	for (i = 0; i < ARRAY_SIZE(pctl->pin_config); i++)
271 		pctl->pin_config[i] = DA9062_PIN_GPO_PP;
272 
273 	/*
274 	 * Currently the driver handles only the GPIO support. The
275 	 * pinctrl/pinmux support can be added later if needed.
276 	 */
277 	pctl->gc = reference_gc;
278 	pctl->gc.label = dev_name(&pdev->dev);
279 	pctl->gc.parent = &pdev->dev;
280 #ifdef CONFIG_OF_GPIO
281 	pctl->gc.of_node = parent->of_node;
282 #endif
283 
284 	platform_set_drvdata(pdev, pctl);
285 
286 	return devm_gpiochip_add_data(&pdev->dev, &pctl->gc, pctl);
287 }
288 
289 static struct platform_driver da9062_pctl_driver = {
290 	.probe = da9062_pctl_probe,
291 	.driver = {
292 		.name	= "da9062-gpio",
293 	},
294 };
295 module_platform_driver(da9062_pctl_driver);
296 
297 MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de>");
298 MODULE_DESCRIPTION("DA9062 PMIC pinctrl and GPIO Driver");
299 MODULE_LICENSE("GPL v2");
300 MODULE_ALIAS("platform:da9062-gpio");
301