1 /* 2 * AXP20x pinctrl and GPIO driver 3 * 4 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 5 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13 #include <linux/bitops.h> 14 #include <linux/device.h> 15 #include <linux/gpio/driver.h> 16 #include <linux/init.h> 17 #include <linux/interrupt.h> 18 #include <linux/kernel.h> 19 #include <linux/mfd/axp20x.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_device.h> 23 #include <linux/pinctrl/pinconf-generic.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 #include <linux/platform_device.h> 27 #include <linux/regmap.h> 28 #include <linux/slab.h> 29 30 #define AXP20X_GPIO_FUNCTIONS 0x7 31 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 32 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 33 #define AXP20X_GPIO_FUNCTION_INPUT 2 34 35 #define AXP20X_FUNC_GPIO_OUT 0 36 #define AXP20X_FUNC_GPIO_IN 1 37 #define AXP20X_FUNC_LDO 2 38 #define AXP20X_FUNC_ADC 3 39 #define AXP20X_FUNCS_NB 4 40 41 #define AXP20X_MUX_GPIO_OUT 0 42 #define AXP20X_MUX_GPIO_IN BIT(1) 43 #define AXP20X_MUX_ADC BIT(2) 44 45 #define AXP813_MUX_ADC (BIT(2) | BIT(0)) 46 47 struct axp20x_pctrl_desc { 48 const struct pinctrl_pin_desc *pins; 49 unsigned int npins; 50 /* Stores the pins supporting LDO function. Bit offset is pin number. */ 51 u8 ldo_mask; 52 /* Stores the pins supporting ADC function. Bit offset is pin number. */ 53 u8 adc_mask; 54 u8 gpio_status_offset; 55 u8 adc_mux; 56 }; 57 58 struct axp20x_pinctrl_function { 59 const char *name; 60 unsigned int muxval; 61 const char **groups; 62 unsigned int ngroups; 63 }; 64 65 struct axp20x_pctl { 66 struct gpio_chip chip; 67 struct regmap *regmap; 68 struct pinctrl_dev *pctl_dev; 69 struct device *dev; 70 const struct axp20x_pctrl_desc *desc; 71 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; 72 }; 73 74 static const struct pinctrl_pin_desc axp209_pins[] = { 75 PINCTRL_PIN(0, "GPIO0"), 76 PINCTRL_PIN(1, "GPIO1"), 77 PINCTRL_PIN(2, "GPIO2"), 78 }; 79 80 static const struct pinctrl_pin_desc axp813_pins[] = { 81 PINCTRL_PIN(0, "GPIO0"), 82 PINCTRL_PIN(1, "GPIO1"), 83 }; 84 85 static const struct axp20x_pctrl_desc axp20x_data = { 86 .pins = axp209_pins, 87 .npins = ARRAY_SIZE(axp209_pins), 88 .ldo_mask = BIT(0) | BIT(1), 89 .adc_mask = BIT(0) | BIT(1), 90 .gpio_status_offset = 4, 91 .adc_mux = AXP20X_MUX_ADC, 92 }; 93 94 static const struct axp20x_pctrl_desc axp813_data = { 95 .pins = axp813_pins, 96 .npins = ARRAY_SIZE(axp813_pins), 97 .ldo_mask = BIT(0) | BIT(1), 98 .adc_mask = BIT(0), 99 .gpio_status_offset = 0, 100 .adc_mux = AXP813_MUX_ADC, 101 }; 102 103 static int axp20x_gpio_get_reg(unsigned int offset) 104 { 105 switch (offset) { 106 case 0: 107 return AXP20X_GPIO0_CTRL; 108 case 1: 109 return AXP20X_GPIO1_CTRL; 110 case 2: 111 return AXP20X_GPIO2_CTRL; 112 } 113 114 return -EINVAL; 115 } 116 117 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset) 118 { 119 return pinctrl_gpio_direction_input(chip->base + offset); 120 } 121 122 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) 123 { 124 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 125 unsigned int val; 126 int ret; 127 128 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); 129 if (ret) 130 return ret; 131 132 return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); 133 } 134 135 static int axp20x_gpio_get_direction(struct gpio_chip *chip, 136 unsigned int offset) 137 { 138 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 139 unsigned int val; 140 int reg, ret; 141 142 reg = axp20x_gpio_get_reg(offset); 143 if (reg < 0) 144 return reg; 145 146 ret = regmap_read(pctl->regmap, reg, &val); 147 if (ret) 148 return ret; 149 150 /* 151 * This shouldn't really happen if the pin is in use already, 152 * or if it's not in use yet, it doesn't matter since we're 153 * going to change the value soon anyway. Default to output. 154 */ 155 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 156 return 0; 157 158 /* 159 * The GPIO directions are the three lowest values. 160 * 2 is input, 0 and 1 are output 161 */ 162 return val & 2; 163 } 164 165 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, 166 int value) 167 { 168 chip->set(chip, offset, value); 169 170 return 0; 171 } 172 173 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, 174 int value) 175 { 176 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 177 int reg; 178 179 reg = axp20x_gpio_get_reg(offset); 180 if (reg < 0) 181 return; 182 183 regmap_update_bits(pctl->regmap, reg, 184 AXP20X_GPIO_FUNCTIONS, 185 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : 186 AXP20X_GPIO_FUNCTION_OUT_LOW); 187 } 188 189 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, 190 u8 config) 191 { 192 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 193 int reg; 194 195 reg = axp20x_gpio_get_reg(offset); 196 if (reg < 0) 197 return reg; 198 199 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 200 config); 201 } 202 203 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) 204 { 205 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 206 207 return ARRAY_SIZE(pctl->funcs); 208 } 209 210 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, 211 unsigned int selector) 212 { 213 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 214 215 return pctl->funcs[selector].name; 216 } 217 218 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, 219 unsigned int selector, 220 const char * const **groups, 221 unsigned int *num_groups) 222 { 223 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 224 225 *groups = pctl->funcs[selector].groups; 226 *num_groups = pctl->funcs[selector].ngroups; 227 228 return 0; 229 } 230 231 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, 232 unsigned int function, unsigned int group) 233 { 234 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 235 unsigned int mask; 236 237 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 238 if (function <= AXP20X_FUNC_GPIO_IN) 239 return axp20x_pmx_set(pctldev, group, 240 pctl->funcs[function].muxval); 241 242 if (function == AXP20X_FUNC_LDO) 243 mask = pctl->desc->ldo_mask; 244 else 245 mask = pctl->desc->adc_mask; 246 247 if (!(BIT(group) & mask)) 248 return -EINVAL; 249 250 /* 251 * We let the regulator framework handle the LDO muxing as muxing bits 252 * are basically also regulators on/off bits. It's better not to enforce 253 * any state of the regulator when selecting LDO mux so that we don't 254 * interfere with the regulator driver. 255 */ 256 if (function == AXP20X_FUNC_LDO) 257 return 0; 258 259 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); 260 } 261 262 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 263 struct pinctrl_gpio_range *range, 264 unsigned int offset, bool input) 265 { 266 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 267 268 if (input) 269 return axp20x_pmx_set(pctldev, offset, 270 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); 271 272 return axp20x_pmx_set(pctldev, offset, 273 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); 274 } 275 276 static const struct pinmux_ops axp20x_pmx_ops = { 277 .get_functions_count = axp20x_pmx_func_cnt, 278 .get_function_name = axp20x_pmx_func_name, 279 .get_function_groups = axp20x_pmx_func_groups, 280 .set_mux = axp20x_pmx_set_mux, 281 .gpio_set_direction = axp20x_pmx_gpio_set_direction, 282 .strict = true, 283 }; 284 285 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) 286 { 287 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 288 289 return pctl->desc->npins; 290 } 291 292 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, 293 const unsigned int **pins, unsigned int *num_pins) 294 { 295 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 296 297 *pins = (unsigned int *)&pctl->desc->pins[selector]; 298 *num_pins = 1; 299 300 return 0; 301 } 302 303 static const char *axp20x_group_name(struct pinctrl_dev *pctldev, 304 unsigned int selector) 305 { 306 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 307 308 return pctl->desc->pins[selector].name; 309 } 310 311 static const struct pinctrl_ops axp20x_pctrl_ops = { 312 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 313 .dt_free_map = pinconf_generic_dt_free_map, 314 .get_groups_count = axp20x_groups_cnt, 315 .get_group_name = axp20x_group_name, 316 .get_group_pins = axp20x_group_pins, 317 }; 318 319 static void axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, 320 unsigned int mask_len, 321 struct axp20x_pinctrl_function *func, 322 const struct pinctrl_pin_desc *pins) 323 { 324 unsigned long int mask_cpy = mask; 325 const char **group; 326 unsigned int ngroups = hweight8(mask); 327 int bit; 328 329 func->ngroups = ngroups; 330 if (func->ngroups > 0) { 331 func->groups = devm_kcalloc(dev, 332 ngroups, sizeof(const char *), 333 GFP_KERNEL); 334 group = func->groups; 335 for_each_set_bit(bit, &mask_cpy, mask_len) { 336 *group = pins[bit].name; 337 group++; 338 } 339 } 340 } 341 342 static void axp20x_build_funcs_groups(struct platform_device *pdev) 343 { 344 struct axp20x_pctl *pctl = platform_get_drvdata(pdev); 345 int i, pin, npins = pctl->desc->npins; 346 347 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; 348 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; 349 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; 350 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; 351 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; 352 /* 353 * Muxval for LDO is useless as we won't use it. 354 * See comment in axp20x_pmx_set_mux. 355 */ 356 pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; 357 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; 358 359 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 360 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { 361 pctl->funcs[i].ngroups = npins; 362 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, 363 npins, sizeof(char *), 364 GFP_KERNEL); 365 for (pin = 0; pin < npins; pin++) 366 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; 367 } 368 369 axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, 370 npins, &pctl->funcs[AXP20X_FUNC_LDO], 371 pctl->desc->pins); 372 373 axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, 374 npins, &pctl->funcs[AXP20X_FUNC_ADC], 375 pctl->desc->pins); 376 } 377 378 static const struct of_device_id axp20x_pctl_match[] = { 379 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, 380 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, 381 { } 382 }; 383 MODULE_DEVICE_TABLE(of, axp20x_pctl_match); 384 385 static int axp20x_pctl_probe(struct platform_device *pdev) 386 { 387 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); 388 struct axp20x_pctl *pctl; 389 struct device *dev = &pdev->dev; 390 struct pinctrl_desc *pctrl_desc; 391 int ret; 392 393 if (!of_device_is_available(pdev->dev.of_node)) 394 return -ENODEV; 395 396 if (!axp20x) { 397 dev_err(&pdev->dev, "Parent drvdata not set\n"); 398 return -EINVAL; 399 } 400 401 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); 402 if (!pctl) 403 return -ENOMEM; 404 405 pctl->chip.base = -1; 406 pctl->chip.can_sleep = true; 407 pctl->chip.request = gpiochip_generic_request; 408 pctl->chip.free = gpiochip_generic_free; 409 pctl->chip.parent = &pdev->dev; 410 pctl->chip.label = dev_name(&pdev->dev); 411 pctl->chip.owner = THIS_MODULE; 412 pctl->chip.get = axp20x_gpio_get; 413 pctl->chip.get_direction = axp20x_gpio_get_direction; 414 pctl->chip.set = axp20x_gpio_set; 415 pctl->chip.direction_input = axp20x_gpio_input; 416 pctl->chip.direction_output = axp20x_gpio_output; 417 418 pctl->desc = of_device_get_match_data(dev); 419 420 pctl->chip.ngpio = pctl->desc->npins; 421 422 pctl->regmap = axp20x->regmap; 423 pctl->dev = &pdev->dev; 424 425 platform_set_drvdata(pdev, pctl); 426 427 axp20x_build_funcs_groups(pdev); 428 429 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); 430 if (!pctrl_desc) 431 return -ENOMEM; 432 433 pctrl_desc->name = dev_name(&pdev->dev); 434 pctrl_desc->owner = THIS_MODULE; 435 pctrl_desc->pins = pctl->desc->pins; 436 pctrl_desc->npins = pctl->desc->npins; 437 pctrl_desc->pctlops = &axp20x_pctrl_ops; 438 pctrl_desc->pmxops = &axp20x_pmx_ops; 439 440 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); 441 if (IS_ERR(pctl->pctl_dev)) { 442 dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); 443 return PTR_ERR(pctl->pctl_dev); 444 } 445 446 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); 447 if (ret) { 448 dev_err(&pdev->dev, "Failed to register GPIO chip\n"); 449 return ret; 450 } 451 452 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), 453 pctl->desc->pins->number, 454 pctl->desc->pins->number, 455 pctl->desc->npins); 456 if (ret) { 457 dev_err(&pdev->dev, "failed to add pin range\n"); 458 return ret; 459 } 460 461 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n"); 462 463 return 0; 464 } 465 466 static struct platform_driver axp20x_pctl_driver = { 467 .probe = axp20x_pctl_probe, 468 .driver = { 469 .name = "axp20x-gpio", 470 .of_match_table = axp20x_pctl_match, 471 }, 472 }; 473 474 module_platform_driver(axp20x_pctl_driver); 475 476 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 477 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 478 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); 479 MODULE_LICENSE("GPL"); 480