1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AXP20x pinctrl and GPIO driver 4 * 5 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 6 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/device.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/axp20x.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/pinctrl/pinconf-generic.h> 20 #include <linux/pinctrl/pinctrl.h> 21 #include <linux/pinctrl/pinmux.h> 22 #include <linux/platform_device.h> 23 #include <linux/regmap.h> 24 #include <linux/slab.h> 25 26 #define AXP20X_GPIO_FUNCTIONS 0x7 27 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 28 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 29 #define AXP20X_GPIO_FUNCTION_INPUT 2 30 31 #define AXP20X_FUNC_GPIO_OUT 0 32 #define AXP20X_FUNC_GPIO_IN 1 33 #define AXP20X_FUNC_LDO 2 34 #define AXP20X_FUNC_ADC 3 35 #define AXP20X_FUNCS_NB 4 36 37 #define AXP20X_MUX_GPIO_OUT 0 38 #define AXP20X_MUX_GPIO_IN BIT(1) 39 #define AXP20X_MUX_ADC BIT(2) 40 41 #define AXP813_MUX_ADC (BIT(2) | BIT(0)) 42 43 struct axp20x_pctrl_desc { 44 const struct pinctrl_pin_desc *pins; 45 unsigned int npins; 46 /* Stores the pins supporting LDO function. Bit offset is pin number. */ 47 u8 ldo_mask; 48 /* Stores the pins supporting ADC function. Bit offset is pin number. */ 49 u8 adc_mask; 50 u8 gpio_status_offset; 51 u8 adc_mux; 52 }; 53 54 struct axp20x_pinctrl_function { 55 const char *name; 56 unsigned int muxval; 57 const char **groups; 58 unsigned int ngroups; 59 }; 60 61 struct axp20x_pctl { 62 struct gpio_chip chip; 63 struct regmap *regmap; 64 struct pinctrl_dev *pctl_dev; 65 struct device *dev; 66 const struct axp20x_pctrl_desc *desc; 67 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; 68 }; 69 70 static const struct pinctrl_pin_desc axp209_pins[] = { 71 PINCTRL_PIN(0, "GPIO0"), 72 PINCTRL_PIN(1, "GPIO1"), 73 PINCTRL_PIN(2, "GPIO2"), 74 }; 75 76 static const struct pinctrl_pin_desc axp22x_pins[] = { 77 PINCTRL_PIN(0, "GPIO0"), 78 PINCTRL_PIN(1, "GPIO1"), 79 }; 80 81 static const struct axp20x_pctrl_desc axp20x_data = { 82 .pins = axp209_pins, 83 .npins = ARRAY_SIZE(axp209_pins), 84 .ldo_mask = BIT(0) | BIT(1), 85 .adc_mask = BIT(0) | BIT(1), 86 .gpio_status_offset = 4, 87 .adc_mux = AXP20X_MUX_ADC, 88 }; 89 90 static const struct axp20x_pctrl_desc axp22x_data = { 91 .pins = axp22x_pins, 92 .npins = ARRAY_SIZE(axp22x_pins), 93 .ldo_mask = BIT(0) | BIT(1), 94 .gpio_status_offset = 0, 95 }; 96 97 static const struct axp20x_pctrl_desc axp813_data = { 98 .pins = axp22x_pins, 99 .npins = ARRAY_SIZE(axp22x_pins), 100 .ldo_mask = BIT(0) | BIT(1), 101 .adc_mask = BIT(0), 102 .gpio_status_offset = 0, 103 .adc_mux = AXP813_MUX_ADC, 104 }; 105 106 static int axp20x_gpio_get_reg(unsigned int offset) 107 { 108 switch (offset) { 109 case 0: 110 return AXP20X_GPIO0_CTRL; 111 case 1: 112 return AXP20X_GPIO1_CTRL; 113 case 2: 114 return AXP20X_GPIO2_CTRL; 115 } 116 117 return -EINVAL; 118 } 119 120 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset) 121 { 122 return pinctrl_gpio_direction_input(chip->base + offset); 123 } 124 125 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) 126 { 127 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 128 unsigned int val; 129 int ret; 130 131 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); 132 if (ret) 133 return ret; 134 135 return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); 136 } 137 138 static int axp20x_gpio_get_direction(struct gpio_chip *chip, 139 unsigned int offset) 140 { 141 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 142 unsigned int val; 143 int reg, ret; 144 145 reg = axp20x_gpio_get_reg(offset); 146 if (reg < 0) 147 return reg; 148 149 ret = regmap_read(pctl->regmap, reg, &val); 150 if (ret) 151 return ret; 152 153 /* 154 * This shouldn't really happen if the pin is in use already, 155 * or if it's not in use yet, it doesn't matter since we're 156 * going to change the value soon anyway. Default to output. 157 */ 158 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 159 return GPIO_LINE_DIRECTION_OUT; 160 161 /* 162 * The GPIO directions are the three lowest values. 163 * 2 is input, 0 and 1 are output 164 */ 165 if (val & 2) 166 return GPIO_LINE_DIRECTION_IN; 167 168 return GPIO_LINE_DIRECTION_OUT; 169 } 170 171 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, 172 int value) 173 { 174 chip->set(chip, offset, value); 175 176 return 0; 177 } 178 179 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, 180 int value) 181 { 182 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 183 int reg; 184 185 reg = axp20x_gpio_get_reg(offset); 186 if (reg < 0) 187 return; 188 189 regmap_update_bits(pctl->regmap, reg, 190 AXP20X_GPIO_FUNCTIONS, 191 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : 192 AXP20X_GPIO_FUNCTION_OUT_LOW); 193 } 194 195 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, 196 u8 config) 197 { 198 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 199 int reg; 200 201 reg = axp20x_gpio_get_reg(offset); 202 if (reg < 0) 203 return reg; 204 205 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 206 config); 207 } 208 209 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) 210 { 211 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 212 213 return ARRAY_SIZE(pctl->funcs); 214 } 215 216 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, 217 unsigned int selector) 218 { 219 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 220 221 return pctl->funcs[selector].name; 222 } 223 224 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, 225 unsigned int selector, 226 const char * const **groups, 227 unsigned int *num_groups) 228 { 229 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 230 231 *groups = pctl->funcs[selector].groups; 232 *num_groups = pctl->funcs[selector].ngroups; 233 234 return 0; 235 } 236 237 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, 238 unsigned int function, unsigned int group) 239 { 240 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 241 unsigned int mask; 242 243 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 244 if (function <= AXP20X_FUNC_GPIO_IN) 245 return axp20x_pmx_set(pctldev, group, 246 pctl->funcs[function].muxval); 247 248 if (function == AXP20X_FUNC_LDO) 249 mask = pctl->desc->ldo_mask; 250 else 251 mask = pctl->desc->adc_mask; 252 253 if (!(BIT(group) & mask)) 254 return -EINVAL; 255 256 /* 257 * We let the regulator framework handle the LDO muxing as muxing bits 258 * are basically also regulators on/off bits. It's better not to enforce 259 * any state of the regulator when selecting LDO mux so that we don't 260 * interfere with the regulator driver. 261 */ 262 if (function == AXP20X_FUNC_LDO) 263 return 0; 264 265 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); 266 } 267 268 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 269 struct pinctrl_gpio_range *range, 270 unsigned int offset, bool input) 271 { 272 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 273 274 if (input) 275 return axp20x_pmx_set(pctldev, offset, 276 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); 277 278 return axp20x_pmx_set(pctldev, offset, 279 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); 280 } 281 282 static const struct pinmux_ops axp20x_pmx_ops = { 283 .get_functions_count = axp20x_pmx_func_cnt, 284 .get_function_name = axp20x_pmx_func_name, 285 .get_function_groups = axp20x_pmx_func_groups, 286 .set_mux = axp20x_pmx_set_mux, 287 .gpio_set_direction = axp20x_pmx_gpio_set_direction, 288 .strict = true, 289 }; 290 291 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) 292 { 293 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 294 295 return pctl->desc->npins; 296 } 297 298 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, 299 const unsigned int **pins, unsigned int *num_pins) 300 { 301 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 302 303 *pins = (unsigned int *)&pctl->desc->pins[selector]; 304 *num_pins = 1; 305 306 return 0; 307 } 308 309 static const char *axp20x_group_name(struct pinctrl_dev *pctldev, 310 unsigned int selector) 311 { 312 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 313 314 return pctl->desc->pins[selector].name; 315 } 316 317 static const struct pinctrl_ops axp20x_pctrl_ops = { 318 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 319 .dt_free_map = pinconf_generic_dt_free_map, 320 .get_groups_count = axp20x_groups_cnt, 321 .get_group_name = axp20x_group_name, 322 .get_group_pins = axp20x_group_pins, 323 }; 324 325 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, 326 unsigned int mask_len, 327 struct axp20x_pinctrl_function *func, 328 const struct pinctrl_pin_desc *pins) 329 { 330 unsigned long int mask_cpy = mask; 331 const char **group; 332 unsigned int ngroups = hweight8(mask); 333 int bit; 334 335 func->ngroups = ngroups; 336 if (func->ngroups > 0) { 337 func->groups = devm_kcalloc(dev, 338 ngroups, sizeof(const char *), 339 GFP_KERNEL); 340 if (!func->groups) 341 return -ENOMEM; 342 group = func->groups; 343 for_each_set_bit(bit, &mask_cpy, mask_len) { 344 *group = pins[bit].name; 345 group++; 346 } 347 } 348 349 return 0; 350 } 351 352 static int axp20x_build_funcs_groups(struct platform_device *pdev) 353 { 354 struct axp20x_pctl *pctl = platform_get_drvdata(pdev); 355 int i, ret, pin, npins = pctl->desc->npins; 356 357 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; 358 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; 359 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; 360 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; 361 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; 362 /* 363 * Muxval for LDO is useless as we won't use it. 364 * See comment in axp20x_pmx_set_mux. 365 */ 366 pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; 367 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; 368 369 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 370 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { 371 pctl->funcs[i].ngroups = npins; 372 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, 373 npins, sizeof(char *), 374 GFP_KERNEL); 375 if (!pctl->funcs[i].groups) 376 return -ENOMEM; 377 for (pin = 0; pin < npins; pin++) 378 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; 379 } 380 381 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, 382 npins, &pctl->funcs[AXP20X_FUNC_LDO], 383 pctl->desc->pins); 384 if (ret) 385 return ret; 386 387 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, 388 npins, &pctl->funcs[AXP20X_FUNC_ADC], 389 pctl->desc->pins); 390 if (ret) 391 return ret; 392 393 return 0; 394 } 395 396 static const struct of_device_id axp20x_pctl_match[] = { 397 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, 398 { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, }, 399 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, 400 { } 401 }; 402 MODULE_DEVICE_TABLE(of, axp20x_pctl_match); 403 404 static int axp20x_pctl_probe(struct platform_device *pdev) 405 { 406 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); 407 struct axp20x_pctl *pctl; 408 struct device *dev = &pdev->dev; 409 struct pinctrl_desc *pctrl_desc; 410 int ret; 411 412 if (!of_device_is_available(pdev->dev.of_node)) 413 return -ENODEV; 414 415 if (!axp20x) { 416 dev_err(&pdev->dev, "Parent drvdata not set\n"); 417 return -EINVAL; 418 } 419 420 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); 421 if (!pctl) 422 return -ENOMEM; 423 424 pctl->chip.base = -1; 425 pctl->chip.can_sleep = true; 426 pctl->chip.request = gpiochip_generic_request; 427 pctl->chip.free = gpiochip_generic_free; 428 pctl->chip.parent = &pdev->dev; 429 pctl->chip.label = dev_name(&pdev->dev); 430 pctl->chip.owner = THIS_MODULE; 431 pctl->chip.get = axp20x_gpio_get; 432 pctl->chip.get_direction = axp20x_gpio_get_direction; 433 pctl->chip.set = axp20x_gpio_set; 434 pctl->chip.direction_input = axp20x_gpio_input; 435 pctl->chip.direction_output = axp20x_gpio_output; 436 437 pctl->desc = of_device_get_match_data(dev); 438 439 pctl->chip.ngpio = pctl->desc->npins; 440 441 pctl->regmap = axp20x->regmap; 442 pctl->dev = &pdev->dev; 443 444 platform_set_drvdata(pdev, pctl); 445 446 ret = axp20x_build_funcs_groups(pdev); 447 if (ret) { 448 dev_err(&pdev->dev, "failed to build groups\n"); 449 return ret; 450 } 451 452 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); 453 if (!pctrl_desc) 454 return -ENOMEM; 455 456 pctrl_desc->name = dev_name(&pdev->dev); 457 pctrl_desc->owner = THIS_MODULE; 458 pctrl_desc->pins = pctl->desc->pins; 459 pctrl_desc->npins = pctl->desc->npins; 460 pctrl_desc->pctlops = &axp20x_pctrl_ops; 461 pctrl_desc->pmxops = &axp20x_pmx_ops; 462 463 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); 464 if (IS_ERR(pctl->pctl_dev)) { 465 dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); 466 return PTR_ERR(pctl->pctl_dev); 467 } 468 469 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); 470 if (ret) { 471 dev_err(&pdev->dev, "Failed to register GPIO chip\n"); 472 return ret; 473 } 474 475 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), 476 pctl->desc->pins->number, 477 pctl->desc->pins->number, 478 pctl->desc->npins); 479 if (ret) { 480 dev_err(&pdev->dev, "failed to add pin range\n"); 481 return ret; 482 } 483 484 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n"); 485 486 return 0; 487 } 488 489 static struct platform_driver axp20x_pctl_driver = { 490 .probe = axp20x_pctl_probe, 491 .driver = { 492 .name = "axp20x-gpio", 493 .of_match_table = axp20x_pctl_match, 494 }, 495 }; 496 497 module_platform_driver(axp20x_pctl_driver); 498 499 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 500 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 501 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); 502 MODULE_LICENSE("GPL"); 503