1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AXP20x pinctrl and GPIO driver 4 * 5 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 6 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/device.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/axp20x.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/regmap.h> 21 #include <linux/slab.h> 22 23 #include <linux/pinctrl/consumer.h> 24 #include <linux/pinctrl/pinconf-generic.h> 25 #include <linux/pinctrl/pinctrl.h> 26 #include <linux/pinctrl/pinmux.h> 27 28 #define AXP20X_GPIO_FUNCTIONS 0x7 29 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 30 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 31 #define AXP20X_GPIO_FUNCTION_INPUT 2 32 33 #define AXP20X_GPIO3_FUNCTIONS GENMASK(2, 1) 34 #define AXP20X_GPIO3_FUNCTION_OUT_LOW 0 35 #define AXP20X_GPIO3_FUNCTION_OUT_HIGH 2 36 #define AXP20X_GPIO3_FUNCTION_INPUT 4 37 38 #define AXP20X_FUNC_GPIO_OUT 0 39 #define AXP20X_FUNC_GPIO_IN 1 40 #define AXP20X_FUNC_LDO 2 41 #define AXP20X_FUNC_ADC 3 42 #define AXP20X_FUNCS_NB 4 43 44 #define AXP20X_MUX_GPIO_OUT 0 45 #define AXP20X_MUX_GPIO_IN BIT(1) 46 #define AXP20X_MUX_ADC BIT(2) 47 48 #define AXP813_MUX_ADC (BIT(2) | BIT(0)) 49 50 struct axp20x_pctrl_desc { 51 const struct pinctrl_pin_desc *pins; 52 unsigned int npins; 53 /* Stores the pins supporting LDO function. Bit offset is pin number. */ 54 u8 ldo_mask; 55 /* Stores the pins supporting ADC function. Bit offset is pin number. */ 56 u8 adc_mask; 57 u8 gpio_status_offset; 58 u8 adc_mux; 59 }; 60 61 struct axp20x_pinctrl_function { 62 const char *name; 63 unsigned int muxval; 64 const char **groups; 65 unsigned int ngroups; 66 }; 67 68 struct axp20x_pctl { 69 struct gpio_chip chip; 70 struct regmap *regmap; 71 struct pinctrl_dev *pctl_dev; 72 struct device *dev; 73 const struct axp20x_pctrl_desc *desc; 74 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; 75 }; 76 77 static const struct pinctrl_pin_desc axp209_pins[] = { 78 PINCTRL_PIN(0, "GPIO0"), 79 PINCTRL_PIN(1, "GPIO1"), 80 PINCTRL_PIN(2, "GPIO2"), 81 PINCTRL_PIN(3, "GPIO3"), 82 }; 83 84 static const struct pinctrl_pin_desc axp22x_pins[] = { 85 PINCTRL_PIN(0, "GPIO0"), 86 PINCTRL_PIN(1, "GPIO1"), 87 }; 88 89 static const struct axp20x_pctrl_desc axp20x_data = { 90 .pins = axp209_pins, 91 .npins = ARRAY_SIZE(axp209_pins), 92 .ldo_mask = BIT(0) | BIT(1), 93 .adc_mask = BIT(0) | BIT(1), 94 .gpio_status_offset = 4, 95 .adc_mux = AXP20X_MUX_ADC, 96 }; 97 98 static const struct axp20x_pctrl_desc axp22x_data = { 99 .pins = axp22x_pins, 100 .npins = ARRAY_SIZE(axp22x_pins), 101 .ldo_mask = BIT(0) | BIT(1), 102 .gpio_status_offset = 0, 103 }; 104 105 static const struct axp20x_pctrl_desc axp813_data = { 106 .pins = axp22x_pins, 107 .npins = ARRAY_SIZE(axp22x_pins), 108 .ldo_mask = BIT(0) | BIT(1), 109 .adc_mask = BIT(0), 110 .gpio_status_offset = 0, 111 .adc_mux = AXP813_MUX_ADC, 112 }; 113 114 static int axp20x_gpio_get_reg(unsigned int offset) 115 { 116 switch (offset) { 117 case 0: 118 return AXP20X_GPIO0_CTRL; 119 case 1: 120 return AXP20X_GPIO1_CTRL; 121 case 2: 122 return AXP20X_GPIO2_CTRL; 123 } 124 125 return -EINVAL; 126 } 127 128 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset) 129 { 130 return pinctrl_gpio_direction_input(chip->base + offset); 131 } 132 133 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) 134 { 135 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 136 unsigned int val; 137 int ret; 138 139 /* AXP209 has GPIO3 status sharing the settings register */ 140 if (offset == 3) { 141 ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val); 142 if (ret) 143 return ret; 144 return !!(val & BIT(0)); 145 } 146 147 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); 148 if (ret) 149 return ret; 150 151 return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); 152 } 153 154 static int axp20x_gpio_get_direction(struct gpio_chip *chip, 155 unsigned int offset) 156 { 157 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 158 unsigned int val; 159 int reg, ret; 160 161 /* AXP209 GPIO3 settings have a different layout */ 162 if (offset == 3) { 163 ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val); 164 if (ret) 165 return ret; 166 if (val & AXP20X_GPIO3_FUNCTION_INPUT) 167 return GPIO_LINE_DIRECTION_IN; 168 169 return GPIO_LINE_DIRECTION_OUT; 170 } 171 172 reg = axp20x_gpio_get_reg(offset); 173 if (reg < 0) 174 return reg; 175 176 ret = regmap_read(pctl->regmap, reg, &val); 177 if (ret) 178 return ret; 179 180 /* 181 * This shouldn't really happen if the pin is in use already, 182 * or if it's not in use yet, it doesn't matter since we're 183 * going to change the value soon anyway. Default to output. 184 */ 185 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 186 return GPIO_LINE_DIRECTION_OUT; 187 188 /* 189 * The GPIO directions are the three lowest values. 190 * 2 is input, 0 and 1 are output 191 */ 192 if (val & 2) 193 return GPIO_LINE_DIRECTION_IN; 194 195 return GPIO_LINE_DIRECTION_OUT; 196 } 197 198 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, 199 int value) 200 { 201 chip->set(chip, offset, value); 202 203 return 0; 204 } 205 206 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, 207 int value) 208 { 209 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 210 int reg; 211 212 /* AXP209 has GPIO3 status sharing the settings register */ 213 if (offset == 3) { 214 regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL, 215 AXP20X_GPIO3_FUNCTIONS, 216 value ? AXP20X_GPIO3_FUNCTION_OUT_HIGH : 217 AXP20X_GPIO3_FUNCTION_OUT_LOW); 218 return; 219 } 220 221 reg = axp20x_gpio_get_reg(offset); 222 if (reg < 0) 223 return; 224 225 regmap_update_bits(pctl->regmap, reg, 226 AXP20X_GPIO_FUNCTIONS, 227 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : 228 AXP20X_GPIO_FUNCTION_OUT_LOW); 229 } 230 231 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, 232 u8 config) 233 { 234 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 235 int reg; 236 237 /* AXP209 GPIO3 settings have a different layout */ 238 if (offset == 3) { 239 return regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL, 240 AXP20X_GPIO3_FUNCTIONS, 241 config == AXP20X_MUX_GPIO_OUT ? AXP20X_GPIO3_FUNCTION_OUT_LOW : 242 AXP20X_GPIO3_FUNCTION_INPUT); 243 } 244 245 reg = axp20x_gpio_get_reg(offset); 246 if (reg < 0) 247 return reg; 248 249 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 250 config); 251 } 252 253 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) 254 { 255 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 256 257 return ARRAY_SIZE(pctl->funcs); 258 } 259 260 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, 261 unsigned int selector) 262 { 263 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 264 265 return pctl->funcs[selector].name; 266 } 267 268 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, 269 unsigned int selector, 270 const char * const **groups, 271 unsigned int *num_groups) 272 { 273 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 274 275 *groups = pctl->funcs[selector].groups; 276 *num_groups = pctl->funcs[selector].ngroups; 277 278 return 0; 279 } 280 281 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, 282 unsigned int function, unsigned int group) 283 { 284 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 285 unsigned int mask; 286 287 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 288 if (function <= AXP20X_FUNC_GPIO_IN) 289 return axp20x_pmx_set(pctldev, group, 290 pctl->funcs[function].muxval); 291 292 if (function == AXP20X_FUNC_LDO) 293 mask = pctl->desc->ldo_mask; 294 else 295 mask = pctl->desc->adc_mask; 296 297 if (!(BIT(group) & mask)) 298 return -EINVAL; 299 300 /* 301 * We let the regulator framework handle the LDO muxing as muxing bits 302 * are basically also regulators on/off bits. It's better not to enforce 303 * any state of the regulator when selecting LDO mux so that we don't 304 * interfere with the regulator driver. 305 */ 306 if (function == AXP20X_FUNC_LDO) 307 return 0; 308 309 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); 310 } 311 312 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 313 struct pinctrl_gpio_range *range, 314 unsigned int offset, bool input) 315 { 316 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 317 318 if (input) 319 return axp20x_pmx_set(pctldev, offset, 320 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); 321 322 return axp20x_pmx_set(pctldev, offset, 323 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); 324 } 325 326 static const struct pinmux_ops axp20x_pmx_ops = { 327 .get_functions_count = axp20x_pmx_func_cnt, 328 .get_function_name = axp20x_pmx_func_name, 329 .get_function_groups = axp20x_pmx_func_groups, 330 .set_mux = axp20x_pmx_set_mux, 331 .gpio_set_direction = axp20x_pmx_gpio_set_direction, 332 .strict = true, 333 }; 334 335 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) 336 { 337 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 338 339 return pctl->desc->npins; 340 } 341 342 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, 343 const unsigned int **pins, unsigned int *num_pins) 344 { 345 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 346 347 *pins = (unsigned int *)&pctl->desc->pins[selector]; 348 *num_pins = 1; 349 350 return 0; 351 } 352 353 static const char *axp20x_group_name(struct pinctrl_dev *pctldev, 354 unsigned int selector) 355 { 356 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 357 358 return pctl->desc->pins[selector].name; 359 } 360 361 static const struct pinctrl_ops axp20x_pctrl_ops = { 362 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 363 .dt_free_map = pinconf_generic_dt_free_map, 364 .get_groups_count = axp20x_groups_cnt, 365 .get_group_name = axp20x_group_name, 366 .get_group_pins = axp20x_group_pins, 367 }; 368 369 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, 370 unsigned int mask_len, 371 struct axp20x_pinctrl_function *func, 372 const struct pinctrl_pin_desc *pins) 373 { 374 unsigned long int mask_cpy = mask; 375 const char **group; 376 unsigned int ngroups = hweight8(mask); 377 int bit; 378 379 func->ngroups = ngroups; 380 if (func->ngroups > 0) { 381 func->groups = devm_kcalloc(dev, 382 ngroups, sizeof(const char *), 383 GFP_KERNEL); 384 if (!func->groups) 385 return -ENOMEM; 386 group = func->groups; 387 for_each_set_bit(bit, &mask_cpy, mask_len) { 388 *group = pins[bit].name; 389 group++; 390 } 391 } 392 393 return 0; 394 } 395 396 static int axp20x_build_funcs_groups(struct platform_device *pdev) 397 { 398 struct axp20x_pctl *pctl = platform_get_drvdata(pdev); 399 int i, ret, pin, npins = pctl->desc->npins; 400 401 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; 402 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; 403 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; 404 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; 405 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; 406 /* 407 * Muxval for LDO is useless as we won't use it. 408 * See comment in axp20x_pmx_set_mux. 409 */ 410 pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; 411 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; 412 413 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 414 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { 415 pctl->funcs[i].ngroups = npins; 416 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, 417 npins, sizeof(char *), 418 GFP_KERNEL); 419 if (!pctl->funcs[i].groups) 420 return -ENOMEM; 421 for (pin = 0; pin < npins; pin++) 422 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; 423 } 424 425 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, 426 npins, &pctl->funcs[AXP20X_FUNC_LDO], 427 pctl->desc->pins); 428 if (ret) 429 return ret; 430 431 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, 432 npins, &pctl->funcs[AXP20X_FUNC_ADC], 433 pctl->desc->pins); 434 if (ret) 435 return ret; 436 437 return 0; 438 } 439 440 static const struct of_device_id axp20x_pctl_match[] = { 441 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, 442 { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, }, 443 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, 444 { } 445 }; 446 MODULE_DEVICE_TABLE(of, axp20x_pctl_match); 447 448 static int axp20x_pctl_probe(struct platform_device *pdev) 449 { 450 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); 451 struct axp20x_pctl *pctl; 452 struct device *dev = &pdev->dev; 453 struct pinctrl_desc *pctrl_desc; 454 int ret; 455 456 if (!of_device_is_available(pdev->dev.of_node)) 457 return -ENODEV; 458 459 if (!axp20x) { 460 dev_err(&pdev->dev, "Parent drvdata not set\n"); 461 return -EINVAL; 462 } 463 464 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); 465 if (!pctl) 466 return -ENOMEM; 467 468 pctl->chip.base = -1; 469 pctl->chip.can_sleep = true; 470 pctl->chip.request = gpiochip_generic_request; 471 pctl->chip.free = gpiochip_generic_free; 472 pctl->chip.parent = &pdev->dev; 473 pctl->chip.label = dev_name(&pdev->dev); 474 pctl->chip.owner = THIS_MODULE; 475 pctl->chip.get = axp20x_gpio_get; 476 pctl->chip.get_direction = axp20x_gpio_get_direction; 477 pctl->chip.set = axp20x_gpio_set; 478 pctl->chip.direction_input = axp20x_gpio_input; 479 pctl->chip.direction_output = axp20x_gpio_output; 480 481 pctl->desc = of_device_get_match_data(dev); 482 483 pctl->chip.ngpio = pctl->desc->npins; 484 485 pctl->regmap = axp20x->regmap; 486 pctl->dev = &pdev->dev; 487 488 platform_set_drvdata(pdev, pctl); 489 490 ret = axp20x_build_funcs_groups(pdev); 491 if (ret) { 492 dev_err(&pdev->dev, "failed to build groups\n"); 493 return ret; 494 } 495 496 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); 497 if (!pctrl_desc) 498 return -ENOMEM; 499 500 pctrl_desc->name = dev_name(&pdev->dev); 501 pctrl_desc->owner = THIS_MODULE; 502 pctrl_desc->pins = pctl->desc->pins; 503 pctrl_desc->npins = pctl->desc->npins; 504 pctrl_desc->pctlops = &axp20x_pctrl_ops; 505 pctrl_desc->pmxops = &axp20x_pmx_ops; 506 507 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); 508 if (IS_ERR(pctl->pctl_dev)) { 509 dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); 510 return PTR_ERR(pctl->pctl_dev); 511 } 512 513 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); 514 if (ret) { 515 dev_err(&pdev->dev, "Failed to register GPIO chip\n"); 516 return ret; 517 } 518 519 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), 520 pctl->desc->pins->number, 521 pctl->desc->pins->number, 522 pctl->desc->npins); 523 if (ret) { 524 dev_err(&pdev->dev, "failed to add pin range\n"); 525 return ret; 526 } 527 528 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n"); 529 530 return 0; 531 } 532 533 static struct platform_driver axp20x_pctl_driver = { 534 .probe = axp20x_pctl_probe, 535 .driver = { 536 .name = "axp20x-gpio", 537 .of_match_table = axp20x_pctl_match, 538 }, 539 }; 540 541 module_platform_driver(axp20x_pctl_driver); 542 543 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 544 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 545 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); 546 MODULE_LICENSE("GPL"); 547