1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AXP20x pinctrl and GPIO driver 4 * 5 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 6 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/device.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/axp20x.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/regmap.h> 21 #include <linux/slab.h> 22 23 #include <linux/pinctrl/consumer.h> 24 #include <linux/pinctrl/pinconf-generic.h> 25 #include <linux/pinctrl/pinctrl.h> 26 #include <linux/pinctrl/pinmux.h> 27 28 #define AXP20X_GPIO_FUNCTIONS 0x7 29 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 30 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 31 #define AXP20X_GPIO_FUNCTION_INPUT 2 32 33 #define AXP20X_FUNC_GPIO_OUT 0 34 #define AXP20X_FUNC_GPIO_IN 1 35 #define AXP20X_FUNC_LDO 2 36 #define AXP20X_FUNC_ADC 3 37 #define AXP20X_FUNCS_NB 4 38 39 #define AXP20X_MUX_GPIO_OUT 0 40 #define AXP20X_MUX_GPIO_IN BIT(1) 41 #define AXP20X_MUX_ADC BIT(2) 42 43 #define AXP813_MUX_ADC (BIT(2) | BIT(0)) 44 45 struct axp20x_pctrl_desc { 46 const struct pinctrl_pin_desc *pins; 47 unsigned int npins; 48 /* Stores the pins supporting LDO function. Bit offset is pin number. */ 49 u8 ldo_mask; 50 /* Stores the pins supporting ADC function. Bit offset is pin number. */ 51 u8 adc_mask; 52 u8 gpio_status_offset; 53 u8 adc_mux; 54 }; 55 56 struct axp20x_pinctrl_function { 57 const char *name; 58 unsigned int muxval; 59 const char **groups; 60 unsigned int ngroups; 61 }; 62 63 struct axp20x_pctl { 64 struct gpio_chip chip; 65 struct regmap *regmap; 66 struct pinctrl_dev *pctl_dev; 67 struct device *dev; 68 const struct axp20x_pctrl_desc *desc; 69 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; 70 }; 71 72 static const struct pinctrl_pin_desc axp209_pins[] = { 73 PINCTRL_PIN(0, "GPIO0"), 74 PINCTRL_PIN(1, "GPIO1"), 75 PINCTRL_PIN(2, "GPIO2"), 76 }; 77 78 static const struct pinctrl_pin_desc axp22x_pins[] = { 79 PINCTRL_PIN(0, "GPIO0"), 80 PINCTRL_PIN(1, "GPIO1"), 81 }; 82 83 static const struct axp20x_pctrl_desc axp20x_data = { 84 .pins = axp209_pins, 85 .npins = ARRAY_SIZE(axp209_pins), 86 .ldo_mask = BIT(0) | BIT(1), 87 .adc_mask = BIT(0) | BIT(1), 88 .gpio_status_offset = 4, 89 .adc_mux = AXP20X_MUX_ADC, 90 }; 91 92 static const struct axp20x_pctrl_desc axp22x_data = { 93 .pins = axp22x_pins, 94 .npins = ARRAY_SIZE(axp22x_pins), 95 .ldo_mask = BIT(0) | BIT(1), 96 .gpio_status_offset = 0, 97 }; 98 99 static const struct axp20x_pctrl_desc axp813_data = { 100 .pins = axp22x_pins, 101 .npins = ARRAY_SIZE(axp22x_pins), 102 .ldo_mask = BIT(0) | BIT(1), 103 .adc_mask = BIT(0), 104 .gpio_status_offset = 0, 105 .adc_mux = AXP813_MUX_ADC, 106 }; 107 108 static int axp20x_gpio_get_reg(unsigned int offset) 109 { 110 switch (offset) { 111 case 0: 112 return AXP20X_GPIO0_CTRL; 113 case 1: 114 return AXP20X_GPIO1_CTRL; 115 case 2: 116 return AXP20X_GPIO2_CTRL; 117 } 118 119 return -EINVAL; 120 } 121 122 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset) 123 { 124 return pinctrl_gpio_direction_input(chip->base + offset); 125 } 126 127 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) 128 { 129 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 130 unsigned int val; 131 int ret; 132 133 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); 134 if (ret) 135 return ret; 136 137 return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); 138 } 139 140 static int axp20x_gpio_get_direction(struct gpio_chip *chip, 141 unsigned int offset) 142 { 143 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 144 unsigned int val; 145 int reg, ret; 146 147 reg = axp20x_gpio_get_reg(offset); 148 if (reg < 0) 149 return reg; 150 151 ret = regmap_read(pctl->regmap, reg, &val); 152 if (ret) 153 return ret; 154 155 /* 156 * This shouldn't really happen if the pin is in use already, 157 * or if it's not in use yet, it doesn't matter since we're 158 * going to change the value soon anyway. Default to output. 159 */ 160 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 161 return GPIO_LINE_DIRECTION_OUT; 162 163 /* 164 * The GPIO directions are the three lowest values. 165 * 2 is input, 0 and 1 are output 166 */ 167 if (val & 2) 168 return GPIO_LINE_DIRECTION_IN; 169 170 return GPIO_LINE_DIRECTION_OUT; 171 } 172 173 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, 174 int value) 175 { 176 chip->set(chip, offset, value); 177 178 return 0; 179 } 180 181 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, 182 int value) 183 { 184 struct axp20x_pctl *pctl = gpiochip_get_data(chip); 185 int reg; 186 187 reg = axp20x_gpio_get_reg(offset); 188 if (reg < 0) 189 return; 190 191 regmap_update_bits(pctl->regmap, reg, 192 AXP20X_GPIO_FUNCTIONS, 193 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : 194 AXP20X_GPIO_FUNCTION_OUT_LOW); 195 } 196 197 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, 198 u8 config) 199 { 200 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 201 int reg; 202 203 reg = axp20x_gpio_get_reg(offset); 204 if (reg < 0) 205 return reg; 206 207 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, 208 config); 209 } 210 211 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) 212 { 213 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 214 215 return ARRAY_SIZE(pctl->funcs); 216 } 217 218 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, 219 unsigned int selector) 220 { 221 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 222 223 return pctl->funcs[selector].name; 224 } 225 226 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, 227 unsigned int selector, 228 const char * const **groups, 229 unsigned int *num_groups) 230 { 231 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 232 233 *groups = pctl->funcs[selector].groups; 234 *num_groups = pctl->funcs[selector].ngroups; 235 236 return 0; 237 } 238 239 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, 240 unsigned int function, unsigned int group) 241 { 242 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 243 unsigned int mask; 244 245 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 246 if (function <= AXP20X_FUNC_GPIO_IN) 247 return axp20x_pmx_set(pctldev, group, 248 pctl->funcs[function].muxval); 249 250 if (function == AXP20X_FUNC_LDO) 251 mask = pctl->desc->ldo_mask; 252 else 253 mask = pctl->desc->adc_mask; 254 255 if (!(BIT(group) & mask)) 256 return -EINVAL; 257 258 /* 259 * We let the regulator framework handle the LDO muxing as muxing bits 260 * are basically also regulators on/off bits. It's better not to enforce 261 * any state of the regulator when selecting LDO mux so that we don't 262 * interfere with the regulator driver. 263 */ 264 if (function == AXP20X_FUNC_LDO) 265 return 0; 266 267 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); 268 } 269 270 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 271 struct pinctrl_gpio_range *range, 272 unsigned int offset, bool input) 273 { 274 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 275 276 if (input) 277 return axp20x_pmx_set(pctldev, offset, 278 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); 279 280 return axp20x_pmx_set(pctldev, offset, 281 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); 282 } 283 284 static const struct pinmux_ops axp20x_pmx_ops = { 285 .get_functions_count = axp20x_pmx_func_cnt, 286 .get_function_name = axp20x_pmx_func_name, 287 .get_function_groups = axp20x_pmx_func_groups, 288 .set_mux = axp20x_pmx_set_mux, 289 .gpio_set_direction = axp20x_pmx_gpio_set_direction, 290 .strict = true, 291 }; 292 293 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) 294 { 295 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 296 297 return pctl->desc->npins; 298 } 299 300 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, 301 const unsigned int **pins, unsigned int *num_pins) 302 { 303 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 304 305 *pins = (unsigned int *)&pctl->desc->pins[selector]; 306 *num_pins = 1; 307 308 return 0; 309 } 310 311 static const char *axp20x_group_name(struct pinctrl_dev *pctldev, 312 unsigned int selector) 313 { 314 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); 315 316 return pctl->desc->pins[selector].name; 317 } 318 319 static const struct pinctrl_ops axp20x_pctrl_ops = { 320 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 321 .dt_free_map = pinconf_generic_dt_free_map, 322 .get_groups_count = axp20x_groups_cnt, 323 .get_group_name = axp20x_group_name, 324 .get_group_pins = axp20x_group_pins, 325 }; 326 327 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, 328 unsigned int mask_len, 329 struct axp20x_pinctrl_function *func, 330 const struct pinctrl_pin_desc *pins) 331 { 332 unsigned long int mask_cpy = mask; 333 const char **group; 334 unsigned int ngroups = hweight8(mask); 335 int bit; 336 337 func->ngroups = ngroups; 338 if (func->ngroups > 0) { 339 func->groups = devm_kcalloc(dev, 340 ngroups, sizeof(const char *), 341 GFP_KERNEL); 342 if (!func->groups) 343 return -ENOMEM; 344 group = func->groups; 345 for_each_set_bit(bit, &mask_cpy, mask_len) { 346 *group = pins[bit].name; 347 group++; 348 } 349 } 350 351 return 0; 352 } 353 354 static int axp20x_build_funcs_groups(struct platform_device *pdev) 355 { 356 struct axp20x_pctl *pctl = platform_get_drvdata(pdev); 357 int i, ret, pin, npins = pctl->desc->npins; 358 359 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; 360 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; 361 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; 362 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; 363 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; 364 /* 365 * Muxval for LDO is useless as we won't use it. 366 * See comment in axp20x_pmx_set_mux. 367 */ 368 pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; 369 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; 370 371 /* Every pin supports GPIO_OUT and GPIO_IN functions */ 372 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { 373 pctl->funcs[i].ngroups = npins; 374 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, 375 npins, sizeof(char *), 376 GFP_KERNEL); 377 if (!pctl->funcs[i].groups) 378 return -ENOMEM; 379 for (pin = 0; pin < npins; pin++) 380 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; 381 } 382 383 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, 384 npins, &pctl->funcs[AXP20X_FUNC_LDO], 385 pctl->desc->pins); 386 if (ret) 387 return ret; 388 389 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, 390 npins, &pctl->funcs[AXP20X_FUNC_ADC], 391 pctl->desc->pins); 392 if (ret) 393 return ret; 394 395 return 0; 396 } 397 398 static const struct of_device_id axp20x_pctl_match[] = { 399 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, 400 { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, }, 401 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, 402 { } 403 }; 404 MODULE_DEVICE_TABLE(of, axp20x_pctl_match); 405 406 static int axp20x_pctl_probe(struct platform_device *pdev) 407 { 408 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); 409 struct axp20x_pctl *pctl; 410 struct device *dev = &pdev->dev; 411 struct pinctrl_desc *pctrl_desc; 412 int ret; 413 414 if (!of_device_is_available(pdev->dev.of_node)) 415 return -ENODEV; 416 417 if (!axp20x) { 418 dev_err(&pdev->dev, "Parent drvdata not set\n"); 419 return -EINVAL; 420 } 421 422 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); 423 if (!pctl) 424 return -ENOMEM; 425 426 pctl->chip.base = -1; 427 pctl->chip.can_sleep = true; 428 pctl->chip.request = gpiochip_generic_request; 429 pctl->chip.free = gpiochip_generic_free; 430 pctl->chip.parent = &pdev->dev; 431 pctl->chip.label = dev_name(&pdev->dev); 432 pctl->chip.owner = THIS_MODULE; 433 pctl->chip.get = axp20x_gpio_get; 434 pctl->chip.get_direction = axp20x_gpio_get_direction; 435 pctl->chip.set = axp20x_gpio_set; 436 pctl->chip.direction_input = axp20x_gpio_input; 437 pctl->chip.direction_output = axp20x_gpio_output; 438 439 pctl->desc = of_device_get_match_data(dev); 440 441 pctl->chip.ngpio = pctl->desc->npins; 442 443 pctl->regmap = axp20x->regmap; 444 pctl->dev = &pdev->dev; 445 446 platform_set_drvdata(pdev, pctl); 447 448 ret = axp20x_build_funcs_groups(pdev); 449 if (ret) { 450 dev_err(&pdev->dev, "failed to build groups\n"); 451 return ret; 452 } 453 454 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); 455 if (!pctrl_desc) 456 return -ENOMEM; 457 458 pctrl_desc->name = dev_name(&pdev->dev); 459 pctrl_desc->owner = THIS_MODULE; 460 pctrl_desc->pins = pctl->desc->pins; 461 pctrl_desc->npins = pctl->desc->npins; 462 pctrl_desc->pctlops = &axp20x_pctrl_ops; 463 pctrl_desc->pmxops = &axp20x_pmx_ops; 464 465 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); 466 if (IS_ERR(pctl->pctl_dev)) { 467 dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); 468 return PTR_ERR(pctl->pctl_dev); 469 } 470 471 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); 472 if (ret) { 473 dev_err(&pdev->dev, "Failed to register GPIO chip\n"); 474 return ret; 475 } 476 477 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), 478 pctl->desc->pins->number, 479 pctl->desc->pins->number, 480 pctl->desc->npins); 481 if (ret) { 482 dev_err(&pdev->dev, "failed to add pin range\n"); 483 return ret; 484 } 485 486 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n"); 487 488 return 0; 489 } 490 491 static struct platform_driver axp20x_pctl_driver = { 492 .probe = axp20x_pctl_probe, 493 .driver = { 494 .name = "axp20x-gpio", 495 .of_match_table = axp20x_pctl_match, 496 }, 497 }; 498 499 module_platform_driver(axp20x_pctl_driver); 500 501 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 502 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 503 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); 504 MODULE_LICENSE("GPL"); 505