1fd84aaa8SChester Lin // SPDX-License-Identifier: GPL-2.0-or-later
2fd84aaa8SChester Lin /*
3fd84aaa8SChester Lin * NXP S32G pinctrl driver
4fd84aaa8SChester Lin *
5fd84aaa8SChester Lin * Copyright 2015-2016 Freescale Semiconductor, Inc.
6fd84aaa8SChester Lin * Copyright 2017-2018, 2020-2022 NXP
7fd84aaa8SChester Lin * Copyright (C) 2022 SUSE LLC
8fd84aaa8SChester Lin */
9fd84aaa8SChester Lin
10fd84aaa8SChester Lin #include <linux/err.h>
11fd84aaa8SChester Lin #include <linux/init.h>
12fd84aaa8SChester Lin #include <linux/io.h>
13fd84aaa8SChester Lin #include <linux/module.h>
14fd84aaa8SChester Lin #include <linux/of.h>
15*060f03e9SRob Herring #include <linux/platform_device.h>
16fd84aaa8SChester Lin #include <linux/pinctrl/pinctrl.h>
17fd84aaa8SChester Lin
18fd84aaa8SChester Lin #include "pinctrl-s32.h"
19fd84aaa8SChester Lin
20fd84aaa8SChester Lin enum s32_pins {
21fd84aaa8SChester Lin S32G_MSCR_PA_00 = 0,
22fd84aaa8SChester Lin S32G_MSCR_PA_01 = 1,
23fd84aaa8SChester Lin S32G_MSCR_PA_02 = 2,
24fd84aaa8SChester Lin S32G_MSCR_PA_03 = 3,
25fd84aaa8SChester Lin S32G_MSCR_PA_04 = 4,
26fd84aaa8SChester Lin S32G_MSCR_PA_05 = 5,
27fd84aaa8SChester Lin S32G_MSCR_PA_06 = 6,
28fd84aaa8SChester Lin S32G_MSCR_PA_07 = 7,
29fd84aaa8SChester Lin S32G_MSCR_PA_08 = 8,
30fd84aaa8SChester Lin S32G_MSCR_PA_09 = 9,
31fd84aaa8SChester Lin S32G_MSCR_PA_10 = 10,
32fd84aaa8SChester Lin S32G_MSCR_PA_11 = 11,
33fd84aaa8SChester Lin S32G_MSCR_PA_12 = 12,
34fd84aaa8SChester Lin S32G_MSCR_PA_13 = 13,
35fd84aaa8SChester Lin S32G_MSCR_PA_14 = 14,
36fd84aaa8SChester Lin S32G_MSCR_PA_15 = 15,
37fd84aaa8SChester Lin S32G_MSCR_PB_00 = 16,
38fd84aaa8SChester Lin S32G_MSCR_PB_01 = 17,
39fd84aaa8SChester Lin S32G_MSCR_PB_02 = 18,
40fd84aaa8SChester Lin S32G_MSCR_PB_03 = 19,
41fd84aaa8SChester Lin S32G_MSCR_PB_04 = 20,
42fd84aaa8SChester Lin S32G_MSCR_PB_05 = 21,
43fd84aaa8SChester Lin S32G_MSCR_PB_06 = 22,
44fd84aaa8SChester Lin S32G_MSCR_PB_07 = 23,
45fd84aaa8SChester Lin S32G_MSCR_PB_08 = 24,
46fd84aaa8SChester Lin S32G_MSCR_PB_09 = 25,
47fd84aaa8SChester Lin S32G_MSCR_PB_10 = 26,
48fd84aaa8SChester Lin S32G_MSCR_PB_11 = 27,
49fd84aaa8SChester Lin S32G_MSCR_PB_12 = 28,
50fd84aaa8SChester Lin S32G_MSCR_PB_13 = 29,
51fd84aaa8SChester Lin S32G_MSCR_PB_14 = 30,
52fd84aaa8SChester Lin S32G_MSCR_PB_15 = 31,
53fd84aaa8SChester Lin S32G_MSCR_PC_00 = 32,
54fd84aaa8SChester Lin S32G_MSCR_PC_01 = 33,
55fd84aaa8SChester Lin S32G_MSCR_PC_02 = 34,
56fd84aaa8SChester Lin S32G_MSCR_PC_03 = 35,
57fd84aaa8SChester Lin S32G_MSCR_PC_04 = 36,
58fd84aaa8SChester Lin S32G_MSCR_PC_05 = 37,
59fd84aaa8SChester Lin S32G_MSCR_PC_06 = 38,
60fd84aaa8SChester Lin S32G_MSCR_PC_07 = 39,
61fd84aaa8SChester Lin S32G_MSCR_PC_08 = 40,
62fd84aaa8SChester Lin S32G_MSCR_PC_09 = 41,
63fd84aaa8SChester Lin S32G_MSCR_PC_10 = 42,
64fd84aaa8SChester Lin S32G_MSCR_PC_11 = 43,
65fd84aaa8SChester Lin S32G_MSCR_PC_12 = 44,
66fd84aaa8SChester Lin S32G_MSCR_PC_13 = 45,
67fd84aaa8SChester Lin S32G_MSCR_PC_14 = 46,
68fd84aaa8SChester Lin S32G_MSCR_PC_15 = 47,
69fd84aaa8SChester Lin S32G_MSCR_PD_00 = 48,
70fd84aaa8SChester Lin S32G_MSCR_PD_01 = 49,
71fd84aaa8SChester Lin S32G_MSCR_PD_02 = 50,
72fd84aaa8SChester Lin S32G_MSCR_PD_03 = 51,
73fd84aaa8SChester Lin S32G_MSCR_PD_04 = 52,
74fd84aaa8SChester Lin S32G_MSCR_PD_05 = 53,
75fd84aaa8SChester Lin S32G_MSCR_PD_06 = 54,
76fd84aaa8SChester Lin S32G_MSCR_PD_07 = 55,
77fd84aaa8SChester Lin S32G_MSCR_PD_08 = 56,
78fd84aaa8SChester Lin S32G_MSCR_PD_09 = 57,
79fd84aaa8SChester Lin S32G_MSCR_PD_10 = 58,
80fd84aaa8SChester Lin S32G_MSCR_PD_11 = 59,
81fd84aaa8SChester Lin S32G_MSCR_PD_12 = 60,
82fd84aaa8SChester Lin S32G_MSCR_PD_13 = 61,
83fd84aaa8SChester Lin S32G_MSCR_PD_14 = 62,
84fd84aaa8SChester Lin S32G_MSCR_PD_15 = 63,
85fd84aaa8SChester Lin S32G_MSCR_PE_00 = 64,
86fd84aaa8SChester Lin S32G_MSCR_PE_01 = 65,
87fd84aaa8SChester Lin S32G_MSCR_PE_02 = 66,
88fd84aaa8SChester Lin S32G_MSCR_PE_03 = 67,
89fd84aaa8SChester Lin S32G_MSCR_PE_04 = 68,
90fd84aaa8SChester Lin S32G_MSCR_PE_05 = 69,
91fd84aaa8SChester Lin S32G_MSCR_PE_06 = 70,
92fd84aaa8SChester Lin S32G_MSCR_PE_07 = 71,
93fd84aaa8SChester Lin S32G_MSCR_PE_08 = 72,
94fd84aaa8SChester Lin S32G_MSCR_PE_09 = 73,
95fd84aaa8SChester Lin S32G_MSCR_PE_10 = 74,
96fd84aaa8SChester Lin S32G_MSCR_PE_11 = 75,
97fd84aaa8SChester Lin S32G_MSCR_PE_12 = 76,
98fd84aaa8SChester Lin S32G_MSCR_PE_13 = 77,
99fd84aaa8SChester Lin S32G_MSCR_PE_14 = 78,
100fd84aaa8SChester Lin S32G_MSCR_PE_15 = 79,
101fd84aaa8SChester Lin S32G_MSCR_PF_00 = 80,
102fd84aaa8SChester Lin S32G_MSCR_PF_01 = 81,
103fd84aaa8SChester Lin S32G_MSCR_PF_02 = 82,
104fd84aaa8SChester Lin S32G_MSCR_PF_03 = 83,
105fd84aaa8SChester Lin S32G_MSCR_PF_04 = 84,
106fd84aaa8SChester Lin S32G_MSCR_PF_05 = 85,
107fd84aaa8SChester Lin S32G_MSCR_PF_06 = 86,
108fd84aaa8SChester Lin S32G_MSCR_PF_07 = 87,
109fd84aaa8SChester Lin S32G_MSCR_PF_08 = 88,
110fd84aaa8SChester Lin S32G_MSCR_PF_09 = 89,
111fd84aaa8SChester Lin S32G_MSCR_PF_10 = 90,
112fd84aaa8SChester Lin S32G_MSCR_PF_11 = 91,
113fd84aaa8SChester Lin S32G_MSCR_PF_12 = 92,
114fd84aaa8SChester Lin S32G_MSCR_PF_13 = 93,
115fd84aaa8SChester Lin S32G_MSCR_PF_14 = 94,
116fd84aaa8SChester Lin S32G_MSCR_PF_15 = 95,
117fd84aaa8SChester Lin S32G_MSCR_PG_00 = 96,
118fd84aaa8SChester Lin S32G_MSCR_PG_01 = 97,
119fd84aaa8SChester Lin S32G_MSCR_PG_02 = 98,
120fd84aaa8SChester Lin S32G_MSCR_PG_03 = 99,
121fd84aaa8SChester Lin S32G_MSCR_PG_04 = 100,
122fd84aaa8SChester Lin S32G_MSCR_PG_05 = 101,
123fd84aaa8SChester Lin S32G_MSCR_PH_00 = 112,
124fd84aaa8SChester Lin S32G_MSCR_PH_01 = 113,
125fd84aaa8SChester Lin S32G_MSCR_PH_02 = 114,
126fd84aaa8SChester Lin S32G_MSCR_PH_03 = 115,
127fd84aaa8SChester Lin S32G_MSCR_PH_04 = 116,
128fd84aaa8SChester Lin S32G_MSCR_PH_05 = 117,
129fd84aaa8SChester Lin S32G_MSCR_PH_06 = 118,
130fd84aaa8SChester Lin S32G_MSCR_PH_07 = 119,
131fd84aaa8SChester Lin S32G_MSCR_PH_08 = 120,
132fd84aaa8SChester Lin S32G_MSCR_PH_09 = 121,
133fd84aaa8SChester Lin S32G_MSCR_PH_10 = 122,
134fd84aaa8SChester Lin S32G_MSCR_PJ_00 = 144,
135fd84aaa8SChester Lin S32G_MSCR_PJ_01 = 145,
136fd84aaa8SChester Lin S32G_MSCR_PJ_02 = 146,
137fd84aaa8SChester Lin S32G_MSCR_PJ_03 = 147,
138fd84aaa8SChester Lin S32G_MSCR_PJ_04 = 148,
139fd84aaa8SChester Lin S32G_MSCR_PJ_05 = 149,
140fd84aaa8SChester Lin S32G_MSCR_PJ_06 = 150,
141fd84aaa8SChester Lin S32G_MSCR_PJ_07 = 151,
142fd84aaa8SChester Lin S32G_MSCR_PJ_08 = 152,
143fd84aaa8SChester Lin S32G_MSCR_PJ_09 = 153,
144fd84aaa8SChester Lin S32G_MSCR_PJ_10 = 154,
145fd84aaa8SChester Lin S32G_MSCR_PJ_11 = 155,
146fd84aaa8SChester Lin S32G_MSCR_PJ_12 = 156,
147fd84aaa8SChester Lin S32G_MSCR_PJ_13 = 157,
148fd84aaa8SChester Lin S32G_MSCR_PJ_14 = 158,
149fd84aaa8SChester Lin S32G_MSCR_PJ_15 = 159,
150fd84aaa8SChester Lin S32G_MSCR_PK_00 = 160,
151fd84aaa8SChester Lin S32G_MSCR_PK_01 = 161,
152fd84aaa8SChester Lin S32G_MSCR_PK_02 = 162,
153fd84aaa8SChester Lin S32G_MSCR_PK_03 = 163,
154fd84aaa8SChester Lin S32G_MSCR_PK_04 = 164,
155fd84aaa8SChester Lin S32G_MSCR_PK_05 = 165,
156fd84aaa8SChester Lin S32G_MSCR_PK_06 = 166,
157fd84aaa8SChester Lin S32G_MSCR_PK_07 = 167,
158fd84aaa8SChester Lin S32G_MSCR_PK_08 = 168,
159fd84aaa8SChester Lin S32G_MSCR_PK_09 = 169,
160fd84aaa8SChester Lin S32G_MSCR_PK_10 = 170,
161fd84aaa8SChester Lin S32G_MSCR_PK_11 = 171,
162fd84aaa8SChester Lin S32G_MSCR_PK_12 = 172,
163fd84aaa8SChester Lin S32G_MSCR_PK_13 = 173,
164fd84aaa8SChester Lin S32G_MSCR_PK_14 = 174,
165fd84aaa8SChester Lin S32G_MSCR_PK_15 = 175,
166fd84aaa8SChester Lin S32G_MSCR_PL_00 = 176,
167fd84aaa8SChester Lin S32G_MSCR_PL_01 = 177,
168fd84aaa8SChester Lin S32G_MSCR_PL_02 = 178,
169fd84aaa8SChester Lin S32G_MSCR_PL_03 = 179,
170fd84aaa8SChester Lin S32G_MSCR_PL_04 = 180,
171fd84aaa8SChester Lin S32G_MSCR_PL_05 = 181,
172fd84aaa8SChester Lin S32G_MSCR_PL_06 = 182,
173fd84aaa8SChester Lin S32G_MSCR_PL_07 = 183,
174fd84aaa8SChester Lin S32G_MSCR_PL_08 = 184,
175fd84aaa8SChester Lin S32G_MSCR_PL_09 = 185,
176fd84aaa8SChester Lin S32G_MSCR_PL_10 = 186,
177fd84aaa8SChester Lin S32G_MSCR_PL_11 = 187,
178fd84aaa8SChester Lin S32G_MSCR_PL_12 = 188,
179fd84aaa8SChester Lin S32G_MSCR_PL_13 = 189,
180fd84aaa8SChester Lin S32G_MSCR_PL_14 = 190,
181fd84aaa8SChester Lin
182fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA0 = 540,
183fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA1 = 541,
184fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA2 = 542,
185fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA3 = 543,
186fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA4 = 544,
187fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA5 = 545,
188fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA6 = 546,
189fd84aaa8SChester Lin S32G_IMCR_QSPI_A_DATA7 = 547,
190fd84aaa8SChester Lin S32G_IMCR_QSPI_DQS_A = 548,
191fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA0 = 552,
192fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA1 = 554,
193fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA2 = 551,
194fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA3 = 553,
195fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA4 = 557,
196fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA5 = 550,
197fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA6 = 556,
198fd84aaa8SChester Lin S32G_IMCR_QSPI_B_DATA7 = 555,
199fd84aaa8SChester Lin S32G_IMCR_QSPI_DQS_B = 558,
200fd84aaa8SChester Lin S32G_IMCR_BOOT_BOOTMOD0 = 560,
201fd84aaa8SChester Lin S32G_IMCR_BOOT_BOOTMOD1 = 561,
202fd84aaa8SChester Lin S32G_IMCR_I2C0_SCL = 566,
203fd84aaa8SChester Lin S32G_IMCR_I2C0_SDA = 565,
204fd84aaa8SChester Lin S32G_IMCR_LIN0_RX = 512,
205fd84aaa8SChester Lin S32G_IMCR_USDHC_CMD = 515,
206fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT0 = 516,
207fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT1 = 517,
208fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT2 = 520,
209fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT3 = 521,
210fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT4 = 522,
211fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT5 = 523,
212fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT6 = 519,
213fd84aaa8SChester Lin S32G_IMCR_USDHC_DAT7 = 518,
214fd84aaa8SChester Lin S32G_IMCR_USDHC_DQS = 524,
215fd84aaa8SChester Lin S32G_IMCR_CAN0_RXD = 513,
216fd84aaa8SChester Lin S32G_IMCR_CAN1_RXD = 631,
217fd84aaa8SChester Lin S32G_IMCR_CAN2_RXD = 632,
218fd84aaa8SChester Lin S32G_IMCR_CAN3_RXD = 633,
219fd84aaa8SChester Lin /* GMAC0 */
220fd84aaa8SChester Lin S32G_IMCR_Ethernet_MDIO = 527,
221fd84aaa8SChester Lin S32G_IMCR_Ethernet_CRS = 526,
222fd84aaa8SChester Lin S32G_IMCR_Ethernet_COL = 525,
223fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_D0 = 531,
224fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_D1 = 532,
225fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_D2 = 533,
226fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_D3 = 534,
227fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_ER = 528,
228fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_CLK = 529,
229fd84aaa8SChester Lin S32G_IMCR_Ethernet_RX_DV = 530,
230fd84aaa8SChester Lin S32G_IMCR_Ethernet_TX_CLK = 538,
231fd84aaa8SChester Lin S32G_IMCR_Ethernet_REF_CLK = 535,
232fd84aaa8SChester Lin /* PFE EMAC 0 MII */
233fd84aaa8SChester Lin /* PFE EMAC 1 MII */
234fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_MDIO = 857,
235fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_CRS = 856,
236fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_COL = 855,
237fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_D0 = 861,
238fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_D1 = 862,
239fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_D2 = 863,
240fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_D3 = 864,
241fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_ER = 860,
242fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_CLK = 859,
243fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_RX_DV = 865,
244fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_TX_CLK = 866,
245fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_1_REF_CLK = 858,
246fd84aaa8SChester Lin /* PFE EMAC 2 MII */
247fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_MDIO = 877,
248fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_CRS = 876,
249fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_COL = 875,
250fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_D0 = 881,
251fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_D1 = 882,
252fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_D2 = 883,
253fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_D3 = 884,
254fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_ER = 880,
255fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_CLK = 879,
256fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_RX_DV = 885,
257fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_TX_CLK = 886,
258fd84aaa8SChester Lin S32G_IMCR_PFE_EMAC_2_REF_CLK = 878,
259fd84aaa8SChester Lin
260fd84aaa8SChester Lin S32G_IMCR_FlexRay0_A_RX = 785,
261fd84aaa8SChester Lin S32G_IMCR_FlexRay0_B_RX = 786,
262fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH0 = 655,
263fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH0 = 665,
264fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH1 = 656,
265fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH1 = 666,
266fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH2 = 657,
267fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH2 = 667,
268fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH3 = 658,
269fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH3 = 668,
270fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH4 = 659,
271fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH4 = 669,
272fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_CH5 = 660,
273fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_CH5 = 670,
274fd84aaa8SChester Lin S32G_IMCR_FlexTimer0_EXTCLK = 661,
275fd84aaa8SChester Lin S32G_IMCR_FlexTimer1_EXTCLK = 671,
276fd84aaa8SChester Lin S32G_IMCR_I2C1_SCL = 717,
277fd84aaa8SChester Lin S32G_IMCR_I2C1_SDA = 718,
278fd84aaa8SChester Lin S32G_IMCR_I2C2_SCL = 719,
279fd84aaa8SChester Lin S32G_IMCR_I2C2_SDA = 720,
280fd84aaa8SChester Lin S32G_IMCR_I2C3_SCL = 721,
281fd84aaa8SChester Lin S32G_IMCR_I2C3_SDA = 722,
282fd84aaa8SChester Lin S32G_IMCR_I2C4_SCL = 723,
283fd84aaa8SChester Lin S32G_IMCR_I2C4_SDA = 724,
284fd84aaa8SChester Lin S32G_IMCR_LIN1_RX = 736,
285fd84aaa8SChester Lin S32G_IMCR_LIN2_RX = 737,
286fd84aaa8SChester Lin S32G_IMCR_DSPI0_PCS0 = 980,
287fd84aaa8SChester Lin S32G_IMCR_DSPI0_SCK = 981,
288fd84aaa8SChester Lin S32G_IMCR_DSPI0_SIN = 982,
289fd84aaa8SChester Lin S32G_IMCR_DSPI1_PCS0 = 985,
290fd84aaa8SChester Lin S32G_IMCR_DSPI1_SCK = 986,
291fd84aaa8SChester Lin S32G_IMCR_DSPI1_SIN = 987,
292fd84aaa8SChester Lin S32G_IMCR_DSPI2_PCS0 = 990,
293fd84aaa8SChester Lin S32G_IMCR_DSPI2_SCK = 991,
294fd84aaa8SChester Lin S32G_IMCR_DSPI2_SIN = 992,
295fd84aaa8SChester Lin S32G_IMCR_DSPI3_PCS0 = 995,
296fd84aaa8SChester Lin S32G_IMCR_DSPI3_SCK = 996,
297fd84aaa8SChester Lin S32G_IMCR_DSPI3_SIN = 997,
298fd84aaa8SChester Lin S32G_IMCR_DSPI4_PCS0 = 1000,
299fd84aaa8SChester Lin S32G_IMCR_DSPI4_SCK = 1001,
300fd84aaa8SChester Lin S32G_IMCR_DSPI4_SIN = 1002,
301fd84aaa8SChester Lin S32G_IMCR_DSPI5_PCS0 = 1005,
302fd84aaa8SChester Lin S32G_IMCR_DSPI5_SCK = 1006,
303fd84aaa8SChester Lin S32G_IMCR_DSPI5_SIN = 1007,
304fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN0_RXD = 745,
305fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN1_RXD = 746,
306fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN2_RXD = 747,
307fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN3_RXD = 748,
308fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN4_RXD = 749,
309fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN5_RXD = 750,
310fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN6_RXD = 751,
311fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN7_RXD = 752,
312fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN8_RXD = 753,
313fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN9_RXD = 754,
314fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN10_RXD = 755,
315fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN11_RXD = 756,
316fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN12_RXD = 757,
317fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN13_RXD = 758,
318fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN14_RXD = 759,
319fd84aaa8SChester Lin S32G_IMCR_LLCE_CAN15_RXD = 760,
320fd84aaa8SChester Lin S32G_IMCR_USB_CLK = 895,
321fd84aaa8SChester Lin S32G_IMCR_USB_DATA0 = 896,
322fd84aaa8SChester Lin S32G_IMCR_USB_DATA1 = 897,
323fd84aaa8SChester Lin S32G_IMCR_USB_DATA2 = 898,
324fd84aaa8SChester Lin S32G_IMCR_USB_DATA3 = 899,
325fd84aaa8SChester Lin S32G_IMCR_USB_DATA4 = 900,
326fd84aaa8SChester Lin S32G_IMCR_USB_DATA5 = 901,
327fd84aaa8SChester Lin S32G_IMCR_USB_DATA6 = 902,
328fd84aaa8SChester Lin S32G_IMCR_USB_DATA7 = 903,
329fd84aaa8SChester Lin S32G_IMCR_USB_DIR = 904,
330fd84aaa8SChester Lin S32G_IMCR_USB_NXT = 905,
331fd84aaa8SChester Lin
332fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ0 = 910,
333fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ1 = 911,
334fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ2 = 912,
335fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ3 = 913,
336fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ4 = 914,
337fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ5 = 915,
338fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ6 = 916,
339fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ7 = 917,
340fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ8 = 918,
341fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ9 = 919,
342fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ10 = 920,
343fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ11 = 921,
344fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ12 = 922,
345fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ13 = 923,
346fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ14 = 924,
347fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ15 = 925,
348fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ16 = 926,
349fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ17 = 927,
350fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ18 = 928,
351fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ19 = 929,
352fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ20 = 930,
353fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ21 = 931,
354fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ22 = 932,
355fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ23 = 933,
356fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ24 = 934,
357fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ25 = 935,
358fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ26 = 936,
359fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ27 = 937,
360fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ28 = 938,
361fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ29 = 939,
362fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ30 = 940,
363fd84aaa8SChester Lin S32G_IMCR_SIUL_EIRQ31 = 941,
364fd84aaa8SChester Lin };
365fd84aaa8SChester Lin
366fd84aaa8SChester Lin /* Pad names for the pinmux subsystem */
367fd84aaa8SChester Lin static const struct pinctrl_pin_desc s32_pinctrl_pads_siul2[] = {
368fd84aaa8SChester Lin
369fd84aaa8SChester Lin /* SIUL2_0 pins. */
370fd84aaa8SChester Lin
371fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_00),
372fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_01),
373fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_02),
374fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_03),
375fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_04),
376fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_05),
377fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_06),
378fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_07),
379fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_08),
380fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_09),
381fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_10),
382fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_11),
383fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_12),
384fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_13),
385fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_14),
386fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PA_15),
387fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_00),
388fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_01),
389fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_02),
390fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_03),
391fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_04),
392fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_05),
393fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_06),
394fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_07),
395fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_08),
396fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_09),
397fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_10),
398fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_11),
399fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_12),
400fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_13),
401fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_14),
402fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PB_15),
403fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_00),
404fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_01),
405fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_02),
406fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_03),
407fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_04),
408fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_05),
409fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_06),
410fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_07),
411fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_08),
412fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_09),
413fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_10),
414fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_11),
415fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_12),
416fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_13),
417fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_14),
418fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PC_15),
419fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_00),
420fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_01),
421fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_02),
422fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_03),
423fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_04),
424fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_05),
425fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_06),
426fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_07),
427fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_08),
428fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_09),
429fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_10),
430fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_11),
431fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_12),
432fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_13),
433fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_14),
434fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PD_15),
435fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_00),
436fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_01),
437fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_02),
438fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_03),
439fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_04),
440fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_05),
441fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_06),
442fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_07),
443fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_08),
444fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_09),
445fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_10),
446fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_11),
447fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_12),
448fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_13),
449fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_14),
450fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PE_15),
451fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_00),
452fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_01),
453fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_02),
454fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_03),
455fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_04),
456fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_05),
457fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_06),
458fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_07),
459fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_08),
460fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_09),
461fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_10),
462fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_11),
463fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_12),
464fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_13),
465fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_14),
466fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PF_15),
467fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_00),
468fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_01),
469fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_02),
470fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_03),
471fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_04),
472fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PG_05),
473fd84aaa8SChester Lin
474fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA0),
475fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA1),
476fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA2),
477fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA3),
478fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA4),
479fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA5),
480fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA6),
481fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_A_DATA7),
482fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_DQS_A),
483fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA0),
484fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA1),
485fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA2),
486fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA3),
487fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA4),
488fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA5),
489fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA6),
490fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_B_DATA7),
491fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_QSPI_DQS_B),
492fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C0_SCL),
493fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C0_SDA),
494fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LIN0_RX),
495fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_CMD),
496fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT0),
497fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT1),
498fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT2),
499fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT3),
500fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT4),
501fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT5),
502fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT6),
503fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DAT7),
504fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USDHC_DQS),
505fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_CAN0_RXD),
506fd84aaa8SChester Lin /* GMAC0 */
507fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_MDIO),
508fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_CRS),
509fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_COL),
510fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_D0),
511fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_D1),
512fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_D2),
513fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_D3),
514fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_ER),
515fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_CLK),
516fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_RX_DV),
517fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_TX_CLK),
518fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_Ethernet_REF_CLK),
519fd84aaa8SChester Lin
520fd84aaa8SChester Lin /* SIUL2_1 pins. */
521fd84aaa8SChester Lin
522fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_00),
523fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_01),
524fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_02),
525fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_03),
526fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_04),
527fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_05),
528fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_06),
529fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_07),
530fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_08),
531fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_09),
532fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PH_10),
533fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_00),
534fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_01),
535fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_02),
536fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_03),
537fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_04),
538fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_05),
539fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_06),
540fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_07),
541fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_08),
542fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_09),
543fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_10),
544fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_11),
545fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_12),
546fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_13),
547fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_14),
548fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PJ_15),
549fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_00),
550fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_01),
551fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_02),
552fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_03),
553fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_04),
554fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_05),
555fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_06),
556fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_07),
557fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_08),
558fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_09),
559fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_10),
560fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_11),
561fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_12),
562fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_13),
563fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_14),
564fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PK_15),
565fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_00),
566fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_01),
567fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_02),
568fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_03),
569fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_04),
570fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_05),
571fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_06),
572fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_07),
573fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_08),
574fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_09),
575fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_10),
576fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_11),
577fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_12),
578fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_13),
579fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_MSCR_PL_14),
580fd84aaa8SChester Lin
581fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexRay0_A_RX),
582fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexRay0_B_RX),
583fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH0),
584fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH0),
585fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH1),
586fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH1),
587fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH2),
588fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH2),
589fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH3),
590fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH3),
591fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH4),
592fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH4),
593fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_CH5),
594fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_CH5),
595fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer0_EXTCLK),
596fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_FlexTimer1_EXTCLK),
597fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C1_SCL),
598fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C1_SDA),
599fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C2_SCL),
600fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C2_SDA),
601fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C3_SCL),
602fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C3_SDA),
603fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C4_SCL),
604fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_I2C4_SDA),
605fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LIN1_RX),
606fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LIN2_RX),
607fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI0_PCS0),
608fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI0_SCK),
609fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI0_SIN),
610fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI1_PCS0),
611fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI1_SCK),
612fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI1_SIN),
613fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI2_PCS0),
614fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI2_SCK),
615fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI2_SIN),
616fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI3_PCS0),
617fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI3_SCK),
618fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI3_SIN),
619fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI4_PCS0),
620fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI4_SCK),
621fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI4_SIN),
622fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI5_PCS0),
623fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI5_SCK),
624fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_DSPI5_SIN),
625fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN0_RXD),
626fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN1_RXD),
627fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN2_RXD),
628fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN3_RXD),
629fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN4_RXD),
630fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN5_RXD),
631fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN6_RXD),
632fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN7_RXD),
633fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN8_RXD),
634fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN9_RXD),
635fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN10_RXD),
636fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN11_RXD),
637fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN12_RXD),
638fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN13_RXD),
639fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN14_RXD),
640fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_LLCE_CAN15_RXD),
641fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_CAN1_RXD),
642fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_CAN2_RXD),
643fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_CAN3_RXD),
644fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_CLK),
645fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA0),
646fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA1),
647fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA2),
648fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA3),
649fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA4),
650fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA5),
651fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA6),
652fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DATA7),
653fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_DIR),
654fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_USB_NXT),
655fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_MDIO),
656fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_CRS),
657fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_COL),
658fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_D0),
659fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_D1),
660fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_D2),
661fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_D3),
662fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_ER),
663fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_CLK),
664fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_RX_DV),
665fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_TX_CLK),
666fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_1_REF_CLK),
667fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_MDIO),
668fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_CRS),
669fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_COL),
670fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_D0),
671fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_D1),
672fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_D2),
673fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_D3),
674fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_ER),
675fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_CLK),
676fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_RX_DV),
677fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_TX_CLK),
678fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_PFE_EMAC_2_REF_CLK),
679fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ0),
680fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ1),
681fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ2),
682fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ3),
683fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ4),
684fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ5),
685fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ6),
686fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ7),
687fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ8),
688fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ9),
689fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ10),
690fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ11),
691fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ12),
692fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ13),
693fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ14),
694fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ15),
695fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ16),
696fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ17),
697fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ18),
698fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ19),
699fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ20),
700fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ21),
701fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ22),
702fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ23),
703fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ24),
704fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ25),
705fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ26),
706fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ27),
707fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ28),
708fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ29),
709fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ30),
710fd84aaa8SChester Lin S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ31),
711fd84aaa8SChester Lin };
712fd84aaa8SChester Lin
713fd84aaa8SChester Lin static const struct s32_pin_range s32_pin_ranges_siul2[] = {
714fd84aaa8SChester Lin /* MSCR pin ID ranges */
715fd84aaa8SChester Lin S32_PIN_RANGE(0, 101),
716fd84aaa8SChester Lin S32_PIN_RANGE(112, 122),
717fd84aaa8SChester Lin S32_PIN_RANGE(144, 190),
718fd84aaa8SChester Lin /* IMCR pin ID ranges */
719fd84aaa8SChester Lin S32_PIN_RANGE(512, 595),
720fd84aaa8SChester Lin S32_PIN_RANGE(631, 909),
721fd84aaa8SChester Lin S32_PIN_RANGE(942, 1007),
722fd84aaa8SChester Lin };
723fd84aaa8SChester Lin
7240da4cebeSChester Lin static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
725fd84aaa8SChester Lin .pins = s32_pinctrl_pads_siul2,
726fd84aaa8SChester Lin .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
727fd84aaa8SChester Lin .mem_pin_ranges = s32_pin_ranges_siul2,
728fd84aaa8SChester Lin .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
729fd84aaa8SChester Lin };
730fd84aaa8SChester Lin
731fd84aaa8SChester Lin static const struct of_device_id s32_pinctrl_of_match[] = {
732fd84aaa8SChester Lin {
733fd84aaa8SChester Lin .compatible = "nxp,s32g2-siul2-pinctrl",
7340da4cebeSChester Lin .data = &s32_pinctrl_data,
735fd84aaa8SChester Lin },
736fd84aaa8SChester Lin { /* sentinel */ }
737fd84aaa8SChester Lin };
738fd84aaa8SChester Lin MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);
739fd84aaa8SChester Lin
s32g_pinctrl_probe(struct platform_device * pdev)740fd84aaa8SChester Lin static int s32g_pinctrl_probe(struct platform_device *pdev)
741fd84aaa8SChester Lin {
7420da4cebeSChester Lin const struct s32_pinctrl_soc_data *soc_data;
743fd84aaa8SChester Lin
7440da4cebeSChester Lin soc_data = of_device_get_match_data(&pdev->dev);
745fd84aaa8SChester Lin
7460da4cebeSChester Lin return s32_pinctrl_probe(pdev, soc_data);
747fd84aaa8SChester Lin }
748fd84aaa8SChester Lin
749fd84aaa8SChester Lin static const struct dev_pm_ops s32g_pinctrl_pm_ops = {
750f7fc5768SArnd Bergmann LATE_SYSTEM_SLEEP_PM_OPS(s32_pinctrl_suspend, s32_pinctrl_resume)
751fd84aaa8SChester Lin };
752fd84aaa8SChester Lin
753fd84aaa8SChester Lin static struct platform_driver s32g_pinctrl_driver = {
754fd84aaa8SChester Lin .driver = {
755fd84aaa8SChester Lin .name = "s32g-siul2-pinctrl",
756fd84aaa8SChester Lin .of_match_table = s32_pinctrl_of_match,
75708b71a71SChester Lin .pm = pm_sleep_ptr(&s32g_pinctrl_pm_ops),
758fd84aaa8SChester Lin .suppress_bind_attrs = true,
759fd84aaa8SChester Lin },
760fd84aaa8SChester Lin .probe = s32g_pinctrl_probe,
761fd84aaa8SChester Lin };
762fd84aaa8SChester Lin builtin_platform_driver(s32g_pinctrl_driver);
763fd84aaa8SChester Lin
764fd84aaa8SChester Lin MODULE_AUTHOR("Matthew Nunez <matthew.nunez@nxp.com>");
765fd84aaa8SChester Lin MODULE_DESCRIPTION("NXP S32G pinctrl driver");
766fd84aaa8SChester Lin MODULE_LICENSE("GPL");
767