13b588e43STomer Maimon // SPDX-License-Identifier: GPL-2.0 23b588e43STomer Maimon // Copyright (c) 2016-2018 Nuvoton Technology corporation. 33b588e43STomer Maimon // Copyright (c) 2016, Dell Inc 43b588e43STomer Maimon 53b588e43STomer Maimon #include <linux/device.h> 63b588e43STomer Maimon #include <linux/gpio/driver.h> 73b588e43STomer Maimon #include <linux/interrupt.h> 83b588e43STomer Maimon #include <linux/irq.h> 93b588e43STomer Maimon #include <linux/mfd/syscon.h> 103b588e43STomer Maimon #include <linux/module.h> 113b588e43STomer Maimon #include <linux/of.h> 123b588e43STomer Maimon #include <linux/of_address.h> 133b588e43STomer Maimon #include <linux/of_irq.h> 143b588e43STomer Maimon #include <linux/platform_device.h> 150173ce55SAndy Shevchenko #include <linux/property.h> 163b588e43STomer Maimon #include <linux/regmap.h> 17*6272cc50SAndy Shevchenko #include <linux/seq_file.h> 18*6272cc50SAndy Shevchenko 19*6272cc50SAndy Shevchenko #include <linux/pinctrl/consumer.h> 20*6272cc50SAndy Shevchenko #include <linux/pinctrl/machine.h> 21*6272cc50SAndy Shevchenko #include <linux/pinctrl/pinconf-generic.h> 22*6272cc50SAndy Shevchenko #include <linux/pinctrl/pinconf.h> 23*6272cc50SAndy Shevchenko #include <linux/pinctrl/pinctrl.h> 24*6272cc50SAndy Shevchenko #include <linux/pinctrl/pinmux.h> 253b588e43STomer Maimon 263b588e43STomer Maimon /* GCR registers */ 273b588e43STomer Maimon #define NPCM7XX_GCR_PDID 0x00 283b588e43STomer Maimon #define NPCM7XX_GCR_MFSEL1 0x0C 293b588e43STomer Maimon #define NPCM7XX_GCR_MFSEL2 0x10 303b588e43STomer Maimon #define NPCM7XX_GCR_MFSEL3 0x64 313b588e43STomer Maimon #define NPCM7XX_GCR_MFSEL4 0xb0 323b588e43STomer Maimon #define NPCM7XX_GCR_CPCTL 0xD0 333b588e43STomer Maimon #define NPCM7XX_GCR_CP2BST 0xD4 343b588e43STomer Maimon #define NPCM7XX_GCR_B2CPNT 0xD8 353b588e43STomer Maimon #define NPCM7XX_GCR_I2CSEGSEL 0xE0 363b588e43STomer Maimon #define NPCM7XX_GCR_I2CSEGCTL 0xE4 373b588e43STomer Maimon #define NPCM7XX_GCR_SRCNT 0x68 383b588e43STomer Maimon #define NPCM7XX_GCR_FLOCKR1 0x74 393b588e43STomer Maimon #define NPCM7XX_GCR_DSCNT 0x78 403b588e43STomer Maimon 413b588e43STomer Maimon #define SRCNT_ESPI BIT(3) 423b588e43STomer Maimon 433b588e43STomer Maimon /* GPIO registers */ 443b588e43STomer Maimon #define NPCM7XX_GP_N_TLOCK1 0x00 453b588e43STomer Maimon #define NPCM7XX_GP_N_DIN 0x04 /* Data IN */ 463b588e43STomer Maimon #define NPCM7XX_GP_N_POL 0x08 /* Polarity */ 473b588e43STomer Maimon #define NPCM7XX_GP_N_DOUT 0x0c /* Data OUT */ 483b588e43STomer Maimon #define NPCM7XX_GP_N_OE 0x10 /* Output Enable */ 493b588e43STomer Maimon #define NPCM7XX_GP_N_OTYP 0x14 503b588e43STomer Maimon #define NPCM7XX_GP_N_MP 0x18 513b588e43STomer Maimon #define NPCM7XX_GP_N_PU 0x1c /* Pull-up */ 523b588e43STomer Maimon #define NPCM7XX_GP_N_PD 0x20 /* Pull-down */ 533b588e43STomer Maimon #define NPCM7XX_GP_N_DBNC 0x24 /* Debounce */ 543b588e43STomer Maimon #define NPCM7XX_GP_N_EVTYP 0x28 /* Event Type */ 553b588e43STomer Maimon #define NPCM7XX_GP_N_EVBE 0x2c /* Event Both Edge */ 563b588e43STomer Maimon #define NPCM7XX_GP_N_OBL0 0x30 573b588e43STomer Maimon #define NPCM7XX_GP_N_OBL1 0x34 583b588e43STomer Maimon #define NPCM7XX_GP_N_OBL2 0x38 593b588e43STomer Maimon #define NPCM7XX_GP_N_OBL3 0x3c 603b588e43STomer Maimon #define NPCM7XX_GP_N_EVEN 0x40 /* Event Enable */ 613b588e43STomer Maimon #define NPCM7XX_GP_N_EVENS 0x44 /* Event Set (enable) */ 623b588e43STomer Maimon #define NPCM7XX_GP_N_EVENC 0x48 /* Event Clear (disable) */ 633b588e43STomer Maimon #define NPCM7XX_GP_N_EVST 0x4c /* Event Status */ 643b588e43STomer Maimon #define NPCM7XX_GP_N_SPLCK 0x50 653b588e43STomer Maimon #define NPCM7XX_GP_N_MPLCK 0x54 663b588e43STomer Maimon #define NPCM7XX_GP_N_IEM 0x58 /* Input Enable */ 673b588e43STomer Maimon #define NPCM7XX_GP_N_OSRC 0x5c 683b588e43STomer Maimon #define NPCM7XX_GP_N_ODSC 0x60 693b588e43STomer Maimon #define NPCM7XX_GP_N_DOS 0x68 /* Data OUT Set */ 703b588e43STomer Maimon #define NPCM7XX_GP_N_DOC 0x6c /* Data OUT Clear */ 713b588e43STomer Maimon #define NPCM7XX_GP_N_OES 0x70 /* Output Enable Set */ 723b588e43STomer Maimon #define NPCM7XX_GP_N_OEC 0x74 /* Output Enable Clear */ 733b588e43STomer Maimon #define NPCM7XX_GP_N_TLOCK2 0x7c 743b588e43STomer Maimon 753b588e43STomer Maimon #define NPCM7XX_GPIO_PER_BANK 32 763b588e43STomer Maimon #define NPCM7XX_GPIO_BANK_NUM 8 773b588e43STomer Maimon #define NPCM7XX_GCR_NONE 0 783b588e43STomer Maimon 793b588e43STomer Maimon /* Structure for register banks */ 803b588e43STomer Maimon struct npcm7xx_gpio { 813b588e43STomer Maimon void __iomem *base; 823b588e43STomer Maimon struct gpio_chip gc; 833b588e43STomer Maimon int irqbase; 843b588e43STomer Maimon int irq; 853b588e43STomer Maimon struct irq_chip irq_chip; 863b588e43STomer Maimon u32 pinctrl_id; 871ebfe7e3SJilin Yuan int (*direction_input)(struct gpio_chip *chip, unsigned int offset); 881ebfe7e3SJilin Yuan int (*direction_output)(struct gpio_chip *chip, unsigned int offset, 893b588e43STomer Maimon int value); 901ebfe7e3SJilin Yuan int (*request)(struct gpio_chip *chip, unsigned int offset); 911ebfe7e3SJilin Yuan void (*free)(struct gpio_chip *chip, unsigned int offset); 923b588e43STomer Maimon }; 933b588e43STomer Maimon 943b588e43STomer Maimon struct npcm7xx_pinctrl { 953b588e43STomer Maimon struct pinctrl_dev *pctldev; 963b588e43STomer Maimon struct device *dev; 973b588e43STomer Maimon struct npcm7xx_gpio gpio_bank[NPCM7XX_GPIO_BANK_NUM]; 983b588e43STomer Maimon struct irq_domain *domain; 993b588e43STomer Maimon struct regmap *gcr_regmap; 1003b588e43STomer Maimon void __iomem *regs; 1013b588e43STomer Maimon u32 bank_num; 1023b588e43STomer Maimon }; 1033b588e43STomer Maimon 1043b588e43STomer Maimon /* GPIO handling in the pinctrl driver */ 1053b588e43STomer Maimon static void npcm_gpio_set(struct gpio_chip *gc, void __iomem *reg, 1063b588e43STomer Maimon unsigned int pinmask) 1073b588e43STomer Maimon { 1083b588e43STomer Maimon unsigned long flags; 1093b588e43STomer Maimon unsigned long val; 1103b588e43STomer Maimon 1113c938cc5SSchspa Shi raw_spin_lock_irqsave(&gc->bgpio_lock, flags); 1123b588e43STomer Maimon 1133b588e43STomer Maimon val = ioread32(reg) | pinmask; 1143b588e43STomer Maimon iowrite32(val, reg); 1153b588e43STomer Maimon 1163c938cc5SSchspa Shi raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); 1173b588e43STomer Maimon } 1183b588e43STomer Maimon 1193b588e43STomer Maimon static void npcm_gpio_clr(struct gpio_chip *gc, void __iomem *reg, 1203b588e43STomer Maimon unsigned int pinmask) 1213b588e43STomer Maimon { 1223b588e43STomer Maimon unsigned long flags; 1233b588e43STomer Maimon unsigned long val; 1243b588e43STomer Maimon 1253c938cc5SSchspa Shi raw_spin_lock_irqsave(&gc->bgpio_lock, flags); 1263b588e43STomer Maimon 1273b588e43STomer Maimon val = ioread32(reg) & ~pinmask; 1283b588e43STomer Maimon iowrite32(val, reg); 1293b588e43STomer Maimon 1303c938cc5SSchspa Shi raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); 1313b588e43STomer Maimon } 1323b588e43STomer Maimon 1333b588e43STomer Maimon static void npcmgpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 1343b588e43STomer Maimon { 1353b588e43STomer Maimon struct npcm7xx_gpio *bank = gpiochip_get_data(chip); 1363b588e43STomer Maimon 1373b588e43STomer Maimon seq_printf(s, "-- module %d [gpio%d - %d]\n", 1383b588e43STomer Maimon bank->gc.base / bank->gc.ngpio, 1393b588e43STomer Maimon bank->gc.base, 1403b588e43STomer Maimon bank->gc.base + bank->gc.ngpio); 1413b588e43STomer Maimon seq_printf(s, "DIN :%.8x DOUT:%.8x IE :%.8x OE :%.8x\n", 1423b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_DIN), 1433b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_DOUT), 1443b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_IEM), 1453b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OE)); 1463b588e43STomer Maimon seq_printf(s, "PU :%.8x PD :%.8x DB :%.8x POL :%.8x\n", 1473b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_PU), 1483b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_PD), 1493b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_DBNC), 1503b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_POL)); 1513b588e43STomer Maimon seq_printf(s, "ETYP:%.8x EVBE:%.8x EVEN:%.8x EVST:%.8x\n", 1523b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_EVTYP), 1533b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_EVBE), 1543b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_EVEN), 1553b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_EVST)); 1563b588e43STomer Maimon seq_printf(s, "OTYP:%.8x OSRC:%.8x ODSC:%.8x\n", 1573b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OTYP), 1583b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OSRC), 1593b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_ODSC)); 1603b588e43STomer Maimon seq_printf(s, "OBL0:%.8x OBL1:%.8x OBL2:%.8x OBL3:%.8x\n", 1613b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OBL0), 1623b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OBL1), 1633b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OBL2), 1643b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_OBL3)); 1653b588e43STomer Maimon seq_printf(s, "SLCK:%.8x MLCK:%.8x\n", 1663b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_SPLCK), 1673b588e43STomer Maimon ioread32(bank->base + NPCM7XX_GP_N_MPLCK)); 1683b588e43STomer Maimon } 1693b588e43STomer Maimon 1703b588e43STomer Maimon static int npcmgpio_direction_input(struct gpio_chip *chip, unsigned int offset) 1713b588e43STomer Maimon { 1723b588e43STomer Maimon struct npcm7xx_gpio *bank = gpiochip_get_data(chip); 1733b588e43STomer Maimon int ret; 1743b588e43STomer Maimon 1753b588e43STomer Maimon ret = pinctrl_gpio_direction_input(offset + chip->base); 1763b588e43STomer Maimon if (ret) 1773b588e43STomer Maimon return ret; 1783b588e43STomer Maimon 1793b588e43STomer Maimon return bank->direction_input(chip, offset); 1803b588e43STomer Maimon } 1813b588e43STomer Maimon 1823b588e43STomer Maimon /* Set GPIO to Output with initial value */ 1833b588e43STomer Maimon static int npcmgpio_direction_output(struct gpio_chip *chip, 1843b588e43STomer Maimon unsigned int offset, int value) 1853b588e43STomer Maimon { 1863b588e43STomer Maimon struct npcm7xx_gpio *bank = gpiochip_get_data(chip); 1873b588e43STomer Maimon int ret; 1883b588e43STomer Maimon 1893b588e43STomer Maimon dev_dbg(chip->parent, "gpio_direction_output: offset%d = %x\n", offset, 1903b588e43STomer Maimon value); 1913b588e43STomer Maimon 1923b588e43STomer Maimon ret = pinctrl_gpio_direction_output(offset + chip->base); 1933b588e43STomer Maimon if (ret) 1943b588e43STomer Maimon return ret; 1953b588e43STomer Maimon 1963b588e43STomer Maimon return bank->direction_output(chip, offset, value); 1973b588e43STomer Maimon } 1983b588e43STomer Maimon 1993b588e43STomer Maimon static int npcmgpio_gpio_request(struct gpio_chip *chip, unsigned int offset) 2003b588e43STomer Maimon { 2013b588e43STomer Maimon struct npcm7xx_gpio *bank = gpiochip_get_data(chip); 2023b588e43STomer Maimon int ret; 2033b588e43STomer Maimon 2043b588e43STomer Maimon dev_dbg(chip->parent, "gpio_request: offset%d\n", offset); 2053b588e43STomer Maimon ret = pinctrl_gpio_request(offset + chip->base); 2063b588e43STomer Maimon if (ret) 2073b588e43STomer Maimon return ret; 2083b588e43STomer Maimon 2093b588e43STomer Maimon return bank->request(chip, offset); 2103b588e43STomer Maimon } 2113b588e43STomer Maimon 2123b588e43STomer Maimon static void npcmgpio_gpio_free(struct gpio_chip *chip, unsigned int offset) 2133b588e43STomer Maimon { 2143b588e43STomer Maimon dev_dbg(chip->parent, "gpio_free: offset%d\n", offset); 2153b588e43STomer Maimon pinctrl_gpio_free(offset + chip->base); 2163b588e43STomer Maimon } 2173b588e43STomer Maimon 2183b588e43STomer Maimon static void npcmgpio_irq_handler(struct irq_desc *desc) 2193b588e43STomer Maimon { 2203b588e43STomer Maimon struct gpio_chip *gc; 2213b588e43STomer Maimon struct irq_chip *chip; 2223b588e43STomer Maimon struct npcm7xx_gpio *bank; 223ff61bc81SLinus Torvalds unsigned long sts, en, bit; 2243b588e43STomer Maimon 2253b588e43STomer Maimon gc = irq_desc_get_handler_data(desc); 2263b588e43STomer Maimon bank = gpiochip_get_data(gc); 2273b588e43STomer Maimon chip = irq_desc_get_chip(desc); 2283b588e43STomer Maimon 2293b588e43STomer Maimon chained_irq_enter(chip, desc); 2303b588e43STomer Maimon sts = ioread32(bank->base + NPCM7XX_GP_N_EVST); 2313b588e43STomer Maimon en = ioread32(bank->base + NPCM7XX_GP_N_EVEN); 232ff61bc81SLinus Torvalds dev_dbg(bank->gc.parent, "==> got irq sts %.8lx %.8lx\n", sts, 2333b588e43STomer Maimon en); 2343b588e43STomer Maimon 2353b588e43STomer Maimon sts &= en; 236ff61bc81SLinus Torvalds for_each_set_bit(bit, &sts, NPCM7XX_GPIO_PER_BANK) 237a9cb09b7SMarc Zyngier generic_handle_domain_irq(gc->irq.domain, bit); 2383b588e43STomer Maimon chained_irq_exit(chip, desc); 2393b588e43STomer Maimon } 2403b588e43STomer Maimon 2413b588e43STomer Maimon static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type) 2423b588e43STomer Maimon { 2433b588e43STomer Maimon struct npcm7xx_gpio *bank = 2443b588e43STomer Maimon gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2453b588e43STomer Maimon unsigned int gpio = BIT(d->hwirq); 2463b588e43STomer Maimon 247f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "setirqtype: %u.%u = %u\n", gpio, 2483b588e43STomer Maimon d->irq, type); 2493b588e43STomer Maimon switch (type) { 2503b588e43STomer Maimon case IRQ_TYPE_EDGE_RISING: 251f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "edge.rising\n"); 2523b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio); 2533b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio); 2543b588e43STomer Maimon break; 2553b588e43STomer Maimon case IRQ_TYPE_EDGE_FALLING: 256f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "edge.falling\n"); 2573b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio); 2583b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio); 2593b588e43STomer Maimon break; 2603b588e43STomer Maimon case IRQ_TYPE_EDGE_BOTH: 261f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "edge.both\n"); 2623b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio); 2633b588e43STomer Maimon break; 2643b588e43STomer Maimon case IRQ_TYPE_LEVEL_LOW: 265f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "level.low\n"); 2663b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio); 2673b588e43STomer Maimon break; 2683b588e43STomer Maimon case IRQ_TYPE_LEVEL_HIGH: 269f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "level.high\n"); 2703b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio); 2713b588e43STomer Maimon break; 2723b588e43STomer Maimon default: 273f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "invalid irq type\n"); 2743b588e43STomer Maimon return -EINVAL; 2753b588e43STomer Maimon } 2763b588e43STomer Maimon 2773b588e43STomer Maimon if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 2783b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_EVTYP, gpio); 2793b588e43STomer Maimon irq_set_handler_locked(d, handle_level_irq); 2803b588e43STomer Maimon } else if (type & (IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_EDGE_RISING 2813b588e43STomer Maimon | IRQ_TYPE_EDGE_FALLING)) { 2823b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_EVTYP, gpio); 2833b588e43STomer Maimon irq_set_handler_locked(d, handle_edge_irq); 2843b588e43STomer Maimon } 2853b588e43STomer Maimon 2863b588e43STomer Maimon return 0; 2873b588e43STomer Maimon } 2883b588e43STomer Maimon 2893b588e43STomer Maimon static void npcmgpio_irq_ack(struct irq_data *d) 2903b588e43STomer Maimon { 2913b588e43STomer Maimon struct npcm7xx_gpio *bank = 2923b588e43STomer Maimon gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2933b588e43STomer Maimon unsigned int gpio = d->hwirq; 2943b588e43STomer Maimon 295f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "irq_ack: %u.%u\n", gpio, d->irq); 2963b588e43STomer Maimon iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVST); 2973b588e43STomer Maimon } 2983b588e43STomer Maimon 2993b588e43STomer Maimon /* Disable GPIO interrupt */ 3003b588e43STomer Maimon static void npcmgpio_irq_mask(struct irq_data *d) 3013b588e43STomer Maimon { 3023b588e43STomer Maimon struct npcm7xx_gpio *bank = 3033b588e43STomer Maimon gpiochip_get_data(irq_data_get_irq_chip_data(d)); 3043b588e43STomer Maimon unsigned int gpio = d->hwirq; 3053b588e43STomer Maimon 3063b588e43STomer Maimon /* Clear events */ 307f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "irq_mask: %u.%u\n", gpio, d->irq); 3083b588e43STomer Maimon iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENC); 3093b588e43STomer Maimon } 3103b588e43STomer Maimon 3113b588e43STomer Maimon /* Enable GPIO interrupt */ 3123b588e43STomer Maimon static void npcmgpio_irq_unmask(struct irq_data *d) 3133b588e43STomer Maimon { 3143b588e43STomer Maimon struct npcm7xx_gpio *bank = 3153b588e43STomer Maimon gpiochip_get_data(irq_data_get_irq_chip_data(d)); 3163b588e43STomer Maimon unsigned int gpio = d->hwirq; 3173b588e43STomer Maimon 3183b588e43STomer Maimon /* Enable events */ 319f7e53e22SMarc Zyngier dev_dbg(bank->gc.parent, "irq_unmask: %u.%u\n", gpio, d->irq); 3203b588e43STomer Maimon iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENS); 3213b588e43STomer Maimon } 3223b588e43STomer Maimon 3233b588e43STomer Maimon static unsigned int npcmgpio_irq_startup(struct irq_data *d) 3243b588e43STomer Maimon { 3253b588e43STomer Maimon struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 3263b588e43STomer Maimon unsigned int gpio = d->hwirq; 3273b588e43STomer Maimon 3283b588e43STomer Maimon /* active-high, input, clear interrupt, enable interrupt */ 329f7e53e22SMarc Zyngier dev_dbg(gc->parent, "startup: %u.%u\n", gpio, d->irq); 3303b588e43STomer Maimon npcmgpio_direction_input(gc, gpio); 3313b588e43STomer Maimon npcmgpio_irq_ack(d); 3323b588e43STomer Maimon npcmgpio_irq_unmask(d); 3333b588e43STomer Maimon 3343b588e43STomer Maimon return 0; 3353b588e43STomer Maimon } 3363b588e43STomer Maimon 3374611e73fSJulia Lawall static const struct irq_chip npcmgpio_irqchip = { 3383b588e43STomer Maimon .name = "NPCM7XX-GPIO-IRQ", 3393b588e43STomer Maimon .irq_ack = npcmgpio_irq_ack, 3403b588e43STomer Maimon .irq_unmask = npcmgpio_irq_unmask, 3413b588e43STomer Maimon .irq_mask = npcmgpio_irq_mask, 3423b588e43STomer Maimon .irq_set_type = npcmgpio_set_irq_type, 3433b588e43STomer Maimon .irq_startup = npcmgpio_irq_startup, 3443b588e43STomer Maimon }; 3453b588e43STomer Maimon 3463b588e43STomer Maimon /* pinmux handing in the pinctrl driver*/ 3473b588e43STomer Maimon static const int smb0_pins[] = { 115, 114 }; 3483b588e43STomer Maimon static const int smb0b_pins[] = { 195, 194 }; 3493b588e43STomer Maimon static const int smb0c_pins[] = { 202, 196 }; 3503b588e43STomer Maimon static const int smb0d_pins[] = { 198, 199 }; 3513b588e43STomer Maimon static const int smb0den_pins[] = { 197 }; 3523b588e43STomer Maimon 3533b588e43STomer Maimon static const int smb1_pins[] = { 117, 116 }; 3543b588e43STomer Maimon static const int smb1b_pins[] = { 126, 127 }; 3553b588e43STomer Maimon static const int smb1c_pins[] = { 124, 125 }; 3563b588e43STomer Maimon static const int smb1d_pins[] = { 4, 5 }; 3573b588e43STomer Maimon 3583b588e43STomer Maimon static const int smb2_pins[] = { 119, 118 }; 3593b588e43STomer Maimon static const int smb2b_pins[] = { 122, 123 }; 3603b588e43STomer Maimon static const int smb2c_pins[] = { 120, 121 }; 3613b588e43STomer Maimon static const int smb2d_pins[] = { 6, 7 }; 3623b588e43STomer Maimon 3633b588e43STomer Maimon static const int smb3_pins[] = { 30, 31 }; 3643b588e43STomer Maimon static const int smb3b_pins[] = { 39, 40 }; 3653b588e43STomer Maimon static const int smb3c_pins[] = { 37, 38 }; 3663b588e43STomer Maimon static const int smb3d_pins[] = { 59, 60 }; 3673b588e43STomer Maimon 3683b588e43STomer Maimon static const int smb4_pins[] = { 28, 29 }; 3693b588e43STomer Maimon static const int smb4b_pins[] = { 18, 19 }; 3703b588e43STomer Maimon static const int smb4c_pins[] = { 20, 21 }; 3713b588e43STomer Maimon static const int smb4d_pins[] = { 22, 23 }; 3723b588e43STomer Maimon static const int smb4den_pins[] = { 17 }; 3733b588e43STomer Maimon 3743b588e43STomer Maimon static const int smb5_pins[] = { 26, 27 }; 3753b588e43STomer Maimon static const int smb5b_pins[] = { 13, 12 }; 3763b588e43STomer Maimon static const int smb5c_pins[] = { 15, 14 }; 3773b588e43STomer Maimon static const int smb5d_pins[] = { 94, 93 }; 3783b588e43STomer Maimon static const int ga20kbc_pins[] = { 94, 93 }; 3793b588e43STomer Maimon 3803b588e43STomer Maimon static const int smb6_pins[] = { 172, 171 }; 3813b588e43STomer Maimon static const int smb7_pins[] = { 174, 173 }; 3823b588e43STomer Maimon static const int smb8_pins[] = { 129, 128 }; 3833b588e43STomer Maimon static const int smb9_pins[] = { 131, 130 }; 3843b588e43STomer Maimon static const int smb10_pins[] = { 133, 132 }; 3853b588e43STomer Maimon static const int smb11_pins[] = { 135, 134 }; 3863b588e43STomer Maimon static const int smb12_pins[] = { 221, 220 }; 3873b588e43STomer Maimon static const int smb13_pins[] = { 223, 222 }; 3883b588e43STomer Maimon static const int smb14_pins[] = { 22, 23 }; 3893b588e43STomer Maimon static const int smb15_pins[] = { 20, 21 }; 3903b588e43STomer Maimon 3913b588e43STomer Maimon static const int fanin0_pins[] = { 64 }; 3923b588e43STomer Maimon static const int fanin1_pins[] = { 65 }; 3933b588e43STomer Maimon static const int fanin2_pins[] = { 66 }; 3943b588e43STomer Maimon static const int fanin3_pins[] = { 67 }; 3953b588e43STomer Maimon static const int fanin4_pins[] = { 68 }; 3963b588e43STomer Maimon static const int fanin5_pins[] = { 69 }; 3973b588e43STomer Maimon static const int fanin6_pins[] = { 70 }; 3983b588e43STomer Maimon static const int fanin7_pins[] = { 71 }; 3993b588e43STomer Maimon static const int fanin8_pins[] = { 72 }; 4003b588e43STomer Maimon static const int fanin9_pins[] = { 73 }; 4013b588e43STomer Maimon static const int fanin10_pins[] = { 74 }; 4023b588e43STomer Maimon static const int fanin11_pins[] = { 75 }; 4033b588e43STomer Maimon static const int fanin12_pins[] = { 76 }; 4043b588e43STomer Maimon static const int fanin13_pins[] = { 77 }; 4053b588e43STomer Maimon static const int fanin14_pins[] = { 78 }; 4063b588e43STomer Maimon static const int fanin15_pins[] = { 79 }; 4073b588e43STomer Maimon static const int faninx_pins[] = { 175, 176, 177, 203 }; 4083b588e43STomer Maimon 4093b588e43STomer Maimon static const int pwm0_pins[] = { 80 }; 4103b588e43STomer Maimon static const int pwm1_pins[] = { 81 }; 4113b588e43STomer Maimon static const int pwm2_pins[] = { 82 }; 4123b588e43STomer Maimon static const int pwm3_pins[] = { 83 }; 4133b588e43STomer Maimon static const int pwm4_pins[] = { 144 }; 4143b588e43STomer Maimon static const int pwm5_pins[] = { 145 }; 4153b588e43STomer Maimon static const int pwm6_pins[] = { 146 }; 4163b588e43STomer Maimon static const int pwm7_pins[] = { 147 }; 4173b588e43STomer Maimon 4183b588e43STomer Maimon static const int uart1_pins[] = { 43, 44, 45, 46, 47, 61, 62, 63 }; 4193b588e43STomer Maimon static const int uart2_pins[] = { 48, 49, 50, 51, 52, 53, 54, 55 }; 4203b588e43STomer Maimon 4213b588e43STomer Maimon /* RGMII 1 pin group */ 4223b588e43STomer Maimon static const int rg1_pins[] = { 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 4233b588e43STomer Maimon 106, 107 }; 4243b588e43STomer Maimon /* RGMII 1 MD interface pin group */ 4253b588e43STomer Maimon static const int rg1mdio_pins[] = { 108, 109 }; 4263b588e43STomer Maimon 4273b588e43STomer Maimon /* RGMII 2 pin group */ 4283b588e43STomer Maimon static const int rg2_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, 4293b588e43STomer Maimon 213, 214, 215 }; 4303b588e43STomer Maimon /* RGMII 2 MD interface pin group */ 4313b588e43STomer Maimon static const int rg2mdio_pins[] = { 216, 217 }; 4323b588e43STomer Maimon 4333b588e43STomer Maimon static const int ddr_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, 4343b588e43STomer Maimon 213, 214, 215, 216, 217 }; 4353b588e43STomer Maimon /* Serial I/O Expander 1 */ 4363b588e43STomer Maimon static const int iox1_pins[] = { 0, 1, 2, 3 }; 4373b588e43STomer Maimon /* Serial I/O Expander 2 */ 4383b588e43STomer Maimon static const int iox2_pins[] = { 4, 5, 6, 7 }; 4393b588e43STomer Maimon /* Host Serial I/O Expander 2 */ 4403b588e43STomer Maimon static const int ioxh_pins[] = { 10, 11, 24, 25 }; 4413b588e43STomer Maimon 4423b588e43STomer Maimon static const int mmc_pins[] = { 152, 154, 156, 157, 158, 159 }; 4433b588e43STomer Maimon static const int mmcwp_pins[] = { 153 }; 4443b588e43STomer Maimon static const int mmccd_pins[] = { 155 }; 4453b588e43STomer Maimon static const int mmcrst_pins[] = { 155 }; 4463b588e43STomer Maimon static const int mmc8_pins[] = { 148, 149, 150, 151 }; 4473b588e43STomer Maimon 4483b588e43STomer Maimon /* RMII 1 pin groups */ 4493b588e43STomer Maimon static const int r1_pins[] = { 178, 179, 180, 181, 182, 193, 201 }; 4503b588e43STomer Maimon static const int r1err_pins[] = { 56 }; 4513b588e43STomer Maimon static const int r1md_pins[] = { 57, 58 }; 4523b588e43STomer Maimon 4533b588e43STomer Maimon /* RMII 2 pin groups */ 4543b588e43STomer Maimon static const int r2_pins[] = { 84, 85, 86, 87, 88, 89, 200 }; 4553b588e43STomer Maimon static const int r2err_pins[] = { 90 }; 4563b588e43STomer Maimon static const int r2md_pins[] = { 91, 92 }; 4573b588e43STomer Maimon 4583b588e43STomer Maimon static const int sd1_pins[] = { 136, 137, 138, 139, 140, 141, 142, 143 }; 4593b588e43STomer Maimon static const int sd1pwr_pins[] = { 143 }; 4603b588e43STomer Maimon 4613b588e43STomer Maimon static const int wdog1_pins[] = { 218 }; 4623b588e43STomer Maimon static const int wdog2_pins[] = { 219 }; 4633b588e43STomer Maimon 4643b588e43STomer Maimon /* BMC serial port 0 */ 4653b588e43STomer Maimon static const int bmcuart0a_pins[] = { 41, 42 }; 4663b588e43STomer Maimon static const int bmcuart0b_pins[] = { 48, 49 }; 4673b588e43STomer Maimon 4683b588e43STomer Maimon static const int bmcuart1_pins[] = { 43, 44, 62, 63 }; 4693b588e43STomer Maimon 4703b588e43STomer Maimon /* System Control Interrupt and Power Management Event pin group */ 4713b588e43STomer Maimon static const int scipme_pins[] = { 169 }; 4723b588e43STomer Maimon /* System Management Interrupt pin group */ 4733b588e43STomer Maimon static const int sci_pins[] = { 170 }; 4743b588e43STomer Maimon /* Serial Interrupt Line pin group */ 4753b588e43STomer Maimon static const int serirq_pins[] = { 162 }; 4763b588e43STomer Maimon 4773b588e43STomer Maimon static const int clkout_pins[] = { 160 }; 4783b588e43STomer Maimon static const int clkreq_pins[] = { 231 }; 4793b588e43STomer Maimon 4803b588e43STomer Maimon static const int jtag2_pins[] = { 43, 44, 45, 46, 47 }; 4813b588e43STomer Maimon /* Graphics SPI Clock pin group */ 4823b588e43STomer Maimon static const int gspi_pins[] = { 12, 13, 14, 15 }; 4833b588e43STomer Maimon 4843b588e43STomer Maimon static const int spix_pins[] = { 224, 225, 226, 227, 229, 230 }; 4853b588e43STomer Maimon static const int spixcs1_pins[] = { 228 }; 4863b588e43STomer Maimon 4873b588e43STomer Maimon static const int pspi1_pins[] = { 175, 176, 177 }; 4883b588e43STomer Maimon static const int pspi2_pins[] = { 17, 18, 19 }; 4893b588e43STomer Maimon 4903b588e43STomer Maimon static const int spi0cs1_pins[] = { 32 }; 4913b588e43STomer Maimon 4923b588e43STomer Maimon static const int spi3_pins[] = { 183, 184, 185, 186 }; 4933b588e43STomer Maimon static const int spi3cs1_pins[] = { 187 }; 4943b588e43STomer Maimon static const int spi3quad_pins[] = { 188, 189 }; 4953b588e43STomer Maimon static const int spi3cs2_pins[] = { 188 }; 4963b588e43STomer Maimon static const int spi3cs3_pins[] = { 189 }; 4973b588e43STomer Maimon 4983b588e43STomer Maimon static const int ddc_pins[] = { 204, 205, 206, 207 }; 4993b588e43STomer Maimon 5003b588e43STomer Maimon static const int lpc_pins[] = { 95, 161, 163, 164, 165, 166, 167 }; 5013b588e43STomer Maimon static const int lpcclk_pins[] = { 168 }; 5023b588e43STomer Maimon static const int espi_pins[] = { 95, 161, 163, 164, 165, 166, 167, 168 }; 5033b588e43STomer Maimon 5043b588e43STomer Maimon static const int lkgpo0_pins[] = { 16 }; 5053b588e43STomer Maimon static const int lkgpo1_pins[] = { 8 }; 5063b588e43STomer Maimon static const int lkgpo2_pins[] = { 9 }; 5073b588e43STomer Maimon 5083b588e43STomer Maimon static const int nprd_smi_pins[] = { 190 }; 5093b588e43STomer Maimon 5103b588e43STomer Maimon /* 5113b588e43STomer Maimon * pin: name, number 5123b588e43STomer Maimon * group: name, npins, pins 5133b588e43STomer Maimon * function: name, ngroups, groups 5143b588e43STomer Maimon */ 5153b588e43STomer Maimon struct npcm7xx_group { 5163b588e43STomer Maimon const char *name; 5173b588e43STomer Maimon const unsigned int *pins; 5183b588e43STomer Maimon int npins; 5193b588e43STomer Maimon }; 5203b588e43STomer Maimon 5213b588e43STomer Maimon #define NPCM7XX_GRPS \ 5223b588e43STomer Maimon NPCM7XX_GRP(smb0), \ 5233b588e43STomer Maimon NPCM7XX_GRP(smb0b), \ 5243b588e43STomer Maimon NPCM7XX_GRP(smb0c), \ 5253b588e43STomer Maimon NPCM7XX_GRP(smb0d), \ 5263b588e43STomer Maimon NPCM7XX_GRP(smb0den), \ 5273b588e43STomer Maimon NPCM7XX_GRP(smb1), \ 5283b588e43STomer Maimon NPCM7XX_GRP(smb1b), \ 5293b588e43STomer Maimon NPCM7XX_GRP(smb1c), \ 5303b588e43STomer Maimon NPCM7XX_GRP(smb1d), \ 5313b588e43STomer Maimon NPCM7XX_GRP(smb2), \ 5323b588e43STomer Maimon NPCM7XX_GRP(smb2b), \ 5333b588e43STomer Maimon NPCM7XX_GRP(smb2c), \ 5343b588e43STomer Maimon NPCM7XX_GRP(smb2d), \ 5353b588e43STomer Maimon NPCM7XX_GRP(smb3), \ 5363b588e43STomer Maimon NPCM7XX_GRP(smb3b), \ 5373b588e43STomer Maimon NPCM7XX_GRP(smb3c), \ 5383b588e43STomer Maimon NPCM7XX_GRP(smb3d), \ 5393b588e43STomer Maimon NPCM7XX_GRP(smb4), \ 5403b588e43STomer Maimon NPCM7XX_GRP(smb4b), \ 5413b588e43STomer Maimon NPCM7XX_GRP(smb4c), \ 5423b588e43STomer Maimon NPCM7XX_GRP(smb4d), \ 5433b588e43STomer Maimon NPCM7XX_GRP(smb4den), \ 5443b588e43STomer Maimon NPCM7XX_GRP(smb5), \ 5453b588e43STomer Maimon NPCM7XX_GRP(smb5b), \ 5463b588e43STomer Maimon NPCM7XX_GRP(smb5c), \ 5473b588e43STomer Maimon NPCM7XX_GRP(smb5d), \ 5483b588e43STomer Maimon NPCM7XX_GRP(ga20kbc), \ 5493b588e43STomer Maimon NPCM7XX_GRP(smb6), \ 5503b588e43STomer Maimon NPCM7XX_GRP(smb7), \ 5513b588e43STomer Maimon NPCM7XX_GRP(smb8), \ 5523b588e43STomer Maimon NPCM7XX_GRP(smb9), \ 5533b588e43STomer Maimon NPCM7XX_GRP(smb10), \ 5543b588e43STomer Maimon NPCM7XX_GRP(smb11), \ 5553b588e43STomer Maimon NPCM7XX_GRP(smb12), \ 5563b588e43STomer Maimon NPCM7XX_GRP(smb13), \ 5573b588e43STomer Maimon NPCM7XX_GRP(smb14), \ 5583b588e43STomer Maimon NPCM7XX_GRP(smb15), \ 5593b588e43STomer Maimon NPCM7XX_GRP(fanin0), \ 5603b588e43STomer Maimon NPCM7XX_GRP(fanin1), \ 5613b588e43STomer Maimon NPCM7XX_GRP(fanin2), \ 5623b588e43STomer Maimon NPCM7XX_GRP(fanin3), \ 5633b588e43STomer Maimon NPCM7XX_GRP(fanin4), \ 5643b588e43STomer Maimon NPCM7XX_GRP(fanin5), \ 5653b588e43STomer Maimon NPCM7XX_GRP(fanin6), \ 5663b588e43STomer Maimon NPCM7XX_GRP(fanin7), \ 5673b588e43STomer Maimon NPCM7XX_GRP(fanin8), \ 5683b588e43STomer Maimon NPCM7XX_GRP(fanin9), \ 5693b588e43STomer Maimon NPCM7XX_GRP(fanin10), \ 5703b588e43STomer Maimon NPCM7XX_GRP(fanin11), \ 5713b588e43STomer Maimon NPCM7XX_GRP(fanin12), \ 5723b588e43STomer Maimon NPCM7XX_GRP(fanin13), \ 5733b588e43STomer Maimon NPCM7XX_GRP(fanin14), \ 5743b588e43STomer Maimon NPCM7XX_GRP(fanin15), \ 5753b588e43STomer Maimon NPCM7XX_GRP(faninx), \ 5763b588e43STomer Maimon NPCM7XX_GRP(pwm0), \ 5773b588e43STomer Maimon NPCM7XX_GRP(pwm1), \ 5783b588e43STomer Maimon NPCM7XX_GRP(pwm2), \ 5793b588e43STomer Maimon NPCM7XX_GRP(pwm3), \ 5803b588e43STomer Maimon NPCM7XX_GRP(pwm4), \ 5813b588e43STomer Maimon NPCM7XX_GRP(pwm5), \ 5823b588e43STomer Maimon NPCM7XX_GRP(pwm6), \ 5833b588e43STomer Maimon NPCM7XX_GRP(pwm7), \ 5843b588e43STomer Maimon NPCM7XX_GRP(rg1), \ 5853b588e43STomer Maimon NPCM7XX_GRP(rg1mdio), \ 5863b588e43STomer Maimon NPCM7XX_GRP(rg2), \ 5873b588e43STomer Maimon NPCM7XX_GRP(rg2mdio), \ 5883b588e43STomer Maimon NPCM7XX_GRP(ddr), \ 5893b588e43STomer Maimon NPCM7XX_GRP(uart1), \ 5903b588e43STomer Maimon NPCM7XX_GRP(uart2), \ 5913b588e43STomer Maimon NPCM7XX_GRP(bmcuart0a), \ 5923b588e43STomer Maimon NPCM7XX_GRP(bmcuart0b), \ 5933b588e43STomer Maimon NPCM7XX_GRP(bmcuart1), \ 5943b588e43STomer Maimon NPCM7XX_GRP(iox1), \ 5953b588e43STomer Maimon NPCM7XX_GRP(iox2), \ 5963b588e43STomer Maimon NPCM7XX_GRP(ioxh), \ 5973b588e43STomer Maimon NPCM7XX_GRP(gspi), \ 5983b588e43STomer Maimon NPCM7XX_GRP(mmc), \ 5993b588e43STomer Maimon NPCM7XX_GRP(mmcwp), \ 6003b588e43STomer Maimon NPCM7XX_GRP(mmccd), \ 6013b588e43STomer Maimon NPCM7XX_GRP(mmcrst), \ 6023b588e43STomer Maimon NPCM7XX_GRP(mmc8), \ 6033b588e43STomer Maimon NPCM7XX_GRP(r1), \ 6043b588e43STomer Maimon NPCM7XX_GRP(r1err), \ 6053b588e43STomer Maimon NPCM7XX_GRP(r1md), \ 6063b588e43STomer Maimon NPCM7XX_GRP(r2), \ 6073b588e43STomer Maimon NPCM7XX_GRP(r2err), \ 6083b588e43STomer Maimon NPCM7XX_GRP(r2md), \ 6093b588e43STomer Maimon NPCM7XX_GRP(sd1), \ 6103b588e43STomer Maimon NPCM7XX_GRP(sd1pwr), \ 6113b588e43STomer Maimon NPCM7XX_GRP(wdog1), \ 6123b588e43STomer Maimon NPCM7XX_GRP(wdog2), \ 6133b588e43STomer Maimon NPCM7XX_GRP(scipme), \ 6143b588e43STomer Maimon NPCM7XX_GRP(sci), \ 6153b588e43STomer Maimon NPCM7XX_GRP(serirq), \ 6163b588e43STomer Maimon NPCM7XX_GRP(jtag2), \ 6173b588e43STomer Maimon NPCM7XX_GRP(spix), \ 6183b588e43STomer Maimon NPCM7XX_GRP(spixcs1), \ 6193b588e43STomer Maimon NPCM7XX_GRP(pspi1), \ 6203b588e43STomer Maimon NPCM7XX_GRP(pspi2), \ 6213b588e43STomer Maimon NPCM7XX_GRP(ddc), \ 6223b588e43STomer Maimon NPCM7XX_GRP(clkreq), \ 6233b588e43STomer Maimon NPCM7XX_GRP(clkout), \ 6243b588e43STomer Maimon NPCM7XX_GRP(spi3), \ 6253b588e43STomer Maimon NPCM7XX_GRP(spi3cs1), \ 6263b588e43STomer Maimon NPCM7XX_GRP(spi3quad), \ 6273b588e43STomer Maimon NPCM7XX_GRP(spi3cs2), \ 6283b588e43STomer Maimon NPCM7XX_GRP(spi3cs3), \ 6293b588e43STomer Maimon NPCM7XX_GRP(spi0cs1), \ 6303b588e43STomer Maimon NPCM7XX_GRP(lpc), \ 6313b588e43STomer Maimon NPCM7XX_GRP(lpcclk), \ 6323b588e43STomer Maimon NPCM7XX_GRP(espi), \ 6333b588e43STomer Maimon NPCM7XX_GRP(lkgpo0), \ 6343b588e43STomer Maimon NPCM7XX_GRP(lkgpo1), \ 6353b588e43STomer Maimon NPCM7XX_GRP(lkgpo2), \ 6363b588e43STomer Maimon NPCM7XX_GRP(nprd_smi), \ 6373b588e43STomer Maimon \ 6383b588e43STomer Maimon 6393b588e43STomer Maimon enum { 6403b588e43STomer Maimon #define NPCM7XX_GRP(x) fn_ ## x 6413b588e43STomer Maimon NPCM7XX_GRPS 6423b588e43STomer Maimon /* add placeholder for none/gpio */ 6433b588e43STomer Maimon NPCM7XX_GRP(none), 6443b588e43STomer Maimon NPCM7XX_GRP(gpio), 6453b588e43STomer Maimon #undef NPCM7XX_GRP 6463b588e43STomer Maimon }; 6473b588e43STomer Maimon 6483b588e43STomer Maimon static struct npcm7xx_group npcm7xx_groups[] = { 6493b588e43STomer Maimon #define NPCM7XX_GRP(x) { .name = #x, .pins = x ## _pins, \ 6503b588e43STomer Maimon .npins = ARRAY_SIZE(x ## _pins) } 6513b588e43STomer Maimon NPCM7XX_GRPS 6523b588e43STomer Maimon #undef NPCM7XX_GRP 6533b588e43STomer Maimon }; 6543b588e43STomer Maimon 6553b588e43STomer Maimon #define NPCM7XX_SFUNC(a) NPCM7XX_FUNC(a, #a) 6563b588e43STomer Maimon #define NPCM7XX_FUNC(a, b...) static const char *a ## _grp[] = { b } 6573b588e43STomer Maimon #define NPCM7XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ 6583b588e43STomer Maimon .groups = nm ## _grp } 6593b588e43STomer Maimon struct npcm7xx_func { 6603b588e43STomer Maimon const char *name; 6613b588e43STomer Maimon const unsigned int ngroups; 6623b588e43STomer Maimon const char *const *groups; 6633b588e43STomer Maimon }; 6643b588e43STomer Maimon 6653b588e43STomer Maimon NPCM7XX_SFUNC(smb0); 6663b588e43STomer Maimon NPCM7XX_SFUNC(smb0b); 6673b588e43STomer Maimon NPCM7XX_SFUNC(smb0c); 6683b588e43STomer Maimon NPCM7XX_SFUNC(smb0d); 6693b588e43STomer Maimon NPCM7XX_SFUNC(smb0den); 6703b588e43STomer Maimon NPCM7XX_SFUNC(smb1); 6713b588e43STomer Maimon NPCM7XX_SFUNC(smb1b); 6723b588e43STomer Maimon NPCM7XX_SFUNC(smb1c); 6733b588e43STomer Maimon NPCM7XX_SFUNC(smb1d); 6743b588e43STomer Maimon NPCM7XX_SFUNC(smb2); 6753b588e43STomer Maimon NPCM7XX_SFUNC(smb2b); 6763b588e43STomer Maimon NPCM7XX_SFUNC(smb2c); 6773b588e43STomer Maimon NPCM7XX_SFUNC(smb2d); 6783b588e43STomer Maimon NPCM7XX_SFUNC(smb3); 6793b588e43STomer Maimon NPCM7XX_SFUNC(smb3b); 6803b588e43STomer Maimon NPCM7XX_SFUNC(smb3c); 6813b588e43STomer Maimon NPCM7XX_SFUNC(smb3d); 6823b588e43STomer Maimon NPCM7XX_SFUNC(smb4); 6833b588e43STomer Maimon NPCM7XX_SFUNC(smb4b); 6843b588e43STomer Maimon NPCM7XX_SFUNC(smb4c); 6853b588e43STomer Maimon NPCM7XX_SFUNC(smb4d); 6863b588e43STomer Maimon NPCM7XX_SFUNC(smb4den); 6873b588e43STomer Maimon NPCM7XX_SFUNC(smb5); 6883b588e43STomer Maimon NPCM7XX_SFUNC(smb5b); 6893b588e43STomer Maimon NPCM7XX_SFUNC(smb5c); 6903b588e43STomer Maimon NPCM7XX_SFUNC(smb5d); 6913b588e43STomer Maimon NPCM7XX_SFUNC(ga20kbc); 6923b588e43STomer Maimon NPCM7XX_SFUNC(smb6); 6933b588e43STomer Maimon NPCM7XX_SFUNC(smb7); 6943b588e43STomer Maimon NPCM7XX_SFUNC(smb8); 6953b588e43STomer Maimon NPCM7XX_SFUNC(smb9); 6963b588e43STomer Maimon NPCM7XX_SFUNC(smb10); 6973b588e43STomer Maimon NPCM7XX_SFUNC(smb11); 6983b588e43STomer Maimon NPCM7XX_SFUNC(smb12); 6993b588e43STomer Maimon NPCM7XX_SFUNC(smb13); 7003b588e43STomer Maimon NPCM7XX_SFUNC(smb14); 7013b588e43STomer Maimon NPCM7XX_SFUNC(smb15); 7023b588e43STomer Maimon NPCM7XX_SFUNC(fanin0); 7033b588e43STomer Maimon NPCM7XX_SFUNC(fanin1); 7043b588e43STomer Maimon NPCM7XX_SFUNC(fanin2); 7053b588e43STomer Maimon NPCM7XX_SFUNC(fanin3); 7063b588e43STomer Maimon NPCM7XX_SFUNC(fanin4); 7073b588e43STomer Maimon NPCM7XX_SFUNC(fanin5); 7083b588e43STomer Maimon NPCM7XX_SFUNC(fanin6); 7093b588e43STomer Maimon NPCM7XX_SFUNC(fanin7); 7103b588e43STomer Maimon NPCM7XX_SFUNC(fanin8); 7113b588e43STomer Maimon NPCM7XX_SFUNC(fanin9); 7123b588e43STomer Maimon NPCM7XX_SFUNC(fanin10); 7133b588e43STomer Maimon NPCM7XX_SFUNC(fanin11); 7143b588e43STomer Maimon NPCM7XX_SFUNC(fanin12); 7153b588e43STomer Maimon NPCM7XX_SFUNC(fanin13); 7163b588e43STomer Maimon NPCM7XX_SFUNC(fanin14); 7173b588e43STomer Maimon NPCM7XX_SFUNC(fanin15); 7183b588e43STomer Maimon NPCM7XX_SFUNC(faninx); 7193b588e43STomer Maimon NPCM7XX_SFUNC(pwm0); 7203b588e43STomer Maimon NPCM7XX_SFUNC(pwm1); 7213b588e43STomer Maimon NPCM7XX_SFUNC(pwm2); 7223b588e43STomer Maimon NPCM7XX_SFUNC(pwm3); 7233b588e43STomer Maimon NPCM7XX_SFUNC(pwm4); 7243b588e43STomer Maimon NPCM7XX_SFUNC(pwm5); 7253b588e43STomer Maimon NPCM7XX_SFUNC(pwm6); 7263b588e43STomer Maimon NPCM7XX_SFUNC(pwm7); 7273b588e43STomer Maimon NPCM7XX_SFUNC(rg1); 7283b588e43STomer Maimon NPCM7XX_SFUNC(rg1mdio); 7293b588e43STomer Maimon NPCM7XX_SFUNC(rg2); 7303b588e43STomer Maimon NPCM7XX_SFUNC(rg2mdio); 7313b588e43STomer Maimon NPCM7XX_SFUNC(ddr); 7323b588e43STomer Maimon NPCM7XX_SFUNC(uart1); 7333b588e43STomer Maimon NPCM7XX_SFUNC(uart2); 7343b588e43STomer Maimon NPCM7XX_SFUNC(bmcuart0a); 7353b588e43STomer Maimon NPCM7XX_SFUNC(bmcuart0b); 7363b588e43STomer Maimon NPCM7XX_SFUNC(bmcuart1); 7373b588e43STomer Maimon NPCM7XX_SFUNC(iox1); 7383b588e43STomer Maimon NPCM7XX_SFUNC(iox2); 7393b588e43STomer Maimon NPCM7XX_SFUNC(ioxh); 7403b588e43STomer Maimon NPCM7XX_SFUNC(gspi); 7413b588e43STomer Maimon NPCM7XX_SFUNC(mmc); 7423b588e43STomer Maimon NPCM7XX_SFUNC(mmcwp); 7433b588e43STomer Maimon NPCM7XX_SFUNC(mmccd); 7443b588e43STomer Maimon NPCM7XX_SFUNC(mmcrst); 7453b588e43STomer Maimon NPCM7XX_SFUNC(mmc8); 7463b588e43STomer Maimon NPCM7XX_SFUNC(r1); 7473b588e43STomer Maimon NPCM7XX_SFUNC(r1err); 7483b588e43STomer Maimon NPCM7XX_SFUNC(r1md); 7493b588e43STomer Maimon NPCM7XX_SFUNC(r2); 7503b588e43STomer Maimon NPCM7XX_SFUNC(r2err); 7513b588e43STomer Maimon NPCM7XX_SFUNC(r2md); 7523b588e43STomer Maimon NPCM7XX_SFUNC(sd1); 7533b588e43STomer Maimon NPCM7XX_SFUNC(sd1pwr); 7543b588e43STomer Maimon NPCM7XX_SFUNC(wdog1); 7553b588e43STomer Maimon NPCM7XX_SFUNC(wdog2); 7563b588e43STomer Maimon NPCM7XX_SFUNC(scipme); 7573b588e43STomer Maimon NPCM7XX_SFUNC(sci); 7583b588e43STomer Maimon NPCM7XX_SFUNC(serirq); 7593b588e43STomer Maimon NPCM7XX_SFUNC(jtag2); 7603b588e43STomer Maimon NPCM7XX_SFUNC(spix); 7613b588e43STomer Maimon NPCM7XX_SFUNC(spixcs1); 7623b588e43STomer Maimon NPCM7XX_SFUNC(pspi1); 7633b588e43STomer Maimon NPCM7XX_SFUNC(pspi2); 7643b588e43STomer Maimon NPCM7XX_SFUNC(ddc); 7653b588e43STomer Maimon NPCM7XX_SFUNC(clkreq); 7663b588e43STomer Maimon NPCM7XX_SFUNC(clkout); 7673b588e43STomer Maimon NPCM7XX_SFUNC(spi3); 7683b588e43STomer Maimon NPCM7XX_SFUNC(spi3cs1); 7693b588e43STomer Maimon NPCM7XX_SFUNC(spi3quad); 7703b588e43STomer Maimon NPCM7XX_SFUNC(spi3cs2); 7713b588e43STomer Maimon NPCM7XX_SFUNC(spi3cs3); 7723b588e43STomer Maimon NPCM7XX_SFUNC(spi0cs1); 7733b588e43STomer Maimon NPCM7XX_SFUNC(lpc); 7743b588e43STomer Maimon NPCM7XX_SFUNC(lpcclk); 7753b588e43STomer Maimon NPCM7XX_SFUNC(espi); 7763b588e43STomer Maimon NPCM7XX_SFUNC(lkgpo0); 7773b588e43STomer Maimon NPCM7XX_SFUNC(lkgpo1); 7783b588e43STomer Maimon NPCM7XX_SFUNC(lkgpo2); 7793b588e43STomer Maimon NPCM7XX_SFUNC(nprd_smi); 7803b588e43STomer Maimon 7813b588e43STomer Maimon /* Function names */ 7823b588e43STomer Maimon static struct npcm7xx_func npcm7xx_funcs[] = { 7833b588e43STomer Maimon NPCM7XX_MKFUNC(smb0), 7843b588e43STomer Maimon NPCM7XX_MKFUNC(smb0b), 7853b588e43STomer Maimon NPCM7XX_MKFUNC(smb0c), 7863b588e43STomer Maimon NPCM7XX_MKFUNC(smb0d), 7873b588e43STomer Maimon NPCM7XX_MKFUNC(smb0den), 7883b588e43STomer Maimon NPCM7XX_MKFUNC(smb1), 7893b588e43STomer Maimon NPCM7XX_MKFUNC(smb1b), 7903b588e43STomer Maimon NPCM7XX_MKFUNC(smb1c), 7913b588e43STomer Maimon NPCM7XX_MKFUNC(smb1d), 7923b588e43STomer Maimon NPCM7XX_MKFUNC(smb2), 7933b588e43STomer Maimon NPCM7XX_MKFUNC(smb2b), 7943b588e43STomer Maimon NPCM7XX_MKFUNC(smb2c), 7953b588e43STomer Maimon NPCM7XX_MKFUNC(smb2d), 7963b588e43STomer Maimon NPCM7XX_MKFUNC(smb3), 7973b588e43STomer Maimon NPCM7XX_MKFUNC(smb3b), 7983b588e43STomer Maimon NPCM7XX_MKFUNC(smb3c), 7993b588e43STomer Maimon NPCM7XX_MKFUNC(smb3d), 8003b588e43STomer Maimon NPCM7XX_MKFUNC(smb4), 8013b588e43STomer Maimon NPCM7XX_MKFUNC(smb4b), 8023b588e43STomer Maimon NPCM7XX_MKFUNC(smb4c), 8033b588e43STomer Maimon NPCM7XX_MKFUNC(smb4d), 8043b588e43STomer Maimon NPCM7XX_MKFUNC(smb4den), 8053b588e43STomer Maimon NPCM7XX_MKFUNC(smb5), 8063b588e43STomer Maimon NPCM7XX_MKFUNC(smb5b), 8073b588e43STomer Maimon NPCM7XX_MKFUNC(smb5c), 8083b588e43STomer Maimon NPCM7XX_MKFUNC(smb5d), 8093b588e43STomer Maimon NPCM7XX_MKFUNC(ga20kbc), 8103b588e43STomer Maimon NPCM7XX_MKFUNC(smb6), 8113b588e43STomer Maimon NPCM7XX_MKFUNC(smb7), 8123b588e43STomer Maimon NPCM7XX_MKFUNC(smb8), 8133b588e43STomer Maimon NPCM7XX_MKFUNC(smb9), 8143b588e43STomer Maimon NPCM7XX_MKFUNC(smb10), 8153b588e43STomer Maimon NPCM7XX_MKFUNC(smb11), 8163b588e43STomer Maimon NPCM7XX_MKFUNC(smb12), 8173b588e43STomer Maimon NPCM7XX_MKFUNC(smb13), 8183b588e43STomer Maimon NPCM7XX_MKFUNC(smb14), 8193b588e43STomer Maimon NPCM7XX_MKFUNC(smb15), 8203b588e43STomer Maimon NPCM7XX_MKFUNC(fanin0), 8213b588e43STomer Maimon NPCM7XX_MKFUNC(fanin1), 8223b588e43STomer Maimon NPCM7XX_MKFUNC(fanin2), 8233b588e43STomer Maimon NPCM7XX_MKFUNC(fanin3), 8243b588e43STomer Maimon NPCM7XX_MKFUNC(fanin4), 8253b588e43STomer Maimon NPCM7XX_MKFUNC(fanin5), 8263b588e43STomer Maimon NPCM7XX_MKFUNC(fanin6), 8273b588e43STomer Maimon NPCM7XX_MKFUNC(fanin7), 8283b588e43STomer Maimon NPCM7XX_MKFUNC(fanin8), 8293b588e43STomer Maimon NPCM7XX_MKFUNC(fanin9), 8303b588e43STomer Maimon NPCM7XX_MKFUNC(fanin10), 8313b588e43STomer Maimon NPCM7XX_MKFUNC(fanin11), 8323b588e43STomer Maimon NPCM7XX_MKFUNC(fanin12), 8333b588e43STomer Maimon NPCM7XX_MKFUNC(fanin13), 8343b588e43STomer Maimon NPCM7XX_MKFUNC(fanin14), 8353b588e43STomer Maimon NPCM7XX_MKFUNC(fanin15), 8363b588e43STomer Maimon NPCM7XX_MKFUNC(faninx), 8373b588e43STomer Maimon NPCM7XX_MKFUNC(pwm0), 8383b588e43STomer Maimon NPCM7XX_MKFUNC(pwm1), 8393b588e43STomer Maimon NPCM7XX_MKFUNC(pwm2), 8403b588e43STomer Maimon NPCM7XX_MKFUNC(pwm3), 8413b588e43STomer Maimon NPCM7XX_MKFUNC(pwm4), 8423b588e43STomer Maimon NPCM7XX_MKFUNC(pwm5), 8433b588e43STomer Maimon NPCM7XX_MKFUNC(pwm6), 8443b588e43STomer Maimon NPCM7XX_MKFUNC(pwm7), 8453b588e43STomer Maimon NPCM7XX_MKFUNC(rg1), 8463b588e43STomer Maimon NPCM7XX_MKFUNC(rg1mdio), 8473b588e43STomer Maimon NPCM7XX_MKFUNC(rg2), 8483b588e43STomer Maimon NPCM7XX_MKFUNC(rg2mdio), 8493b588e43STomer Maimon NPCM7XX_MKFUNC(ddr), 8503b588e43STomer Maimon NPCM7XX_MKFUNC(uart1), 8513b588e43STomer Maimon NPCM7XX_MKFUNC(uart2), 8523b588e43STomer Maimon NPCM7XX_MKFUNC(bmcuart0a), 8533b588e43STomer Maimon NPCM7XX_MKFUNC(bmcuart0b), 8543b588e43STomer Maimon NPCM7XX_MKFUNC(bmcuart1), 8553b588e43STomer Maimon NPCM7XX_MKFUNC(iox1), 8563b588e43STomer Maimon NPCM7XX_MKFUNC(iox2), 8573b588e43STomer Maimon NPCM7XX_MKFUNC(ioxh), 8583b588e43STomer Maimon NPCM7XX_MKFUNC(gspi), 8593b588e43STomer Maimon NPCM7XX_MKFUNC(mmc), 8603b588e43STomer Maimon NPCM7XX_MKFUNC(mmcwp), 8613b588e43STomer Maimon NPCM7XX_MKFUNC(mmccd), 8623b588e43STomer Maimon NPCM7XX_MKFUNC(mmcrst), 8633b588e43STomer Maimon NPCM7XX_MKFUNC(mmc8), 8643b588e43STomer Maimon NPCM7XX_MKFUNC(r1), 8653b588e43STomer Maimon NPCM7XX_MKFUNC(r1err), 8663b588e43STomer Maimon NPCM7XX_MKFUNC(r1md), 8673b588e43STomer Maimon NPCM7XX_MKFUNC(r2), 8683b588e43STomer Maimon NPCM7XX_MKFUNC(r2err), 8693b588e43STomer Maimon NPCM7XX_MKFUNC(r2md), 8703b588e43STomer Maimon NPCM7XX_MKFUNC(sd1), 8713b588e43STomer Maimon NPCM7XX_MKFUNC(sd1pwr), 8723b588e43STomer Maimon NPCM7XX_MKFUNC(wdog1), 8733b588e43STomer Maimon NPCM7XX_MKFUNC(wdog2), 8743b588e43STomer Maimon NPCM7XX_MKFUNC(scipme), 8753b588e43STomer Maimon NPCM7XX_MKFUNC(sci), 8763b588e43STomer Maimon NPCM7XX_MKFUNC(serirq), 8773b588e43STomer Maimon NPCM7XX_MKFUNC(jtag2), 8783b588e43STomer Maimon NPCM7XX_MKFUNC(spix), 8793b588e43STomer Maimon NPCM7XX_MKFUNC(spixcs1), 8803b588e43STomer Maimon NPCM7XX_MKFUNC(pspi1), 8813b588e43STomer Maimon NPCM7XX_MKFUNC(pspi2), 8823b588e43STomer Maimon NPCM7XX_MKFUNC(ddc), 8833b588e43STomer Maimon NPCM7XX_MKFUNC(clkreq), 8843b588e43STomer Maimon NPCM7XX_MKFUNC(clkout), 8853b588e43STomer Maimon NPCM7XX_MKFUNC(spi3), 8863b588e43STomer Maimon NPCM7XX_MKFUNC(spi3cs1), 8873b588e43STomer Maimon NPCM7XX_MKFUNC(spi3quad), 8883b588e43STomer Maimon NPCM7XX_MKFUNC(spi3cs2), 8893b588e43STomer Maimon NPCM7XX_MKFUNC(spi3cs3), 8903b588e43STomer Maimon NPCM7XX_MKFUNC(spi0cs1), 8913b588e43STomer Maimon NPCM7XX_MKFUNC(lpc), 8923b588e43STomer Maimon NPCM7XX_MKFUNC(lpcclk), 8933b588e43STomer Maimon NPCM7XX_MKFUNC(espi), 8943b588e43STomer Maimon NPCM7XX_MKFUNC(lkgpo0), 8953b588e43STomer Maimon NPCM7XX_MKFUNC(lkgpo1), 8963b588e43STomer Maimon NPCM7XX_MKFUNC(lkgpo2), 8973b588e43STomer Maimon NPCM7XX_MKFUNC(nprd_smi), 8983b588e43STomer Maimon }; 8993b588e43STomer Maimon 9003b588e43STomer Maimon #define NPCM7XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k) \ 9016ef00b42SLinus Walleij [a] = { .fn0 = fn_ ## b, .reg0 = NPCM7XX_GCR_ ## c, .bit0 = d, \ 9023b588e43STomer Maimon .fn1 = fn_ ## e, .reg1 = NPCM7XX_GCR_ ## f, .bit1 = g, \ 9033b588e43STomer Maimon .fn2 = fn_ ## h, .reg2 = NPCM7XX_GCR_ ## i, .bit2 = j, \ 9043b588e43STomer Maimon .flag = k } 9053b588e43STomer Maimon 9063b588e43STomer Maimon /* Drive strength controlled by NPCM7XX_GP_N_ODSC */ 9073b588e43STomer Maimon #define DRIVE_STRENGTH_LO_SHIFT 8 9083b588e43STomer Maimon #define DRIVE_STRENGTH_HI_SHIFT 12 9093b588e43STomer Maimon #define DRIVE_STRENGTH_MASK 0x0000FF00 9103b588e43STomer Maimon 911603501c1SJonathan Neuschäfer #define DSTR(lo, hi) (((lo) << DRIVE_STRENGTH_LO_SHIFT) | \ 9123b588e43STomer Maimon ((hi) << DRIVE_STRENGTH_HI_SHIFT)) 9133b588e43STomer Maimon #define DSLO(x) (((x) >> DRIVE_STRENGTH_LO_SHIFT) & 0xF) 9143b588e43STomer Maimon #define DSHI(x) (((x) >> DRIVE_STRENGTH_HI_SHIFT) & 0xF) 9153b588e43STomer Maimon 9163b588e43STomer Maimon #define GPI 0x1 /* Not GPO */ 9173b588e43STomer Maimon #define GPO 0x2 /* Not GPI */ 9183b588e43STomer Maimon #define SLEW 0x4 /* Has Slew Control, NPCM7XX_GP_N_OSRC */ 9193b588e43STomer Maimon #define SLEWLPC 0x8 /* Has Slew Control, SRCNT.3 */ 9203b588e43STomer Maimon 9213b588e43STomer Maimon struct npcm7xx_pincfg { 9223b588e43STomer Maimon int flag; 9233b588e43STomer Maimon int fn0, reg0, bit0; 9243b588e43STomer Maimon int fn1, reg1, bit1; 9253b588e43STomer Maimon int fn2, reg2, bit2; 9263b588e43STomer Maimon }; 9273b588e43STomer Maimon 9283b588e43STomer Maimon static const struct npcm7xx_pincfg pincfg[] = { 9293b588e43STomer Maimon /* PIN FUNCTION 1 FUNCTION 2 FUNCTION 3 FLAGS */ 9303b588e43STomer Maimon NPCM7XX_PINCFG(0, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, 0), 931603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(1, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 932603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(2, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 9333b588e43STomer Maimon NPCM7XX_PINCFG(3, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, 0), 9343b588e43STomer Maimon NPCM7XX_PINCFG(4, iox2, MFSEL3, 14, smb1d, I2CSEGSEL, 7, none, NONE, 0, SLEW), 9353b588e43STomer Maimon NPCM7XX_PINCFG(5, iox2, MFSEL3, 14, smb1d, I2CSEGSEL, 7, none, NONE, 0, SLEW), 9363b588e43STomer Maimon NPCM7XX_PINCFG(6, iox2, MFSEL3, 14, smb2d, I2CSEGSEL, 10, none, NONE, 0, SLEW), 9373b588e43STomer Maimon NPCM7XX_PINCFG(7, iox2, MFSEL3, 14, smb2d, I2CSEGSEL, 10, none, NONE, 0, SLEW), 938603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(8, lkgpo1, FLOCKR1, 4, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 939603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(9, lkgpo2, FLOCKR1, 8, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 940603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(10, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 941603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(11, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 9423b588e43STomer Maimon NPCM7XX_PINCFG(12, gspi, MFSEL1, 24, smb5b, I2CSEGSEL, 19, none, NONE, 0, SLEW), 9433b588e43STomer Maimon NPCM7XX_PINCFG(13, gspi, MFSEL1, 24, smb5b, I2CSEGSEL, 19, none, NONE, 0, SLEW), 9443b588e43STomer Maimon NPCM7XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, SLEW), 9453b588e43STomer Maimon NPCM7XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, SLEW), 946603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(16, lkgpo0, FLOCKR1, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 947603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(17, pspi2, MFSEL3, 13, smb4den, I2CSEGSEL, 23, none, NONE, 0, DSTR(8, 12)), 948603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(18, pspi2, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, DSTR(8, 12)), 949603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(19, pspi2, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, DSTR(8, 12)), 9503b588e43STomer Maimon NPCM7XX_PINCFG(20, smb4c, I2CSEGSEL, 15, smb15, MFSEL3, 8, none, NONE, 0, 0), 9513b588e43STomer Maimon NPCM7XX_PINCFG(21, smb4c, I2CSEGSEL, 15, smb15, MFSEL3, 8, none, NONE, 0, 0), 9523b588e43STomer Maimon NPCM7XX_PINCFG(22, smb4d, I2CSEGSEL, 16, smb14, MFSEL3, 7, none, NONE, 0, 0), 9533b588e43STomer Maimon NPCM7XX_PINCFG(23, smb4d, I2CSEGSEL, 16, smb14, MFSEL3, 7, none, NONE, 0, 0), 954603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(24, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 955603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(25, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 9563b588e43STomer Maimon NPCM7XX_PINCFG(26, smb5, MFSEL1, 2, none, NONE, 0, none, NONE, 0, 0), 9573b588e43STomer Maimon NPCM7XX_PINCFG(27, smb5, MFSEL1, 2, none, NONE, 0, none, NONE, 0, 0), 9583b588e43STomer Maimon NPCM7XX_PINCFG(28, smb4, MFSEL1, 1, none, NONE, 0, none, NONE, 0, 0), 9593b588e43STomer Maimon NPCM7XX_PINCFG(29, smb4, MFSEL1, 1, none, NONE, 0, none, NONE, 0, 0), 9603b588e43STomer Maimon NPCM7XX_PINCFG(30, smb3, MFSEL1, 0, none, NONE, 0, none, NONE, 0, 0), 9613b588e43STomer Maimon NPCM7XX_PINCFG(31, smb3, MFSEL1, 0, none, NONE, 0, none, NONE, 0, 0), 9623b588e43STomer Maimon 9633b588e43STomer Maimon NPCM7XX_PINCFG(32, spi0cs1, MFSEL1, 3, none, NONE, 0, none, NONE, 0, 0), 9643b588e43STomer Maimon NPCM7XX_PINCFG(33, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), 9653b588e43STomer Maimon NPCM7XX_PINCFG(34, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), 9663b588e43STomer Maimon NPCM7XX_PINCFG(37, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), 9673b588e43STomer Maimon NPCM7XX_PINCFG(38, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), 9683b588e43STomer Maimon NPCM7XX_PINCFG(39, smb3b, I2CSEGSEL, 11, none, NONE, 0, none, NONE, 0, SLEW), 9693b588e43STomer Maimon NPCM7XX_PINCFG(40, smb3b, I2CSEGSEL, 11, none, NONE, 0, none, NONE, 0, SLEW), 9703b588e43STomer Maimon NPCM7XX_PINCFG(41, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, 0), 971603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(42, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, DSTR(2, 4) | GPO), 9723b588e43STomer Maimon NPCM7XX_PINCFG(43, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, bmcuart1, MFSEL3, 24, 0), 9733b588e43STomer Maimon NPCM7XX_PINCFG(44, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, bmcuart1, MFSEL3, 24, 0), 9743b588e43STomer Maimon NPCM7XX_PINCFG(45, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, 0), 975603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(46, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, DSTR(2, 8)), 976603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(47, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, DSTR(2, 8)), 9773b588e43STomer Maimon NPCM7XX_PINCFG(48, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, GPO), 9783b588e43STomer Maimon NPCM7XX_PINCFG(49, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, 0), 9793b588e43STomer Maimon NPCM7XX_PINCFG(50, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), 9803b588e43STomer Maimon NPCM7XX_PINCFG(51, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO), 9813b588e43STomer Maimon NPCM7XX_PINCFG(52, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), 9823b588e43STomer Maimon NPCM7XX_PINCFG(53, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO), 9833b588e43STomer Maimon NPCM7XX_PINCFG(54, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), 9843b588e43STomer Maimon NPCM7XX_PINCFG(55, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), 9853b588e43STomer Maimon NPCM7XX_PINCFG(56, r1err, MFSEL1, 12, none, NONE, 0, none, NONE, 0, 0), 986603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(57, r1md, MFSEL1, 13, none, NONE, 0, none, NONE, 0, DSTR(2, 4)), 987603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(58, r1md, MFSEL1, 13, none, NONE, 0, none, NONE, 0, DSTR(2, 4)), 9883b588e43STomer Maimon NPCM7XX_PINCFG(59, smb3d, I2CSEGSEL, 13, none, NONE, 0, none, NONE, 0, 0), 9893b588e43STomer Maimon NPCM7XX_PINCFG(60, smb3d, I2CSEGSEL, 13, none, NONE, 0, none, NONE, 0, 0), 9903b588e43STomer Maimon NPCM7XX_PINCFG(61, uart1, MFSEL1, 10, none, NONE, 0, none, NONE, 0, GPO), 9913b588e43STomer Maimon NPCM7XX_PINCFG(62, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO), 9923b588e43STomer Maimon NPCM7XX_PINCFG(63, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO), 9933b588e43STomer Maimon 9943b588e43STomer Maimon NPCM7XX_PINCFG(64, fanin0, MFSEL2, 0, none, NONE, 0, none, NONE, 0, 0), 9953b588e43STomer Maimon NPCM7XX_PINCFG(65, fanin1, MFSEL2, 1, none, NONE, 0, none, NONE, 0, 0), 9963b588e43STomer Maimon NPCM7XX_PINCFG(66, fanin2, MFSEL2, 2, none, NONE, 0, none, NONE, 0, 0), 9973b588e43STomer Maimon NPCM7XX_PINCFG(67, fanin3, MFSEL2, 3, none, NONE, 0, none, NONE, 0, 0), 9983b588e43STomer Maimon NPCM7XX_PINCFG(68, fanin4, MFSEL2, 4, none, NONE, 0, none, NONE, 0, 0), 9993b588e43STomer Maimon NPCM7XX_PINCFG(69, fanin5, MFSEL2, 5, none, NONE, 0, none, NONE, 0, 0), 10003b588e43STomer Maimon NPCM7XX_PINCFG(70, fanin6, MFSEL2, 6, none, NONE, 0, none, NONE, 0, 0), 10013b588e43STomer Maimon NPCM7XX_PINCFG(71, fanin7, MFSEL2, 7, none, NONE, 0, none, NONE, 0, 0), 10023b588e43STomer Maimon NPCM7XX_PINCFG(72, fanin8, MFSEL2, 8, none, NONE, 0, none, NONE, 0, 0), 10033b588e43STomer Maimon NPCM7XX_PINCFG(73, fanin9, MFSEL2, 9, none, NONE, 0, none, NONE, 0, 0), 10043b588e43STomer Maimon NPCM7XX_PINCFG(74, fanin10, MFSEL2, 10, none, NONE, 0, none, NONE, 0, 0), 10053b588e43STomer Maimon NPCM7XX_PINCFG(75, fanin11, MFSEL2, 11, none, NONE, 0, none, NONE, 0, 0), 10063b588e43STomer Maimon NPCM7XX_PINCFG(76, fanin12, MFSEL2, 12, none, NONE, 0, none, NONE, 0, 0), 10073b588e43STomer Maimon NPCM7XX_PINCFG(77, fanin13, MFSEL2, 13, none, NONE, 0, none, NONE, 0, 0), 10083b588e43STomer Maimon NPCM7XX_PINCFG(78, fanin14, MFSEL2, 14, none, NONE, 0, none, NONE, 0, 0), 10093b588e43STomer Maimon NPCM7XX_PINCFG(79, fanin15, MFSEL2, 15, none, NONE, 0, none, NONE, 0, 0), 1010603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(80, pwm0, MFSEL2, 16, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1011603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(81, pwm1, MFSEL2, 17, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1012603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(82, pwm2, MFSEL2, 18, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1013603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(83, pwm3, MFSEL2, 19, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1014603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(84, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1015603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(85, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1016603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(86, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10173b588e43STomer Maimon NPCM7XX_PINCFG(87, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), 10183b588e43STomer Maimon NPCM7XX_PINCFG(88, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), 10193b588e43STomer Maimon NPCM7XX_PINCFG(89, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), 10203b588e43STomer Maimon NPCM7XX_PINCFG(90, r2err, MFSEL1, 15, none, NONE, 0, none, NONE, 0, 0), 1021603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(91, r2md, MFSEL1, 16, none, NONE, 0, none, NONE, 0, DSTR(2, 4)), 1022603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(92, r2md, MFSEL1, 16, none, NONE, 0, none, NONE, 0, DSTR(2, 4)), 10233b588e43STomer Maimon NPCM7XX_PINCFG(93, ga20kbc, MFSEL1, 17, smb5d, I2CSEGSEL, 21, none, NONE, 0, 0), 10243b588e43STomer Maimon NPCM7XX_PINCFG(94, ga20kbc, MFSEL1, 17, smb5d, I2CSEGSEL, 21, none, NONE, 0, 0), 10253b588e43STomer Maimon NPCM7XX_PINCFG(95, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0), 10263b588e43STomer Maimon 10273b588e43STomer Maimon NPCM7XX_PINCFG(96, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10283b588e43STomer Maimon NPCM7XX_PINCFG(97, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10293b588e43STomer Maimon NPCM7XX_PINCFG(98, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10303b588e43STomer Maimon NPCM7XX_PINCFG(99, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10313b588e43STomer Maimon NPCM7XX_PINCFG(100, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10323b588e43STomer Maimon NPCM7XX_PINCFG(101, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10333b588e43STomer Maimon NPCM7XX_PINCFG(102, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10343b588e43STomer Maimon NPCM7XX_PINCFG(103, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10353b588e43STomer Maimon NPCM7XX_PINCFG(104, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10363b588e43STomer Maimon NPCM7XX_PINCFG(105, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10373b588e43STomer Maimon NPCM7XX_PINCFG(106, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10383b588e43STomer Maimon NPCM7XX_PINCFG(107, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), 10393b588e43STomer Maimon NPCM7XX_PINCFG(108, rg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, 0), 10403b588e43STomer Maimon NPCM7XX_PINCFG(109, rg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, 0), 10413b588e43STomer Maimon NPCM7XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 10423b588e43STomer Maimon NPCM7XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 10433b588e43STomer Maimon NPCM7XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 10443b588e43STomer Maimon NPCM7XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 10453b588e43STomer Maimon NPCM7XX_PINCFG(114, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, 0), 10463b588e43STomer Maimon NPCM7XX_PINCFG(115, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, 0), 10473b588e43STomer Maimon NPCM7XX_PINCFG(116, smb1, MFSEL1, 7, none, NONE, 0, none, NONE, 0, 0), 10483b588e43STomer Maimon NPCM7XX_PINCFG(117, smb1, MFSEL1, 7, none, NONE, 0, none, NONE, 0, 0), 10493b588e43STomer Maimon NPCM7XX_PINCFG(118, smb2, MFSEL1, 8, none, NONE, 0, none, NONE, 0, 0), 10503b588e43STomer Maimon NPCM7XX_PINCFG(119, smb2, MFSEL1, 8, none, NONE, 0, none, NONE, 0, 0), 10513b588e43STomer Maimon NPCM7XX_PINCFG(120, smb2c, I2CSEGSEL, 9, none, NONE, 0, none, NONE, 0, SLEW), 10523b588e43STomer Maimon NPCM7XX_PINCFG(121, smb2c, I2CSEGSEL, 9, none, NONE, 0, none, NONE, 0, SLEW), 10533b588e43STomer Maimon NPCM7XX_PINCFG(122, smb2b, I2CSEGSEL, 8, none, NONE, 0, none, NONE, 0, SLEW), 10543b588e43STomer Maimon NPCM7XX_PINCFG(123, smb2b, I2CSEGSEL, 8, none, NONE, 0, none, NONE, 0, SLEW), 10553b588e43STomer Maimon NPCM7XX_PINCFG(124, smb1c, I2CSEGSEL, 6, none, NONE, 0, none, NONE, 0, SLEW), 10563b588e43STomer Maimon NPCM7XX_PINCFG(125, smb1c, I2CSEGSEL, 6, none, NONE, 0, none, NONE, 0, SLEW), 10573b588e43STomer Maimon NPCM7XX_PINCFG(126, smb1b, I2CSEGSEL, 5, none, NONE, 0, none, NONE, 0, SLEW), 10583b588e43STomer Maimon NPCM7XX_PINCFG(127, smb1b, I2CSEGSEL, 5, none, NONE, 0, none, NONE, 0, SLEW), 10593b588e43STomer Maimon 10603b588e43STomer Maimon NPCM7XX_PINCFG(128, smb8, MFSEL4, 11, none, NONE, 0, none, NONE, 0, 0), 10613b588e43STomer Maimon NPCM7XX_PINCFG(129, smb8, MFSEL4, 11, none, NONE, 0, none, NONE, 0, 0), 10623b588e43STomer Maimon NPCM7XX_PINCFG(130, smb9, MFSEL4, 12, none, NONE, 0, none, NONE, 0, 0), 10633b588e43STomer Maimon NPCM7XX_PINCFG(131, smb9, MFSEL4, 12, none, NONE, 0, none, NONE, 0, 0), 10643b588e43STomer Maimon NPCM7XX_PINCFG(132, smb10, MFSEL4, 13, none, NONE, 0, none, NONE, 0, 0), 10653b588e43STomer Maimon NPCM7XX_PINCFG(133, smb10, MFSEL4, 13, none, NONE, 0, none, NONE, 0, 0), 10663b588e43STomer Maimon NPCM7XX_PINCFG(134, smb11, MFSEL4, 14, none, NONE, 0, none, NONE, 0, 0), 10673b588e43STomer Maimon NPCM7XX_PINCFG(135, smb11, MFSEL4, 14, none, NONE, 0, none, NONE, 0, 0), 1068603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(136, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1069603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(137, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1070603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(138, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1071603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(139, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1072603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(140, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10733b588e43STomer Maimon NPCM7XX_PINCFG(141, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, 0), 1074603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(142, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10753b588e43STomer Maimon NPCM7XX_PINCFG(143, sd1, MFSEL3, 12, sd1pwr, MFSEL4, 5, none, NONE, 0, 0), 1076603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(144, pwm4, MFSEL2, 20, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1077603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(145, pwm5, MFSEL2, 21, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1078603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(146, pwm6, MFSEL2, 22, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1079603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(147, pwm7, MFSEL2, 23, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 1080603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(148, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1081603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(149, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1082603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(150, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1083603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(151, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1084603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(152, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10853b588e43STomer Maimon NPCM7XX_PINCFG(153, mmcwp, FLOCKR1, 24, none, NONE, 0, none, NONE, 0, 0), /* Z1/A1 */ 1086603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(154, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10873b588e43STomer Maimon NPCM7XX_PINCFG(155, mmccd, MFSEL3, 25, mmcrst, MFSEL4, 6, none, NONE, 0, 0), /* Z1/A1 */ 1088603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(156, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1089603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(157, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1090603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(158, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1091603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(159, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 10923b588e43STomer Maimon 1093603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(160, clkout, MFSEL1, 21, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1094603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(161, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, DSTR(8, 12)), 1095603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(162, serirq, NONE, 0, gpio, MFSEL1, 31, none, NONE, 0, DSTR(8, 12)), 10963b588e43STomer Maimon NPCM7XX_PINCFG(163, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0), 10973b588e43STomer Maimon NPCM7XX_PINCFG(164, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), 10983b588e43STomer Maimon NPCM7XX_PINCFG(165, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), 10993b588e43STomer Maimon NPCM7XX_PINCFG(166, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), 11003b588e43STomer Maimon NPCM7XX_PINCFG(167, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), 11013b588e43STomer Maimon NPCM7XX_PINCFG(168, lpcclk, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL3, 16, 0), 11023b588e43STomer Maimon NPCM7XX_PINCFG(169, scipme, MFSEL3, 0, none, NONE, 0, none, NONE, 0, 0), 11033b588e43STomer Maimon NPCM7XX_PINCFG(170, sci, MFSEL1, 22, none, NONE, 0, none, NONE, 0, 0), 11043b588e43STomer Maimon NPCM7XX_PINCFG(171, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, 0), 11053b588e43STomer Maimon NPCM7XX_PINCFG(172, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, 0), 11063b588e43STomer Maimon NPCM7XX_PINCFG(173, smb7, MFSEL3, 2, none, NONE, 0, none, NONE, 0, 0), 11073b588e43STomer Maimon NPCM7XX_PINCFG(174, smb7, MFSEL3, 2, none, NONE, 0, none, NONE, 0, 0), 1108603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(175, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DSTR(8, 12)), 1109603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(176, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DSTR(8, 12)), 1110603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(177, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DSTR(8, 12)), 1111603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(178, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1112603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(179, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1113603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(180, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 11143b588e43STomer Maimon NPCM7XX_PINCFG(181, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), 11153b588e43STomer Maimon NPCM7XX_PINCFG(182, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), 1116603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(183, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1117603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(184, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO), 1118603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(185, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO), 1119603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(186, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 1120603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(187, spi3cs1, MFSEL4, 17, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 1121603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(188, spi3quad, MFSEL4, 20, spi3cs2, MFSEL4, 18, none, NONE, 0, DSTR(8, 12) | SLEW), 1122603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(189, spi3quad, MFSEL4, 20, spi3cs3, MFSEL4, 19, none, NONE, 0, DSTR(8, 12) | SLEW), 1123603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(190, gpio, FLOCKR1, 20, nprd_smi, NONE, 0, none, NONE, 0, DSTR(2, 4)), 1124603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(191, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), /* XX */ 11253b588e43STomer Maimon 1126603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(192, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), /* XX */ 11273b588e43STomer Maimon NPCM7XX_PINCFG(193, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), 11283b588e43STomer Maimon NPCM7XX_PINCFG(194, smb0b, I2CSEGSEL, 0, none, NONE, 0, none, NONE, 0, 0), 11293b588e43STomer Maimon NPCM7XX_PINCFG(195, smb0b, I2CSEGSEL, 0, none, NONE, 0, none, NONE, 0, 0), 11303b588e43STomer Maimon NPCM7XX_PINCFG(196, smb0c, I2CSEGSEL, 1, none, NONE, 0, none, NONE, 0, 0), 11313b588e43STomer Maimon NPCM7XX_PINCFG(197, smb0den, I2CSEGSEL, 22, none, NONE, 0, none, NONE, 0, SLEW), 11323b588e43STomer Maimon NPCM7XX_PINCFG(198, smb0d, I2CSEGSEL, 2, none, NONE, 0, none, NONE, 0, 0), 11333b588e43STomer Maimon NPCM7XX_PINCFG(199, smb0d, I2CSEGSEL, 2, none, NONE, 0, none, NONE, 0, 0), 11343b588e43STomer Maimon NPCM7XX_PINCFG(200, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), 11353b588e43STomer Maimon NPCM7XX_PINCFG(201, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), 11363b588e43STomer Maimon NPCM7XX_PINCFG(202, smb0c, I2CSEGSEL, 1, none, NONE, 0, none, NONE, 0, 0), 1137603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(203, faninx, MFSEL3, 3, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 11383b588e43STomer Maimon NPCM7XX_PINCFG(204, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, SLEW), 11393b588e43STomer Maimon NPCM7XX_PINCFG(205, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, SLEW), 1140603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(206, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, DSTR(4, 8)), 1141603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(207, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, DSTR(4, 8)), 11423b588e43STomer Maimon NPCM7XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11433b588e43STomer Maimon NPCM7XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11443b588e43STomer Maimon NPCM7XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11453b588e43STomer Maimon NPCM7XX_PINCFG(211, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11463b588e43STomer Maimon NPCM7XX_PINCFG(212, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11473b588e43STomer Maimon NPCM7XX_PINCFG(213, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11483b588e43STomer Maimon NPCM7XX_PINCFG(214, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11493b588e43STomer Maimon NPCM7XX_PINCFG(215, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), 11503b588e43STomer Maimon NPCM7XX_PINCFG(216, rg2mdio, MFSEL4, 23, ddr, MFSEL3, 26, none, NONE, 0, 0), 11513b588e43STomer Maimon NPCM7XX_PINCFG(217, rg2mdio, MFSEL4, 23, ddr, MFSEL3, 26, none, NONE, 0, 0), 11523b588e43STomer Maimon NPCM7XX_PINCFG(218, wdog1, MFSEL3, 19, none, NONE, 0, none, NONE, 0, 0), 1153603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(219, wdog2, MFSEL3, 20, none, NONE, 0, none, NONE, 0, DSTR(4, 8)), 11543b588e43STomer Maimon NPCM7XX_PINCFG(220, smb12, MFSEL3, 5, none, NONE, 0, none, NONE, 0, 0), 11553b588e43STomer Maimon NPCM7XX_PINCFG(221, smb12, MFSEL3, 5, none, NONE, 0, none, NONE, 0, 0), 11563b588e43STomer Maimon NPCM7XX_PINCFG(222, smb13, MFSEL3, 6, none, NONE, 0, none, NONE, 0, 0), 11573b588e43STomer Maimon NPCM7XX_PINCFG(223, smb13, MFSEL3, 6, none, NONE, 0, none, NONE, 0, 0), 11583b588e43STomer Maimon 11593b588e43STomer Maimon NPCM7XX_PINCFG(224, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, SLEW), 1160603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(225, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO), 1161603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(226, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW | GPO), 1162603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(227, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1163603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(228, spixcs1, MFSEL4, 28, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1164603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(229, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1165603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(230, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), 1166603501c1SJonathan Neuschäfer NPCM7XX_PINCFG(231, clkreq, MFSEL4, 9, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), 11673b588e43STomer Maimon NPCM7XX_PINCFG(253, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC1 power */ 11683b588e43STomer Maimon NPCM7XX_PINCFG(254, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC2 power */ 11693b588e43STomer Maimon NPCM7XX_PINCFG(255, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* DACOSEL */ 11703b588e43STomer Maimon }; 11713b588e43STomer Maimon 11723b588e43STomer Maimon /* number, name, drv_data */ 11733b588e43STomer Maimon static const struct pinctrl_pin_desc npcm7xx_pins[] = { 11743b588e43STomer Maimon PINCTRL_PIN(0, "GPIO0/IOX1DI"), 11753b588e43STomer Maimon PINCTRL_PIN(1, "GPIO1/IOX1LD"), 11763b588e43STomer Maimon PINCTRL_PIN(2, "GPIO2/IOX1CK"), 11773b588e43STomer Maimon PINCTRL_PIN(3, "GPIO3/IOX1D0"), 11783b588e43STomer Maimon PINCTRL_PIN(4, "GPIO4/IOX2DI/SMB1DSDA"), 11793b588e43STomer Maimon PINCTRL_PIN(5, "GPIO5/IOX2LD/SMB1DSCL"), 11803b588e43STomer Maimon PINCTRL_PIN(6, "GPIO6/IOX2CK/SMB2DSDA"), 11813b588e43STomer Maimon PINCTRL_PIN(7, "GPIO7/IOX2D0/SMB2DSCL"), 11823b588e43STomer Maimon PINCTRL_PIN(8, "GPIO8/LKGPO1"), 11833b588e43STomer Maimon PINCTRL_PIN(9, "GPIO9/LKGPO2"), 11843b588e43STomer Maimon PINCTRL_PIN(10, "GPIO10/IOXHLD"), 11853b588e43STomer Maimon PINCTRL_PIN(11, "GPIO11/IOXHCK"), 11863b588e43STomer Maimon PINCTRL_PIN(12, "GPIO12/GSPICK/SMB5BSCL"), 11873b588e43STomer Maimon PINCTRL_PIN(13, "GPIO13/GSPIDO/SMB5BSDA"), 11883b588e43STomer Maimon PINCTRL_PIN(14, "GPIO14/GSPIDI/SMB5CSCL"), 11893b588e43STomer Maimon PINCTRL_PIN(15, "GPIO15/GSPICS/SMB5CSDA"), 11903b588e43STomer Maimon PINCTRL_PIN(16, "GPIO16/LKGPO0"), 11913b588e43STomer Maimon PINCTRL_PIN(17, "GPIO17/PSPI2DI/SMB4DEN"), 11923b588e43STomer Maimon PINCTRL_PIN(18, "GPIO18/PSPI2D0/SMB4BSDA"), 11933b588e43STomer Maimon PINCTRL_PIN(19, "GPIO19/PSPI2CK/SMB4BSCL"), 11943b588e43STomer Maimon PINCTRL_PIN(20, "GPIO20/SMB4CSDA/SMB15SDA"), 11953b588e43STomer Maimon PINCTRL_PIN(21, "GPIO21/SMB4CSCL/SMB15SCL"), 11963b588e43STomer Maimon PINCTRL_PIN(22, "GPIO22/SMB4DSDA/SMB14SDA"), 11973b588e43STomer Maimon PINCTRL_PIN(23, "GPIO23/SMB4DSCL/SMB14SCL"), 11983b588e43STomer Maimon PINCTRL_PIN(24, "GPIO24/IOXHDO"), 11993b588e43STomer Maimon PINCTRL_PIN(25, "GPIO25/IOXHDI"), 12003b588e43STomer Maimon PINCTRL_PIN(26, "GPIO26/SMB5SDA"), 12013b588e43STomer Maimon PINCTRL_PIN(27, "GPIO27/SMB5SCL"), 12023b588e43STomer Maimon PINCTRL_PIN(28, "GPIO28/SMB4SDA"), 12033b588e43STomer Maimon PINCTRL_PIN(29, "GPIO29/SMB4SCL"), 12043b588e43STomer Maimon PINCTRL_PIN(30, "GPIO30/SMB3SDA"), 12053b588e43STomer Maimon PINCTRL_PIN(31, "GPIO31/SMB3SCL"), 12063b588e43STomer Maimon 12073b588e43STomer Maimon PINCTRL_PIN(32, "GPIO32/nSPI0CS1"), 12083b588e43STomer Maimon PINCTRL_PIN(33, "SPI0D2"), 12093b588e43STomer Maimon PINCTRL_PIN(34, "SPI0D3"), 12103b588e43STomer Maimon PINCTRL_PIN(37, "GPIO37/SMB3CSDA"), 12113b588e43STomer Maimon PINCTRL_PIN(38, "GPIO38/SMB3CSCL"), 12123b588e43STomer Maimon PINCTRL_PIN(39, "GPIO39/SMB3BSDA"), 12133b588e43STomer Maimon PINCTRL_PIN(40, "GPIO40/SMB3BSCL"), 12143b588e43STomer Maimon PINCTRL_PIN(41, "GPIO41/BSPRXD"), 12153b588e43STomer Maimon PINCTRL_PIN(42, "GPO42/BSPTXD/STRAP11"), 12163b588e43STomer Maimon PINCTRL_PIN(43, "GPIO43/RXD1/JTMS2/BU1RXD"), 12173b588e43STomer Maimon PINCTRL_PIN(44, "GPIO44/nCTS1/JTDI2/BU1CTS"), 12183b588e43STomer Maimon PINCTRL_PIN(45, "GPIO45/nDCD1/JTDO2"), 12193b588e43STomer Maimon PINCTRL_PIN(46, "GPIO46/nDSR1/JTCK2"), 12203b588e43STomer Maimon PINCTRL_PIN(47, "GPIO47/nRI1/JCP_RDY2"), 12213b588e43STomer Maimon PINCTRL_PIN(48, "GPIO48/TXD2/BSPTXD"), 12223b588e43STomer Maimon PINCTRL_PIN(49, "GPIO49/RXD2/BSPRXD"), 12233b588e43STomer Maimon PINCTRL_PIN(50, "GPIO50/nCTS2"), 12243b588e43STomer Maimon PINCTRL_PIN(51, "GPO51/nRTS2/STRAP2"), 12253b588e43STomer Maimon PINCTRL_PIN(52, "GPIO52/nDCD2"), 12263b588e43STomer Maimon PINCTRL_PIN(53, "GPO53/nDTR2_BOUT2/STRAP1"), 12273b588e43STomer Maimon PINCTRL_PIN(54, "GPIO54/nDSR2"), 12283b588e43STomer Maimon PINCTRL_PIN(55, "GPIO55/nRI2"), 12293b588e43STomer Maimon PINCTRL_PIN(56, "GPIO56/R1RXERR"), 12303b588e43STomer Maimon PINCTRL_PIN(57, "GPIO57/R1MDC"), 12313b588e43STomer Maimon PINCTRL_PIN(58, "GPIO58/R1MDIO"), 12323b588e43STomer Maimon PINCTRL_PIN(59, "GPIO59/SMB3DSDA"), 12333b588e43STomer Maimon PINCTRL_PIN(60, "GPIO60/SMB3DSCL"), 12343b588e43STomer Maimon PINCTRL_PIN(61, "GPO61/nDTR1_BOUT1/STRAP6"), 12353b588e43STomer Maimon PINCTRL_PIN(62, "GPO62/nRTST1/STRAP5"), 12363b588e43STomer Maimon PINCTRL_PIN(63, "GPO63/TXD1/STRAP4"), 12373b588e43STomer Maimon 12383b588e43STomer Maimon PINCTRL_PIN(64, "GPIO64/FANIN0"), 12393b588e43STomer Maimon PINCTRL_PIN(65, "GPIO65/FANIN1"), 12403b588e43STomer Maimon PINCTRL_PIN(66, "GPIO66/FANIN2"), 12413b588e43STomer Maimon PINCTRL_PIN(67, "GPIO67/FANIN3"), 12423b588e43STomer Maimon PINCTRL_PIN(68, "GPIO68/FANIN4"), 12433b588e43STomer Maimon PINCTRL_PIN(69, "GPIO69/FANIN5"), 12443b588e43STomer Maimon PINCTRL_PIN(70, "GPIO70/FANIN6"), 12453b588e43STomer Maimon PINCTRL_PIN(71, "GPIO71/FANIN7"), 12463b588e43STomer Maimon PINCTRL_PIN(72, "GPIO72/FANIN8"), 12473b588e43STomer Maimon PINCTRL_PIN(73, "GPIO73/FANIN9"), 12483b588e43STomer Maimon PINCTRL_PIN(74, "GPIO74/FANIN10"), 12493b588e43STomer Maimon PINCTRL_PIN(75, "GPIO75/FANIN11"), 12503b588e43STomer Maimon PINCTRL_PIN(76, "GPIO76/FANIN12"), 12513b588e43STomer Maimon PINCTRL_PIN(77, "GPIO77/FANIN13"), 12523b588e43STomer Maimon PINCTRL_PIN(78, "GPIO78/FANIN14"), 12533b588e43STomer Maimon PINCTRL_PIN(79, "GPIO79/FANIN15"), 12543b588e43STomer Maimon PINCTRL_PIN(80, "GPIO80/PWM0"), 12553b588e43STomer Maimon PINCTRL_PIN(81, "GPIO81/PWM1"), 12563b588e43STomer Maimon PINCTRL_PIN(82, "GPIO82/PWM2"), 12573b588e43STomer Maimon PINCTRL_PIN(83, "GPIO83/PWM3"), 12583b588e43STomer Maimon PINCTRL_PIN(84, "GPIO84/R2TXD0"), 12593b588e43STomer Maimon PINCTRL_PIN(85, "GPIO85/R2TXD1"), 12603b588e43STomer Maimon PINCTRL_PIN(86, "GPIO86/R2TXEN"), 12613b588e43STomer Maimon PINCTRL_PIN(87, "GPIO87/R2RXD0"), 12623b588e43STomer Maimon PINCTRL_PIN(88, "GPIO88/R2RXD1"), 12633b588e43STomer Maimon PINCTRL_PIN(89, "GPIO89/R2CRSDV"), 12643b588e43STomer Maimon PINCTRL_PIN(90, "GPIO90/R2RXERR"), 12653b588e43STomer Maimon PINCTRL_PIN(91, "GPIO91/R2MDC"), 12663b588e43STomer Maimon PINCTRL_PIN(92, "GPIO92/R2MDIO"), 12673b588e43STomer Maimon PINCTRL_PIN(93, "GPIO93/GA20/SMB5DSCL"), 12683b588e43STomer Maimon PINCTRL_PIN(94, "GPIO94/nKBRST/SMB5DSDA"), 12693b588e43STomer Maimon PINCTRL_PIN(95, "GPIO95/nLRESET/nESPIRST"), 12703b588e43STomer Maimon 12713b588e43STomer Maimon PINCTRL_PIN(96, "GPIO96/RG1TXD0"), 12723b588e43STomer Maimon PINCTRL_PIN(97, "GPIO97/RG1TXD1"), 12733b588e43STomer Maimon PINCTRL_PIN(98, "GPIO98/RG1TXD2"), 12743b588e43STomer Maimon PINCTRL_PIN(99, "GPIO99/RG1TXD3"), 12753b588e43STomer Maimon PINCTRL_PIN(100, "GPIO100/RG1TXC"), 12763b588e43STomer Maimon PINCTRL_PIN(101, "GPIO101/RG1TXCTL"), 12773b588e43STomer Maimon PINCTRL_PIN(102, "GPIO102/RG1RXD0"), 12783b588e43STomer Maimon PINCTRL_PIN(103, "GPIO103/RG1RXD1"), 12793b588e43STomer Maimon PINCTRL_PIN(104, "GPIO104/RG1RXD2"), 12803b588e43STomer Maimon PINCTRL_PIN(105, "GPIO105/RG1RXD3"), 12813b588e43STomer Maimon PINCTRL_PIN(106, "GPIO106/RG1RXC"), 12823b588e43STomer Maimon PINCTRL_PIN(107, "GPIO107/RG1RXCTL"), 12833b588e43STomer Maimon PINCTRL_PIN(108, "GPIO108/RG1MDC"), 12843b588e43STomer Maimon PINCTRL_PIN(109, "GPIO109/RG1MDIO"), 12853b588e43STomer Maimon PINCTRL_PIN(110, "GPIO110/RG2TXD0/DDRV0"), 12863b588e43STomer Maimon PINCTRL_PIN(111, "GPIO111/RG2TXD1/DDRV1"), 12873b588e43STomer Maimon PINCTRL_PIN(112, "GPIO112/RG2TXD2/DDRV2"), 12883b588e43STomer Maimon PINCTRL_PIN(113, "GPIO113/RG2TXD3/DDRV3"), 12893b588e43STomer Maimon PINCTRL_PIN(114, "GPIO114/SMB0SCL"), 12903b588e43STomer Maimon PINCTRL_PIN(115, "GPIO115/SMB0SDA"), 12913b588e43STomer Maimon PINCTRL_PIN(116, "GPIO116/SMB1SCL"), 12923b588e43STomer Maimon PINCTRL_PIN(117, "GPIO117/SMB1SDA"), 12933b588e43STomer Maimon PINCTRL_PIN(118, "GPIO118/SMB2SCL"), 12943b588e43STomer Maimon PINCTRL_PIN(119, "GPIO119/SMB2SDA"), 12953b588e43STomer Maimon PINCTRL_PIN(120, "GPIO120/SMB2CSDA"), 12963b588e43STomer Maimon PINCTRL_PIN(121, "GPIO121/SMB2CSCL"), 12973b588e43STomer Maimon PINCTRL_PIN(122, "GPIO122/SMB2BSDA"), 12983b588e43STomer Maimon PINCTRL_PIN(123, "GPIO123/SMB2BSCL"), 12993b588e43STomer Maimon PINCTRL_PIN(124, "GPIO124/SMB1CSDA"), 13003b588e43STomer Maimon PINCTRL_PIN(125, "GPIO125/SMB1CSCL"), 13013b588e43STomer Maimon PINCTRL_PIN(126, "GPIO126/SMB1BSDA"), 13023b588e43STomer Maimon PINCTRL_PIN(127, "GPIO127/SMB1BSCL"), 13033b588e43STomer Maimon 13043b588e43STomer Maimon PINCTRL_PIN(128, "GPIO128/SMB8SCL"), 13053b588e43STomer Maimon PINCTRL_PIN(129, "GPIO129/SMB8SDA"), 13063b588e43STomer Maimon PINCTRL_PIN(130, "GPIO130/SMB9SCL"), 13073b588e43STomer Maimon PINCTRL_PIN(131, "GPIO131/SMB9SDA"), 13083b588e43STomer Maimon PINCTRL_PIN(132, "GPIO132/SMB10SCL"), 13093b588e43STomer Maimon PINCTRL_PIN(133, "GPIO133/SMB10SDA"), 13103b588e43STomer Maimon PINCTRL_PIN(134, "GPIO134/SMB11SCL"), 13113b588e43STomer Maimon PINCTRL_PIN(135, "GPIO135/SMB11SDA"), 13123b588e43STomer Maimon PINCTRL_PIN(136, "GPIO136/SD1DT0"), 13133b588e43STomer Maimon PINCTRL_PIN(137, "GPIO137/SD1DT1"), 13143b588e43STomer Maimon PINCTRL_PIN(138, "GPIO138/SD1DT2"), 13153b588e43STomer Maimon PINCTRL_PIN(139, "GPIO139/SD1DT3"), 13163b588e43STomer Maimon PINCTRL_PIN(140, "GPIO140/SD1CLK"), 13173b588e43STomer Maimon PINCTRL_PIN(141, "GPIO141/SD1WP"), 13183b588e43STomer Maimon PINCTRL_PIN(142, "GPIO142/SD1CMD"), 13193b588e43STomer Maimon PINCTRL_PIN(143, "GPIO143/SD1CD/SD1PWR"), 13203b588e43STomer Maimon PINCTRL_PIN(144, "GPIO144/PWM4"), 13213b588e43STomer Maimon PINCTRL_PIN(145, "GPIO145/PWM5"), 13223b588e43STomer Maimon PINCTRL_PIN(146, "GPIO146/PWM6"), 13233b588e43STomer Maimon PINCTRL_PIN(147, "GPIO147/PWM7"), 13243b588e43STomer Maimon PINCTRL_PIN(148, "GPIO148/MMCDT4"), 13253b588e43STomer Maimon PINCTRL_PIN(149, "GPIO149/MMCDT5"), 13263b588e43STomer Maimon PINCTRL_PIN(150, "GPIO150/MMCDT6"), 13273b588e43STomer Maimon PINCTRL_PIN(151, "GPIO151/MMCDT7"), 13283b588e43STomer Maimon PINCTRL_PIN(152, "GPIO152/MMCCLK"), 13293b588e43STomer Maimon PINCTRL_PIN(153, "GPIO153/MMCWP"), 13303b588e43STomer Maimon PINCTRL_PIN(154, "GPIO154/MMCCMD"), 13313b588e43STomer Maimon PINCTRL_PIN(155, "GPIO155/nMMCCD/nMMCRST"), 13323b588e43STomer Maimon PINCTRL_PIN(156, "GPIO156/MMCDT0"), 13333b588e43STomer Maimon PINCTRL_PIN(157, "GPIO157/MMCDT1"), 13343b588e43STomer Maimon PINCTRL_PIN(158, "GPIO158/MMCDT2"), 13353b588e43STomer Maimon PINCTRL_PIN(159, "GPIO159/MMCDT3"), 13363b588e43STomer Maimon 13373b588e43STomer Maimon PINCTRL_PIN(160, "GPIO160/CLKOUT/RNGOSCOUT"), 13383b588e43STomer Maimon PINCTRL_PIN(161, "GPIO161/nLFRAME/nESPICS"), 13393b588e43STomer Maimon PINCTRL_PIN(162, "GPIO162/SERIRQ"), 13403b588e43STomer Maimon PINCTRL_PIN(163, "GPIO163/LCLK/ESPICLK"), 13413b588e43STomer Maimon PINCTRL_PIN(164, "GPIO164/LAD0/ESPI_IO0"/*dscnt6*/), 13423b588e43STomer Maimon PINCTRL_PIN(165, "GPIO165/LAD1/ESPI_IO1"/*dscnt6*/), 13433b588e43STomer Maimon PINCTRL_PIN(166, "GPIO166/LAD2/ESPI_IO2"/*dscnt6*/), 13443b588e43STomer Maimon PINCTRL_PIN(167, "GPIO167/LAD3/ESPI_IO3"/*dscnt6*/), 13453b588e43STomer Maimon PINCTRL_PIN(168, "GPIO168/nCLKRUN/nESPIALERT"), 13463b588e43STomer Maimon PINCTRL_PIN(169, "GPIO169/nSCIPME"), 13473b588e43STomer Maimon PINCTRL_PIN(170, "GPIO170/nSMI"), 13483b588e43STomer Maimon PINCTRL_PIN(171, "GPIO171/SMB6SCL"), 13493b588e43STomer Maimon PINCTRL_PIN(172, "GPIO172/SMB6SDA"), 13503b588e43STomer Maimon PINCTRL_PIN(173, "GPIO173/SMB7SCL"), 13513b588e43STomer Maimon PINCTRL_PIN(174, "GPIO174/SMB7SDA"), 13523b588e43STomer Maimon PINCTRL_PIN(175, "GPIO175/PSPI1CK/FANIN19"), 13533b588e43STomer Maimon PINCTRL_PIN(176, "GPIO176/PSPI1DO/FANIN18"), 13543b588e43STomer Maimon PINCTRL_PIN(177, "GPIO177/PSPI1DI/FANIN17"), 13553b588e43STomer Maimon PINCTRL_PIN(178, "GPIO178/R1TXD0"), 13563b588e43STomer Maimon PINCTRL_PIN(179, "GPIO179/R1TXD1"), 13573b588e43STomer Maimon PINCTRL_PIN(180, "GPIO180/R1TXEN"), 13583b588e43STomer Maimon PINCTRL_PIN(181, "GPIO181/R1RXD0"), 13593b588e43STomer Maimon PINCTRL_PIN(182, "GPIO182/R1RXD1"), 13603b588e43STomer Maimon PINCTRL_PIN(183, "GPIO183/SPI3CK"), 13613b588e43STomer Maimon PINCTRL_PIN(184, "GPO184/SPI3D0/STRAP9"), 13623b588e43STomer Maimon PINCTRL_PIN(185, "GPO185/SPI3D1/STRAP10"), 13633b588e43STomer Maimon PINCTRL_PIN(186, "GPIO186/nSPI3CS0"), 13643b588e43STomer Maimon PINCTRL_PIN(187, "GPIO187/nSPI3CS1"), 13653b588e43STomer Maimon PINCTRL_PIN(188, "GPIO188/SPI3D2/nSPI3CS2"), 13663b588e43STomer Maimon PINCTRL_PIN(189, "GPIO189/SPI3D3/nSPI3CS3"), 13673b588e43STomer Maimon PINCTRL_PIN(190, "GPIO190/nPRD_SMI"), 13683b588e43STomer Maimon PINCTRL_PIN(191, "GPIO191"), 13693b588e43STomer Maimon 13703b588e43STomer Maimon PINCTRL_PIN(192, "GPIO192"), 13713b588e43STomer Maimon PINCTRL_PIN(193, "GPIO193/R1CRSDV"), 13723b588e43STomer Maimon PINCTRL_PIN(194, "GPIO194/SMB0BSCL"), 13733b588e43STomer Maimon PINCTRL_PIN(195, "GPIO195/SMB0BSDA"), 13743b588e43STomer Maimon PINCTRL_PIN(196, "GPIO196/SMB0CSCL"), 13753b588e43STomer Maimon PINCTRL_PIN(197, "GPIO197/SMB0DEN"), 13763b588e43STomer Maimon PINCTRL_PIN(198, "GPIO198/SMB0DSDA"), 13773b588e43STomer Maimon PINCTRL_PIN(199, "GPIO199/SMB0DSCL"), 13783b588e43STomer Maimon PINCTRL_PIN(200, "GPIO200/R2CK"), 13793b588e43STomer Maimon PINCTRL_PIN(201, "GPIO201/R1CK"), 13803b588e43STomer Maimon PINCTRL_PIN(202, "GPIO202/SMB0CSDA"), 13813b588e43STomer Maimon PINCTRL_PIN(203, "GPIO203/FANIN16"), 13823b588e43STomer Maimon PINCTRL_PIN(204, "GPIO204/DDC2SCL"), 13833b588e43STomer Maimon PINCTRL_PIN(205, "GPIO205/DDC2SDA"), 13843b588e43STomer Maimon PINCTRL_PIN(206, "GPIO206/HSYNC2"), 13853b588e43STomer Maimon PINCTRL_PIN(207, "GPIO207/VSYNC2"), 13863b588e43STomer Maimon PINCTRL_PIN(208, "GPIO208/RG2TXC/DVCK"), 13873b588e43STomer Maimon PINCTRL_PIN(209, "GPIO209/RG2TXCTL/DDRV4"), 13883b588e43STomer Maimon PINCTRL_PIN(210, "GPIO210/RG2RXD0/DDRV5"), 13893b588e43STomer Maimon PINCTRL_PIN(211, "GPIO211/RG2RXD1/DDRV6"), 13903b588e43STomer Maimon PINCTRL_PIN(212, "GPIO212/RG2RXD2/DDRV7"), 13913b588e43STomer Maimon PINCTRL_PIN(213, "GPIO213/RG2RXD3/DDRV8"), 13923b588e43STomer Maimon PINCTRL_PIN(214, "GPIO214/RG2RXC/DDRV9"), 13933b588e43STomer Maimon PINCTRL_PIN(215, "GPIO215/RG2RXCTL/DDRV10"), 13943b588e43STomer Maimon PINCTRL_PIN(216, "GPIO216/RG2MDC/DDRV11"), 13953b588e43STomer Maimon PINCTRL_PIN(217, "GPIO217/RG2MDIO/DVHSYNC"), 13963b588e43STomer Maimon PINCTRL_PIN(218, "GPIO218/nWDO1"), 13973b588e43STomer Maimon PINCTRL_PIN(219, "GPIO219/nWDO2"), 13983b588e43STomer Maimon PINCTRL_PIN(220, "GPIO220/SMB12SCL"), 13993b588e43STomer Maimon PINCTRL_PIN(221, "GPIO221/SMB12SDA"), 14003b588e43STomer Maimon PINCTRL_PIN(222, "GPIO222/SMB13SCL"), 14013b588e43STomer Maimon PINCTRL_PIN(223, "GPIO223/SMB13SDA"), 14023b588e43STomer Maimon 14033b588e43STomer Maimon PINCTRL_PIN(224, "GPIO224/SPIXCK"), 14043b588e43STomer Maimon PINCTRL_PIN(225, "GPO225/SPIXD0/STRAP12"), 14053b588e43STomer Maimon PINCTRL_PIN(226, "GPO226/SPIXD1/STRAP13"), 14063b588e43STomer Maimon PINCTRL_PIN(227, "GPIO227/nSPIXCS0"), 14073b588e43STomer Maimon PINCTRL_PIN(228, "GPIO228/nSPIXCS1"), 14083b588e43STomer Maimon PINCTRL_PIN(229, "GPO229/SPIXD2/STRAP3"), 14093b588e43STomer Maimon PINCTRL_PIN(230, "GPIO230/SPIXD3"), 14103b588e43STomer Maimon PINCTRL_PIN(231, "GPIO231/nCLKREQ"), 14113b588e43STomer Maimon PINCTRL_PIN(255, "GPI255/DACOSEL"), 14123b588e43STomer Maimon }; 14133b588e43STomer Maimon 14143b588e43STomer Maimon /* Enable mode in pin group */ 14153b588e43STomer Maimon static void npcm7xx_setfunc(struct regmap *gcr_regmap, const unsigned int *pin, 14163b588e43STomer Maimon int pin_number, int mode) 14173b588e43STomer Maimon { 14183b588e43STomer Maimon const struct npcm7xx_pincfg *cfg; 14193b588e43STomer Maimon int i; 14203b588e43STomer Maimon 14213b588e43STomer Maimon for (i = 0 ; i < pin_number ; i++) { 14223b588e43STomer Maimon cfg = &pincfg[pin[i]]; 14233b588e43STomer Maimon if (mode == fn_gpio || cfg->fn0 == mode || cfg->fn1 == mode || cfg->fn2 == mode) { 14243b588e43STomer Maimon if (cfg->reg0) 14253b588e43STomer Maimon regmap_update_bits(gcr_regmap, cfg->reg0, 14263b588e43STomer Maimon BIT(cfg->bit0), 14273b588e43STomer Maimon !!(cfg->fn0 == mode) ? 14283b588e43STomer Maimon BIT(cfg->bit0) : 0); 14293b588e43STomer Maimon if (cfg->reg1) 14303b588e43STomer Maimon regmap_update_bits(gcr_regmap, cfg->reg1, 14313b588e43STomer Maimon BIT(cfg->bit1), 14323b588e43STomer Maimon !!(cfg->fn1 == mode) ? 14333b588e43STomer Maimon BIT(cfg->bit1) : 0); 14343b588e43STomer Maimon if (cfg->reg2) 14353b588e43STomer Maimon regmap_update_bits(gcr_regmap, cfg->reg2, 14363b588e43STomer Maimon BIT(cfg->bit2), 14373b588e43STomer Maimon !!(cfg->fn2 == mode) ? 14383b588e43STomer Maimon BIT(cfg->bit2) : 0); 14393b588e43STomer Maimon } 14403b588e43STomer Maimon } 14413b588e43STomer Maimon } 14423b588e43STomer Maimon 14433b588e43STomer Maimon /* Get slew rate of pin (high/low) */ 14443b588e43STomer Maimon static int npcm7xx_get_slew_rate(struct npcm7xx_gpio *bank, 14453b588e43STomer Maimon struct regmap *gcr_regmap, unsigned int pin) 14463b588e43STomer Maimon { 14473b588e43STomer Maimon u32 val; 14483b588e43STomer Maimon int gpio = (pin % bank->gc.ngpio); 14493b588e43STomer Maimon unsigned long pinmask = BIT(gpio); 14503b588e43STomer Maimon 14513b588e43STomer Maimon if (pincfg[pin].flag & SLEW) 14523b588e43STomer Maimon return ioread32(bank->base + NPCM7XX_GP_N_OSRC) 14533b588e43STomer Maimon & pinmask; 14543b588e43STomer Maimon /* LPC Slew rate in SRCNT register */ 14553b588e43STomer Maimon if (pincfg[pin].flag & SLEWLPC) { 14563b588e43STomer Maimon regmap_read(gcr_regmap, NPCM7XX_GCR_SRCNT, &val); 14573b588e43STomer Maimon return !!(val & SRCNT_ESPI); 14583b588e43STomer Maimon } 14593b588e43STomer Maimon 14603b588e43STomer Maimon return -EINVAL; 14613b588e43STomer Maimon } 14623b588e43STomer Maimon 14633b588e43STomer Maimon /* Set slew rate of pin (high/low) */ 14643b588e43STomer Maimon static int npcm7xx_set_slew_rate(struct npcm7xx_gpio *bank, 14653b588e43STomer Maimon struct regmap *gcr_regmap, unsigned int pin, 14663b588e43STomer Maimon int arg) 14673b588e43STomer Maimon { 14683b588e43STomer Maimon int gpio = BIT(pin % bank->gc.ngpio); 14693b588e43STomer Maimon 14703b588e43STomer Maimon if (pincfg[pin].flag & SLEW) { 14713b588e43STomer Maimon switch (arg) { 14723b588e43STomer Maimon case 0: 14733b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OSRC, 14743b588e43STomer Maimon gpio); 14753b588e43STomer Maimon return 0; 14763b588e43STomer Maimon case 1: 14773b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_OSRC, 14783b588e43STomer Maimon gpio); 14793b588e43STomer Maimon return 0; 14803b588e43STomer Maimon default: 14813b588e43STomer Maimon return -EINVAL; 14823b588e43STomer Maimon } 14833b588e43STomer Maimon } 14843b588e43STomer Maimon /* LPC Slew rate in SRCNT register */ 14853b588e43STomer Maimon if (pincfg[pin].flag & SLEWLPC) { 14863b588e43STomer Maimon switch (arg) { 14873b588e43STomer Maimon case 0: 14883b588e43STomer Maimon regmap_update_bits(gcr_regmap, NPCM7XX_GCR_SRCNT, 14893b588e43STomer Maimon SRCNT_ESPI, 0); 14903b588e43STomer Maimon return 0; 14913b588e43STomer Maimon case 1: 14923b588e43STomer Maimon regmap_update_bits(gcr_regmap, NPCM7XX_GCR_SRCNT, 14933b588e43STomer Maimon SRCNT_ESPI, SRCNT_ESPI); 14943b588e43STomer Maimon return 0; 14953b588e43STomer Maimon default: 14963b588e43STomer Maimon return -EINVAL; 14973b588e43STomer Maimon } 14983b588e43STomer Maimon } 14993b588e43STomer Maimon 15003b588e43STomer Maimon return -EINVAL; 15013b588e43STomer Maimon } 15023b588e43STomer Maimon 15033b588e43STomer Maimon /* Get drive strength for a pin, if supported */ 15043b588e43STomer Maimon static int npcm7xx_get_drive_strength(struct pinctrl_dev *pctldev, 15053b588e43STomer Maimon unsigned int pin) 15063b588e43STomer Maimon { 15073b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 15083b588e43STomer Maimon struct npcm7xx_gpio *bank = 15093b588e43STomer Maimon &npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK]; 15103b588e43STomer Maimon int gpio = (pin % bank->gc.ngpio); 15113b588e43STomer Maimon unsigned long pinmask = BIT(gpio); 15123b588e43STomer Maimon u32 ds = 0; 15133b588e43STomer Maimon int flg, val; 15143b588e43STomer Maimon 15153b588e43STomer Maimon flg = pincfg[pin].flag; 15163b588e43STomer Maimon if (flg & DRIVE_STRENGTH_MASK) { 15173b588e43STomer Maimon /* Get standard reading */ 15183b588e43STomer Maimon val = ioread32(bank->base + NPCM7XX_GP_N_ODSC) 15193b588e43STomer Maimon & pinmask; 15203b588e43STomer Maimon ds = val ? DSHI(flg) : DSLO(flg); 15213b588e43STomer Maimon dev_dbg(bank->gc.parent, 15223b588e43STomer Maimon "pin %d strength %d = %d\n", pin, val, ds); 15233b588e43STomer Maimon return ds; 15243b588e43STomer Maimon } 15253b588e43STomer Maimon 15263b588e43STomer Maimon return -EINVAL; 15273b588e43STomer Maimon } 15283b588e43STomer Maimon 15293b588e43STomer Maimon /* Set drive strength for a pin, if supported */ 15303b588e43STomer Maimon static int npcm7xx_set_drive_strength(struct npcm7xx_pinctrl *npcm, 15313b588e43STomer Maimon unsigned int pin, int nval) 15323b588e43STomer Maimon { 15333b588e43STomer Maimon int v; 15343b588e43STomer Maimon struct npcm7xx_gpio *bank = 15353b588e43STomer Maimon &npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK]; 15363b588e43STomer Maimon int gpio = BIT(pin % bank->gc.ngpio); 15373b588e43STomer Maimon 15383b588e43STomer Maimon v = (pincfg[pin].flag & DRIVE_STRENGTH_MASK); 15393b588e43STomer Maimon if (!nval || !v) 15403b588e43STomer Maimon return -ENOTSUPP; 15413b588e43STomer Maimon if (DSLO(v) == nval) { 15423b588e43STomer Maimon dev_dbg(bank->gc.parent, 15433b588e43STomer Maimon "setting pin %d to low strength [%d]\n", pin, nval); 15443b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_ODSC, gpio); 15453b588e43STomer Maimon return 0; 15463b588e43STomer Maimon } else if (DSHI(v) == nval) { 15473b588e43STomer Maimon dev_dbg(bank->gc.parent, 15483b588e43STomer Maimon "setting pin %d to high strength [%d]\n", pin, nval); 15493b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_ODSC, gpio); 15503b588e43STomer Maimon return 0; 15513b588e43STomer Maimon } 15523b588e43STomer Maimon 15533b588e43STomer Maimon return -ENOTSUPP; 15543b588e43STomer Maimon } 15553b588e43STomer Maimon 15563b588e43STomer Maimon /* pinctrl_ops */ 15573b588e43STomer Maimon static void npcm7xx_pin_dbg_show(struct pinctrl_dev *pctldev, 15583b588e43STomer Maimon struct seq_file *s, unsigned int offset) 15593b588e43STomer Maimon { 15603b588e43STomer Maimon seq_printf(s, "pinctrl_ops.dbg: %d", offset); 15613b588e43STomer Maimon } 15623b588e43STomer Maimon 15633b588e43STomer Maimon static int npcm7xx_get_groups_count(struct pinctrl_dev *pctldev) 15643b588e43STomer Maimon { 15653b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 15663b588e43STomer Maimon 15679d0f18bcSJonathan Neuschäfer dev_dbg(npcm->dev, "group size: %zu\n", ARRAY_SIZE(npcm7xx_groups)); 15683b588e43STomer Maimon return ARRAY_SIZE(npcm7xx_groups); 15693b588e43STomer Maimon } 15703b588e43STomer Maimon 15713b588e43STomer Maimon static const char *npcm7xx_get_group_name(struct pinctrl_dev *pctldev, 15723b588e43STomer Maimon unsigned int selector) 15733b588e43STomer Maimon { 15743b588e43STomer Maimon return npcm7xx_groups[selector].name; 15753b588e43STomer Maimon } 15763b588e43STomer Maimon 15773b588e43STomer Maimon static int npcm7xx_get_group_pins(struct pinctrl_dev *pctldev, 15783b588e43STomer Maimon unsigned int selector, 15793b588e43STomer Maimon const unsigned int **pins, 15803b588e43STomer Maimon unsigned int *npins) 15813b588e43STomer Maimon { 15823b588e43STomer Maimon *npins = npcm7xx_groups[selector].npins; 15833b588e43STomer Maimon *pins = npcm7xx_groups[selector].pins; 15843b588e43STomer Maimon 15853b588e43STomer Maimon return 0; 15863b588e43STomer Maimon } 15873b588e43STomer Maimon 15883b588e43STomer Maimon static int npcm7xx_dt_node_to_map(struct pinctrl_dev *pctldev, 15893b588e43STomer Maimon struct device_node *np_config, 15903b588e43STomer Maimon struct pinctrl_map **map, 15913b588e43STomer Maimon u32 *num_maps) 15923b588e43STomer Maimon { 15933b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 15943b588e43STomer Maimon 15953b588e43STomer Maimon dev_dbg(npcm->dev, "dt_node_to_map: %s\n", np_config->name); 15963b588e43STomer Maimon return pinconf_generic_dt_node_to_map(pctldev, np_config, 15973b588e43STomer Maimon map, num_maps, 15983b588e43STomer Maimon PIN_MAP_TYPE_INVALID); 15993b588e43STomer Maimon } 16003b588e43STomer Maimon 16013b588e43STomer Maimon static void npcm7xx_dt_free_map(struct pinctrl_dev *pctldev, 16023b588e43STomer Maimon struct pinctrl_map *map, u32 num_maps) 16033b588e43STomer Maimon { 16043b588e43STomer Maimon kfree(map); 16053b588e43STomer Maimon } 16063b588e43STomer Maimon 160798a40a34SRikard Falkeborn static const struct pinctrl_ops npcm7xx_pinctrl_ops = { 16083b588e43STomer Maimon .get_groups_count = npcm7xx_get_groups_count, 16093b588e43STomer Maimon .get_group_name = npcm7xx_get_group_name, 16103b588e43STomer Maimon .get_group_pins = npcm7xx_get_group_pins, 16113b588e43STomer Maimon .pin_dbg_show = npcm7xx_pin_dbg_show, 16123b588e43STomer Maimon .dt_node_to_map = npcm7xx_dt_node_to_map, 16133b588e43STomer Maimon .dt_free_map = npcm7xx_dt_free_map, 16143b588e43STomer Maimon }; 16153b588e43STomer Maimon 16163b588e43STomer Maimon /* pinmux_ops */ 16173b588e43STomer Maimon static int npcm7xx_get_functions_count(struct pinctrl_dev *pctldev) 16183b588e43STomer Maimon { 16193b588e43STomer Maimon return ARRAY_SIZE(npcm7xx_funcs); 16203b588e43STomer Maimon } 16213b588e43STomer Maimon 16223b588e43STomer Maimon static const char *npcm7xx_get_function_name(struct pinctrl_dev *pctldev, 16233b588e43STomer Maimon unsigned int function) 16243b588e43STomer Maimon { 16253b588e43STomer Maimon return npcm7xx_funcs[function].name; 16263b588e43STomer Maimon } 16273b588e43STomer Maimon 16283b588e43STomer Maimon static int npcm7xx_get_function_groups(struct pinctrl_dev *pctldev, 16293b588e43STomer Maimon unsigned int function, 16303b588e43STomer Maimon const char * const **groups, 16313b588e43STomer Maimon unsigned int * const ngroups) 16323b588e43STomer Maimon { 16333b588e43STomer Maimon *ngroups = npcm7xx_funcs[function].ngroups; 16343b588e43STomer Maimon *groups = npcm7xx_funcs[function].groups; 16353b588e43STomer Maimon 16363b588e43STomer Maimon return 0; 16373b588e43STomer Maimon } 16383b588e43STomer Maimon 16393b588e43STomer Maimon static int npcm7xx_pinmux_set_mux(struct pinctrl_dev *pctldev, 16403b588e43STomer Maimon unsigned int function, 16413b588e43STomer Maimon unsigned int group) 16423b588e43STomer Maimon { 16433b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 16443b588e43STomer Maimon 16453b588e43STomer Maimon dev_dbg(npcm->dev, "set_mux: %d, %d[%s]\n", function, group, 16463b588e43STomer Maimon npcm7xx_groups[group].name); 16473b588e43STomer Maimon 16483b588e43STomer Maimon npcm7xx_setfunc(npcm->gcr_regmap, npcm7xx_groups[group].pins, 16493b588e43STomer Maimon npcm7xx_groups[group].npins, group); 16503b588e43STomer Maimon 16513b588e43STomer Maimon return 0; 16523b588e43STomer Maimon } 16533b588e43STomer Maimon 16543b588e43STomer Maimon static int npcm7xx_gpio_request_enable(struct pinctrl_dev *pctldev, 16553b588e43STomer Maimon struct pinctrl_gpio_range *range, 16563b588e43STomer Maimon unsigned int offset) 16573b588e43STomer Maimon { 16583b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 16593b588e43STomer Maimon 16603b588e43STomer Maimon if (!range) { 16613b588e43STomer Maimon dev_err(npcm->dev, "invalid range\n"); 16623b588e43STomer Maimon return -EINVAL; 16633b588e43STomer Maimon } 16643b588e43STomer Maimon if (!range->gc) { 16653b588e43STomer Maimon dev_err(npcm->dev, "invalid gpiochip\n"); 16663b588e43STomer Maimon return -EINVAL; 16673b588e43STomer Maimon } 16683b588e43STomer Maimon 16693b588e43STomer Maimon npcm7xx_setfunc(npcm->gcr_regmap, &offset, 1, fn_gpio); 16703b588e43STomer Maimon 16713b588e43STomer Maimon return 0; 16723b588e43STomer Maimon } 16733b588e43STomer Maimon 16743b588e43STomer Maimon /* Release GPIO back to pinctrl mode */ 16753b588e43STomer Maimon static void npcm7xx_gpio_request_free(struct pinctrl_dev *pctldev, 16763b588e43STomer Maimon struct pinctrl_gpio_range *range, 16773b588e43STomer Maimon unsigned int offset) 16783b588e43STomer Maimon { 16793b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 16803b588e43STomer Maimon int virq; 16813b588e43STomer Maimon 16823b588e43STomer Maimon virq = irq_find_mapping(npcm->domain, offset); 16833b588e43STomer Maimon if (virq) 16843b588e43STomer Maimon irq_dispose_mapping(virq); 16853b588e43STomer Maimon } 16863b588e43STomer Maimon 16873b588e43STomer Maimon /* Set GPIO direction */ 16883b588e43STomer Maimon static int npcm_gpio_set_direction(struct pinctrl_dev *pctldev, 16893b588e43STomer Maimon struct pinctrl_gpio_range *range, 16903b588e43STomer Maimon unsigned int offset, bool input) 16913b588e43STomer Maimon { 16923b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 16933b588e43STomer Maimon struct npcm7xx_gpio *bank = 16943b588e43STomer Maimon &npcm->gpio_bank[offset / NPCM7XX_GPIO_PER_BANK]; 16953b588e43STomer Maimon int gpio = BIT(offset % bank->gc.ngpio); 16963b588e43STomer Maimon 16973b588e43STomer Maimon dev_dbg(bank->gc.parent, "GPIO Set Direction: %d = %d\n", offset, 16983b588e43STomer Maimon input); 16993b588e43STomer Maimon if (input) 17003b588e43STomer Maimon iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC); 17013b588e43STomer Maimon else 17023b588e43STomer Maimon iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES); 17033b588e43STomer Maimon 17043b588e43STomer Maimon return 0; 17053b588e43STomer Maimon } 17063b588e43STomer Maimon 170798a40a34SRikard Falkeborn static const struct pinmux_ops npcm7xx_pinmux_ops = { 17083b588e43STomer Maimon .get_functions_count = npcm7xx_get_functions_count, 17093b588e43STomer Maimon .get_function_name = npcm7xx_get_function_name, 17103b588e43STomer Maimon .get_function_groups = npcm7xx_get_function_groups, 17113b588e43STomer Maimon .set_mux = npcm7xx_pinmux_set_mux, 17123b588e43STomer Maimon .gpio_request_enable = npcm7xx_gpio_request_enable, 17133b588e43STomer Maimon .gpio_disable_free = npcm7xx_gpio_request_free, 17143b588e43STomer Maimon .gpio_set_direction = npcm_gpio_set_direction, 17153b588e43STomer Maimon }; 17163b588e43STomer Maimon 17173b588e43STomer Maimon /* pinconf_ops */ 17183b588e43STomer Maimon static int npcm7xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin, 17193b588e43STomer Maimon unsigned long *config) 17203b588e43STomer Maimon { 17213b588e43STomer Maimon enum pin_config_param param = pinconf_to_config_param(*config); 17223b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 17233b588e43STomer Maimon struct npcm7xx_gpio *bank = 17243b588e43STomer Maimon &npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK]; 17253b588e43STomer Maimon int gpio = (pin % bank->gc.ngpio); 17263b588e43STomer Maimon unsigned long pinmask = BIT(gpio); 17273b588e43STomer Maimon u32 ie, oe, pu, pd; 17283b588e43STomer Maimon int rc = 0; 17293b588e43STomer Maimon 17303b588e43STomer Maimon switch (param) { 17313b588e43STomer Maimon case PIN_CONFIG_BIAS_DISABLE: 17323b588e43STomer Maimon case PIN_CONFIG_BIAS_PULL_UP: 17333b588e43STomer Maimon case PIN_CONFIG_BIAS_PULL_DOWN: 17343b588e43STomer Maimon pu = ioread32(bank->base + NPCM7XX_GP_N_PU) & pinmask; 17353b588e43STomer Maimon pd = ioread32(bank->base + NPCM7XX_GP_N_PD) & pinmask; 17363b588e43STomer Maimon if (param == PIN_CONFIG_BIAS_DISABLE) 17373b588e43STomer Maimon rc = (!pu && !pd); 17383b588e43STomer Maimon else if (param == PIN_CONFIG_BIAS_PULL_UP) 17393b588e43STomer Maimon rc = (pu && !pd); 17403b588e43STomer Maimon else if (param == PIN_CONFIG_BIAS_PULL_DOWN) 17413b588e43STomer Maimon rc = (!pu && pd); 17423b588e43STomer Maimon break; 17433b588e43STomer Maimon case PIN_CONFIG_OUTPUT: 17443b588e43STomer Maimon case PIN_CONFIG_INPUT_ENABLE: 17453b588e43STomer Maimon ie = ioread32(bank->base + NPCM7XX_GP_N_IEM) & pinmask; 17463b588e43STomer Maimon oe = ioread32(bank->base + NPCM7XX_GP_N_OE) & pinmask; 17473b588e43STomer Maimon if (param == PIN_CONFIG_INPUT_ENABLE) 17483b588e43STomer Maimon rc = (ie && !oe); 17493b588e43STomer Maimon else if (param == PIN_CONFIG_OUTPUT) 17503b588e43STomer Maimon rc = (!ie && oe); 17513b588e43STomer Maimon break; 17523b588e43STomer Maimon case PIN_CONFIG_DRIVE_PUSH_PULL: 17533b588e43STomer Maimon rc = !(ioread32(bank->base + NPCM7XX_GP_N_OTYP) & pinmask); 17543b588e43STomer Maimon break; 17553b588e43STomer Maimon case PIN_CONFIG_DRIVE_OPEN_DRAIN: 17563b588e43STomer Maimon rc = ioread32(bank->base + NPCM7XX_GP_N_OTYP) & pinmask; 17573b588e43STomer Maimon break; 17583b588e43STomer Maimon case PIN_CONFIG_INPUT_DEBOUNCE: 17593b588e43STomer Maimon rc = ioread32(bank->base + NPCM7XX_GP_N_DBNC) & pinmask; 17603b588e43STomer Maimon break; 17613b588e43STomer Maimon case PIN_CONFIG_DRIVE_STRENGTH: 17623b588e43STomer Maimon rc = npcm7xx_get_drive_strength(pctldev, pin); 17633b588e43STomer Maimon if (rc) 17643b588e43STomer Maimon *config = pinconf_to_config_packed(param, rc); 17653b588e43STomer Maimon break; 17663b588e43STomer Maimon case PIN_CONFIG_SLEW_RATE: 17673b588e43STomer Maimon rc = npcm7xx_get_slew_rate(bank, npcm->gcr_regmap, pin); 17683b588e43STomer Maimon if (rc >= 0) 17693b588e43STomer Maimon *config = pinconf_to_config_packed(param, rc); 17703b588e43STomer Maimon break; 17713b588e43STomer Maimon default: 17723b588e43STomer Maimon return -ENOTSUPP; 17733b588e43STomer Maimon } 17743b588e43STomer Maimon 17753b588e43STomer Maimon if (!rc) 17763b588e43STomer Maimon return -EINVAL; 17773b588e43STomer Maimon 17783b588e43STomer Maimon return 0; 17793b588e43STomer Maimon } 17803b588e43STomer Maimon 17813b588e43STomer Maimon static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm, 17823b588e43STomer Maimon unsigned int pin, unsigned long config) 17833b588e43STomer Maimon { 17843b588e43STomer Maimon enum pin_config_param param = pinconf_to_config_param(config); 17853b588e43STomer Maimon u16 arg = pinconf_to_config_argument(config); 17863b588e43STomer Maimon struct npcm7xx_gpio *bank = 17873b588e43STomer Maimon &npcm->gpio_bank[pin / NPCM7XX_GPIO_PER_BANK]; 17883b588e43STomer Maimon int gpio = BIT(pin % bank->gc.ngpio); 17893b588e43STomer Maimon 17903b588e43STomer Maimon dev_dbg(bank->gc.parent, "param=%d %d[GPIO]\n", param, pin); 17913b588e43STomer Maimon switch (param) { 17923b588e43STomer Maimon case PIN_CONFIG_BIAS_DISABLE: 17933b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio); 17943b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_PD, gpio); 17953b588e43STomer Maimon break; 17963b588e43STomer Maimon case PIN_CONFIG_BIAS_PULL_DOWN: 17973b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio); 17983b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PD, gpio); 17993b588e43STomer Maimon break; 18003b588e43STomer Maimon case PIN_CONFIG_BIAS_PULL_UP: 18013b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_PD, gpio); 18023b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio); 18033b588e43STomer Maimon break; 18043b588e43STomer Maimon case PIN_CONFIG_INPUT_ENABLE: 18053b588e43STomer Maimon iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC); 180667b249aaSTomer Maimon bank->direction_input(&bank->gc, pin % bank->gc.ngpio); 18073b588e43STomer Maimon break; 18083b588e43STomer Maimon case PIN_CONFIG_OUTPUT: 18093b588e43STomer Maimon iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES); 181067b249aaSTomer Maimon bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg); 18113b588e43STomer Maimon break; 18123b588e43STomer Maimon case PIN_CONFIG_DRIVE_PUSH_PULL: 18133b588e43STomer Maimon npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio); 18143b588e43STomer Maimon break; 18153b588e43STomer Maimon case PIN_CONFIG_DRIVE_OPEN_DRAIN: 18163b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio); 18173b588e43STomer Maimon break; 18183b588e43STomer Maimon case PIN_CONFIG_INPUT_DEBOUNCE: 18193b588e43STomer Maimon npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_DBNC, gpio); 18203b588e43STomer Maimon break; 18213b588e43STomer Maimon case PIN_CONFIG_SLEW_RATE: 18223b588e43STomer Maimon return npcm7xx_set_slew_rate(bank, npcm->gcr_regmap, pin, arg); 18233b588e43STomer Maimon case PIN_CONFIG_DRIVE_STRENGTH: 18243b588e43STomer Maimon return npcm7xx_set_drive_strength(npcm, pin, arg); 18253b588e43STomer Maimon default: 18263b588e43STomer Maimon return -ENOTSUPP; 18273b588e43STomer Maimon } 18283b588e43STomer Maimon 18293b588e43STomer Maimon return 0; 18303b588e43STomer Maimon } 18313b588e43STomer Maimon 18323b588e43STomer Maimon /* Set multiple configuration settings for a pin */ 18333b588e43STomer Maimon static int npcm7xx_config_set(struct pinctrl_dev *pctldev, unsigned int pin, 18343b588e43STomer Maimon unsigned long *configs, unsigned int num_configs) 18353b588e43STomer Maimon { 18363b588e43STomer Maimon struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev); 18373b588e43STomer Maimon int rc; 18383b588e43STomer Maimon 18393b588e43STomer Maimon while (num_configs--) { 18403b588e43STomer Maimon rc = npcm7xx_config_set_one(npcm, pin, *configs++); 18413b588e43STomer Maimon if (rc) 18423b588e43STomer Maimon return rc; 18433b588e43STomer Maimon } 18443b588e43STomer Maimon 18453b588e43STomer Maimon return 0; 18463b588e43STomer Maimon } 18473b588e43STomer Maimon 184898a40a34SRikard Falkeborn static const struct pinconf_ops npcm7xx_pinconf_ops = { 18493b588e43STomer Maimon .is_generic = true, 18503b588e43STomer Maimon .pin_config_get = npcm7xx_config_get, 18513b588e43STomer Maimon .pin_config_set = npcm7xx_config_set, 18523b588e43STomer Maimon }; 18533b588e43STomer Maimon 18543b588e43STomer Maimon /* pinctrl_desc */ 18553b588e43STomer Maimon static struct pinctrl_desc npcm7xx_pinctrl_desc = { 18563b588e43STomer Maimon .name = "npcm7xx-pinctrl", 18573b588e43STomer Maimon .pins = npcm7xx_pins, 18583b588e43STomer Maimon .npins = ARRAY_SIZE(npcm7xx_pins), 18593b588e43STomer Maimon .pctlops = &npcm7xx_pinctrl_ops, 18603b588e43STomer Maimon .pmxops = &npcm7xx_pinmux_ops, 18613b588e43STomer Maimon .confops = &npcm7xx_pinconf_ops, 18623b588e43STomer Maimon .owner = THIS_MODULE, 18633b588e43STomer Maimon }; 18643b588e43STomer Maimon 18653b588e43STomer Maimon static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) 18663b588e43STomer Maimon { 18673b588e43STomer Maimon int ret = -ENXIO; 18683b588e43STomer Maimon struct resource res; 18690173ce55SAndy Shevchenko struct device *dev = pctrl->dev; 18700173ce55SAndy Shevchenko struct fwnode_reference_args args; 18710173ce55SAndy Shevchenko struct fwnode_handle *child; 18720173ce55SAndy Shevchenko int id = 0; 18733b588e43STomer Maimon 18740173ce55SAndy Shevchenko for_each_gpiochip_node(dev, child) { 18750173ce55SAndy Shevchenko struct device_node *np = to_of_node(child); 18760173ce55SAndy Shevchenko 18773b588e43STomer Maimon ret = of_address_to_resource(np, 0, &res); 18783b588e43STomer Maimon if (ret < 0) { 18790173ce55SAndy Shevchenko dev_err(dev, "Resource fail for GPIO bank %u\n", id); 18803b588e43STomer Maimon return ret; 18813b588e43STomer Maimon } 18823b588e43STomer Maimon 18830173ce55SAndy Shevchenko pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res)); 18843b588e43STomer Maimon 18850173ce55SAndy Shevchenko ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4, 18860173ce55SAndy Shevchenko pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN, 18870173ce55SAndy Shevchenko pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT, 18883b588e43STomer Maimon NULL, 18893b588e43STomer Maimon NULL, 18900173ce55SAndy Shevchenko pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM, 18913b588e43STomer Maimon BGPIOF_READ_OUTPUT_REG_SET); 18923b588e43STomer Maimon if (ret) { 18930173ce55SAndy Shevchenko dev_err(dev, "bgpio_init() failed\n"); 18943b588e43STomer Maimon return ret; 18953b588e43STomer Maimon } 18963b588e43STomer Maimon 18970173ce55SAndy Shevchenko ret = fwnode_property_get_reference_args(child, "gpio-ranges", NULL, 3, 0, &args); 18983b588e43STomer Maimon if (ret < 0) { 18990173ce55SAndy Shevchenko dev_err(dev, "gpio-ranges fail for GPIO bank %u\n", id); 19003b588e43STomer Maimon return ret; 19013b588e43STomer Maimon } 19023b588e43STomer Maimon 19030173ce55SAndy Shevchenko ret = irq_of_parse_and_map(np, 0); 1904e804944dSKrzysztof Kozlowski if (!ret) { 19050173ce55SAndy Shevchenko dev_err(dev, "No IRQ for GPIO bank %u\n", id); 1906e804944dSKrzysztof Kozlowski return -EINVAL; 19070173ce55SAndy Shevchenko } 19080173ce55SAndy Shevchenko pctrl->gpio_bank[id].irq = ret; 19093b588e43STomer Maimon pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; 19100173ce55SAndy Shevchenko pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK; 19110173ce55SAndy Shevchenko pctrl->gpio_bank[id].pinctrl_id = args.args[0]; 19120173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.base = args.args[1]; 19130173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.ngpio = args.args[2]; 19143b588e43STomer Maimon pctrl->gpio_bank[id].gc.owner = THIS_MODULE; 19150173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.parent = dev; 19160173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.fwnode = child; 19170173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child); 19184be1eaf3SNicholas Mc Guire if (pctrl->gpio_bank[id].gc.label == NULL) 19194be1eaf3SNicholas Mc Guire return -ENOMEM; 19204be1eaf3SNicholas Mc Guire 19213b588e43STomer Maimon pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; 19220173ce55SAndy Shevchenko pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input; 19230173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input; 19240173ce55SAndy Shevchenko pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output; 19250173ce55SAndy Shevchenko pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output; 19260173ce55SAndy Shevchenko pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request; 19273b588e43STomer Maimon pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; 19283b588e43STomer Maimon pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free; 19293b588e43STomer Maimon id++; 19303b588e43STomer Maimon } 19313b588e43STomer Maimon 19323b588e43STomer Maimon pctrl->bank_num = id; 19333b588e43STomer Maimon return ret; 19343b588e43STomer Maimon } 19353b588e43STomer Maimon 19363b588e43STomer Maimon static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) 19373b588e43STomer Maimon { 19383b588e43STomer Maimon int ret, id; 19393b588e43STomer Maimon 19403b588e43STomer Maimon for (id = 0 ; id < pctrl->bank_num ; id++) { 1941de0221f6SLinus Walleij struct gpio_irq_chip *girq; 1942de0221f6SLinus Walleij 1943de0221f6SLinus Walleij girq = &pctrl->gpio_bank[id].gc.irq; 1944de0221f6SLinus Walleij girq->chip = &pctrl->gpio_bank[id].irq_chip; 1945de0221f6SLinus Walleij girq->parent_handler = npcmgpio_irq_handler; 1946de0221f6SLinus Walleij girq->num_parents = 1; 1947de0221f6SLinus Walleij girq->parents = devm_kcalloc(pctrl->dev, 1, 1948de0221f6SLinus Walleij sizeof(*girq->parents), 1949de0221f6SLinus Walleij GFP_KERNEL); 1950de0221f6SLinus Walleij if (!girq->parents) { 1951de0221f6SLinus Walleij ret = -ENOMEM; 1952de0221f6SLinus Walleij goto err_register; 1953de0221f6SLinus Walleij } 1954de0221f6SLinus Walleij girq->parents[0] = pctrl->gpio_bank[id].irq; 1955de0221f6SLinus Walleij girq->default_type = IRQ_TYPE_NONE; 1956de0221f6SLinus Walleij girq->handler = handle_level_irq; 19573b588e43STomer Maimon ret = devm_gpiochip_add_data(pctrl->dev, 19583b588e43STomer Maimon &pctrl->gpio_bank[id].gc, 19593b588e43STomer Maimon &pctrl->gpio_bank[id]); 19603b588e43STomer Maimon if (ret) { 19613b588e43STomer Maimon dev_err(pctrl->dev, "Failed to add GPIO chip %u\n", id); 19623b588e43STomer Maimon goto err_register; 19633b588e43STomer Maimon } 19643b588e43STomer Maimon 19653b588e43STomer Maimon ret = gpiochip_add_pin_range(&pctrl->gpio_bank[id].gc, 19663b588e43STomer Maimon dev_name(pctrl->dev), 19673b588e43STomer Maimon pctrl->gpio_bank[id].pinctrl_id, 19683b588e43STomer Maimon pctrl->gpio_bank[id].gc.base, 19693b588e43STomer Maimon pctrl->gpio_bank[id].gc.ngpio); 19703b588e43STomer Maimon if (ret < 0) { 19713b588e43STomer Maimon dev_err(pctrl->dev, "Failed to add GPIO bank %u\n", id); 19723b588e43STomer Maimon gpiochip_remove(&pctrl->gpio_bank[id].gc); 19733b588e43STomer Maimon goto err_register; 19743b588e43STomer Maimon } 19753b588e43STomer Maimon } 19763b588e43STomer Maimon 19773b588e43STomer Maimon return 0; 19783b588e43STomer Maimon 19793b588e43STomer Maimon err_register: 19803b588e43STomer Maimon for (; id > 0; id--) 19813b588e43STomer Maimon gpiochip_remove(&pctrl->gpio_bank[id - 1].gc); 19823b588e43STomer Maimon 19833b588e43STomer Maimon return ret; 19843b588e43STomer Maimon } 19853b588e43STomer Maimon 19863b588e43STomer Maimon static int npcm7xx_pinctrl_probe(struct platform_device *pdev) 19873b588e43STomer Maimon { 19883b588e43STomer Maimon struct npcm7xx_pinctrl *pctrl; 19893b588e43STomer Maimon int ret; 19903b588e43STomer Maimon 19913b588e43STomer Maimon pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 19923b588e43STomer Maimon if (!pctrl) 19933b588e43STomer Maimon return -ENOMEM; 19943b588e43STomer Maimon 19953b588e43STomer Maimon pctrl->dev = &pdev->dev; 19963b588e43STomer Maimon dev_set_drvdata(&pdev->dev, pctrl); 19973b588e43STomer Maimon 19983b588e43STomer Maimon pctrl->gcr_regmap = 19993b588e43STomer Maimon syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); 20003b588e43STomer Maimon if (IS_ERR(pctrl->gcr_regmap)) { 20013b588e43STomer Maimon dev_err(pctrl->dev, "didn't find nuvoton,npcm750-gcr\n"); 20023b588e43STomer Maimon return PTR_ERR(pctrl->gcr_regmap); 20033b588e43STomer Maimon } 20043b588e43STomer Maimon 20053b588e43STomer Maimon ret = npcm7xx_gpio_of(pctrl); 20063b588e43STomer Maimon if (ret < 0) { 20073b588e43STomer Maimon dev_err(pctrl->dev, "Failed to gpio dt-binding %u\n", ret); 20083b588e43STomer Maimon return ret; 20093b588e43STomer Maimon } 20103b588e43STomer Maimon 20113b588e43STomer Maimon pctrl->pctldev = devm_pinctrl_register(&pdev->dev, 20123b588e43STomer Maimon &npcm7xx_pinctrl_desc, pctrl); 20133b588e43STomer Maimon if (IS_ERR(pctrl->pctldev)) { 20143b588e43STomer Maimon dev_err(&pdev->dev, "Failed to register pinctrl device\n"); 20153b588e43STomer Maimon return PTR_ERR(pctrl->pctldev); 20163b588e43STomer Maimon } 20173b588e43STomer Maimon 20183b588e43STomer Maimon ret = npcm7xx_gpio_register(pctrl); 20193b588e43STomer Maimon if (ret < 0) { 20203b588e43STomer Maimon dev_err(pctrl->dev, "Failed to register gpio %u\n", ret); 20213b588e43STomer Maimon return ret; 20223b588e43STomer Maimon } 20233b588e43STomer Maimon 20243b588e43STomer Maimon pr_info("NPCM7xx Pinctrl driver probed\n"); 20253b588e43STomer Maimon return 0; 20263b588e43STomer Maimon } 20273b588e43STomer Maimon 20283b588e43STomer Maimon static const struct of_device_id npcm7xx_pinctrl_match[] = { 20293b588e43STomer Maimon { .compatible = "nuvoton,npcm750-pinctrl" }, 20303b588e43STomer Maimon { }, 20313b588e43STomer Maimon }; 20323b588e43STomer Maimon MODULE_DEVICE_TABLE(of, npcm7xx_pinctrl_match); 20333b588e43STomer Maimon 20343b588e43STomer Maimon static struct platform_driver npcm7xx_pinctrl_driver = { 20353b588e43STomer Maimon .probe = npcm7xx_pinctrl_probe, 20363b588e43STomer Maimon .driver = { 20373b588e43STomer Maimon .name = "npcm7xx-pinctrl", 20383b588e43STomer Maimon .of_match_table = npcm7xx_pinctrl_match, 20393b588e43STomer Maimon .suppress_bind_attrs = true, 20403b588e43STomer Maimon }, 20413b588e43STomer Maimon }; 20423b588e43STomer Maimon 20433b588e43STomer Maimon static int __init npcm7xx_pinctrl_register(void) 20443b588e43STomer Maimon { 20453b588e43STomer Maimon return platform_driver_register(&npcm7xx_pinctrl_driver); 20463b588e43STomer Maimon } 20473b588e43STomer Maimon arch_initcall(npcm7xx_pinctrl_register); 20483b588e43STomer Maimon 20493b588e43STomer Maimon MODULE_LICENSE("GPL v2"); 20503b588e43STomer Maimon MODULE_AUTHOR("jordan_hargrave@dell.com"); 20513b588e43STomer Maimon MODULE_AUTHOR("tomer.maimon@nuvoton.com"); 20523b588e43STomer Maimon MODULE_DESCRIPTION("Nuvoton NPCM7XX Pinctrl and GPIO driver"); 2053