1 #include <linux/kernel.h>
2 #include <linux/pinctrl/pinctrl.h>
3 #include "pinctrl-nomadik.h"
4 
5 /* All the pins that can be used for GPIO and some other functions */
6 #define _GPIO(offset)		(offset)
7 
8 #define DB8500_PIN_AJ5		_GPIO(0)
9 #define DB8500_PIN_AJ3		_GPIO(1)
10 #define DB8500_PIN_AH4		_GPIO(2)
11 #define DB8500_PIN_AH3		_GPIO(3)
12 #define DB8500_PIN_AH6		_GPIO(4)
13 #define DB8500_PIN_AG6		_GPIO(5)
14 #define DB8500_PIN_AF6		_GPIO(6)
15 #define DB8500_PIN_AG5		_GPIO(7)
16 #define DB8500_PIN_AD5		_GPIO(8)
17 #define DB8500_PIN_AE4		_GPIO(9)
18 #define DB8500_PIN_AF5		_GPIO(10)
19 #define DB8500_PIN_AG4		_GPIO(11)
20 #define DB8500_PIN_AC4		_GPIO(12)
21 #define DB8500_PIN_AF3		_GPIO(13)
22 #define DB8500_PIN_AE3		_GPIO(14)
23 #define DB8500_PIN_AC3		_GPIO(15)
24 #define DB8500_PIN_AD3		_GPIO(16)
25 #define DB8500_PIN_AD4		_GPIO(17)
26 #define DB8500_PIN_AC2		_GPIO(18)
27 #define DB8500_PIN_AC1		_GPIO(19)
28 #define DB8500_PIN_AB4		_GPIO(20)
29 #define DB8500_PIN_AB3		_GPIO(21)
30 #define DB8500_PIN_AA3		_GPIO(22)
31 #define DB8500_PIN_AA4		_GPIO(23)
32 #define DB8500_PIN_AB2		_GPIO(24)
33 #define DB8500_PIN_Y4		_GPIO(25)
34 #define DB8500_PIN_Y2		_GPIO(26)
35 #define DB8500_PIN_AA2		_GPIO(27)
36 #define DB8500_PIN_AA1		_GPIO(28)
37 #define DB8500_PIN_W2		_GPIO(29)
38 #define DB8500_PIN_W3		_GPIO(30)
39 #define DB8500_PIN_V3		_GPIO(31)
40 #define DB8500_PIN_V2		_GPIO(32)
41 #define DB8500_PIN_AF2		_GPIO(33)
42 #define DB8500_PIN_AE1		_GPIO(34)
43 #define DB8500_PIN_AE2		_GPIO(35)
44 #define DB8500_PIN_AG2		_GPIO(36)
45 /* Hole */
46 #define DB8500_PIN_F3		_GPIO(64)
47 #define DB8500_PIN_F1		_GPIO(65)
48 #define DB8500_PIN_G3		_GPIO(66)
49 #define DB8500_PIN_G2		_GPIO(67)
50 #define DB8500_PIN_E1		_GPIO(68)
51 #define DB8500_PIN_E2		_GPIO(69)
52 #define DB8500_PIN_G5		_GPIO(70)
53 #define DB8500_PIN_G4		_GPIO(71)
54 #define DB8500_PIN_H4		_GPIO(72)
55 #define DB8500_PIN_H3		_GPIO(73)
56 #define DB8500_PIN_J3		_GPIO(74)
57 #define DB8500_PIN_H2		_GPIO(75)
58 #define DB8500_PIN_J2		_GPIO(76)
59 #define DB8500_PIN_H1		_GPIO(77)
60 #define DB8500_PIN_F4		_GPIO(78)
61 #define DB8500_PIN_E3		_GPIO(79)
62 #define DB8500_PIN_E4		_GPIO(80)
63 #define DB8500_PIN_D2		_GPIO(81)
64 #define DB8500_PIN_C1		_GPIO(82)
65 #define DB8500_PIN_D3		_GPIO(83)
66 #define DB8500_PIN_C2		_GPIO(84)
67 #define DB8500_PIN_D5		_GPIO(85)
68 #define DB8500_PIN_C6		_GPIO(86)
69 #define DB8500_PIN_B3		_GPIO(87)
70 #define DB8500_PIN_C4		_GPIO(88)
71 #define DB8500_PIN_E6		_GPIO(89)
72 #define DB8500_PIN_A3		_GPIO(90)
73 #define DB8500_PIN_B6		_GPIO(91)
74 #define DB8500_PIN_D6		_GPIO(92)
75 #define DB8500_PIN_B7		_GPIO(93)
76 #define DB8500_PIN_D7		_GPIO(94)
77 #define DB8500_PIN_E8		_GPIO(95)
78 #define DB8500_PIN_D8		_GPIO(96)
79 #define DB8500_PIN_D9		_GPIO(97)
80 /* Hole */
81 #define DB8500_PIN_A5		_GPIO(128)
82 #define DB8500_PIN_B4		_GPIO(129)
83 #define DB8500_PIN_C8		_GPIO(130)
84 #define DB8500_PIN_A12		_GPIO(131)
85 #define DB8500_PIN_C10		_GPIO(132)
86 #define DB8500_PIN_B10		_GPIO(133)
87 #define DB8500_PIN_B9		_GPIO(134)
88 #define DB8500_PIN_A9		_GPIO(135)
89 #define DB8500_PIN_C7		_GPIO(136)
90 #define DB8500_PIN_A7		_GPIO(137)
91 #define DB8500_PIN_C5		_GPIO(138)
92 #define DB8500_PIN_C9		_GPIO(139)
93 #define DB8500_PIN_B11		_GPIO(140)
94 #define DB8500_PIN_C12		_GPIO(141)
95 #define DB8500_PIN_C11		_GPIO(142)
96 #define DB8500_PIN_D12		_GPIO(143)
97 #define DB8500_PIN_B13		_GPIO(144)
98 #define DB8500_PIN_C13		_GPIO(145)
99 #define DB8500_PIN_D13		_GPIO(146)
100 #define DB8500_PIN_C15		_GPIO(147)
101 #define DB8500_PIN_B16		_GPIO(148)
102 #define DB8500_PIN_B14		_GPIO(149)
103 #define DB8500_PIN_C14		_GPIO(150)
104 #define DB8500_PIN_D17		_GPIO(151)
105 #define DB8500_PIN_D16		_GPIO(152)
106 #define DB8500_PIN_B17		_GPIO(153)
107 #define DB8500_PIN_C16		_GPIO(154)
108 #define DB8500_PIN_C19		_GPIO(155)
109 #define DB8500_PIN_C17		_GPIO(156)
110 #define DB8500_PIN_A18		_GPIO(157)
111 #define DB8500_PIN_C18		_GPIO(158)
112 #define DB8500_PIN_B19		_GPIO(159)
113 #define DB8500_PIN_B20		_GPIO(160)
114 #define DB8500_PIN_D21		_GPIO(161)
115 #define DB8500_PIN_D20		_GPIO(162)
116 #define DB8500_PIN_C20		_GPIO(163)
117 #define DB8500_PIN_B21		_GPIO(164)
118 #define DB8500_PIN_C21		_GPIO(165)
119 #define DB8500_PIN_A22		_GPIO(166)
120 #define DB8500_PIN_B24		_GPIO(167)
121 #define DB8500_PIN_C22		_GPIO(168)
122 #define DB8500_PIN_D22		_GPIO(169)
123 #define DB8500_PIN_C23		_GPIO(170)
124 #define DB8500_PIN_D23		_GPIO(171)
125 /* Hole */
126 #define DB8500_PIN_AJ27		_GPIO(192)
127 #define DB8500_PIN_AH27		_GPIO(193)
128 #define DB8500_PIN_AF27		_GPIO(194)
129 #define DB8500_PIN_AG28		_GPIO(195)
130 #define DB8500_PIN_AG26		_GPIO(196)
131 #define DB8500_PIN_AH24		_GPIO(197)
132 #define DB8500_PIN_AG25		_GPIO(198)
133 #define DB8500_PIN_AH23		_GPIO(199)
134 #define DB8500_PIN_AH26		_GPIO(200)
135 #define DB8500_PIN_AF24		_GPIO(201)
136 #define DB8500_PIN_AF25		_GPIO(202)
137 #define DB8500_PIN_AE23		_GPIO(203)
138 #define DB8500_PIN_AF23		_GPIO(204)
139 #define DB8500_PIN_AG23		_GPIO(205)
140 #define DB8500_PIN_AG24		_GPIO(206)
141 #define DB8500_PIN_AJ23		_GPIO(207)
142 #define DB8500_PIN_AH16		_GPIO(208)
143 #define DB8500_PIN_AG15		_GPIO(209)
144 #define DB8500_PIN_AJ15		_GPIO(210)
145 #define DB8500_PIN_AG14		_GPIO(211)
146 #define DB8500_PIN_AF13		_GPIO(212)
147 #define DB8500_PIN_AG13		_GPIO(213)
148 #define DB8500_PIN_AH15		_GPIO(214)
149 #define DB8500_PIN_AH13		_GPIO(215)
150 #define DB8500_PIN_AG12		_GPIO(216)
151 #define DB8500_PIN_AH12		_GPIO(217)
152 #define DB8500_PIN_AH11		_GPIO(218)
153 #define DB8500_PIN_AG10		_GPIO(219)
154 #define DB8500_PIN_AH10		_GPIO(220)
155 #define DB8500_PIN_AJ11		_GPIO(221)
156 #define DB8500_PIN_AJ9		_GPIO(222)
157 #define DB8500_PIN_AH9		_GPIO(223)
158 #define DB8500_PIN_AG9		_GPIO(224)
159 #define DB8500_PIN_AG8		_GPIO(225)
160 #define DB8500_PIN_AF8		_GPIO(226)
161 #define DB8500_PIN_AH7		_GPIO(227)
162 #define DB8500_PIN_AJ6		_GPIO(228)
163 #define DB8500_PIN_AG7		_GPIO(229)
164 #define DB8500_PIN_AF7		_GPIO(230)
165 /* Hole */
166 #define DB8500_PIN_AF28		_GPIO(256)
167 #define DB8500_PIN_AE29		_GPIO(257)
168 #define DB8500_PIN_AD29		_GPIO(258)
169 #define DB8500_PIN_AC29		_GPIO(259)
170 #define DB8500_PIN_AD28		_GPIO(260)
171 #define DB8500_PIN_AD26		_GPIO(261)
172 #define DB8500_PIN_AE26		_GPIO(262)
173 #define DB8500_PIN_AG29		_GPIO(263)
174 #define DB8500_PIN_AE27		_GPIO(264)
175 #define DB8500_PIN_AD27		_GPIO(265)
176 #define DB8500_PIN_AC28		_GPIO(266)
177 #define DB8500_PIN_AC27		_GPIO(267)
178 
179 /*
180  * The names of the pins are denoted by GPIO number and ball name, even
181  * though they can be used for other things than GPIO, this is the first
182  * column in the table of the data sheet and often used on schematics and
183  * such.
184  */
185 static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
186 	PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
187 	PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
188 	PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
189 	PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
190 	PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
191 	PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
192 	PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
193 	PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
194 	PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
195 	PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
196 	PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
197 	PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
198 	PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
199 	PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
200 	PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
201 	PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
202 	PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
203 	PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
204 	PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
205 	PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
206 	PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
207 	PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
208 	PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
209 	PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
210 	PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
211 	PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
212 	PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
213 	PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
214 	PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
215 	PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
216 	PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
217 	PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
218 	PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
219 	PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
220 	PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
221 	PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
222 	PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
223 	/* Hole */
224 	PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
225 	PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
226 	PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
227 	PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
228 	PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
229 	PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
230 	PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
231 	PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
232 	PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
233 	PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
234 	PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
235 	PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
236 	PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
237 	PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
238 	PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
239 	PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
240 	PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
241 	PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
242 	PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
243 	PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
244 	PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
245 	PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
246 	PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
247 	PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
248 	PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
249 	PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
250 	PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
251 	PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
252 	PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
253 	PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
254 	PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
255 	PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
256 	PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
257 	PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
258 	/* Hole */
259 	PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
260 	PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
261 	PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
262 	PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
263 	PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
264 	PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
265 	PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
266 	PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
267 	PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
268 	PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
269 	PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
270 	PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
271 	PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
272 	PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
273 	PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
274 	PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
275 	PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
276 	PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
277 	PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
278 	PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
279 	PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
280 	PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
281 	PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
282 	PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
283 	PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
284 	PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
285 	PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
286 	PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
287 	PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
288 	PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
289 	PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
290 	PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
291 	PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
292 	PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
293 	PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
294 	PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
295 	PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
296 	PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
297 	PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
298 	PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
299 	PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
300 	PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
301 	PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
302 	PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
303 	/* Hole */
304 	PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
305 	PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
306 	PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
307 	PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
308 	PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
309 	PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
310 	PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
311 	PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
312 	PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
313 	PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
314 	PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
315 	PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
316 	PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
317 	PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
318 	PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
319 	PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
320 	PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
321 	PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
322 	PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
323 	PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
324 	PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
325 	PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
326 	PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
327 	PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
328 	PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
329 	PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
330 	PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
331 	PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
332 	PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
333 	PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
334 	PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
335 	PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
336 	PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
337 	PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
338 	PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
339 	PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
340 	PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
341 	PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
342 	PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
343 	/* Hole */
344 	PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
345 	PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
346 	PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
347 	PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
348 	PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
349 	PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
350 	PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
351 	PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
352 	PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
353 	PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
354 	PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
355 	PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
356 };
357 
358 #define DB8500_GPIO_RANGE(a, b, c) { .name = "DB8500", .id = a, .base = b, \
359 			.pin_base = b, .npins = c }
360 
361 /*
362  * This matches the 32-pin gpio chips registered by the GPIO portion. This
363  * cannot be const since we assign the struct gpio_chip * pointer at runtime.
364  */
365 static struct pinctrl_gpio_range nmk_db8500_ranges[] = {
366 	DB8500_GPIO_RANGE(0, 0, 32),
367 	DB8500_GPIO_RANGE(1, 32, 5),
368 	DB8500_GPIO_RANGE(2, 64, 32),
369 	DB8500_GPIO_RANGE(3, 96, 2),
370 	DB8500_GPIO_RANGE(4, 128, 32),
371 	DB8500_GPIO_RANGE(5, 160, 12),
372 	DB8500_GPIO_RANGE(6, 192, 32),
373 	DB8500_GPIO_RANGE(7, 224, 7),
374 	DB8500_GPIO_RANGE(8, 256, 12),
375 };
376 
377 /*
378  * Read the pin group names like this:
379  * u0_a_1    = first groups of pins for uart0 on alt function a
380  * i2c2_b_2  = second group of pins for i2c2 on alt function b
381  *
382  * The groups are arranged as sets per altfunction column, so we can
383  * mux in one group at a time by selecting the same altfunction for them
384  * all. When functions require pins on different altfunctions, you need
385  * to combine several groups.
386  */
387 
388 /* Altfunction A column */
389 static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
390 					DB8500_PIN_AH4, DB8500_PIN_AH3 };
391 static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
392 static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
393 /* Image processor I2C line, this is driven by image processor firmware */
394 static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
395 static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
396 /* MSP0 can only be on these pins, but TXD and RXD can be flipped */
397 static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
398 static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
399 static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
400 /* Basic pins of the MMC/SD card 0 interface */
401 static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
402 	DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
403 	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
404 /* Often only 4 bits are used, then these are not needed (only used for MMC) */
405 static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
406 	DB8500_PIN_V3, DB8500_PIN_V2};
407 static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };
408 /* MSP1 can only be on these pins, but TXD and RXD can be flipped */
409 static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
410 static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
411 /* LCD interface */
412 static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
413 					  DB8500_PIN_G3, DB8500_PIN_G2 };
414 static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
415 static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
416 static const unsigned lcd_d0_d7_a_1_pins[] = {
417 	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
418 	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
419 /* D8 thru D11 often used as TVOUT lines */
420 static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
421 	DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
422 static const unsigned lcd_d12_d23_a_1_pins[] = {
423 	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
424 	DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
425 	DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
426 static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
427 	DB8500_PIN_D8, DB8500_PIN_D9 };
428 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
429 static const unsigned kp_a_2_pins[] = {
430 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
431 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
432 	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
433 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
434 /* MC2 has 8 data lines and no direction control, so only for (e)MMC */
435 static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
436 	DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
437 	DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
438 	DB8500_PIN_C5 };
439 static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
440 					  DB8500_PIN_C12, DB8500_PIN_C11 };
441 static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
442 					  DB8500_PIN_C13, DB8500_PIN_D13 };
443 static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
444 /*
445  * Image processor GPIO pins are named "ipgpio" and have their own
446  * numberspace
447  */
448 static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
449 static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
450 /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
451 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
452 					   DB8500_PIN_D23 };
453 /*
454  * This MSP cannot switch RX and TX, SCK in a separate group since this
455  * seems to be optional.
456  */
457 static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
458 static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
459 					  DB8500_PIN_AG28, DB8500_PIN_AG26 };
460 static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
461 	DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
462 	DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
463 	DB8500_PIN_AJ23 };
464 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
465 static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
466 	DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
467 	DB8500_PIN_AH15 };
468 static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
469 	DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
470 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
471 	DB8500_PIN_AH12, DB8500_PIN_AH11 };
472 static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
473 	DB8500_PIN_AJ11 };
474 static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
475 	DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
476 static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
477 	DB8500_PIN_AG9, DB8500_PIN_AG8 };
478 static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
479 static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
480 static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
481 static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
482 static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
483 	DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
484 	DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
485 	DB8500_PIN_AC28, DB8500_PIN_AC27 };
486 
487 /* Altfunction B column */
488 static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
489 static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
490 static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
491 static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
492 static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
493 static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
494 static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
495 /* Just RX and TX for UART2 */
496 static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
497 static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
498 static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
499 static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
500 static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
501 	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
502 static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
503 static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
504 					  DB8500_PIN_V3, DB8500_PIN_V2 };
505 static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
506 static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
507 	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
508 	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
509 	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
510 	DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
511 	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
512 static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
513 	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
514 static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
515 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
516 	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
517 	DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
518 	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
519 	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
520 	DB8500_PIN_C9 };
521 /* This chip select pin can be "ps0" in alt C so have it separately */
522 static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
523 /* This chip select pin can be "ps1" in alt C so have it separately */
524 static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
525 static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
526 static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
527 static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
528 static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
529 static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
530 	DB8500_PIN_C23, DB8500_PIN_D23 };
531 static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
532 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
533 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
534 	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
535 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
536 static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
537 static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
538 static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
539 					  DB8500_PIN_AG13, DB8500_PIN_AH15 };
540 static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
541 	DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
542 	DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
543 	DB8500_PIN_AG8 };
544 static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
545 static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
546 static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
547 
548 /* Altfunction C column */
549 static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
550 	DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
551 static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
552 static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
553 static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
554 static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
555 static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
556 static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
557 /* Optional 4-bit Memory Stick interface */
558 static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
559 	DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
560 	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
561 static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
562 static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
563 static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
564 static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
565 					DB8500_PIN_AE2, DB8500_PIN_AG2 };
566 static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
567 static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
568 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
569 static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
570 static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
571 static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
572 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
573 static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
574 static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
575 static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
576 static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
577 static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
578 static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
579 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
580 	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
581 	DB8500_PIN_D9 };
582 static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
583 static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
584 	DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
585 	DB8500_PIN_C23, DB8500_PIN_D23 };
586 static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
587 static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
588 static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
589 static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
590 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
591 static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
592 static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
593 static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
594 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
595 static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
596 static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
597 static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
598 static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
599 static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
600 static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
601 					  DB8500_PIN_AG9, DB8500_PIN_AG8 };
602 static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
603 static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
604 
605 /* Other C1 column */
606 static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
607 static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
608 	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
609 static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
610 static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
611 static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
612 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
613 	DB8500_PIN_J2, DB8500_PIN_H1 };
614 static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
615 	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
616 	DB8500_PIN_D6, DB8500_PIN_B7 };
617 static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
618 static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
619 static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
620 static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
621 static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
622 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
623 static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
624 	DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
625 	DB8500_PIN_B24, DB8500_PIN_C22 };
626 static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
627 static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
628 	DB8500_PIN_AH12, DB8500_PIN_AH11 };
629 static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
630 	DB8500_PIN_AH11 };
631 
632 /* Other C2 column */
633 static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
634 	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
635 static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
636 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
637 	DB8500_PIN_J2, DB8500_PIN_H1 };
638 static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
639 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
640 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
641 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
642 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
643 
644 /* Other C3 column */
645 static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
646 	DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
647 static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
648 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
649 static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
650 static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
651 static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
652 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
653 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
654 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
655 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
656 
657 /* Other C4 column */
658 static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
659 	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
660 static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
661 	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
662 	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
663 	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
664 	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
665 
666 #define DB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins,		\
667 			.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
668 
669 static const struct nmk_pingroup nmk_db8500_groups[] = {
670 	/* Altfunction A column */
671 	DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
672 	DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
673 	DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
674 	DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
675 	DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
676 	DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
677 	DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
678 	DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
679 	DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
680 	DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
681 	DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
682 	DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
683 	DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
684 	DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
685 	DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
686 	DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
687 	DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
688 	DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
689 	DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
690 	DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
691 	DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
692 	DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
693 	DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
694 	DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
695 	DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
696 	DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
697 	DB8500_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
698 	DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
699 	DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
700 	DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
701 	DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
702 	DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
703 	DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
704 	DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
705 	DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
706 	DB8500_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
707 	DB8500_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
708 	DB8500_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
709 	DB8500_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
710 	DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
711 	/* Altfunction B column */
712 	DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
713 	DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
714 	DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
715 	DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
716 	DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
717 	DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
718 	DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
719 	DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
720 	DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
721 	DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
722 	DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
723 	DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
724 	DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
725 	DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
726 	DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
727 	DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
728 	DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
729 	DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
730 	DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
731 	DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
732 	DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
733 	DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
734 	DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
735 	DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
736 	DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
737 	DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
738 	DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
739 	DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
740 	DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
741 	DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
742 	DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
743 	DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
744 	DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
745 	/* Altfunction C column */
746 	DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
747 	DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
748 	DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
749 	DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
750 	DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
751 	DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
752 	DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
753 	DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
754 	DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
755 	DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
756 	DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
757 	DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
758 	DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
759 	DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
760 	DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
761 	DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
762 	DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
763 	DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
764 	DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
765 	DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
766 	DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
767 	DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
768 	DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
769 	DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
770 	DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
771 	DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
772 	DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
773 	DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
774 	DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
775 	DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
776 	DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
777 	DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
778 	DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
779 	DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
780 	DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
781 	DB8500_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
782 	DB8500_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
783 	DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
784 	DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
785 	DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
786 	DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
787 	/* Other alt C1 column */
788 	DB8500_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
789 	DB8500_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
790 	DB8500_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
791 	DB8500_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
792 	DB8500_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
793 	DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
794 	DB8500_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
795 	DB8500_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
796 	DB8500_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
797 	DB8500_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
798 	DB8500_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
799 	DB8500_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
800 	DB8500_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
801 	DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
802 	DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
803 	/* Other alt C2 column */
804 	DB8500_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
805 	DB8500_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
806 	DB8500_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
807 	/* Other alt C3 column */
808 	DB8500_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
809 	DB8500_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
810 	DB8500_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
811 	DB8500_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
812 	DB8500_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
813 	/* Other alt C4 column */
814 	DB8500_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
815 	DB8500_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
816 };
817 
818 /* We use this macro to define the groups applicable to a function */
819 #define DB8500_FUNC_GROUPS(a, b...)	   \
820 static const char * const a##_groups[] = { b };
821 
822 DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
823 DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
824 /*
825  * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
826  * only available on two pins in alternative function C
827  */
828 DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
829 		   "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
830 DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
831 /*
832  * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
833  * switched around by selecting the altfunction A or B. The SCK pin is
834  * only available on the altfunction B.
835  */
836 DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
837 		   "msp0txrx_b_1", "msp0sck_b_1");
838 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
839 /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
840 DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
841 DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
842 DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
843 	"lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");
844 DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
845 DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
846 DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
847 DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
848 DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
849 /* The image processor has 8 GPIO pins that can be muxed out */
850 DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
851 	"ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
852 	"ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
853 	"ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
854 	"ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
855 /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
856 DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
857 DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
858 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
859 DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
860 DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
861 		"clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
862 DB8500_FUNC_GROUPS(usb, "usb_a_1");
863 DB8500_FUNC_GROUPS(trig, "trig_b_1");
864 DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
865 DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
866 DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
867 /*
868  * The modem UART can output its RX and TX pins in some different places,
869  * so select one of each.
870  */
871 DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
872 		"uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
873 		"uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
874 DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
875 		"stmmod_oc3_1", "stmmod_oc3_2");
876 DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
877 /* Select between CS0 on alt B or PS1 on alt C */
878 DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
879 		   "smps0_c_1", "smps1_c_1");
880 DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
881 DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
882 DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
883 DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
884 DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
885 DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
886 DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
887 DB8500_FUNC_GROUPS(ms, "ms_c_1");
888 DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
889 DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
890 DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
891 DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
892 DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
893 DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
894 DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
895 DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
896 DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
897 DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
898 DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
899 DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
900 DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
901 DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
902 #define FUNCTION(fname)					\
903 	{						\
904 		.name = #fname,				\
905 		.groups = fname##_groups,		\
906 		.ngroups = ARRAY_SIZE(fname##_groups),	\
907 	}
908 
909 static const struct nmk_function nmk_db8500_functions[] = {
910 	FUNCTION(u0),
911 	FUNCTION(u1),
912 	FUNCTION(u2),
913 	FUNCTION(ipi2c),
914 	FUNCTION(msp0),
915 	FUNCTION(mc0),
916 	FUNCTION(msp1),
917 	FUNCTION(lcdb),
918 	FUNCTION(lcd),
919 	FUNCTION(kp),
920 	FUNCTION(mc2),
921 	FUNCTION(ssp1),
922 	FUNCTION(ssp0),
923 	FUNCTION(i2c0),
924 	FUNCTION(ipgpio),
925 	FUNCTION(msp2),
926 	FUNCTION(mc4),
927 	FUNCTION(mc1),
928 	FUNCTION(hsi),
929 	FUNCTION(clkout),
930 	FUNCTION(usb),
931 	FUNCTION(trig),
932 	FUNCTION(i2c4),
933 	FUNCTION(i2c1),
934 	FUNCTION(i2c2),
935 	FUNCTION(uartmod),
936 	FUNCTION(stmmod),
937 	FUNCTION(spi3),
938 	FUNCTION(sm),
939 	FUNCTION(lcda),
940 	FUNCTION(ddrtrig),
941 	FUNCTION(pwl),
942 	FUNCTION(spi1),
943 	FUNCTION(mc3),
944 	FUNCTION(ipjtag),
945 	FUNCTION(slim0),
946 	FUNCTION(ms),
947 	FUNCTION(iptrigout),
948 	FUNCTION(stmape),
949 	FUNCTION(mc5),
950 	FUNCTION(usbsim),
951 	FUNCTION(i2c3),
952 	FUNCTION(spi0),
953 	FUNCTION(spi2),
954 	FUNCTION(remap),
955 	FUNCTION(ptm),
956 	FUNCTION(rf),
957 	FUNCTION(hx),
958 	FUNCTION(etm),
959 	FUNCTION(hwobs),
960 };
961 
962 static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
963 	PRCM_GPIOCR_ALTCX(23,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_CLK_a */
964 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_CLK_a */
965 				false, 0, 0,
966 				false, 0, 0
967 	),
968 	PRCM_GPIOCR_ALTCX(24,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE or U2_RXD ??? */
969 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_VAL_a */
970 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
971 				false, 0, 0
972 	),
973 	PRCM_GPIOCR_ALTCX(25,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[0] */
974 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[0] */
975 				false, 0, 0,
976 				false, 0, 0
977 	),
978 	PRCM_GPIOCR_ALTCX(26,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[1] */
979 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[1] */
980 				false, 0, 0,
981 				false, 0, 0
982 	),
983 	PRCM_GPIOCR_ALTCX(27,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[2] */
984 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[2] */
985 				false, 0, 0,
986 				false, 0, 0
987 	),
988 	PRCM_GPIOCR_ALTCX(28,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[3] */
989 				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[3] */
990 				false, 0, 0,
991 				false, 0, 0
992 	),
993 	PRCM_GPIOCR_ALTCX(29,	false, 0, 0,
994 				false, 0, 0,
995 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
996 				false, 0, 0
997 	),
998 	PRCM_GPIOCR_ALTCX(30,	false, 0, 0,
999 				false, 0, 0,
1000 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1001 				false, 0, 0
1002 	),
1003 	PRCM_GPIOCR_ALTCX(31,	false, 0, 0,
1004 				false, 0, 0,
1005 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1006 				false, 0, 0
1007 	),
1008 	PRCM_GPIOCR_ALTCX(32,	false, 0, 0,
1009 				false, 0, 0,
1010 				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
1011 				false, 0, 0
1012 	),
1013 	PRCM_GPIOCR_ALTCX(68,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
1014 				false, 0, 0,
1015 				false, 0, 0,
1016 				false, 0, 0
1017 	),
1018 	PRCM_GPIOCR_ALTCX(69,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
1019 				false, 0, 0,
1020 				false, 0, 0,
1021 				false, 0, 0
1022 	),
1023 	PRCM_GPIOCR_ALTCX(70,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D23 */
1024 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1025 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1026 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_CLK */
1027 	),
1028 	PRCM_GPIOCR_ALTCX(71,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D22 */
1029 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1030 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1031 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D3 */
1032 	),
1033 	PRCM_GPIOCR_ALTCX(72,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D21 */
1034 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1035 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1036 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D2 */
1037 	),
1038 	PRCM_GPIOCR_ALTCX(73,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D20 */
1039 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1040 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1041 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D1 */
1042 	),
1043 	PRCM_GPIOCR_ALTCX(74,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D19 */
1044 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1045 				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
1046 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D0 */
1047 	),
1048 	PRCM_GPIOCR_ALTCX(75,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D18 */
1049 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1050 				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
1051 				false, 0, 0
1052 	),
1053 	PRCM_GPIOCR_ALTCX(76,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D17 */
1054 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1055 				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
1056 				false, 0, 0
1057 	),
1058 	PRCM_GPIOCR_ALTCX(77,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D16 */
1059 				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
1060 				false, 0, 0,
1061 				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_VAL */
1062 	),
1063 	PRCM_GPIOCR_ALTCX(86,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O3 */
1064 				false, 0, 0,
1065 				false, 0, 0,
1066 				false, 0, 0
1067 	),
1068 	PRCM_GPIOCR_ALTCX(87,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O2 */
1069 				false, 0, 0,
1070 				false, 0, 0,
1071 				false, 0, 0
1072 	),
1073 	PRCM_GPIOCR_ALTCX(88,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I3 */
1074 				false, 0, 0,
1075 				false, 0, 0,
1076 				false, 0, 0
1077 	),
1078 	PRCM_GPIOCR_ALTCX(89,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I2 */
1079 				false, 0, 0,
1080 				false, 0, 0,
1081 				false, 0, 0
1082 	),
1083 	PRCM_GPIOCR_ALTCX(90,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O1 */
1084 				false, 0, 0,
1085 				false, 0, 0,
1086 				false, 0, 0
1087 	),
1088 	PRCM_GPIOCR_ALTCX(91,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O0 */
1089 				false, 0, 0,
1090 				false, 0, 0,
1091 				false, 0, 0
1092 	),
1093 	PRCM_GPIOCR_ALTCX(92,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I1 */
1094 				false, 0, 0,
1095 				false, 0, 0,
1096 				false, 0, 0
1097 	),
1098 	PRCM_GPIOCR_ALTCX(93,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I0 */
1099 				false, 0, 0,
1100 				false, 0, 0,
1101 				false, 0, 0
1102 	),
1103 	PRCM_GPIOCR_ALTCX(96,	true, PRCM_IDX_GPIOCR2, 3,	/* RF_INT */
1104 				false, 0, 0,
1105 				false, 0, 0,
1106 				false, 0, 0
1107 	),
1108 	PRCM_GPIOCR_ALTCX(97,	true, PRCM_IDX_GPIOCR2, 1,	/* RF_CTRL */
1109 				false, 0, 0,
1110 				false, 0, 0,
1111 				false, 0, 0
1112 	),
1113 	PRCM_GPIOCR_ALTCX(151,	false, 0, 0,
1114 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CTL */
1115 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1116 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS17 */
1117 	),
1118 	PRCM_GPIOCR_ALTCX(152,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_CLK */
1119 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CLK */
1120 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1121 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS16 */
1122 	),
1123 	PRCM_GPIOCR_ALTCX(153,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
1124 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D15 */
1125 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1126 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS15 */
1127 	),
1128 	PRCM_GPIOCR_ALTCX(154,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
1129 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D14 */
1130 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1131 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS14 */
1132 	),
1133 	PRCM_GPIOCR_ALTCX(155,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1134 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D13 */
1135 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1136 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS13 */
1137 	),
1138 	PRCM_GPIOCR_ALTCX(156,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1139 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D12 */
1140 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1141 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS12 */
1142 	),
1143 	PRCM_GPIOCR_ALTCX(157,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1144 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D11 */
1145 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1146 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS11 */
1147 	),
1148 	PRCM_GPIOCR_ALTCX(158,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1149 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D10 */
1150 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1151 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS10 */
1152 	),
1153 	PRCM_GPIOCR_ALTCX(159,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
1154 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D9 */
1155 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1156 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS9 */
1157 	),
1158 	PRCM_GPIOCR_ALTCX(160,	false, 0, 0,
1159 				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D8 */
1160 				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
1161 				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS8 */
1162 	),
1163 	PRCM_GPIOCR_ALTCX(161,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO7 */
1164 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D7 */
1165 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1166 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS7 */
1167 	),
1168 	PRCM_GPIOCR_ALTCX(162,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO6 */
1169 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D6 */
1170 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1171 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS6 */
1172 	),
1173 	PRCM_GPIOCR_ALTCX(163,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO5 */
1174 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D5 */
1175 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1176 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS5 */
1177 	),
1178 	PRCM_GPIOCR_ALTCX(164,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO4 */
1179 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D4 */
1180 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1181 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS4 */
1182 	),
1183 	PRCM_GPIOCR_ALTCX(165,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO3 */
1184 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D3 */
1185 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1186 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS3 */
1187 	),
1188 	PRCM_GPIOCR_ALTCX(166,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO2 */
1189 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D2 */
1190 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1191 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS2 */
1192 	),
1193 	PRCM_GPIOCR_ALTCX(167,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO1 */
1194 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D1 */
1195 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1196 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS1 */
1197 	),
1198 	PRCM_GPIOCR_ALTCX(168,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO0 */
1199 				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D0 */
1200 				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
1201 				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS0 */
1202 	),
1203 	PRCM_GPIOCR_ALTCX(170,	true, PRCM_IDX_GPIOCR2, 2,	/* RF_INT */
1204 				false, 0, 0,
1205 				false, 0, 0,
1206 				false, 0, 0
1207 	),
1208 	PRCM_GPIOCR_ALTCX(171,	true, PRCM_IDX_GPIOCR2, 0,	/* RF_CTRL */
1209 				false, 0, 0,
1210 				false, 0, 0,
1211 				false, 0, 0
1212 	),
1213 	PRCM_GPIOCR_ALTCX(215,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_TXD */
1214 				false, 0, 0,
1215 				false, 0, 0,
1216 				false, 0, 0
1217 	),
1218 	PRCM_GPIOCR_ALTCX(216,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_FRM */
1219 				false, 0, 0,
1220 				false, 0, 0,
1221 				false, 0, 0
1222 	),
1223 	PRCM_GPIOCR_ALTCX(217,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_CLK */
1224 				false, 0, 0,
1225 				false, 0, 0,
1226 				false, 0, 0
1227 	),
1228 	PRCM_GPIOCR_ALTCX(218,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_RXD */
1229 				false, 0, 0,
1230 				false, 0, 0,
1231 				false, 0, 0
1232 	),
1233 };
1234 
1235 static const u16 db8500_prcm_gpiocr_regs[] = {
1236 	[PRCM_IDX_GPIOCR1] = 0x138,
1237 	[PRCM_IDX_GPIOCR2] = 0x574,
1238 };
1239 
1240 static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
1241 	.gpio_ranges = nmk_db8500_ranges,
1242 	.gpio_num_ranges = ARRAY_SIZE(nmk_db8500_ranges),
1243 	.pins = nmk_db8500_pins,
1244 	.npins = ARRAY_SIZE(nmk_db8500_pins),
1245 	.functions = nmk_db8500_functions,
1246 	.nfunctions = ARRAY_SIZE(nmk_db8500_functions),
1247 	.groups = nmk_db8500_groups,
1248 	.ngroups = ARRAY_SIZE(nmk_db8500_groups),
1249 	.altcx_pins = db8500_altcx_pins,
1250 	.npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
1251 	.prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
1252 };
1253 
1254 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
1255 {
1256 	*soc = &nmk_db8500_soc;
1257 }
1258