1 /* 2 * Copyright (C) ST-Ericsson SA 2013 3 * 4 * Author: Patrice Chotard <patrice.chotard@st.com> 5 * License terms: GNU General Public License (GPL) version 2 6 * 7 * Driver allows to use AxB5xx unused pins to be used as GPIO 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/slab.h> 16 #include <linux/init.h> 17 #include <linux/err.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/platform_device.h> 21 #include <linux/gpio.h> 22 #include <linux/irq.h> 23 #include <linux/irqdomain.h> 24 #include <linux/interrupt.h> 25 #include <linux/bitops.h> 26 #include <linux/mfd/abx500.h> 27 #include <linux/mfd/abx500/ab8500.h> 28 #include <linux/pinctrl/pinctrl.h> 29 #include <linux/pinctrl/consumer.h> 30 #include <linux/pinctrl/pinmux.h> 31 #include <linux/pinctrl/pinconf.h> 32 #include <linux/pinctrl/pinconf-generic.h> 33 #include <linux/pinctrl/machine.h> 34 35 #include "pinctrl-abx500.h" 36 #include "../core.h" 37 #include "../pinconf.h" 38 #include "../pinctrl-utils.h" 39 40 /* 41 * GPIO registers offset 42 * Bank: 0x10 43 */ 44 #define AB8500_GPIO_SEL1_REG 0x00 45 #define AB8500_GPIO_SEL2_REG 0x01 46 #define AB8500_GPIO_SEL3_REG 0x02 47 #define AB8500_GPIO_SEL4_REG 0x03 48 #define AB8500_GPIO_SEL5_REG 0x04 49 #define AB8500_GPIO_SEL6_REG 0x05 50 51 #define AB8500_GPIO_DIR1_REG 0x10 52 #define AB8500_GPIO_DIR2_REG 0x11 53 #define AB8500_GPIO_DIR3_REG 0x12 54 #define AB8500_GPIO_DIR4_REG 0x13 55 #define AB8500_GPIO_DIR5_REG 0x14 56 #define AB8500_GPIO_DIR6_REG 0x15 57 58 #define AB8500_GPIO_OUT1_REG 0x20 59 #define AB8500_GPIO_OUT2_REG 0x21 60 #define AB8500_GPIO_OUT3_REG 0x22 61 #define AB8500_GPIO_OUT4_REG 0x23 62 #define AB8500_GPIO_OUT5_REG 0x24 63 #define AB8500_GPIO_OUT6_REG 0x25 64 65 #define AB8500_GPIO_PUD1_REG 0x30 66 #define AB8500_GPIO_PUD2_REG 0x31 67 #define AB8500_GPIO_PUD3_REG 0x32 68 #define AB8500_GPIO_PUD4_REG 0x33 69 #define AB8500_GPIO_PUD5_REG 0x34 70 #define AB8500_GPIO_PUD6_REG 0x35 71 72 #define AB8500_GPIO_IN1_REG 0x40 73 #define AB8500_GPIO_IN2_REG 0x41 74 #define AB8500_GPIO_IN3_REG 0x42 75 #define AB8500_GPIO_IN4_REG 0x43 76 #define AB8500_GPIO_IN5_REG 0x44 77 #define AB8500_GPIO_IN6_REG 0x45 78 #define AB8500_GPIO_ALTFUN_REG 0x50 79 80 #define ABX500_GPIO_INPUT 0 81 #define ABX500_GPIO_OUTPUT 1 82 83 struct abx500_pinctrl { 84 struct device *dev; 85 struct pinctrl_dev *pctldev; 86 struct abx500_pinctrl_soc_data *soc; 87 struct gpio_chip chip; 88 struct ab8500 *parent; 89 struct abx500_gpio_irq_cluster *irq_cluster; 90 int irq_cluster_size; 91 }; 92 93 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, 94 unsigned offset, bool *bit) 95 { 96 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 97 u8 pos = offset % 8; 98 u8 val; 99 int ret; 100 101 reg += offset / 8; 102 ret = abx500_get_register_interruptible(pct->dev, 103 AB8500_MISC, reg, &val); 104 105 *bit = !!(val & BIT(pos)); 106 107 if (ret < 0) 108 dev_err(pct->dev, 109 "%s read reg =%x, offset=%x failed (%d)\n", 110 __func__, reg, offset, ret); 111 112 return ret; 113 } 114 115 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, 116 unsigned offset, int val) 117 { 118 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 119 u8 pos = offset % 8; 120 int ret; 121 122 reg += offset / 8; 123 ret = abx500_mask_and_set_register_interruptible(pct->dev, 124 AB8500_MISC, reg, BIT(pos), val << pos); 125 if (ret < 0) 126 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n", 127 __func__, reg, offset, ret); 128 129 return ret; 130 } 131 132 /** 133 * abx500_gpio_get() - Get the particular GPIO value 134 * @chip: Gpio device 135 * @offset: GPIO number to read 136 */ 137 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) 138 { 139 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 140 bool bit; 141 bool is_out; 142 u8 gpio_offset = offset - 1; 143 int ret; 144 145 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 146 gpio_offset, &is_out); 147 if (ret < 0) 148 goto out; 149 150 if (is_out) 151 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG, 152 gpio_offset, &bit); 153 else 154 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG, 155 gpio_offset, &bit); 156 out: 157 if (ret < 0) { 158 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 159 return ret; 160 } 161 162 return bit; 163 } 164 165 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 166 { 167 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 168 int ret; 169 170 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 171 if (ret < 0) 172 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret); 173 } 174 175 static int abx500_gpio_direction_output(struct gpio_chip *chip, 176 unsigned offset, 177 int val) 178 { 179 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 180 int ret; 181 182 /* set direction as output */ 183 ret = abx500_gpio_set_bits(chip, 184 AB8500_GPIO_DIR1_REG, 185 offset, 186 ABX500_GPIO_OUTPUT); 187 if (ret < 0) 188 goto out; 189 190 /* disable pull down */ 191 ret = abx500_gpio_set_bits(chip, 192 AB8500_GPIO_PUD1_REG, 193 offset, 194 ABX500_GPIO_PULL_NONE); 195 196 out: 197 if (ret < 0) { 198 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 199 return ret; 200 } 201 202 /* set the output as 1 or 0 */ 203 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 204 } 205 206 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 207 { 208 /* set the register as input */ 209 return abx500_gpio_set_bits(chip, 210 AB8500_GPIO_DIR1_REG, 211 offset, 212 ABX500_GPIO_INPUT); 213 } 214 215 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 216 { 217 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 218 /* The AB8500 GPIO numbers are off by one */ 219 int gpio = offset + 1; 220 int hwirq; 221 int i; 222 223 for (i = 0; i < pct->irq_cluster_size; i++) { 224 struct abx500_gpio_irq_cluster *cluster = 225 &pct->irq_cluster[i]; 226 227 if (gpio >= cluster->start && gpio <= cluster->end) { 228 /* 229 * The ABx500 GPIO's associated IRQs are clustered together 230 * throughout the interrupt numbers at irregular intervals. 231 * To solve this quandry, we have placed the read-in values 232 * into the cluster information table. 233 */ 234 hwirq = gpio - cluster->start + cluster->to_irq; 235 return irq_create_mapping(pct->parent->domain, hwirq); 236 } 237 } 238 239 return -EINVAL; 240 } 241 242 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 243 unsigned gpio, int alt_setting) 244 { 245 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 246 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 247 int ret; 248 int val; 249 unsigned offset; 250 251 const char *modes[] = { 252 [ABX500_DEFAULT] = "default", 253 [ABX500_ALT_A] = "altA", 254 [ABX500_ALT_B] = "altB", 255 [ABX500_ALT_C] = "altC", 256 }; 257 258 /* sanity check */ 259 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) || 260 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) || 261 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) { 262 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio, 263 modes[alt_setting]); 264 return -EINVAL; 265 } 266 267 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 268 offset = gpio - 1; 269 270 switch (alt_setting) { 271 case ABX500_DEFAULT: 272 /* 273 * for ABx5xx family, default mode is always selected by 274 * writing 0 to GPIOSELx register, except for pins which 275 * support at least ALT_B mode, default mode is selected 276 * by writing 1 to GPIOSELx register 277 */ 278 val = 0; 279 if (af.alt_bit1 != UNUSED) 280 val++; 281 282 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 283 offset, val); 284 break; 285 286 case ABX500_ALT_A: 287 /* 288 * for ABx5xx family, alt_a mode is always selected by 289 * writing 1 to GPIOSELx register, except for pins which 290 * support at least ALT_B mode, alt_a mode is selected 291 * by writing 0 to GPIOSELx register and 0 in ALTFUNC 292 * register 293 */ 294 if (af.alt_bit1 != UNUSED) { 295 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 296 offset, 0); 297 if (ret < 0) 298 goto out; 299 300 ret = abx500_gpio_set_bits(chip, 301 AB8500_GPIO_ALTFUN_REG, 302 af.alt_bit1, 303 !!(af.alta_val & BIT(0))); 304 if (ret < 0) 305 goto out; 306 307 if (af.alt_bit2 != UNUSED) 308 ret = abx500_gpio_set_bits(chip, 309 AB8500_GPIO_ALTFUN_REG, 310 af.alt_bit2, 311 !!(af.alta_val & BIT(1))); 312 } else 313 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 314 offset, 1); 315 break; 316 317 case ABX500_ALT_B: 318 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 319 offset, 0); 320 if (ret < 0) 321 goto out; 322 323 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 324 af.alt_bit1, !!(af.altb_val & BIT(0))); 325 if (ret < 0) 326 goto out; 327 328 if (af.alt_bit2 != UNUSED) 329 ret = abx500_gpio_set_bits(chip, 330 AB8500_GPIO_ALTFUN_REG, 331 af.alt_bit2, 332 !!(af.altb_val & BIT(1))); 333 break; 334 335 case ABX500_ALT_C: 336 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 337 offset, 0); 338 if (ret < 0) 339 goto out; 340 341 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 342 af.alt_bit2, !!(af.altc_val & BIT(0))); 343 if (ret < 0) 344 goto out; 345 346 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 347 af.alt_bit2, !!(af.altc_val & BIT(1))); 348 break; 349 350 default: 351 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting); 352 353 return -EINVAL; 354 } 355 out: 356 if (ret < 0) 357 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 358 359 return ret; 360 } 361 362 #ifdef CONFIG_DEBUG_FS 363 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 364 unsigned gpio) 365 { 366 u8 mode; 367 bool bit_mode; 368 bool alt_bit1; 369 bool alt_bit2; 370 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 371 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 372 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 373 unsigned offset = gpio - 1; 374 int ret; 375 376 /* 377 * if gpiosel_bit is set to unused, 378 * it means no GPIO or special case 379 */ 380 if (af.gpiosel_bit == UNUSED) 381 return ABX500_DEFAULT; 382 383 /* read GpioSelx register */ 384 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), 385 af.gpiosel_bit, &bit_mode); 386 if (ret < 0) 387 goto out; 388 389 mode = bit_mode; 390 391 /* sanity check */ 392 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) || 393 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) { 394 dev_err(pct->dev, 395 "alt_bitX value not in correct range (-1 to 7)\n"); 396 return -EINVAL; 397 } 398 399 /* if alt_bit2 is used, alt_bit1 must be used too */ 400 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) { 401 dev_err(pct->dev, 402 "if alt_bit2 is used, alt_bit1 can't be unused\n"); 403 return -EINVAL; 404 } 405 406 /* check if pin use AlternateFunction register */ 407 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) 408 return mode; 409 /* 410 * if pin GPIOSEL bit is set and pin supports alternate function, 411 * it means DEFAULT mode 412 */ 413 if (mode) 414 return ABX500_DEFAULT; 415 416 /* 417 * pin use the AlternatFunction register 418 * read alt_bit1 value 419 */ 420 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 421 af.alt_bit1, &alt_bit1); 422 if (ret < 0) 423 goto out; 424 425 if (af.alt_bit2 != UNUSED) { 426 /* read alt_bit2 value */ 427 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 428 af.alt_bit2, 429 &alt_bit2); 430 if (ret < 0) 431 goto out; 432 } else 433 alt_bit2 = 0; 434 435 mode = (alt_bit2 << 1) + alt_bit1; 436 if (mode == af.alta_val) 437 return ABX500_ALT_A; 438 else if (mode == af.altb_val) 439 return ABX500_ALT_B; 440 else 441 return ABX500_ALT_C; 442 443 out: 444 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 445 return ret; 446 } 447 448 #include <linux/seq_file.h> 449 450 static void abx500_gpio_dbg_show_one(struct seq_file *s, 451 struct pinctrl_dev *pctldev, 452 struct gpio_chip *chip, 453 unsigned offset, unsigned gpio) 454 { 455 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 456 const char *label = gpiochip_is_requested(chip, offset - 1); 457 u8 gpio_offset = offset - 1; 458 int mode = -1; 459 bool is_out; 460 bool pd; 461 int ret; 462 463 const char *modes[] = { 464 [ABX500_DEFAULT] = "default", 465 [ABX500_ALT_A] = "altA", 466 [ABX500_ALT_B] = "altB", 467 [ABX500_ALT_C] = "altC", 468 }; 469 470 const char *pull_up_down[] = { 471 [ABX500_GPIO_PULL_DOWN] = "pull down", 472 [ABX500_GPIO_PULL_NONE] = "pull none", 473 [ABX500_GPIO_PULL_NONE + 1] = "pull none", 474 [ABX500_GPIO_PULL_UP] = "pull up", 475 }; 476 477 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 478 gpio_offset, &is_out); 479 if (ret < 0) 480 goto out; 481 482 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s", 483 gpio, label ?: "(none)", 484 is_out ? "out" : "in "); 485 486 if (!is_out) { 487 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG, 488 gpio_offset, &pd); 489 if (ret < 0) 490 goto out; 491 492 seq_printf(s, " %-9s", pull_up_down[pd]); 493 } else 494 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo"); 495 496 mode = abx500_get_mode(pctldev, chip, offset); 497 498 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]); 499 500 out: 501 if (ret < 0) 502 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 503 } 504 505 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 506 { 507 unsigned i; 508 unsigned gpio = chip->base; 509 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 510 struct pinctrl_dev *pctldev = pct->pctldev; 511 512 for (i = 0; i < chip->ngpio; i++, gpio++) { 513 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */ 514 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio); 515 seq_putc(s, '\n'); 516 } 517 } 518 519 #else 520 static inline void abx500_gpio_dbg_show_one(struct seq_file *s, 521 struct pinctrl_dev *pctldev, 522 struct gpio_chip *chip, 523 unsigned offset, unsigned gpio) 524 { 525 } 526 #define abx500_gpio_dbg_show NULL 527 #endif 528 529 static const struct gpio_chip abx500gpio_chip = { 530 .label = "abx500-gpio", 531 .owner = THIS_MODULE, 532 .request = gpiochip_generic_request, 533 .free = gpiochip_generic_free, 534 .direction_input = abx500_gpio_direction_input, 535 .get = abx500_gpio_get, 536 .direction_output = abx500_gpio_direction_output, 537 .set = abx500_gpio_set, 538 .to_irq = abx500_gpio_to_irq, 539 .dbg_show = abx500_gpio_dbg_show, 540 }; 541 542 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 543 { 544 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 545 546 return pct->soc->nfunctions; 547 } 548 549 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev, 550 unsigned function) 551 { 552 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 553 554 return pct->soc->functions[function].name; 555 } 556 557 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev, 558 unsigned function, 559 const char * const **groups, 560 unsigned * const num_groups) 561 { 562 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 563 564 *groups = pct->soc->functions[function].groups; 565 *num_groups = pct->soc->functions[function].ngroups; 566 567 return 0; 568 } 569 570 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function, 571 unsigned group) 572 { 573 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 574 struct gpio_chip *chip = &pct->chip; 575 const struct abx500_pingroup *g; 576 int i; 577 int ret = 0; 578 579 g = &pct->soc->groups[group]; 580 if (g->altsetting < 0) 581 return -EINVAL; 582 583 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins); 584 585 for (i = 0; i < g->npins; i++) { 586 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n", 587 g->pins[i], g->altsetting); 588 589 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting); 590 } 591 592 if (ret < 0) 593 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 594 595 return ret; 596 } 597 598 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev, 599 struct pinctrl_gpio_range *range, 600 unsigned offset) 601 { 602 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 603 const struct abx500_pinrange *p; 604 int ret; 605 int i; 606 607 /* 608 * Different ranges have different ways to enable GPIO function on a 609 * pin, so refer back to our local range type, where we handily define 610 * what altfunc enables GPIO for a certain pin. 611 */ 612 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 613 p = &pct->soc->gpio_ranges[i]; 614 if ((offset >= p->offset) && 615 (offset < (p->offset + p->npins))) 616 break; 617 } 618 619 if (i == pct->soc->gpio_num_ranges) { 620 dev_err(pct->dev, "%s failed to locate range\n", __func__); 621 return -ENODEV; 622 } 623 624 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n", 625 p->altfunc, offset); 626 627 ret = abx500_set_mode(pct->pctldev, &pct->chip, 628 offset, p->altfunc); 629 if (ret < 0) 630 dev_err(pct->dev, "%s setting altfunc failed\n", __func__); 631 632 return ret; 633 } 634 635 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, 636 struct pinctrl_gpio_range *range, 637 unsigned offset) 638 { 639 } 640 641 static const struct pinmux_ops abx500_pinmux_ops = { 642 .get_functions_count = abx500_pmx_get_funcs_cnt, 643 .get_function_name = abx500_pmx_get_func_name, 644 .get_function_groups = abx500_pmx_get_func_groups, 645 .set_mux = abx500_pmx_set, 646 .gpio_request_enable = abx500_gpio_request_enable, 647 .gpio_disable_free = abx500_gpio_disable_free, 648 }; 649 650 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) 651 { 652 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 653 654 return pct->soc->ngroups; 655 } 656 657 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev, 658 unsigned selector) 659 { 660 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 661 662 return pct->soc->groups[selector].name; 663 } 664 665 static int abx500_get_group_pins(struct pinctrl_dev *pctldev, 666 unsigned selector, 667 const unsigned **pins, 668 unsigned *num_pins) 669 { 670 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 671 672 *pins = pct->soc->groups[selector].pins; 673 *num_pins = pct->soc->groups[selector].npins; 674 675 return 0; 676 } 677 678 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, 679 struct seq_file *s, unsigned offset) 680 { 681 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 682 struct gpio_chip *chip = &pct->chip; 683 684 abx500_gpio_dbg_show_one(s, pctldev, chip, offset, 685 chip->base + offset - 1); 686 } 687 688 static int abx500_dt_add_map_mux(struct pinctrl_map **map, 689 unsigned *reserved_maps, 690 unsigned *num_maps, const char *group, 691 const char *function) 692 { 693 if (*num_maps == *reserved_maps) 694 return -ENOSPC; 695 696 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 697 (*map)[*num_maps].data.mux.group = group; 698 (*map)[*num_maps].data.mux.function = function; 699 (*num_maps)++; 700 701 return 0; 702 } 703 704 static int abx500_dt_add_map_configs(struct pinctrl_map **map, 705 unsigned *reserved_maps, 706 unsigned *num_maps, const char *group, 707 unsigned long *configs, unsigned num_configs) 708 { 709 unsigned long *dup_configs; 710 711 if (*num_maps == *reserved_maps) 712 return -ENOSPC; 713 714 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 715 GFP_KERNEL); 716 if (!dup_configs) 717 return -ENOMEM; 718 719 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN; 720 721 (*map)[*num_maps].data.configs.group_or_pin = group; 722 (*map)[*num_maps].data.configs.configs = dup_configs; 723 (*map)[*num_maps].data.configs.num_configs = num_configs; 724 (*num_maps)++; 725 726 return 0; 727 } 728 729 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev, 730 const char *pin_name) 731 { 732 int i, pin_number; 733 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); 734 735 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) 736 for (i = 0; i < npct->soc->npins; i++) 737 if (npct->soc->pins[i].number == pin_number) 738 return npct->soc->pins[i].name; 739 return NULL; 740 } 741 742 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev, 743 struct device_node *np, 744 struct pinctrl_map **map, 745 unsigned *reserved_maps, 746 unsigned *num_maps) 747 { 748 int ret; 749 const char *function = NULL; 750 unsigned long *configs; 751 unsigned int nconfigs = 0; 752 struct property *prop; 753 754 ret = of_property_read_string(np, "function", &function); 755 if (ret >= 0) { 756 const char *group; 757 758 ret = of_property_count_strings(np, "groups"); 759 if (ret < 0) 760 goto exit; 761 762 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, 763 num_maps, ret); 764 if (ret < 0) 765 goto exit; 766 767 of_property_for_each_string(np, "groups", prop, group) { 768 ret = abx500_dt_add_map_mux(map, reserved_maps, 769 num_maps, group, function); 770 if (ret < 0) 771 goto exit; 772 } 773 } 774 775 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs); 776 if (nconfigs) { 777 const char *gpio_name; 778 const char *pin; 779 780 ret = of_property_count_strings(np, "pins"); 781 if (ret < 0) 782 goto exit; 783 784 ret = pinctrl_utils_reserve_map(pctldev, map, 785 reserved_maps, 786 num_maps, ret); 787 if (ret < 0) 788 goto exit; 789 790 of_property_for_each_string(np, "pins", prop, pin) { 791 gpio_name = abx500_find_pin_name(pctldev, pin); 792 793 ret = abx500_dt_add_map_configs(map, reserved_maps, 794 num_maps, gpio_name, configs, 1); 795 if (ret < 0) 796 goto exit; 797 } 798 } 799 800 exit: 801 return ret; 802 } 803 804 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev, 805 struct device_node *np_config, 806 struct pinctrl_map **map, unsigned *num_maps) 807 { 808 unsigned reserved_maps; 809 struct device_node *np; 810 int ret; 811 812 reserved_maps = 0; 813 *map = NULL; 814 *num_maps = 0; 815 816 for_each_child_of_node(np_config, np) { 817 ret = abx500_dt_subnode_to_map(pctldev, np, map, 818 &reserved_maps, num_maps); 819 if (ret < 0) { 820 pinctrl_utils_free_map(pctldev, *map, *num_maps); 821 return ret; 822 } 823 } 824 825 return 0; 826 } 827 828 static const struct pinctrl_ops abx500_pinctrl_ops = { 829 .get_groups_count = abx500_get_groups_cnt, 830 .get_group_name = abx500_get_group_name, 831 .get_group_pins = abx500_get_group_pins, 832 .pin_dbg_show = abx500_pin_dbg_show, 833 .dt_node_to_map = abx500_dt_node_to_map, 834 .dt_free_map = pinctrl_utils_free_map, 835 }; 836 837 static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 838 unsigned pin, 839 unsigned long *config) 840 { 841 return -ENOSYS; 842 } 843 844 static int abx500_pin_config_set(struct pinctrl_dev *pctldev, 845 unsigned pin, 846 unsigned long *configs, 847 unsigned num_configs) 848 { 849 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 850 struct gpio_chip *chip = &pct->chip; 851 unsigned offset; 852 int ret = -EINVAL; 853 int i; 854 enum pin_config_param param; 855 enum pin_config_param argument; 856 857 for (i = 0; i < num_configs; i++) { 858 param = pinconf_to_config_param(configs[i]); 859 argument = pinconf_to_config_argument(configs[i]); 860 861 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n", 862 pin, configs[i], 863 (param == PIN_CONFIG_OUTPUT) ? "output " : "input", 864 (param == PIN_CONFIG_OUTPUT) ? 865 (argument ? "high" : "low") : 866 (argument ? "pull up" : "pull down")); 867 868 /* on ABx500, there is no GPIO0, so adjust the offset */ 869 offset = pin - 1; 870 871 switch (param) { 872 case PIN_CONFIG_BIAS_DISABLE: 873 ret = abx500_gpio_direction_input(chip, offset); 874 if (ret < 0) 875 goto out; 876 877 /* Chip only supports pull down */ 878 ret = abx500_gpio_set_bits(chip, 879 AB8500_GPIO_PUD1_REG, offset, 880 ABX500_GPIO_PULL_NONE); 881 break; 882 883 case PIN_CONFIG_BIAS_PULL_DOWN: 884 ret = abx500_gpio_direction_input(chip, offset); 885 if (ret < 0) 886 goto out; 887 /* 888 * if argument = 1 set the pull down 889 * else clear the pull down 890 * Chip only supports pull down 891 */ 892 ret = abx500_gpio_set_bits(chip, 893 AB8500_GPIO_PUD1_REG, 894 offset, 895 argument ? ABX500_GPIO_PULL_DOWN : 896 ABX500_GPIO_PULL_NONE); 897 break; 898 899 case PIN_CONFIG_BIAS_PULL_UP: 900 ret = abx500_gpio_direction_input(chip, offset); 901 if (ret < 0) 902 goto out; 903 /* 904 * if argument = 1 set the pull up 905 * else clear the pull up 906 */ 907 ret = abx500_gpio_direction_input(chip, offset); 908 break; 909 910 case PIN_CONFIG_OUTPUT: 911 ret = abx500_gpio_direction_output(chip, offset, 912 argument); 913 break; 914 915 default: 916 dev_err(chip->parent, 917 "illegal configuration requested\n"); 918 } 919 } /* for each config */ 920 out: 921 if (ret < 0) 922 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 923 924 return ret; 925 } 926 927 static const struct pinconf_ops abx500_pinconf_ops = { 928 .pin_config_get = abx500_pin_config_get, 929 .pin_config_set = abx500_pin_config_set, 930 .is_generic = true, 931 }; 932 933 static struct pinctrl_desc abx500_pinctrl_desc = { 934 .name = "pinctrl-abx500", 935 .pctlops = &abx500_pinctrl_ops, 936 .pmxops = &abx500_pinmux_ops, 937 .confops = &abx500_pinconf_ops, 938 .owner = THIS_MODULE, 939 }; 940 941 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) 942 { 943 unsigned int lowest = 0; 944 unsigned int highest = 0; 945 unsigned int npins = 0; 946 int i; 947 948 /* 949 * Compute number of GPIOs from the last SoC gpio range descriptors 950 * These ranges may include "holes" but the GPIO number space shall 951 * still be homogeneous, so we need to detect and account for any 952 * such holes so that these are included in the number of GPIO pins. 953 */ 954 for (i = 0; i < soc->gpio_num_ranges; i++) { 955 unsigned gstart; 956 unsigned gend; 957 const struct abx500_pinrange *p; 958 959 p = &soc->gpio_ranges[i]; 960 gstart = p->offset; 961 gend = p->offset + p->npins - 1; 962 963 if (i == 0) { 964 /* First iteration, set start values */ 965 lowest = gstart; 966 highest = gend; 967 } else { 968 if (gstart < lowest) 969 lowest = gstart; 970 if (gend > highest) 971 highest = gend; 972 } 973 } 974 /* this gives the absolute number of pins */ 975 npins = highest - lowest + 1; 976 return npins; 977 } 978 979 static const struct of_device_id abx500_gpio_match[] = { 980 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, }, 981 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, 982 { } 983 }; 984 985 static int abx500_gpio_probe(struct platform_device *pdev) 986 { 987 struct device_node *np = pdev->dev.of_node; 988 const struct of_device_id *match; 989 struct abx500_pinctrl *pct; 990 unsigned int id = -1; 991 int ret; 992 int i; 993 994 if (!np) { 995 dev_err(&pdev->dev, "gpio dt node missing\n"); 996 return -ENODEV; 997 } 998 999 pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL); 1000 if (!pct) 1001 return -ENOMEM; 1002 1003 pct->dev = &pdev->dev; 1004 pct->parent = dev_get_drvdata(pdev->dev.parent); 1005 pct->chip = abx500gpio_chip; 1006 pct->chip.parent = &pdev->dev; 1007 pct->chip.base = -1; /* Dynamic allocation */ 1008 1009 match = of_match_device(abx500_gpio_match, &pdev->dev); 1010 if (!match) { 1011 dev_err(&pdev->dev, "gpio dt not matching\n"); 1012 return -ENODEV; 1013 } 1014 id = (unsigned long)match->data; 1015 1016 /* Poke in other ASIC variants here */ 1017 switch (id) { 1018 case PINCTRL_AB8500: 1019 abx500_pinctrl_ab8500_init(&pct->soc); 1020 break; 1021 case PINCTRL_AB8505: 1022 abx500_pinctrl_ab8505_init(&pct->soc); 1023 break; 1024 default: 1025 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id); 1026 return -EINVAL; 1027 } 1028 1029 if (!pct->soc) { 1030 dev_err(&pdev->dev, "Invalid SOC data\n"); 1031 return -EINVAL; 1032 } 1033 1034 pct->chip.ngpio = abx500_get_gpio_num(pct->soc); 1035 pct->irq_cluster = pct->soc->gpio_irq_cluster; 1036 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; 1037 1038 ret = gpiochip_add_data(&pct->chip, pct); 1039 if (ret) { 1040 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 1041 return ret; 1042 } 1043 dev_info(&pdev->dev, "added gpiochip\n"); 1044 1045 abx500_pinctrl_desc.pins = pct->soc->pins; 1046 abx500_pinctrl_desc.npins = pct->soc->npins; 1047 pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc, 1048 pct); 1049 if (IS_ERR(pct->pctldev)) { 1050 dev_err(&pdev->dev, 1051 "could not register abx500 pinctrl driver\n"); 1052 ret = PTR_ERR(pct->pctldev); 1053 goto out_rem_chip; 1054 } 1055 dev_info(&pdev->dev, "registered pin controller\n"); 1056 1057 /* We will handle a range of GPIO pins */ 1058 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 1059 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; 1060 1061 ret = gpiochip_add_pin_range(&pct->chip, 1062 dev_name(&pdev->dev), 1063 p->offset - 1, p->offset, p->npins); 1064 if (ret < 0) 1065 goto out_rem_chip; 1066 } 1067 1068 platform_set_drvdata(pdev, pct); 1069 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n"); 1070 1071 return 0; 1072 1073 out_rem_chip: 1074 gpiochip_remove(&pct->chip); 1075 return ret; 1076 } 1077 1078 /** 1079 * abx500_gpio_remove() - remove Ab8500-gpio driver 1080 * @pdev: Platform device registered 1081 */ 1082 static int abx500_gpio_remove(struct platform_device *pdev) 1083 { 1084 struct abx500_pinctrl *pct = platform_get_drvdata(pdev); 1085 1086 gpiochip_remove(&pct->chip); 1087 return 0; 1088 } 1089 1090 static struct platform_driver abx500_gpio_driver = { 1091 .driver = { 1092 .name = "abx500-gpio", 1093 .of_match_table = abx500_gpio_match, 1094 }, 1095 .probe = abx500_gpio_probe, 1096 .remove = abx500_gpio_remove, 1097 }; 1098 1099 static int __init abx500_gpio_init(void) 1100 { 1101 return platform_driver_register(&abx500_gpio_driver); 1102 } 1103 core_initcall(abx500_gpio_init); 1104