1 /* 2 * Copyright (C) ST-Ericsson SA 2013 3 * 4 * Author: Patrice Chotard <patrice.chotard@st.com> 5 * License terms: GNU General Public License (GPL) version 2 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/kernel.h> 12 #include <linux/types.h> 13 #include <linux/slab.h> 14 #include <linux/init.h> 15 #include <linux/module.h> 16 #include <linux/err.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/gpio.h> 21 #include <linux/irq.h> 22 #include <linux/irqdomain.h> 23 #include <linux/interrupt.h> 24 #include <linux/bitops.h> 25 #include <linux/mfd/abx500.h> 26 #include <linux/mfd/abx500/ab8500.h> 27 #include <linux/pinctrl/pinctrl.h> 28 #include <linux/pinctrl/consumer.h> 29 #include <linux/pinctrl/pinmux.h> 30 #include <linux/pinctrl/pinconf.h> 31 #include <linux/pinctrl/pinconf-generic.h> 32 #include <linux/pinctrl/machine.h> 33 34 #include "pinctrl-abx500.h" 35 #include "../core.h" 36 #include "../pinconf.h" 37 #include "../pinctrl-utils.h" 38 39 /* 40 * The AB9540 and AB8540 GPIO support are extended versions 41 * of the AB8500 GPIO support. 42 * The AB9540 supports an additional (7th) register so that 43 * more GPIO may be configured and used. 44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have 45 * internal pull-up and pull-down capabilities. 46 */ 47 48 /* 49 * GPIO registers offset 50 * Bank: 0x10 51 */ 52 #define AB8500_GPIO_SEL1_REG 0x00 53 #define AB8500_GPIO_SEL2_REG 0x01 54 #define AB8500_GPIO_SEL3_REG 0x02 55 #define AB8500_GPIO_SEL4_REG 0x03 56 #define AB8500_GPIO_SEL5_REG 0x04 57 #define AB8500_GPIO_SEL6_REG 0x05 58 #define AB9540_GPIO_SEL7_REG 0x06 59 60 #define AB8500_GPIO_DIR1_REG 0x10 61 #define AB8500_GPIO_DIR2_REG 0x11 62 #define AB8500_GPIO_DIR3_REG 0x12 63 #define AB8500_GPIO_DIR4_REG 0x13 64 #define AB8500_GPIO_DIR5_REG 0x14 65 #define AB8500_GPIO_DIR6_REG 0x15 66 #define AB9540_GPIO_DIR7_REG 0x16 67 68 #define AB8500_GPIO_OUT1_REG 0x20 69 #define AB8500_GPIO_OUT2_REG 0x21 70 #define AB8500_GPIO_OUT3_REG 0x22 71 #define AB8500_GPIO_OUT4_REG 0x23 72 #define AB8500_GPIO_OUT5_REG 0x24 73 #define AB8500_GPIO_OUT6_REG 0x25 74 #define AB9540_GPIO_OUT7_REG 0x26 75 76 #define AB8500_GPIO_PUD1_REG 0x30 77 #define AB8500_GPIO_PUD2_REG 0x31 78 #define AB8500_GPIO_PUD3_REG 0x32 79 #define AB8500_GPIO_PUD4_REG 0x33 80 #define AB8500_GPIO_PUD5_REG 0x34 81 #define AB8500_GPIO_PUD6_REG 0x35 82 #define AB9540_GPIO_PUD7_REG 0x36 83 84 #define AB8500_GPIO_IN1_REG 0x40 85 #define AB8500_GPIO_IN2_REG 0x41 86 #define AB8500_GPIO_IN3_REG 0x42 87 #define AB8500_GPIO_IN4_REG 0x43 88 #define AB8500_GPIO_IN5_REG 0x44 89 #define AB8500_GPIO_IN6_REG 0x45 90 #define AB9540_GPIO_IN7_REG 0x46 91 #define AB8540_GPIO_VINSEL_REG 0x47 92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48 93 #define AB8500_GPIO_ALTFUN_REG 0x50 94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03 95 #define AB8540_GPIO_VINSEL_MASK 0x03 96 #define AB8540_GPIOX_VBAT_START 51 97 #define AB8540_GPIOX_VBAT_END 54 98 99 #define ABX500_GPIO_INPUT 0 100 #define ABX500_GPIO_OUTPUT 1 101 102 struct abx500_pinctrl { 103 struct device *dev; 104 struct pinctrl_dev *pctldev; 105 struct abx500_pinctrl_soc_data *soc; 106 struct gpio_chip chip; 107 struct ab8500 *parent; 108 struct abx500_gpio_irq_cluster *irq_cluster; 109 int irq_cluster_size; 110 }; 111 112 /** 113 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl 114 * @chip: Member of the structure abx500_pinctrl 115 */ 116 static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip) 117 { 118 return container_of(chip, struct abx500_pinctrl, chip); 119 } 120 121 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, 122 unsigned offset, bool *bit) 123 { 124 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 125 u8 pos = offset % 8; 126 u8 val; 127 int ret; 128 129 reg += offset / 8; 130 ret = abx500_get_register_interruptible(pct->dev, 131 AB8500_MISC, reg, &val); 132 133 *bit = !!(val & BIT(pos)); 134 135 if (ret < 0) 136 dev_err(pct->dev, 137 "%s read reg =%x, offset=%x failed (%d)\n", 138 __func__, reg, offset, ret); 139 140 return ret; 141 } 142 143 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, 144 unsigned offset, int val) 145 { 146 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 147 u8 pos = offset % 8; 148 int ret; 149 150 reg += offset / 8; 151 ret = abx500_mask_and_set_register_interruptible(pct->dev, 152 AB8500_MISC, reg, BIT(pos), val << pos); 153 if (ret < 0) 154 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n", 155 __func__, reg, offset, ret); 156 157 return ret; 158 } 159 160 /** 161 * abx500_gpio_get() - Get the particular GPIO value 162 * @chip: Gpio device 163 * @offset: GPIO number to read 164 */ 165 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) 166 { 167 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 168 bool bit; 169 bool is_out; 170 u8 gpio_offset = offset - 1; 171 int ret; 172 173 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 174 gpio_offset, &is_out); 175 if (ret < 0) 176 goto out; 177 178 if (is_out) 179 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG, 180 gpio_offset, &bit); 181 else 182 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG, 183 gpio_offset, &bit); 184 out: 185 if (ret < 0) { 186 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 187 return ret; 188 } 189 190 return bit; 191 } 192 193 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 194 { 195 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 196 int ret; 197 198 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 199 if (ret < 0) 200 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret); 201 } 202 203 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset, 204 enum abx500_gpio_pull_updown *pull_updown) 205 { 206 u8 pos; 207 u8 val; 208 int ret; 209 struct pullud *pullud; 210 211 if (!pct->soc->pullud) { 212 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature", 213 __func__); 214 ret = -EPERM; 215 goto out; 216 } 217 218 pullud = pct->soc->pullud; 219 220 if ((offset < pullud->first_pin) 221 || (offset > pullud->last_pin)) { 222 ret = -EINVAL; 223 goto out; 224 } 225 226 ret = abx500_get_register_interruptible(pct->dev, 227 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val); 228 229 pos = (offset - pullud->first_pin) << 1; 230 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK; 231 232 out: 233 if (ret < 0) 234 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 235 236 return ret; 237 } 238 239 static int abx500_set_pull_updown(struct abx500_pinctrl *pct, 240 int offset, enum abx500_gpio_pull_updown val) 241 { 242 u8 pos; 243 int ret; 244 struct pullud *pullud; 245 246 if (!pct->soc->pullud) { 247 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature", 248 __func__); 249 ret = -EPERM; 250 goto out; 251 } 252 253 pullud = pct->soc->pullud; 254 255 if ((offset < pullud->first_pin) 256 || (offset > pullud->last_pin)) { 257 ret = -EINVAL; 258 goto out; 259 } 260 pos = (offset - pullud->first_pin) << 1; 261 262 ret = abx500_mask_and_set_register_interruptible(pct->dev, 263 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, 264 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos); 265 266 out: 267 if (ret < 0) 268 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 269 270 return ret; 271 } 272 273 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio) 274 { 275 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 276 struct pullud *pullud = pct->soc->pullud; 277 278 return (pullud && 279 gpio >= pullud->first_pin && 280 gpio <= pullud->last_pin); 281 } 282 283 static int abx500_gpio_direction_output(struct gpio_chip *chip, 284 unsigned offset, 285 int val) 286 { 287 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 288 unsigned gpio; 289 int ret; 290 291 /* set direction as output */ 292 ret = abx500_gpio_set_bits(chip, 293 AB8500_GPIO_DIR1_REG, 294 offset, 295 ABX500_GPIO_OUTPUT); 296 if (ret < 0) 297 goto out; 298 299 /* disable pull down */ 300 ret = abx500_gpio_set_bits(chip, 301 AB8500_GPIO_PUD1_REG, 302 offset, 303 ABX500_GPIO_PULL_NONE); 304 if (ret < 0) 305 goto out; 306 307 /* if supported, disable both pull down and pull up */ 308 gpio = offset + 1; 309 if (abx500_pullud_supported(chip, gpio)) { 310 ret = abx500_set_pull_updown(pct, 311 gpio, 312 ABX500_GPIO_PULL_NONE); 313 } 314 out: 315 if (ret < 0) { 316 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 317 return ret; 318 } 319 320 /* set the output as 1 or 0 */ 321 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 322 } 323 324 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 325 { 326 /* set the register as input */ 327 return abx500_gpio_set_bits(chip, 328 AB8500_GPIO_DIR1_REG, 329 offset, 330 ABX500_GPIO_INPUT); 331 } 332 333 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 334 { 335 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 336 /* The AB8500 GPIO numbers are off by one */ 337 int gpio = offset + 1; 338 int hwirq; 339 int i; 340 341 for (i = 0; i < pct->irq_cluster_size; i++) { 342 struct abx500_gpio_irq_cluster *cluster = 343 &pct->irq_cluster[i]; 344 345 if (gpio >= cluster->start && gpio <= cluster->end) { 346 /* 347 * The ABx500 GPIO's associated IRQs are clustered together 348 * throughout the interrupt numbers at irregular intervals. 349 * To solve this quandry, we have placed the read-in values 350 * into the cluster information table. 351 */ 352 hwirq = gpio - cluster->start + cluster->to_irq; 353 return irq_create_mapping(pct->parent->domain, hwirq); 354 } 355 } 356 357 return -EINVAL; 358 } 359 360 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 361 unsigned gpio, int alt_setting) 362 { 363 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 364 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 365 int ret; 366 int val; 367 unsigned offset; 368 369 const char *modes[] = { 370 [ABX500_DEFAULT] = "default", 371 [ABX500_ALT_A] = "altA", 372 [ABX500_ALT_B] = "altB", 373 [ABX500_ALT_C] = "altC", 374 }; 375 376 /* sanity check */ 377 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) || 378 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) || 379 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) { 380 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio, 381 modes[alt_setting]); 382 return -EINVAL; 383 } 384 385 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 386 offset = gpio - 1; 387 388 switch (alt_setting) { 389 case ABX500_DEFAULT: 390 /* 391 * for ABx5xx family, default mode is always selected by 392 * writing 0 to GPIOSELx register, except for pins which 393 * support at least ALT_B mode, default mode is selected 394 * by writing 1 to GPIOSELx register 395 */ 396 val = 0; 397 if (af.alt_bit1 != UNUSED) 398 val++; 399 400 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 401 offset, val); 402 break; 403 404 case ABX500_ALT_A: 405 /* 406 * for ABx5xx family, alt_a mode is always selected by 407 * writing 1 to GPIOSELx register, except for pins which 408 * support at least ALT_B mode, alt_a mode is selected 409 * by writing 0 to GPIOSELx register and 0 in ALTFUNC 410 * register 411 */ 412 if (af.alt_bit1 != UNUSED) { 413 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 414 offset, 0); 415 if (ret < 0) 416 goto out; 417 418 ret = abx500_gpio_set_bits(chip, 419 AB8500_GPIO_ALTFUN_REG, 420 af.alt_bit1, 421 !!(af.alta_val & BIT(0))); 422 if (ret < 0) 423 goto out; 424 425 if (af.alt_bit2 != UNUSED) 426 ret = abx500_gpio_set_bits(chip, 427 AB8500_GPIO_ALTFUN_REG, 428 af.alt_bit2, 429 !!(af.alta_val & BIT(1))); 430 } else 431 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 432 offset, 1); 433 break; 434 435 case ABX500_ALT_B: 436 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 437 offset, 0); 438 if (ret < 0) 439 goto out; 440 441 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 442 af.alt_bit1, !!(af.altb_val & BIT(0))); 443 if (ret < 0) 444 goto out; 445 446 if (af.alt_bit2 != UNUSED) 447 ret = abx500_gpio_set_bits(chip, 448 AB8500_GPIO_ALTFUN_REG, 449 af.alt_bit2, 450 !!(af.altb_val & BIT(1))); 451 break; 452 453 case ABX500_ALT_C: 454 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 455 offset, 0); 456 if (ret < 0) 457 goto out; 458 459 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 460 af.alt_bit2, !!(af.altc_val & BIT(0))); 461 if (ret < 0) 462 goto out; 463 464 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 465 af.alt_bit2, !!(af.altc_val & BIT(1))); 466 break; 467 468 default: 469 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting); 470 471 return -EINVAL; 472 } 473 out: 474 if (ret < 0) 475 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 476 477 return ret; 478 } 479 480 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 481 unsigned gpio) 482 { 483 u8 mode; 484 bool bit_mode; 485 bool alt_bit1; 486 bool alt_bit2; 487 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 488 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 489 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 490 unsigned offset = gpio - 1; 491 int ret; 492 493 /* 494 * if gpiosel_bit is set to unused, 495 * it means no GPIO or special case 496 */ 497 if (af.gpiosel_bit == UNUSED) 498 return ABX500_DEFAULT; 499 500 /* read GpioSelx register */ 501 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), 502 af.gpiosel_bit, &bit_mode); 503 if (ret < 0) 504 goto out; 505 506 mode = bit_mode; 507 508 /* sanity check */ 509 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) || 510 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) { 511 dev_err(pct->dev, 512 "alt_bitX value not in correct range (-1 to 7)\n"); 513 return -EINVAL; 514 } 515 516 /* if alt_bit2 is used, alt_bit1 must be used too */ 517 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) { 518 dev_err(pct->dev, 519 "if alt_bit2 is used, alt_bit1 can't be unused\n"); 520 return -EINVAL; 521 } 522 523 /* check if pin use AlternateFunction register */ 524 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) 525 return mode; 526 /* 527 * if pin GPIOSEL bit is set and pin supports alternate function, 528 * it means DEFAULT mode 529 */ 530 if (mode) 531 return ABX500_DEFAULT; 532 533 /* 534 * pin use the AlternatFunction register 535 * read alt_bit1 value 536 */ 537 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 538 af.alt_bit1, &alt_bit1); 539 if (ret < 0) 540 goto out; 541 542 if (af.alt_bit2 != UNUSED) { 543 /* read alt_bit2 value */ 544 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 545 af.alt_bit2, 546 &alt_bit2); 547 if (ret < 0) 548 goto out; 549 } else 550 alt_bit2 = 0; 551 552 mode = (alt_bit2 << 1) + alt_bit1; 553 if (mode == af.alta_val) 554 return ABX500_ALT_A; 555 else if (mode == af.altb_val) 556 return ABX500_ALT_B; 557 else 558 return ABX500_ALT_C; 559 560 out: 561 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 562 return ret; 563 } 564 565 #ifdef CONFIG_DEBUG_FS 566 567 #include <linux/seq_file.h> 568 569 static void abx500_gpio_dbg_show_one(struct seq_file *s, 570 struct pinctrl_dev *pctldev, 571 struct gpio_chip *chip, 572 unsigned offset, unsigned gpio) 573 { 574 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 575 const char *label = gpiochip_is_requested(chip, offset - 1); 576 u8 gpio_offset = offset - 1; 577 int mode = -1; 578 bool is_out; 579 bool pd; 580 enum abx500_gpio_pull_updown pud = 0; 581 int ret; 582 583 const char *modes[] = { 584 [ABX500_DEFAULT] = "default", 585 [ABX500_ALT_A] = "altA", 586 [ABX500_ALT_B] = "altB", 587 [ABX500_ALT_C] = "altC", 588 }; 589 590 const char *pull_up_down[] = { 591 [ABX500_GPIO_PULL_DOWN] = "pull down", 592 [ABX500_GPIO_PULL_NONE] = "pull none", 593 [ABX500_GPIO_PULL_NONE + 1] = "pull none", 594 [ABX500_GPIO_PULL_UP] = "pull up", 595 }; 596 597 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 598 gpio_offset, &is_out); 599 if (ret < 0) 600 goto out; 601 602 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s", 603 gpio, label ?: "(none)", 604 is_out ? "out" : "in "); 605 606 if (!is_out) { 607 if (abx500_pullud_supported(chip, offset)) { 608 ret = abx500_get_pull_updown(pct, offset, &pud); 609 if (ret < 0) 610 goto out; 611 612 seq_printf(s, " %-9s", pull_up_down[pud]); 613 } else { 614 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG, 615 gpio_offset, &pd); 616 if (ret < 0) 617 goto out; 618 619 seq_printf(s, " %-9s", pull_up_down[pd]); 620 } 621 } else 622 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo"); 623 624 mode = abx500_get_mode(pctldev, chip, offset); 625 626 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]); 627 628 out: 629 if (ret < 0) 630 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 631 } 632 633 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 634 { 635 unsigned i; 636 unsigned gpio = chip->base; 637 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 638 struct pinctrl_dev *pctldev = pct->pctldev; 639 640 for (i = 0; i < chip->ngpio; i++, gpio++) { 641 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */ 642 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio); 643 seq_printf(s, "\n"); 644 } 645 } 646 647 #else 648 static inline void abx500_gpio_dbg_show_one(struct seq_file *s, 649 struct pinctrl_dev *pctldev, 650 struct gpio_chip *chip, 651 unsigned offset, unsigned gpio) 652 { 653 } 654 #define abx500_gpio_dbg_show NULL 655 #endif 656 657 static struct gpio_chip abx500gpio_chip = { 658 .label = "abx500-gpio", 659 .owner = THIS_MODULE, 660 .request = gpiochip_generic_request, 661 .free = gpiochip_generic_free, 662 .direction_input = abx500_gpio_direction_input, 663 .get = abx500_gpio_get, 664 .direction_output = abx500_gpio_direction_output, 665 .set = abx500_gpio_set, 666 .to_irq = abx500_gpio_to_irq, 667 .dbg_show = abx500_gpio_dbg_show, 668 }; 669 670 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 671 { 672 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 673 674 return pct->soc->nfunctions; 675 } 676 677 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev, 678 unsigned function) 679 { 680 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 681 682 return pct->soc->functions[function].name; 683 } 684 685 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev, 686 unsigned function, 687 const char * const **groups, 688 unsigned * const num_groups) 689 { 690 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 691 692 *groups = pct->soc->functions[function].groups; 693 *num_groups = pct->soc->functions[function].ngroups; 694 695 return 0; 696 } 697 698 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function, 699 unsigned group) 700 { 701 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 702 struct gpio_chip *chip = &pct->chip; 703 const struct abx500_pingroup *g; 704 int i; 705 int ret = 0; 706 707 g = &pct->soc->groups[group]; 708 if (g->altsetting < 0) 709 return -EINVAL; 710 711 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins); 712 713 for (i = 0; i < g->npins; i++) { 714 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n", 715 g->pins[i], g->altsetting); 716 717 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting); 718 } 719 720 if (ret < 0) 721 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 722 723 return ret; 724 } 725 726 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev, 727 struct pinctrl_gpio_range *range, 728 unsigned offset) 729 { 730 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 731 const struct abx500_pinrange *p; 732 int ret; 733 int i; 734 735 /* 736 * Different ranges have different ways to enable GPIO function on a 737 * pin, so refer back to our local range type, where we handily define 738 * what altfunc enables GPIO for a certain pin. 739 */ 740 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 741 p = &pct->soc->gpio_ranges[i]; 742 if ((offset >= p->offset) && 743 (offset < (p->offset + p->npins))) 744 break; 745 } 746 747 if (i == pct->soc->gpio_num_ranges) { 748 dev_err(pct->dev, "%s failed to locate range\n", __func__); 749 return -ENODEV; 750 } 751 752 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n", 753 p->altfunc, offset); 754 755 ret = abx500_set_mode(pct->pctldev, &pct->chip, 756 offset, p->altfunc); 757 if (ret < 0) 758 dev_err(pct->dev, "%s setting altfunc failed\n", __func__); 759 760 return ret; 761 } 762 763 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, 764 struct pinctrl_gpio_range *range, 765 unsigned offset) 766 { 767 } 768 769 static const struct pinmux_ops abx500_pinmux_ops = { 770 .get_functions_count = abx500_pmx_get_funcs_cnt, 771 .get_function_name = abx500_pmx_get_func_name, 772 .get_function_groups = abx500_pmx_get_func_groups, 773 .set_mux = abx500_pmx_set, 774 .gpio_request_enable = abx500_gpio_request_enable, 775 .gpio_disable_free = abx500_gpio_disable_free, 776 }; 777 778 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) 779 { 780 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 781 782 return pct->soc->ngroups; 783 } 784 785 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev, 786 unsigned selector) 787 { 788 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 789 790 return pct->soc->groups[selector].name; 791 } 792 793 static int abx500_get_group_pins(struct pinctrl_dev *pctldev, 794 unsigned selector, 795 const unsigned **pins, 796 unsigned *num_pins) 797 { 798 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 799 800 *pins = pct->soc->groups[selector].pins; 801 *num_pins = pct->soc->groups[selector].npins; 802 803 return 0; 804 } 805 806 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, 807 struct seq_file *s, unsigned offset) 808 { 809 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 810 struct gpio_chip *chip = &pct->chip; 811 812 abx500_gpio_dbg_show_one(s, pctldev, chip, offset, 813 chip->base + offset - 1); 814 } 815 816 static int abx500_dt_add_map_mux(struct pinctrl_map **map, 817 unsigned *reserved_maps, 818 unsigned *num_maps, const char *group, 819 const char *function) 820 { 821 if (*num_maps == *reserved_maps) 822 return -ENOSPC; 823 824 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 825 (*map)[*num_maps].data.mux.group = group; 826 (*map)[*num_maps].data.mux.function = function; 827 (*num_maps)++; 828 829 return 0; 830 } 831 832 static int abx500_dt_add_map_configs(struct pinctrl_map **map, 833 unsigned *reserved_maps, 834 unsigned *num_maps, const char *group, 835 unsigned long *configs, unsigned num_configs) 836 { 837 unsigned long *dup_configs; 838 839 if (*num_maps == *reserved_maps) 840 return -ENOSPC; 841 842 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 843 GFP_KERNEL); 844 if (!dup_configs) 845 return -ENOMEM; 846 847 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN; 848 849 (*map)[*num_maps].data.configs.group_or_pin = group; 850 (*map)[*num_maps].data.configs.configs = dup_configs; 851 (*map)[*num_maps].data.configs.num_configs = num_configs; 852 (*num_maps)++; 853 854 return 0; 855 } 856 857 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev, 858 const char *pin_name) 859 { 860 int i, pin_number; 861 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); 862 863 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) 864 for (i = 0; i < npct->soc->npins; i++) 865 if (npct->soc->pins[i].number == pin_number) 866 return npct->soc->pins[i].name; 867 return NULL; 868 } 869 870 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev, 871 struct device_node *np, 872 struct pinctrl_map **map, 873 unsigned *reserved_maps, 874 unsigned *num_maps) 875 { 876 int ret; 877 const char *function = NULL; 878 unsigned long *configs; 879 unsigned int nconfigs = 0; 880 struct property *prop; 881 882 ret = of_property_read_string(np, "function", &function); 883 if (ret >= 0) { 884 const char *group; 885 886 ret = of_property_count_strings(np, "groups"); 887 if (ret < 0) 888 goto exit; 889 890 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, 891 num_maps, ret); 892 if (ret < 0) 893 goto exit; 894 895 of_property_for_each_string(np, "groups", prop, group) { 896 ret = abx500_dt_add_map_mux(map, reserved_maps, 897 num_maps, group, function); 898 if (ret < 0) 899 goto exit; 900 } 901 } 902 903 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs); 904 if (nconfigs) { 905 const char *gpio_name; 906 const char *pin; 907 908 ret = of_property_count_strings(np, "pins"); 909 if (ret < 0) 910 goto exit; 911 912 ret = pinctrl_utils_reserve_map(pctldev, map, 913 reserved_maps, 914 num_maps, ret); 915 if (ret < 0) 916 goto exit; 917 918 of_property_for_each_string(np, "pins", prop, pin) { 919 gpio_name = abx500_find_pin_name(pctldev, pin); 920 921 ret = abx500_dt_add_map_configs(map, reserved_maps, 922 num_maps, gpio_name, configs, 1); 923 if (ret < 0) 924 goto exit; 925 } 926 } 927 928 exit: 929 return ret; 930 } 931 932 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev, 933 struct device_node *np_config, 934 struct pinctrl_map **map, unsigned *num_maps) 935 { 936 unsigned reserved_maps; 937 struct device_node *np; 938 int ret; 939 940 reserved_maps = 0; 941 *map = NULL; 942 *num_maps = 0; 943 944 for_each_child_of_node(np_config, np) { 945 ret = abx500_dt_subnode_to_map(pctldev, np, map, 946 &reserved_maps, num_maps); 947 if (ret < 0) { 948 pinctrl_utils_dt_free_map(pctldev, *map, *num_maps); 949 return ret; 950 } 951 } 952 953 return 0; 954 } 955 956 static const struct pinctrl_ops abx500_pinctrl_ops = { 957 .get_groups_count = abx500_get_groups_cnt, 958 .get_group_name = abx500_get_group_name, 959 .get_group_pins = abx500_get_group_pins, 960 .pin_dbg_show = abx500_pin_dbg_show, 961 .dt_node_to_map = abx500_dt_node_to_map, 962 .dt_free_map = pinctrl_utils_dt_free_map, 963 }; 964 965 static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 966 unsigned pin, 967 unsigned long *config) 968 { 969 return -ENOSYS; 970 } 971 972 static int abx500_pin_config_set(struct pinctrl_dev *pctldev, 973 unsigned pin, 974 unsigned long *configs, 975 unsigned num_configs) 976 { 977 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 978 struct gpio_chip *chip = &pct->chip; 979 unsigned offset; 980 int ret = -EINVAL; 981 int i; 982 enum pin_config_param param; 983 enum pin_config_param argument; 984 985 for (i = 0; i < num_configs; i++) { 986 param = pinconf_to_config_param(configs[i]); 987 argument = pinconf_to_config_argument(configs[i]); 988 989 dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n", 990 pin, configs[i], 991 (param == PIN_CONFIG_OUTPUT) ? "output " : "input", 992 (param == PIN_CONFIG_OUTPUT) ? 993 (argument ? "high" : "low") : 994 (argument ? "pull up" : "pull down")); 995 996 /* on ABx500, there is no GPIO0, so adjust the offset */ 997 offset = pin - 1; 998 999 switch (param) { 1000 case PIN_CONFIG_BIAS_DISABLE: 1001 ret = abx500_gpio_direction_input(chip, offset); 1002 if (ret < 0) 1003 goto out; 1004 /* 1005 * Some chips only support pull down, while some 1006 * actually support both pull up and pull down. Such 1007 * chips have a "pullud" range specified for the pins 1008 * that support both features. If the pin is not 1009 * within that range, we fall back to the old bit set 1010 * that only support pull down. 1011 */ 1012 if (abx500_pullud_supported(chip, pin)) 1013 ret = abx500_set_pull_updown(pct, 1014 pin, 1015 ABX500_GPIO_PULL_NONE); 1016 else 1017 /* Chip only supports pull down */ 1018 ret = abx500_gpio_set_bits(chip, 1019 AB8500_GPIO_PUD1_REG, offset, 1020 ABX500_GPIO_PULL_NONE); 1021 break; 1022 1023 case PIN_CONFIG_BIAS_PULL_DOWN: 1024 ret = abx500_gpio_direction_input(chip, offset); 1025 if (ret < 0) 1026 goto out; 1027 /* 1028 * if argument = 1 set the pull down 1029 * else clear the pull down 1030 * Some chips only support pull down, while some 1031 * actually support both pull up and pull down. Such 1032 * chips have a "pullud" range specified for the pins 1033 * that support both features. If the pin is not 1034 * within that range, we fall back to the old bit set 1035 * that only support pull down. 1036 */ 1037 if (abx500_pullud_supported(chip, pin)) 1038 ret = abx500_set_pull_updown(pct, 1039 pin, 1040 argument ? ABX500_GPIO_PULL_DOWN : 1041 ABX500_GPIO_PULL_NONE); 1042 else 1043 /* Chip only supports pull down */ 1044 ret = abx500_gpio_set_bits(chip, 1045 AB8500_GPIO_PUD1_REG, 1046 offset, 1047 argument ? ABX500_GPIO_PULL_DOWN : 1048 ABX500_GPIO_PULL_NONE); 1049 break; 1050 1051 case PIN_CONFIG_BIAS_PULL_UP: 1052 ret = abx500_gpio_direction_input(chip, offset); 1053 if (ret < 0) 1054 goto out; 1055 /* 1056 * if argument = 1 set the pull up 1057 * else clear the pull up 1058 */ 1059 ret = abx500_gpio_direction_input(chip, offset); 1060 /* 1061 * Some chips only support pull down, while some 1062 * actually support both pull up and pull down. Such 1063 * chips have a "pullud" range specified for the pins 1064 * that support both features. If the pin is not 1065 * within that range, do nothing 1066 */ 1067 if (abx500_pullud_supported(chip, pin)) 1068 ret = abx500_set_pull_updown(pct, 1069 pin, 1070 argument ? ABX500_GPIO_PULL_UP : 1071 ABX500_GPIO_PULL_NONE); 1072 break; 1073 1074 case PIN_CONFIG_OUTPUT: 1075 ret = abx500_gpio_direction_output(chip, offset, 1076 argument); 1077 break; 1078 1079 default: 1080 dev_err(chip->dev, "illegal configuration requested\n"); 1081 } 1082 } /* for each config */ 1083 out: 1084 if (ret < 0) 1085 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 1086 1087 return ret; 1088 } 1089 1090 static const struct pinconf_ops abx500_pinconf_ops = { 1091 .pin_config_get = abx500_pin_config_get, 1092 .pin_config_set = abx500_pin_config_set, 1093 .is_generic = true, 1094 }; 1095 1096 static struct pinctrl_desc abx500_pinctrl_desc = { 1097 .name = "pinctrl-abx500", 1098 .pctlops = &abx500_pinctrl_ops, 1099 .pmxops = &abx500_pinmux_ops, 1100 .confops = &abx500_pinconf_ops, 1101 .owner = THIS_MODULE, 1102 }; 1103 1104 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) 1105 { 1106 unsigned int lowest = 0; 1107 unsigned int highest = 0; 1108 unsigned int npins = 0; 1109 int i; 1110 1111 /* 1112 * Compute number of GPIOs from the last SoC gpio range descriptors 1113 * These ranges may include "holes" but the GPIO number space shall 1114 * still be homogeneous, so we need to detect and account for any 1115 * such holes so that these are included in the number of GPIO pins. 1116 */ 1117 for (i = 0; i < soc->gpio_num_ranges; i++) { 1118 unsigned gstart; 1119 unsigned gend; 1120 const struct abx500_pinrange *p; 1121 1122 p = &soc->gpio_ranges[i]; 1123 gstart = p->offset; 1124 gend = p->offset + p->npins - 1; 1125 1126 if (i == 0) { 1127 /* First iteration, set start values */ 1128 lowest = gstart; 1129 highest = gend; 1130 } else { 1131 if (gstart < lowest) 1132 lowest = gstart; 1133 if (gend > highest) 1134 highest = gend; 1135 } 1136 } 1137 /* this gives the absolute number of pins */ 1138 npins = highest - lowest + 1; 1139 return npins; 1140 } 1141 1142 static const struct of_device_id abx500_gpio_match[] = { 1143 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, }, 1144 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, 1145 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, }, 1146 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, }, 1147 { } 1148 }; 1149 1150 static int abx500_gpio_probe(struct platform_device *pdev) 1151 { 1152 struct device_node *np = pdev->dev.of_node; 1153 const struct of_device_id *match; 1154 struct abx500_pinctrl *pct; 1155 unsigned int id = -1; 1156 int ret; 1157 int i; 1158 1159 if (!np) { 1160 dev_err(&pdev->dev, "gpio dt node missing\n"); 1161 return -ENODEV; 1162 } 1163 1164 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl), 1165 GFP_KERNEL); 1166 if (pct == NULL) { 1167 dev_err(&pdev->dev, 1168 "failed to allocate memory for pct\n"); 1169 return -ENOMEM; 1170 } 1171 1172 pct->dev = &pdev->dev; 1173 pct->parent = dev_get_drvdata(pdev->dev.parent); 1174 pct->chip = abx500gpio_chip; 1175 pct->chip.dev = &pdev->dev; 1176 pct->chip.base = -1; /* Dynamic allocation */ 1177 1178 match = of_match_device(abx500_gpio_match, &pdev->dev); 1179 if (!match) { 1180 dev_err(&pdev->dev, "gpio dt not matching\n"); 1181 return -ENODEV; 1182 } 1183 id = (unsigned long)match->data; 1184 1185 /* Poke in other ASIC variants here */ 1186 switch (id) { 1187 case PINCTRL_AB8500: 1188 abx500_pinctrl_ab8500_init(&pct->soc); 1189 break; 1190 case PINCTRL_AB8540: 1191 abx500_pinctrl_ab8540_init(&pct->soc); 1192 break; 1193 case PINCTRL_AB9540: 1194 abx500_pinctrl_ab9540_init(&pct->soc); 1195 break; 1196 case PINCTRL_AB8505: 1197 abx500_pinctrl_ab8505_init(&pct->soc); 1198 break; 1199 default: 1200 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id); 1201 return -EINVAL; 1202 } 1203 1204 if (!pct->soc) { 1205 dev_err(&pdev->dev, "Invalid SOC data\n"); 1206 return -EINVAL; 1207 } 1208 1209 pct->chip.ngpio = abx500_get_gpio_num(pct->soc); 1210 pct->irq_cluster = pct->soc->gpio_irq_cluster; 1211 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; 1212 1213 ret = gpiochip_add(&pct->chip); 1214 if (ret) { 1215 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 1216 return ret; 1217 } 1218 dev_info(&pdev->dev, "added gpiochip\n"); 1219 1220 abx500_pinctrl_desc.pins = pct->soc->pins; 1221 abx500_pinctrl_desc.npins = pct->soc->npins; 1222 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct); 1223 if (IS_ERR(pct->pctldev)) { 1224 dev_err(&pdev->dev, 1225 "could not register abx500 pinctrl driver\n"); 1226 ret = PTR_ERR(pct->pctldev); 1227 goto out_rem_chip; 1228 } 1229 dev_info(&pdev->dev, "registered pin controller\n"); 1230 1231 /* We will handle a range of GPIO pins */ 1232 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 1233 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; 1234 1235 ret = gpiochip_add_pin_range(&pct->chip, 1236 dev_name(&pdev->dev), 1237 p->offset - 1, p->offset, p->npins); 1238 if (ret < 0) 1239 goto out_rem_chip; 1240 } 1241 1242 platform_set_drvdata(pdev, pct); 1243 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n"); 1244 1245 return 0; 1246 1247 out_rem_chip: 1248 gpiochip_remove(&pct->chip); 1249 return ret; 1250 } 1251 1252 /** 1253 * abx500_gpio_remove() - remove Ab8500-gpio driver 1254 * @pdev: Platform device registered 1255 */ 1256 static int abx500_gpio_remove(struct platform_device *pdev) 1257 { 1258 struct abx500_pinctrl *pct = platform_get_drvdata(pdev); 1259 1260 gpiochip_remove(&pct->chip); 1261 return 0; 1262 } 1263 1264 static struct platform_driver abx500_gpio_driver = { 1265 .driver = { 1266 .name = "abx500-gpio", 1267 .of_match_table = abx500_gpio_match, 1268 }, 1269 .probe = abx500_gpio_probe, 1270 .remove = abx500_gpio_remove, 1271 }; 1272 1273 static int __init abx500_gpio_init(void) 1274 { 1275 return platform_driver_register(&abx500_gpio_driver); 1276 } 1277 core_initcall(abx500_gpio_init); 1278 1279 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>"); 1280 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO"); 1281 MODULE_ALIAS("platform:abx500-gpio"); 1282 MODULE_LICENSE("GPL v2"); 1283