1 /* 2 * Copyright (C) ST-Ericsson SA 2013 3 * 4 * Author: Patrice Chotard <patrice.chotard@st.com> 5 * License terms: GNU General Public License (GPL) version 2 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/kernel.h> 12 #include <linux/types.h> 13 #include <linux/slab.h> 14 #include <linux/init.h> 15 #include <linux/module.h> 16 #include <linux/err.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/gpio.h> 21 #include <linux/irq.h> 22 #include <linux/irqdomain.h> 23 #include <linux/interrupt.h> 24 #include <linux/bitops.h> 25 #include <linux/mfd/abx500.h> 26 #include <linux/mfd/abx500/ab8500.h> 27 #include <linux/pinctrl/pinctrl.h> 28 #include <linux/pinctrl/consumer.h> 29 #include <linux/pinctrl/pinmux.h> 30 #include <linux/pinctrl/pinconf.h> 31 #include <linux/pinctrl/pinconf-generic.h> 32 #include <linux/pinctrl/machine.h> 33 34 #include "pinctrl-abx500.h" 35 #include "../core.h" 36 #include "../pinconf.h" 37 #include "../pinctrl-utils.h" 38 39 /* 40 * The AB9540 and AB8540 GPIO support are extended versions 41 * of the AB8500 GPIO support. 42 * The AB9540 supports an additional (7th) register so that 43 * more GPIO may be configured and used. 44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have 45 * internal pull-up and pull-down capabilities. 46 */ 47 48 /* 49 * GPIO registers offset 50 * Bank: 0x10 51 */ 52 #define AB8500_GPIO_SEL1_REG 0x00 53 #define AB8500_GPIO_SEL2_REG 0x01 54 #define AB8500_GPIO_SEL3_REG 0x02 55 #define AB8500_GPIO_SEL4_REG 0x03 56 #define AB8500_GPIO_SEL5_REG 0x04 57 #define AB8500_GPIO_SEL6_REG 0x05 58 #define AB9540_GPIO_SEL7_REG 0x06 59 60 #define AB8500_GPIO_DIR1_REG 0x10 61 #define AB8500_GPIO_DIR2_REG 0x11 62 #define AB8500_GPIO_DIR3_REG 0x12 63 #define AB8500_GPIO_DIR4_REG 0x13 64 #define AB8500_GPIO_DIR5_REG 0x14 65 #define AB8500_GPIO_DIR6_REG 0x15 66 #define AB9540_GPIO_DIR7_REG 0x16 67 68 #define AB8500_GPIO_OUT1_REG 0x20 69 #define AB8500_GPIO_OUT2_REG 0x21 70 #define AB8500_GPIO_OUT3_REG 0x22 71 #define AB8500_GPIO_OUT4_REG 0x23 72 #define AB8500_GPIO_OUT5_REG 0x24 73 #define AB8500_GPIO_OUT6_REG 0x25 74 #define AB9540_GPIO_OUT7_REG 0x26 75 76 #define AB8500_GPIO_PUD1_REG 0x30 77 #define AB8500_GPIO_PUD2_REG 0x31 78 #define AB8500_GPIO_PUD3_REG 0x32 79 #define AB8500_GPIO_PUD4_REG 0x33 80 #define AB8500_GPIO_PUD5_REG 0x34 81 #define AB8500_GPIO_PUD6_REG 0x35 82 #define AB9540_GPIO_PUD7_REG 0x36 83 84 #define AB8500_GPIO_IN1_REG 0x40 85 #define AB8500_GPIO_IN2_REG 0x41 86 #define AB8500_GPIO_IN3_REG 0x42 87 #define AB8500_GPIO_IN4_REG 0x43 88 #define AB8500_GPIO_IN5_REG 0x44 89 #define AB8500_GPIO_IN6_REG 0x45 90 #define AB9540_GPIO_IN7_REG 0x46 91 #define AB8540_GPIO_VINSEL_REG 0x47 92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48 93 #define AB8500_GPIO_ALTFUN_REG 0x50 94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03 95 #define AB8540_GPIO_VINSEL_MASK 0x03 96 #define AB8540_GPIOX_VBAT_START 51 97 #define AB8540_GPIOX_VBAT_END 54 98 99 #define ABX500_GPIO_INPUT 0 100 #define ABX500_GPIO_OUTPUT 1 101 102 struct abx500_pinctrl { 103 struct device *dev; 104 struct pinctrl_dev *pctldev; 105 struct abx500_pinctrl_soc_data *soc; 106 struct gpio_chip chip; 107 struct ab8500 *parent; 108 struct abx500_gpio_irq_cluster *irq_cluster; 109 int irq_cluster_size; 110 }; 111 112 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, 113 unsigned offset, bool *bit) 114 { 115 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 116 u8 pos = offset % 8; 117 u8 val; 118 int ret; 119 120 reg += offset / 8; 121 ret = abx500_get_register_interruptible(pct->dev, 122 AB8500_MISC, reg, &val); 123 124 *bit = !!(val & BIT(pos)); 125 126 if (ret < 0) 127 dev_err(pct->dev, 128 "%s read reg =%x, offset=%x failed (%d)\n", 129 __func__, reg, offset, ret); 130 131 return ret; 132 } 133 134 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, 135 unsigned offset, int val) 136 { 137 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 138 u8 pos = offset % 8; 139 int ret; 140 141 reg += offset / 8; 142 ret = abx500_mask_and_set_register_interruptible(pct->dev, 143 AB8500_MISC, reg, BIT(pos), val << pos); 144 if (ret < 0) 145 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n", 146 __func__, reg, offset, ret); 147 148 return ret; 149 } 150 151 /** 152 * abx500_gpio_get() - Get the particular GPIO value 153 * @chip: Gpio device 154 * @offset: GPIO number to read 155 */ 156 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) 157 { 158 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 159 bool bit; 160 bool is_out; 161 u8 gpio_offset = offset - 1; 162 int ret; 163 164 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 165 gpio_offset, &is_out); 166 if (ret < 0) 167 goto out; 168 169 if (is_out) 170 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG, 171 gpio_offset, &bit); 172 else 173 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG, 174 gpio_offset, &bit); 175 out: 176 if (ret < 0) { 177 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 178 return ret; 179 } 180 181 return bit; 182 } 183 184 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 185 { 186 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 187 int ret; 188 189 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 190 if (ret < 0) 191 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret); 192 } 193 194 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset, 195 enum abx500_gpio_pull_updown *pull_updown) 196 { 197 u8 pos; 198 u8 val; 199 int ret; 200 struct pullud *pullud; 201 202 if (!pct->soc->pullud) { 203 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature", 204 __func__); 205 ret = -EPERM; 206 goto out; 207 } 208 209 pullud = pct->soc->pullud; 210 211 if ((offset < pullud->first_pin) 212 || (offset > pullud->last_pin)) { 213 ret = -EINVAL; 214 goto out; 215 } 216 217 ret = abx500_get_register_interruptible(pct->dev, 218 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val); 219 220 pos = (offset - pullud->first_pin) << 1; 221 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK; 222 223 out: 224 if (ret < 0) 225 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 226 227 return ret; 228 } 229 230 static int abx500_set_pull_updown(struct abx500_pinctrl *pct, 231 int offset, enum abx500_gpio_pull_updown val) 232 { 233 u8 pos; 234 int ret; 235 struct pullud *pullud; 236 237 if (!pct->soc->pullud) { 238 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature", 239 __func__); 240 ret = -EPERM; 241 goto out; 242 } 243 244 pullud = pct->soc->pullud; 245 246 if ((offset < pullud->first_pin) 247 || (offset > pullud->last_pin)) { 248 ret = -EINVAL; 249 goto out; 250 } 251 pos = (offset - pullud->first_pin) << 1; 252 253 ret = abx500_mask_and_set_register_interruptible(pct->dev, 254 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, 255 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos); 256 257 out: 258 if (ret < 0) 259 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 260 261 return ret; 262 } 263 264 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio) 265 { 266 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 267 struct pullud *pullud = pct->soc->pullud; 268 269 return (pullud && 270 gpio >= pullud->first_pin && 271 gpio <= pullud->last_pin); 272 } 273 274 static int abx500_gpio_direction_output(struct gpio_chip *chip, 275 unsigned offset, 276 int val) 277 { 278 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 279 unsigned gpio; 280 int ret; 281 282 /* set direction as output */ 283 ret = abx500_gpio_set_bits(chip, 284 AB8500_GPIO_DIR1_REG, 285 offset, 286 ABX500_GPIO_OUTPUT); 287 if (ret < 0) 288 goto out; 289 290 /* disable pull down */ 291 ret = abx500_gpio_set_bits(chip, 292 AB8500_GPIO_PUD1_REG, 293 offset, 294 ABX500_GPIO_PULL_NONE); 295 if (ret < 0) 296 goto out; 297 298 /* if supported, disable both pull down and pull up */ 299 gpio = offset + 1; 300 if (abx500_pullud_supported(chip, gpio)) { 301 ret = abx500_set_pull_updown(pct, 302 gpio, 303 ABX500_GPIO_PULL_NONE); 304 } 305 out: 306 if (ret < 0) { 307 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 308 return ret; 309 } 310 311 /* set the output as 1 or 0 */ 312 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 313 } 314 315 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 316 { 317 /* set the register as input */ 318 return abx500_gpio_set_bits(chip, 319 AB8500_GPIO_DIR1_REG, 320 offset, 321 ABX500_GPIO_INPUT); 322 } 323 324 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 325 { 326 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 327 /* The AB8500 GPIO numbers are off by one */ 328 int gpio = offset + 1; 329 int hwirq; 330 int i; 331 332 for (i = 0; i < pct->irq_cluster_size; i++) { 333 struct abx500_gpio_irq_cluster *cluster = 334 &pct->irq_cluster[i]; 335 336 if (gpio >= cluster->start && gpio <= cluster->end) { 337 /* 338 * The ABx500 GPIO's associated IRQs are clustered together 339 * throughout the interrupt numbers at irregular intervals. 340 * To solve this quandry, we have placed the read-in values 341 * into the cluster information table. 342 */ 343 hwirq = gpio - cluster->start + cluster->to_irq; 344 return irq_create_mapping(pct->parent->domain, hwirq); 345 } 346 } 347 348 return -EINVAL; 349 } 350 351 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 352 unsigned gpio, int alt_setting) 353 { 354 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 355 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 356 int ret; 357 int val; 358 unsigned offset; 359 360 const char *modes[] = { 361 [ABX500_DEFAULT] = "default", 362 [ABX500_ALT_A] = "altA", 363 [ABX500_ALT_B] = "altB", 364 [ABX500_ALT_C] = "altC", 365 }; 366 367 /* sanity check */ 368 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) || 369 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) || 370 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) { 371 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio, 372 modes[alt_setting]); 373 return -EINVAL; 374 } 375 376 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 377 offset = gpio - 1; 378 379 switch (alt_setting) { 380 case ABX500_DEFAULT: 381 /* 382 * for ABx5xx family, default mode is always selected by 383 * writing 0 to GPIOSELx register, except for pins which 384 * support at least ALT_B mode, default mode is selected 385 * by writing 1 to GPIOSELx register 386 */ 387 val = 0; 388 if (af.alt_bit1 != UNUSED) 389 val++; 390 391 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 392 offset, val); 393 break; 394 395 case ABX500_ALT_A: 396 /* 397 * for ABx5xx family, alt_a mode is always selected by 398 * writing 1 to GPIOSELx register, except for pins which 399 * support at least ALT_B mode, alt_a mode is selected 400 * by writing 0 to GPIOSELx register and 0 in ALTFUNC 401 * register 402 */ 403 if (af.alt_bit1 != UNUSED) { 404 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 405 offset, 0); 406 if (ret < 0) 407 goto out; 408 409 ret = abx500_gpio_set_bits(chip, 410 AB8500_GPIO_ALTFUN_REG, 411 af.alt_bit1, 412 !!(af.alta_val & BIT(0))); 413 if (ret < 0) 414 goto out; 415 416 if (af.alt_bit2 != UNUSED) 417 ret = abx500_gpio_set_bits(chip, 418 AB8500_GPIO_ALTFUN_REG, 419 af.alt_bit2, 420 !!(af.alta_val & BIT(1))); 421 } else 422 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 423 offset, 1); 424 break; 425 426 case ABX500_ALT_B: 427 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 428 offset, 0); 429 if (ret < 0) 430 goto out; 431 432 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 433 af.alt_bit1, !!(af.altb_val & BIT(0))); 434 if (ret < 0) 435 goto out; 436 437 if (af.alt_bit2 != UNUSED) 438 ret = abx500_gpio_set_bits(chip, 439 AB8500_GPIO_ALTFUN_REG, 440 af.alt_bit2, 441 !!(af.altb_val & BIT(1))); 442 break; 443 444 case ABX500_ALT_C: 445 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 446 offset, 0); 447 if (ret < 0) 448 goto out; 449 450 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 451 af.alt_bit2, !!(af.altc_val & BIT(0))); 452 if (ret < 0) 453 goto out; 454 455 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 456 af.alt_bit2, !!(af.altc_val & BIT(1))); 457 break; 458 459 default: 460 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting); 461 462 return -EINVAL; 463 } 464 out: 465 if (ret < 0) 466 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 467 468 return ret; 469 } 470 471 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 472 unsigned gpio) 473 { 474 u8 mode; 475 bool bit_mode; 476 bool alt_bit1; 477 bool alt_bit2; 478 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 479 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 480 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 481 unsigned offset = gpio - 1; 482 int ret; 483 484 /* 485 * if gpiosel_bit is set to unused, 486 * it means no GPIO or special case 487 */ 488 if (af.gpiosel_bit == UNUSED) 489 return ABX500_DEFAULT; 490 491 /* read GpioSelx register */ 492 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), 493 af.gpiosel_bit, &bit_mode); 494 if (ret < 0) 495 goto out; 496 497 mode = bit_mode; 498 499 /* sanity check */ 500 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) || 501 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) { 502 dev_err(pct->dev, 503 "alt_bitX value not in correct range (-1 to 7)\n"); 504 return -EINVAL; 505 } 506 507 /* if alt_bit2 is used, alt_bit1 must be used too */ 508 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) { 509 dev_err(pct->dev, 510 "if alt_bit2 is used, alt_bit1 can't be unused\n"); 511 return -EINVAL; 512 } 513 514 /* check if pin use AlternateFunction register */ 515 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) 516 return mode; 517 /* 518 * if pin GPIOSEL bit is set and pin supports alternate function, 519 * it means DEFAULT mode 520 */ 521 if (mode) 522 return ABX500_DEFAULT; 523 524 /* 525 * pin use the AlternatFunction register 526 * read alt_bit1 value 527 */ 528 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 529 af.alt_bit1, &alt_bit1); 530 if (ret < 0) 531 goto out; 532 533 if (af.alt_bit2 != UNUSED) { 534 /* read alt_bit2 value */ 535 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 536 af.alt_bit2, 537 &alt_bit2); 538 if (ret < 0) 539 goto out; 540 } else 541 alt_bit2 = 0; 542 543 mode = (alt_bit2 << 1) + alt_bit1; 544 if (mode == af.alta_val) 545 return ABX500_ALT_A; 546 else if (mode == af.altb_val) 547 return ABX500_ALT_B; 548 else 549 return ABX500_ALT_C; 550 551 out: 552 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 553 return ret; 554 } 555 556 #ifdef CONFIG_DEBUG_FS 557 558 #include <linux/seq_file.h> 559 560 static void abx500_gpio_dbg_show_one(struct seq_file *s, 561 struct pinctrl_dev *pctldev, 562 struct gpio_chip *chip, 563 unsigned offset, unsigned gpio) 564 { 565 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 566 const char *label = gpiochip_is_requested(chip, offset - 1); 567 u8 gpio_offset = offset - 1; 568 int mode = -1; 569 bool is_out; 570 bool pd; 571 enum abx500_gpio_pull_updown pud = 0; 572 int ret; 573 574 const char *modes[] = { 575 [ABX500_DEFAULT] = "default", 576 [ABX500_ALT_A] = "altA", 577 [ABX500_ALT_B] = "altB", 578 [ABX500_ALT_C] = "altC", 579 }; 580 581 const char *pull_up_down[] = { 582 [ABX500_GPIO_PULL_DOWN] = "pull down", 583 [ABX500_GPIO_PULL_NONE] = "pull none", 584 [ABX500_GPIO_PULL_NONE + 1] = "pull none", 585 [ABX500_GPIO_PULL_UP] = "pull up", 586 }; 587 588 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 589 gpio_offset, &is_out); 590 if (ret < 0) 591 goto out; 592 593 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s", 594 gpio, label ?: "(none)", 595 is_out ? "out" : "in "); 596 597 if (!is_out) { 598 if (abx500_pullud_supported(chip, offset)) { 599 ret = abx500_get_pull_updown(pct, offset, &pud); 600 if (ret < 0) 601 goto out; 602 603 seq_printf(s, " %-9s", pull_up_down[pud]); 604 } else { 605 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG, 606 gpio_offset, &pd); 607 if (ret < 0) 608 goto out; 609 610 seq_printf(s, " %-9s", pull_up_down[pd]); 611 } 612 } else 613 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo"); 614 615 mode = abx500_get_mode(pctldev, chip, offset); 616 617 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]); 618 619 out: 620 if (ret < 0) 621 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 622 } 623 624 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 625 { 626 unsigned i; 627 unsigned gpio = chip->base; 628 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 629 struct pinctrl_dev *pctldev = pct->pctldev; 630 631 for (i = 0; i < chip->ngpio; i++, gpio++) { 632 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */ 633 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio); 634 seq_printf(s, "\n"); 635 } 636 } 637 638 #else 639 static inline void abx500_gpio_dbg_show_one(struct seq_file *s, 640 struct pinctrl_dev *pctldev, 641 struct gpio_chip *chip, 642 unsigned offset, unsigned gpio) 643 { 644 } 645 #define abx500_gpio_dbg_show NULL 646 #endif 647 648 static struct gpio_chip abx500gpio_chip = { 649 .label = "abx500-gpio", 650 .owner = THIS_MODULE, 651 .request = gpiochip_generic_request, 652 .free = gpiochip_generic_free, 653 .direction_input = abx500_gpio_direction_input, 654 .get = abx500_gpio_get, 655 .direction_output = abx500_gpio_direction_output, 656 .set = abx500_gpio_set, 657 .to_irq = abx500_gpio_to_irq, 658 .dbg_show = abx500_gpio_dbg_show, 659 }; 660 661 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 662 { 663 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 664 665 return pct->soc->nfunctions; 666 } 667 668 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev, 669 unsigned function) 670 { 671 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 672 673 return pct->soc->functions[function].name; 674 } 675 676 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev, 677 unsigned function, 678 const char * const **groups, 679 unsigned * const num_groups) 680 { 681 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 682 683 *groups = pct->soc->functions[function].groups; 684 *num_groups = pct->soc->functions[function].ngroups; 685 686 return 0; 687 } 688 689 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function, 690 unsigned group) 691 { 692 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 693 struct gpio_chip *chip = &pct->chip; 694 const struct abx500_pingroup *g; 695 int i; 696 int ret = 0; 697 698 g = &pct->soc->groups[group]; 699 if (g->altsetting < 0) 700 return -EINVAL; 701 702 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins); 703 704 for (i = 0; i < g->npins; i++) { 705 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n", 706 g->pins[i], g->altsetting); 707 708 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting); 709 } 710 711 if (ret < 0) 712 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 713 714 return ret; 715 } 716 717 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev, 718 struct pinctrl_gpio_range *range, 719 unsigned offset) 720 { 721 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 722 const struct abx500_pinrange *p; 723 int ret; 724 int i; 725 726 /* 727 * Different ranges have different ways to enable GPIO function on a 728 * pin, so refer back to our local range type, where we handily define 729 * what altfunc enables GPIO for a certain pin. 730 */ 731 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 732 p = &pct->soc->gpio_ranges[i]; 733 if ((offset >= p->offset) && 734 (offset < (p->offset + p->npins))) 735 break; 736 } 737 738 if (i == pct->soc->gpio_num_ranges) { 739 dev_err(pct->dev, "%s failed to locate range\n", __func__); 740 return -ENODEV; 741 } 742 743 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n", 744 p->altfunc, offset); 745 746 ret = abx500_set_mode(pct->pctldev, &pct->chip, 747 offset, p->altfunc); 748 if (ret < 0) 749 dev_err(pct->dev, "%s setting altfunc failed\n", __func__); 750 751 return ret; 752 } 753 754 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, 755 struct pinctrl_gpio_range *range, 756 unsigned offset) 757 { 758 } 759 760 static const struct pinmux_ops abx500_pinmux_ops = { 761 .get_functions_count = abx500_pmx_get_funcs_cnt, 762 .get_function_name = abx500_pmx_get_func_name, 763 .get_function_groups = abx500_pmx_get_func_groups, 764 .set_mux = abx500_pmx_set, 765 .gpio_request_enable = abx500_gpio_request_enable, 766 .gpio_disable_free = abx500_gpio_disable_free, 767 }; 768 769 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) 770 { 771 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 772 773 return pct->soc->ngroups; 774 } 775 776 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev, 777 unsigned selector) 778 { 779 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 780 781 return pct->soc->groups[selector].name; 782 } 783 784 static int abx500_get_group_pins(struct pinctrl_dev *pctldev, 785 unsigned selector, 786 const unsigned **pins, 787 unsigned *num_pins) 788 { 789 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 790 791 *pins = pct->soc->groups[selector].pins; 792 *num_pins = pct->soc->groups[selector].npins; 793 794 return 0; 795 } 796 797 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, 798 struct seq_file *s, unsigned offset) 799 { 800 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 801 struct gpio_chip *chip = &pct->chip; 802 803 abx500_gpio_dbg_show_one(s, pctldev, chip, offset, 804 chip->base + offset - 1); 805 } 806 807 static int abx500_dt_add_map_mux(struct pinctrl_map **map, 808 unsigned *reserved_maps, 809 unsigned *num_maps, const char *group, 810 const char *function) 811 { 812 if (*num_maps == *reserved_maps) 813 return -ENOSPC; 814 815 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 816 (*map)[*num_maps].data.mux.group = group; 817 (*map)[*num_maps].data.mux.function = function; 818 (*num_maps)++; 819 820 return 0; 821 } 822 823 static int abx500_dt_add_map_configs(struct pinctrl_map **map, 824 unsigned *reserved_maps, 825 unsigned *num_maps, const char *group, 826 unsigned long *configs, unsigned num_configs) 827 { 828 unsigned long *dup_configs; 829 830 if (*num_maps == *reserved_maps) 831 return -ENOSPC; 832 833 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 834 GFP_KERNEL); 835 if (!dup_configs) 836 return -ENOMEM; 837 838 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN; 839 840 (*map)[*num_maps].data.configs.group_or_pin = group; 841 (*map)[*num_maps].data.configs.configs = dup_configs; 842 (*map)[*num_maps].data.configs.num_configs = num_configs; 843 (*num_maps)++; 844 845 return 0; 846 } 847 848 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev, 849 const char *pin_name) 850 { 851 int i, pin_number; 852 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); 853 854 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) 855 for (i = 0; i < npct->soc->npins; i++) 856 if (npct->soc->pins[i].number == pin_number) 857 return npct->soc->pins[i].name; 858 return NULL; 859 } 860 861 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev, 862 struct device_node *np, 863 struct pinctrl_map **map, 864 unsigned *reserved_maps, 865 unsigned *num_maps) 866 { 867 int ret; 868 const char *function = NULL; 869 unsigned long *configs; 870 unsigned int nconfigs = 0; 871 struct property *prop; 872 873 ret = of_property_read_string(np, "function", &function); 874 if (ret >= 0) { 875 const char *group; 876 877 ret = of_property_count_strings(np, "groups"); 878 if (ret < 0) 879 goto exit; 880 881 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, 882 num_maps, ret); 883 if (ret < 0) 884 goto exit; 885 886 of_property_for_each_string(np, "groups", prop, group) { 887 ret = abx500_dt_add_map_mux(map, reserved_maps, 888 num_maps, group, function); 889 if (ret < 0) 890 goto exit; 891 } 892 } 893 894 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs); 895 if (nconfigs) { 896 const char *gpio_name; 897 const char *pin; 898 899 ret = of_property_count_strings(np, "pins"); 900 if (ret < 0) 901 goto exit; 902 903 ret = pinctrl_utils_reserve_map(pctldev, map, 904 reserved_maps, 905 num_maps, ret); 906 if (ret < 0) 907 goto exit; 908 909 of_property_for_each_string(np, "pins", prop, pin) { 910 gpio_name = abx500_find_pin_name(pctldev, pin); 911 912 ret = abx500_dt_add_map_configs(map, reserved_maps, 913 num_maps, gpio_name, configs, 1); 914 if (ret < 0) 915 goto exit; 916 } 917 } 918 919 exit: 920 return ret; 921 } 922 923 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev, 924 struct device_node *np_config, 925 struct pinctrl_map **map, unsigned *num_maps) 926 { 927 unsigned reserved_maps; 928 struct device_node *np; 929 int ret; 930 931 reserved_maps = 0; 932 *map = NULL; 933 *num_maps = 0; 934 935 for_each_child_of_node(np_config, np) { 936 ret = abx500_dt_subnode_to_map(pctldev, np, map, 937 &reserved_maps, num_maps); 938 if (ret < 0) { 939 pinctrl_utils_dt_free_map(pctldev, *map, *num_maps); 940 return ret; 941 } 942 } 943 944 return 0; 945 } 946 947 static const struct pinctrl_ops abx500_pinctrl_ops = { 948 .get_groups_count = abx500_get_groups_cnt, 949 .get_group_name = abx500_get_group_name, 950 .get_group_pins = abx500_get_group_pins, 951 .pin_dbg_show = abx500_pin_dbg_show, 952 .dt_node_to_map = abx500_dt_node_to_map, 953 .dt_free_map = pinctrl_utils_dt_free_map, 954 }; 955 956 static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 957 unsigned pin, 958 unsigned long *config) 959 { 960 return -ENOSYS; 961 } 962 963 static int abx500_pin_config_set(struct pinctrl_dev *pctldev, 964 unsigned pin, 965 unsigned long *configs, 966 unsigned num_configs) 967 { 968 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 969 struct gpio_chip *chip = &pct->chip; 970 unsigned offset; 971 int ret = -EINVAL; 972 int i; 973 enum pin_config_param param; 974 enum pin_config_param argument; 975 976 for (i = 0; i < num_configs; i++) { 977 param = pinconf_to_config_param(configs[i]); 978 argument = pinconf_to_config_argument(configs[i]); 979 980 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n", 981 pin, configs[i], 982 (param == PIN_CONFIG_OUTPUT) ? "output " : "input", 983 (param == PIN_CONFIG_OUTPUT) ? 984 (argument ? "high" : "low") : 985 (argument ? "pull up" : "pull down")); 986 987 /* on ABx500, there is no GPIO0, so adjust the offset */ 988 offset = pin - 1; 989 990 switch (param) { 991 case PIN_CONFIG_BIAS_DISABLE: 992 ret = abx500_gpio_direction_input(chip, offset); 993 if (ret < 0) 994 goto out; 995 /* 996 * Some chips only support pull down, while some 997 * actually support both pull up and pull down. Such 998 * chips have a "pullud" range specified for the pins 999 * that support both features. If the pin is not 1000 * within that range, we fall back to the old bit set 1001 * that only support pull down. 1002 */ 1003 if (abx500_pullud_supported(chip, pin)) 1004 ret = abx500_set_pull_updown(pct, 1005 pin, 1006 ABX500_GPIO_PULL_NONE); 1007 else 1008 /* Chip only supports pull down */ 1009 ret = abx500_gpio_set_bits(chip, 1010 AB8500_GPIO_PUD1_REG, offset, 1011 ABX500_GPIO_PULL_NONE); 1012 break; 1013 1014 case PIN_CONFIG_BIAS_PULL_DOWN: 1015 ret = abx500_gpio_direction_input(chip, offset); 1016 if (ret < 0) 1017 goto out; 1018 /* 1019 * if argument = 1 set the pull down 1020 * else clear the pull down 1021 * Some chips only support pull down, while some 1022 * actually support both pull up and pull down. Such 1023 * chips have a "pullud" range specified for the pins 1024 * that support both features. If the pin is not 1025 * within that range, we fall back to the old bit set 1026 * that only support pull down. 1027 */ 1028 if (abx500_pullud_supported(chip, pin)) 1029 ret = abx500_set_pull_updown(pct, 1030 pin, 1031 argument ? ABX500_GPIO_PULL_DOWN : 1032 ABX500_GPIO_PULL_NONE); 1033 else 1034 /* Chip only supports pull down */ 1035 ret = abx500_gpio_set_bits(chip, 1036 AB8500_GPIO_PUD1_REG, 1037 offset, 1038 argument ? ABX500_GPIO_PULL_DOWN : 1039 ABX500_GPIO_PULL_NONE); 1040 break; 1041 1042 case PIN_CONFIG_BIAS_PULL_UP: 1043 ret = abx500_gpio_direction_input(chip, offset); 1044 if (ret < 0) 1045 goto out; 1046 /* 1047 * if argument = 1 set the pull up 1048 * else clear the pull up 1049 */ 1050 ret = abx500_gpio_direction_input(chip, offset); 1051 /* 1052 * Some chips only support pull down, while some 1053 * actually support both pull up and pull down. Such 1054 * chips have a "pullud" range specified for the pins 1055 * that support both features. If the pin is not 1056 * within that range, do nothing 1057 */ 1058 if (abx500_pullud_supported(chip, pin)) 1059 ret = abx500_set_pull_updown(pct, 1060 pin, 1061 argument ? ABX500_GPIO_PULL_UP : 1062 ABX500_GPIO_PULL_NONE); 1063 break; 1064 1065 case PIN_CONFIG_OUTPUT: 1066 ret = abx500_gpio_direction_output(chip, offset, 1067 argument); 1068 break; 1069 1070 default: 1071 dev_err(chip->parent, 1072 "illegal configuration requested\n"); 1073 } 1074 } /* for each config */ 1075 out: 1076 if (ret < 0) 1077 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 1078 1079 return ret; 1080 } 1081 1082 static const struct pinconf_ops abx500_pinconf_ops = { 1083 .pin_config_get = abx500_pin_config_get, 1084 .pin_config_set = abx500_pin_config_set, 1085 .is_generic = true, 1086 }; 1087 1088 static struct pinctrl_desc abx500_pinctrl_desc = { 1089 .name = "pinctrl-abx500", 1090 .pctlops = &abx500_pinctrl_ops, 1091 .pmxops = &abx500_pinmux_ops, 1092 .confops = &abx500_pinconf_ops, 1093 .owner = THIS_MODULE, 1094 }; 1095 1096 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) 1097 { 1098 unsigned int lowest = 0; 1099 unsigned int highest = 0; 1100 unsigned int npins = 0; 1101 int i; 1102 1103 /* 1104 * Compute number of GPIOs from the last SoC gpio range descriptors 1105 * These ranges may include "holes" but the GPIO number space shall 1106 * still be homogeneous, so we need to detect and account for any 1107 * such holes so that these are included in the number of GPIO pins. 1108 */ 1109 for (i = 0; i < soc->gpio_num_ranges; i++) { 1110 unsigned gstart; 1111 unsigned gend; 1112 const struct abx500_pinrange *p; 1113 1114 p = &soc->gpio_ranges[i]; 1115 gstart = p->offset; 1116 gend = p->offset + p->npins - 1; 1117 1118 if (i == 0) { 1119 /* First iteration, set start values */ 1120 lowest = gstart; 1121 highest = gend; 1122 } else { 1123 if (gstart < lowest) 1124 lowest = gstart; 1125 if (gend > highest) 1126 highest = gend; 1127 } 1128 } 1129 /* this gives the absolute number of pins */ 1130 npins = highest - lowest + 1; 1131 return npins; 1132 } 1133 1134 static const struct of_device_id abx500_gpio_match[] = { 1135 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, }, 1136 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, 1137 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, }, 1138 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, }, 1139 { } 1140 }; 1141 1142 static int abx500_gpio_probe(struct platform_device *pdev) 1143 { 1144 struct device_node *np = pdev->dev.of_node; 1145 const struct of_device_id *match; 1146 struct abx500_pinctrl *pct; 1147 unsigned int id = -1; 1148 int ret; 1149 int i; 1150 1151 if (!np) { 1152 dev_err(&pdev->dev, "gpio dt node missing\n"); 1153 return -ENODEV; 1154 } 1155 1156 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl), 1157 GFP_KERNEL); 1158 if (pct == NULL) { 1159 dev_err(&pdev->dev, 1160 "failed to allocate memory for pct\n"); 1161 return -ENOMEM; 1162 } 1163 1164 pct->dev = &pdev->dev; 1165 pct->parent = dev_get_drvdata(pdev->dev.parent); 1166 pct->chip = abx500gpio_chip; 1167 pct->chip.parent = &pdev->dev; 1168 pct->chip.base = -1; /* Dynamic allocation */ 1169 1170 match = of_match_device(abx500_gpio_match, &pdev->dev); 1171 if (!match) { 1172 dev_err(&pdev->dev, "gpio dt not matching\n"); 1173 return -ENODEV; 1174 } 1175 id = (unsigned long)match->data; 1176 1177 /* Poke in other ASIC variants here */ 1178 switch (id) { 1179 case PINCTRL_AB8500: 1180 abx500_pinctrl_ab8500_init(&pct->soc); 1181 break; 1182 case PINCTRL_AB8540: 1183 abx500_pinctrl_ab8540_init(&pct->soc); 1184 break; 1185 case PINCTRL_AB9540: 1186 abx500_pinctrl_ab9540_init(&pct->soc); 1187 break; 1188 case PINCTRL_AB8505: 1189 abx500_pinctrl_ab8505_init(&pct->soc); 1190 break; 1191 default: 1192 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id); 1193 return -EINVAL; 1194 } 1195 1196 if (!pct->soc) { 1197 dev_err(&pdev->dev, "Invalid SOC data\n"); 1198 return -EINVAL; 1199 } 1200 1201 pct->chip.ngpio = abx500_get_gpio_num(pct->soc); 1202 pct->irq_cluster = pct->soc->gpio_irq_cluster; 1203 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; 1204 1205 ret = gpiochip_add_data(&pct->chip, pct); 1206 if (ret) { 1207 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 1208 return ret; 1209 } 1210 dev_info(&pdev->dev, "added gpiochip\n"); 1211 1212 abx500_pinctrl_desc.pins = pct->soc->pins; 1213 abx500_pinctrl_desc.npins = pct->soc->npins; 1214 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct); 1215 if (IS_ERR(pct->pctldev)) { 1216 dev_err(&pdev->dev, 1217 "could not register abx500 pinctrl driver\n"); 1218 ret = PTR_ERR(pct->pctldev); 1219 goto out_rem_chip; 1220 } 1221 dev_info(&pdev->dev, "registered pin controller\n"); 1222 1223 /* We will handle a range of GPIO pins */ 1224 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 1225 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; 1226 1227 ret = gpiochip_add_pin_range(&pct->chip, 1228 dev_name(&pdev->dev), 1229 p->offset - 1, p->offset, p->npins); 1230 if (ret < 0) 1231 goto out_rem_chip; 1232 } 1233 1234 platform_set_drvdata(pdev, pct); 1235 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n"); 1236 1237 return 0; 1238 1239 out_rem_chip: 1240 gpiochip_remove(&pct->chip); 1241 return ret; 1242 } 1243 1244 /** 1245 * abx500_gpio_remove() - remove Ab8500-gpio driver 1246 * @pdev: Platform device registered 1247 */ 1248 static int abx500_gpio_remove(struct platform_device *pdev) 1249 { 1250 struct abx500_pinctrl *pct = platform_get_drvdata(pdev); 1251 1252 gpiochip_remove(&pct->chip); 1253 return 0; 1254 } 1255 1256 static struct platform_driver abx500_gpio_driver = { 1257 .driver = { 1258 .name = "abx500-gpio", 1259 .of_match_table = abx500_gpio_match, 1260 }, 1261 .probe = abx500_gpio_probe, 1262 .remove = abx500_gpio_remove, 1263 }; 1264 1265 static int __init abx500_gpio_init(void) 1266 { 1267 return platform_driver_register(&abx500_gpio_driver); 1268 } 1269 core_initcall(abx500_gpio_init); 1270 1271 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>"); 1272 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO"); 1273 MODULE_ALIAS("platform:abx500-gpio"); 1274 MODULE_LICENSE("GPL v2"); 1275