1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) ST-Ericsson SA 2013
4 *
5 * Author: Patrice Chotard <patrice.chotard@st.com>
6 *
7 * Driver allows to use AxB5xx unused pins to be used as GPIO
8 */
9 #include <linux/bitops.h>
10 #include <linux/err.h>
11 #include <linux/gpio/driver.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/irqdomain.h>
16 #include <linux/kernel.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/seq_file.h>
21 #include <linux/slab.h>
22 #include <linux/types.h>
23
24 #include <linux/mfd/abx500.h>
25 #include <linux/mfd/abx500/ab8500.h>
26
27 #include <linux/pinctrl/consumer.h>
28 #include <linux/pinctrl/machine.h>
29 #include <linux/pinctrl/pinconf-generic.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinctrl.h>
32 #include <linux/pinctrl/pinmux.h>
33
34 #include "../core.h"
35 #include "../pinconf.h"
36 #include "../pinctrl-utils.h"
37
38 #include "pinctrl-abx500.h"
39
40 /*
41 * GPIO registers offset
42 * Bank: 0x10
43 */
44 #define AB8500_GPIO_SEL1_REG 0x00
45 #define AB8500_GPIO_SEL2_REG 0x01
46 #define AB8500_GPIO_SEL3_REG 0x02
47 #define AB8500_GPIO_SEL4_REG 0x03
48 #define AB8500_GPIO_SEL5_REG 0x04
49 #define AB8500_GPIO_SEL6_REG 0x05
50
51 #define AB8500_GPIO_DIR1_REG 0x10
52 #define AB8500_GPIO_DIR2_REG 0x11
53 #define AB8500_GPIO_DIR3_REG 0x12
54 #define AB8500_GPIO_DIR4_REG 0x13
55 #define AB8500_GPIO_DIR5_REG 0x14
56 #define AB8500_GPIO_DIR6_REG 0x15
57
58 #define AB8500_GPIO_OUT1_REG 0x20
59 #define AB8500_GPIO_OUT2_REG 0x21
60 #define AB8500_GPIO_OUT3_REG 0x22
61 #define AB8500_GPIO_OUT4_REG 0x23
62 #define AB8500_GPIO_OUT5_REG 0x24
63 #define AB8500_GPIO_OUT6_REG 0x25
64
65 #define AB8500_GPIO_PUD1_REG 0x30
66 #define AB8500_GPIO_PUD2_REG 0x31
67 #define AB8500_GPIO_PUD3_REG 0x32
68 #define AB8500_GPIO_PUD4_REG 0x33
69 #define AB8500_GPIO_PUD5_REG 0x34
70 #define AB8500_GPIO_PUD6_REG 0x35
71
72 #define AB8500_GPIO_IN1_REG 0x40
73 #define AB8500_GPIO_IN2_REG 0x41
74 #define AB8500_GPIO_IN3_REG 0x42
75 #define AB8500_GPIO_IN4_REG 0x43
76 #define AB8500_GPIO_IN5_REG 0x44
77 #define AB8500_GPIO_IN6_REG 0x45
78 #define AB8500_GPIO_ALTFUN_REG 0x50
79
80 #define ABX500_GPIO_INPUT 0
81 #define ABX500_GPIO_OUTPUT 1
82
83 struct abx500_pinctrl {
84 struct device *dev;
85 struct pinctrl_dev *pctldev;
86 struct abx500_pinctrl_soc_data *soc;
87 struct gpio_chip chip;
88 struct ab8500 *parent;
89 struct abx500_gpio_irq_cluster *irq_cluster;
90 int irq_cluster_size;
91 };
92
abx500_gpio_get_bit(struct gpio_chip * chip,u8 reg,unsigned offset,bool * bit)93 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
94 unsigned offset, bool *bit)
95 {
96 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
97 u8 pos = offset % 8;
98 u8 val;
99 int ret;
100
101 reg += offset / 8;
102 ret = abx500_get_register_interruptible(pct->dev,
103 AB8500_MISC, reg, &val);
104 if (ret < 0) {
105 dev_err(pct->dev,
106 "%s read reg =%x, offset=%x failed (%d)\n",
107 __func__, reg, offset, ret);
108 return ret;
109 }
110
111 *bit = !!(val & BIT(pos));
112
113 return 0;
114 }
115
abx500_gpio_set_bits(struct gpio_chip * chip,u8 reg,unsigned offset,int val)116 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
117 unsigned offset, int val)
118 {
119 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
120 u8 pos = offset % 8;
121 int ret;
122
123 reg += offset / 8;
124 ret = abx500_mask_and_set_register_interruptible(pct->dev,
125 AB8500_MISC, reg, BIT(pos), val << pos);
126 if (ret < 0)
127 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
128 __func__, reg, offset, ret);
129
130 return ret;
131 }
132
133 /**
134 * abx500_gpio_get() - Get the particular GPIO value
135 * @chip: Gpio device
136 * @offset: GPIO number to read
137 */
abx500_gpio_get(struct gpio_chip * chip,unsigned offset)138 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
139 {
140 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
141 bool bit;
142 bool is_out;
143 u8 gpio_offset = offset - 1;
144 int ret;
145
146 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
147 gpio_offset, &is_out);
148 if (ret < 0)
149 goto out;
150
151 if (is_out)
152 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
153 gpio_offset, &bit);
154 else
155 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
156 gpio_offset, &bit);
157 out:
158 if (ret < 0) {
159 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
160 return ret;
161 }
162
163 return bit;
164 }
165
abx500_gpio_set(struct gpio_chip * chip,unsigned offset,int val)166 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
167 {
168 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
169 int ret;
170
171 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
172 if (ret < 0)
173 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
174 }
175
abx500_gpio_direction_output(struct gpio_chip * chip,unsigned offset,int val)176 static int abx500_gpio_direction_output(struct gpio_chip *chip,
177 unsigned offset,
178 int val)
179 {
180 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
181 int ret;
182
183 /* set direction as output */
184 ret = abx500_gpio_set_bits(chip,
185 AB8500_GPIO_DIR1_REG,
186 offset,
187 ABX500_GPIO_OUTPUT);
188 if (ret < 0)
189 goto out;
190
191 /* disable pull down */
192 ret = abx500_gpio_set_bits(chip,
193 AB8500_GPIO_PUD1_REG,
194 offset,
195 ABX500_GPIO_PULL_NONE);
196
197 out:
198 if (ret < 0) {
199 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
200 return ret;
201 }
202
203 /* set the output as 1 or 0 */
204 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
205 }
206
abx500_gpio_direction_input(struct gpio_chip * chip,unsigned offset)207 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
208 {
209 /* set the register as input */
210 return abx500_gpio_set_bits(chip,
211 AB8500_GPIO_DIR1_REG,
212 offset,
213 ABX500_GPIO_INPUT);
214 }
215
abx500_gpio_to_irq(struct gpio_chip * chip,unsigned offset)216 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
217 {
218 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
219 /* The AB8500 GPIO numbers are off by one */
220 int gpio = offset + 1;
221 int hwirq;
222 int i;
223
224 for (i = 0; i < pct->irq_cluster_size; i++) {
225 struct abx500_gpio_irq_cluster *cluster =
226 &pct->irq_cluster[i];
227
228 if (gpio >= cluster->start && gpio <= cluster->end) {
229 /*
230 * The ABx500 GPIO's associated IRQs are clustered together
231 * throughout the interrupt numbers at irregular intervals.
232 * To solve this quandry, we have placed the read-in values
233 * into the cluster information table.
234 */
235 hwirq = gpio - cluster->start + cluster->to_irq;
236 return irq_create_mapping(pct->parent->domain, hwirq);
237 }
238 }
239
240 return -EINVAL;
241 }
242
abx500_set_mode(struct pinctrl_dev * pctldev,struct gpio_chip * chip,unsigned gpio,int alt_setting)243 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
244 unsigned gpio, int alt_setting)
245 {
246 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
247 struct alternate_functions af = pct->soc->alternate_functions[gpio];
248 int ret;
249 int val;
250 unsigned offset;
251
252 const char *modes[] = {
253 [ABX500_DEFAULT] = "default",
254 [ABX500_ALT_A] = "altA",
255 [ABX500_ALT_B] = "altB",
256 [ABX500_ALT_C] = "altC",
257 };
258
259 /* sanity check */
260 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
261 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
262 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
263 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
264 modes[alt_setting]);
265 return -EINVAL;
266 }
267
268 /* on ABx5xx, there is no GPIO0, so adjust the offset */
269 offset = gpio - 1;
270
271 switch (alt_setting) {
272 case ABX500_DEFAULT:
273 /*
274 * for ABx5xx family, default mode is always selected by
275 * writing 0 to GPIOSELx register, except for pins which
276 * support at least ALT_B mode, default mode is selected
277 * by writing 1 to GPIOSELx register
278 */
279 val = 0;
280 if (af.alt_bit1 != UNUSED)
281 val++;
282
283 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
284 offset, val);
285 break;
286
287 case ABX500_ALT_A:
288 /*
289 * for ABx5xx family, alt_a mode is always selected by
290 * writing 1 to GPIOSELx register, except for pins which
291 * support at least ALT_B mode, alt_a mode is selected
292 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
293 * register
294 */
295 if (af.alt_bit1 != UNUSED) {
296 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
297 offset, 0);
298 if (ret < 0)
299 goto out;
300
301 ret = abx500_gpio_set_bits(chip,
302 AB8500_GPIO_ALTFUN_REG,
303 af.alt_bit1,
304 !!(af.alta_val & BIT(0)));
305 if (ret < 0)
306 goto out;
307
308 if (af.alt_bit2 != UNUSED)
309 ret = abx500_gpio_set_bits(chip,
310 AB8500_GPIO_ALTFUN_REG,
311 af.alt_bit2,
312 !!(af.alta_val & BIT(1)));
313 } else
314 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
315 offset, 1);
316 break;
317
318 case ABX500_ALT_B:
319 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
320 offset, 0);
321 if (ret < 0)
322 goto out;
323
324 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
325 af.alt_bit1, !!(af.altb_val & BIT(0)));
326 if (ret < 0)
327 goto out;
328
329 if (af.alt_bit2 != UNUSED)
330 ret = abx500_gpio_set_bits(chip,
331 AB8500_GPIO_ALTFUN_REG,
332 af.alt_bit2,
333 !!(af.altb_val & BIT(1)));
334 break;
335
336 case ABX500_ALT_C:
337 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
338 offset, 0);
339 if (ret < 0)
340 goto out;
341
342 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
343 af.alt_bit2, !!(af.altc_val & BIT(0)));
344 if (ret < 0)
345 goto out;
346
347 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
348 af.alt_bit2, !!(af.altc_val & BIT(1)));
349 break;
350
351 default:
352 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
353
354 return -EINVAL;
355 }
356 out:
357 if (ret < 0)
358 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
359
360 return ret;
361 }
362
363 #ifdef CONFIG_DEBUG_FS
abx500_get_mode(struct pinctrl_dev * pctldev,struct gpio_chip * chip,unsigned gpio)364 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
365 unsigned gpio)
366 {
367 u8 mode;
368 bool bit_mode;
369 bool alt_bit1;
370 bool alt_bit2;
371 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
372 struct alternate_functions af = pct->soc->alternate_functions[gpio];
373 /* on ABx5xx, there is no GPIO0, so adjust the offset */
374 unsigned offset = gpio - 1;
375 int ret;
376
377 /*
378 * if gpiosel_bit is set to unused,
379 * it means no GPIO or special case
380 */
381 if (af.gpiosel_bit == UNUSED)
382 return ABX500_DEFAULT;
383
384 /* read GpioSelx register */
385 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
386 af.gpiosel_bit, &bit_mode);
387 if (ret < 0)
388 goto out;
389
390 mode = bit_mode;
391
392 /* sanity check */
393 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
394 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
395 dev_err(pct->dev,
396 "alt_bitX value not in correct range (-1 to 7)\n");
397 return -EINVAL;
398 }
399
400 /* if alt_bit2 is used, alt_bit1 must be used too */
401 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
402 dev_err(pct->dev,
403 "if alt_bit2 is used, alt_bit1 can't be unused\n");
404 return -EINVAL;
405 }
406
407 /* check if pin use AlternateFunction register */
408 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
409 return mode;
410 /*
411 * if pin GPIOSEL bit is set and pin supports alternate function,
412 * it means DEFAULT mode
413 */
414 if (mode)
415 return ABX500_DEFAULT;
416
417 /*
418 * pin use the AlternatFunction register
419 * read alt_bit1 value
420 */
421 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
422 af.alt_bit1, &alt_bit1);
423 if (ret < 0)
424 goto out;
425
426 if (af.alt_bit2 != UNUSED) {
427 /* read alt_bit2 value */
428 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
429 af.alt_bit2,
430 &alt_bit2);
431 if (ret < 0)
432 goto out;
433 } else
434 alt_bit2 = 0;
435
436 mode = (alt_bit2 << 1) + alt_bit1;
437 if (mode == af.alta_val)
438 return ABX500_ALT_A;
439 else if (mode == af.altb_val)
440 return ABX500_ALT_B;
441 else
442 return ABX500_ALT_C;
443
444 out:
445 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
446 return ret;
447 }
448
abx500_gpio_dbg_show_one(struct seq_file * s,struct pinctrl_dev * pctldev,struct gpio_chip * chip,unsigned offset,unsigned gpio)449 static void abx500_gpio_dbg_show_one(struct seq_file *s,
450 struct pinctrl_dev *pctldev,
451 struct gpio_chip *chip,
452 unsigned offset, unsigned gpio)
453 {
454 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
455 const char *label = gpiochip_is_requested(chip, offset - 1);
456 u8 gpio_offset = offset - 1;
457 int mode = -1;
458 bool is_out;
459 bool pd;
460 int ret;
461
462 const char *modes[] = {
463 [ABX500_DEFAULT] = "default",
464 [ABX500_ALT_A] = "altA",
465 [ABX500_ALT_B] = "altB",
466 [ABX500_ALT_C] = "altC",
467 };
468
469 const char *pull_up_down[] = {
470 [ABX500_GPIO_PULL_DOWN] = "pull down",
471 [ABX500_GPIO_PULL_NONE] = "pull none",
472 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
473 [ABX500_GPIO_PULL_UP] = "pull up",
474 };
475
476 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
477 gpio_offset, &is_out);
478 if (ret < 0)
479 goto out;
480
481 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
482 gpio, label ?: "(none)",
483 is_out ? "out" : "in ");
484
485 if (!is_out) {
486 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
487 gpio_offset, &pd);
488 if (ret < 0)
489 goto out;
490
491 seq_printf(s, " %-9s", pull_up_down[pd]);
492 } else
493 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
494
495 mode = abx500_get_mode(pctldev, chip, offset);
496
497 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
498
499 out:
500 if (ret < 0)
501 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
502 }
503
abx500_gpio_dbg_show(struct seq_file * s,struct gpio_chip * chip)504 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
505 {
506 unsigned i;
507 unsigned gpio = chip->base;
508 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
509 struct pinctrl_dev *pctldev = pct->pctldev;
510
511 for (i = 0; i < chip->ngpio; i++, gpio++) {
512 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
513 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
514 seq_putc(s, '\n');
515 }
516 }
517
518 #else
abx500_gpio_dbg_show_one(struct seq_file * s,struct pinctrl_dev * pctldev,struct gpio_chip * chip,unsigned offset,unsigned gpio)519 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
520 struct pinctrl_dev *pctldev,
521 struct gpio_chip *chip,
522 unsigned offset, unsigned gpio)
523 {
524 }
525 #define abx500_gpio_dbg_show NULL
526 #endif
527
528 static const struct gpio_chip abx500gpio_chip = {
529 .label = "abx500-gpio",
530 .owner = THIS_MODULE,
531 .request = gpiochip_generic_request,
532 .free = gpiochip_generic_free,
533 .direction_input = abx500_gpio_direction_input,
534 .get = abx500_gpio_get,
535 .direction_output = abx500_gpio_direction_output,
536 .set = abx500_gpio_set,
537 .to_irq = abx500_gpio_to_irq,
538 .dbg_show = abx500_gpio_dbg_show,
539 };
540
abx500_pmx_get_funcs_cnt(struct pinctrl_dev * pctldev)541 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
542 {
543 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
544
545 return pct->soc->nfunctions;
546 }
547
abx500_pmx_get_func_name(struct pinctrl_dev * pctldev,unsigned function)548 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
549 unsigned function)
550 {
551 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
552
553 return pct->soc->functions[function].name;
554 }
555
abx500_pmx_get_func_groups(struct pinctrl_dev * pctldev,unsigned function,const char * const ** groups,unsigned * const num_groups)556 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
557 unsigned function,
558 const char * const **groups,
559 unsigned * const num_groups)
560 {
561 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
562
563 *groups = pct->soc->functions[function].groups;
564 *num_groups = pct->soc->functions[function].ngroups;
565
566 return 0;
567 }
568
abx500_pmx_set(struct pinctrl_dev * pctldev,unsigned function,unsigned group)569 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
570 unsigned group)
571 {
572 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
573 struct gpio_chip *chip = &pct->chip;
574 const struct abx500_pingroup *g;
575 int i;
576 int ret = 0;
577
578 g = &pct->soc->groups[group];
579 if (g->altsetting < 0)
580 return -EINVAL;
581
582 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
583
584 for (i = 0; i < g->npins; i++) {
585 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
586 g->pins[i], g->altsetting);
587
588 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
589 }
590
591 if (ret < 0)
592 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
593
594 return ret;
595 }
596
abx500_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned offset)597 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
598 struct pinctrl_gpio_range *range,
599 unsigned offset)
600 {
601 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
602 const struct abx500_pinrange *p;
603 int ret;
604 int i;
605
606 /*
607 * Different ranges have different ways to enable GPIO function on a
608 * pin, so refer back to our local range type, where we handily define
609 * what altfunc enables GPIO for a certain pin.
610 */
611 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
612 p = &pct->soc->gpio_ranges[i];
613 if ((offset >= p->offset) &&
614 (offset < (p->offset + p->npins)))
615 break;
616 }
617
618 if (i == pct->soc->gpio_num_ranges) {
619 dev_err(pct->dev, "%s failed to locate range\n", __func__);
620 return -ENODEV;
621 }
622
623 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
624 p->altfunc, offset);
625
626 ret = abx500_set_mode(pct->pctldev, &pct->chip,
627 offset, p->altfunc);
628 if (ret < 0)
629 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
630
631 return ret;
632 }
633
abx500_gpio_disable_free(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned offset)634 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
635 struct pinctrl_gpio_range *range,
636 unsigned offset)
637 {
638 }
639
640 static const struct pinmux_ops abx500_pinmux_ops = {
641 .get_functions_count = abx500_pmx_get_funcs_cnt,
642 .get_function_name = abx500_pmx_get_func_name,
643 .get_function_groups = abx500_pmx_get_func_groups,
644 .set_mux = abx500_pmx_set,
645 .gpio_request_enable = abx500_gpio_request_enable,
646 .gpio_disable_free = abx500_gpio_disable_free,
647 };
648
abx500_get_groups_cnt(struct pinctrl_dev * pctldev)649 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
650 {
651 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
652
653 return pct->soc->ngroups;
654 }
655
abx500_get_group_name(struct pinctrl_dev * pctldev,unsigned selector)656 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
657 unsigned selector)
658 {
659 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
660
661 return pct->soc->groups[selector].name;
662 }
663
abx500_get_group_pins(struct pinctrl_dev * pctldev,unsigned selector,const unsigned ** pins,unsigned * num_pins)664 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
665 unsigned selector,
666 const unsigned **pins,
667 unsigned *num_pins)
668 {
669 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
670
671 *pins = pct->soc->groups[selector].pins;
672 *num_pins = pct->soc->groups[selector].npins;
673
674 return 0;
675 }
676
abx500_pin_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned offset)677 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
678 struct seq_file *s, unsigned offset)
679 {
680 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
681 struct gpio_chip *chip = &pct->chip;
682
683 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
684 chip->base + offset - 1);
685 }
686
abx500_dt_add_map_mux(struct pinctrl_map ** map,unsigned * reserved_maps,unsigned * num_maps,const char * group,const char * function)687 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
688 unsigned *reserved_maps,
689 unsigned *num_maps, const char *group,
690 const char *function)
691 {
692 if (*num_maps == *reserved_maps)
693 return -ENOSPC;
694
695 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
696 (*map)[*num_maps].data.mux.group = group;
697 (*map)[*num_maps].data.mux.function = function;
698 (*num_maps)++;
699
700 return 0;
701 }
702
abx500_dt_add_map_configs(struct pinctrl_map ** map,unsigned * reserved_maps,unsigned * num_maps,const char * group,unsigned long * configs,unsigned num_configs)703 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
704 unsigned *reserved_maps,
705 unsigned *num_maps, const char *group,
706 unsigned long *configs, unsigned num_configs)
707 {
708 unsigned long *dup_configs;
709
710 if (*num_maps == *reserved_maps)
711 return -ENOSPC;
712
713 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
714 GFP_KERNEL);
715 if (!dup_configs)
716 return -ENOMEM;
717
718 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
719
720 (*map)[*num_maps].data.configs.group_or_pin = group;
721 (*map)[*num_maps].data.configs.configs = dup_configs;
722 (*map)[*num_maps].data.configs.num_configs = num_configs;
723 (*num_maps)++;
724
725 return 0;
726 }
727
abx500_find_pin_name(struct pinctrl_dev * pctldev,const char * pin_name)728 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
729 const char *pin_name)
730 {
731 int i, pin_number;
732 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
733
734 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
735 for (i = 0; i < npct->soc->npins; i++)
736 if (npct->soc->pins[i].number == pin_number)
737 return npct->soc->pins[i].name;
738 return NULL;
739 }
740
abx500_dt_subnode_to_map(struct pinctrl_dev * pctldev,struct device_node * np,struct pinctrl_map ** map,unsigned * reserved_maps,unsigned * num_maps)741 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
742 struct device_node *np,
743 struct pinctrl_map **map,
744 unsigned *reserved_maps,
745 unsigned *num_maps)
746 {
747 int ret;
748 const char *function = NULL;
749 unsigned long *configs;
750 unsigned int nconfigs = 0;
751 struct property *prop;
752
753 ret = of_property_read_string(np, "function", &function);
754 if (ret >= 0) {
755 const char *group;
756
757 ret = of_property_count_strings(np, "groups");
758 if (ret < 0)
759 goto exit;
760
761 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
762 num_maps, ret);
763 if (ret < 0)
764 goto exit;
765
766 of_property_for_each_string(np, "groups", prop, group) {
767 ret = abx500_dt_add_map_mux(map, reserved_maps,
768 num_maps, group, function);
769 if (ret < 0)
770 goto exit;
771 }
772 }
773
774 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
775 if (nconfigs) {
776 const char *gpio_name;
777 const char *pin;
778
779 ret = of_property_count_strings(np, "pins");
780 if (ret < 0)
781 goto exit;
782
783 ret = pinctrl_utils_reserve_map(pctldev, map,
784 reserved_maps,
785 num_maps, ret);
786 if (ret < 0)
787 goto exit;
788
789 of_property_for_each_string(np, "pins", prop, pin) {
790 gpio_name = abx500_find_pin_name(pctldev, pin);
791
792 ret = abx500_dt_add_map_configs(map, reserved_maps,
793 num_maps, gpio_name, configs, 1);
794 if (ret < 0)
795 goto exit;
796 }
797 }
798
799 exit:
800 return ret;
801 }
802
abx500_dt_node_to_map(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned * num_maps)803 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
804 struct device_node *np_config,
805 struct pinctrl_map **map, unsigned *num_maps)
806 {
807 unsigned reserved_maps;
808 struct device_node *np;
809 int ret;
810
811 reserved_maps = 0;
812 *map = NULL;
813 *num_maps = 0;
814
815 for_each_child_of_node(np_config, np) {
816 ret = abx500_dt_subnode_to_map(pctldev, np, map,
817 &reserved_maps, num_maps);
818 if (ret < 0) {
819 pinctrl_utils_free_map(pctldev, *map, *num_maps);
820 of_node_put(np);
821 return ret;
822 }
823 }
824
825 return 0;
826 }
827
828 static const struct pinctrl_ops abx500_pinctrl_ops = {
829 .get_groups_count = abx500_get_groups_cnt,
830 .get_group_name = abx500_get_group_name,
831 .get_group_pins = abx500_get_group_pins,
832 .pin_dbg_show = abx500_pin_dbg_show,
833 .dt_node_to_map = abx500_dt_node_to_map,
834 .dt_free_map = pinctrl_utils_free_map,
835 };
836
abx500_pin_config_get(struct pinctrl_dev * pctldev,unsigned pin,unsigned long * config)837 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
838 unsigned pin,
839 unsigned long *config)
840 {
841 return -ENOSYS;
842 }
843
abx500_pin_config_set(struct pinctrl_dev * pctldev,unsigned pin,unsigned long * configs,unsigned num_configs)844 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
845 unsigned pin,
846 unsigned long *configs,
847 unsigned num_configs)
848 {
849 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
850 struct gpio_chip *chip = &pct->chip;
851 unsigned offset;
852 int ret = -EINVAL;
853 int i;
854 enum pin_config_param param;
855 enum pin_config_param argument;
856
857 for (i = 0; i < num_configs; i++) {
858 param = pinconf_to_config_param(configs[i]);
859 argument = pinconf_to_config_argument(configs[i]);
860
861 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
862 pin, configs[i],
863 (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
864 (param == PIN_CONFIG_OUTPUT) ?
865 (argument ? "high" : "low") :
866 (argument ? "pull up" : "pull down"));
867
868 /* on ABx500, there is no GPIO0, so adjust the offset */
869 offset = pin - 1;
870
871 switch (param) {
872 case PIN_CONFIG_BIAS_DISABLE:
873 ret = abx500_gpio_direction_input(chip, offset);
874 if (ret < 0)
875 goto out;
876
877 /* Chip only supports pull down */
878 ret = abx500_gpio_set_bits(chip,
879 AB8500_GPIO_PUD1_REG, offset,
880 ABX500_GPIO_PULL_NONE);
881 break;
882
883 case PIN_CONFIG_BIAS_PULL_DOWN:
884 ret = abx500_gpio_direction_input(chip, offset);
885 if (ret < 0)
886 goto out;
887 /*
888 * if argument = 1 set the pull down
889 * else clear the pull down
890 * Chip only supports pull down
891 */
892 ret = abx500_gpio_set_bits(chip,
893 AB8500_GPIO_PUD1_REG,
894 offset,
895 argument ? ABX500_GPIO_PULL_DOWN :
896 ABX500_GPIO_PULL_NONE);
897 break;
898
899 case PIN_CONFIG_BIAS_PULL_UP:
900 ret = abx500_gpio_direction_input(chip, offset);
901 if (ret < 0)
902 goto out;
903 /*
904 * if argument = 1 set the pull up
905 * else clear the pull up
906 */
907 ret = abx500_gpio_direction_input(chip, offset);
908 break;
909
910 case PIN_CONFIG_OUTPUT:
911 ret = abx500_gpio_direction_output(chip, offset,
912 argument);
913 break;
914
915 default:
916 dev_err(chip->parent,
917 "illegal configuration requested\n");
918 }
919 } /* for each config */
920 out:
921 if (ret < 0)
922 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
923
924 return ret;
925 }
926
927 static const struct pinconf_ops abx500_pinconf_ops = {
928 .pin_config_get = abx500_pin_config_get,
929 .pin_config_set = abx500_pin_config_set,
930 .is_generic = true,
931 };
932
933 static struct pinctrl_desc abx500_pinctrl_desc = {
934 .name = "pinctrl-abx500",
935 .pctlops = &abx500_pinctrl_ops,
936 .pmxops = &abx500_pinmux_ops,
937 .confops = &abx500_pinconf_ops,
938 .owner = THIS_MODULE,
939 };
940
abx500_get_gpio_num(struct abx500_pinctrl_soc_data * soc)941 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
942 {
943 unsigned int lowest = 0;
944 unsigned int highest = 0;
945 unsigned int npins = 0;
946 int i;
947
948 /*
949 * Compute number of GPIOs from the last SoC gpio range descriptors
950 * These ranges may include "holes" but the GPIO number space shall
951 * still be homogeneous, so we need to detect and account for any
952 * such holes so that these are included in the number of GPIO pins.
953 */
954 for (i = 0; i < soc->gpio_num_ranges; i++) {
955 unsigned gstart;
956 unsigned gend;
957 const struct abx500_pinrange *p;
958
959 p = &soc->gpio_ranges[i];
960 gstart = p->offset;
961 gend = p->offset + p->npins - 1;
962
963 if (i == 0) {
964 /* First iteration, set start values */
965 lowest = gstart;
966 highest = gend;
967 } else {
968 if (gstart < lowest)
969 lowest = gstart;
970 if (gend > highest)
971 highest = gend;
972 }
973 }
974 /* this gives the absolute number of pins */
975 npins = highest - lowest + 1;
976 return npins;
977 }
978
979 static const struct of_device_id abx500_gpio_match[] = {
980 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
981 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
982 { }
983 };
984
abx500_gpio_probe(struct platform_device * pdev)985 static int abx500_gpio_probe(struct platform_device *pdev)
986 {
987 struct device_node *np = pdev->dev.of_node;
988 const struct of_device_id *match;
989 struct abx500_pinctrl *pct;
990 unsigned int id = -1;
991 int ret;
992 int i;
993
994 if (!np) {
995 dev_err(&pdev->dev, "gpio dt node missing\n");
996 return -ENODEV;
997 }
998
999 pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
1000 if (!pct)
1001 return -ENOMEM;
1002
1003 pct->dev = &pdev->dev;
1004 pct->parent = dev_get_drvdata(pdev->dev.parent);
1005 pct->chip = abx500gpio_chip;
1006 pct->chip.parent = &pdev->dev;
1007 pct->chip.base = -1; /* Dynamic allocation */
1008
1009 match = of_match_device(abx500_gpio_match, &pdev->dev);
1010 if (!match) {
1011 dev_err(&pdev->dev, "gpio dt not matching\n");
1012 return -ENODEV;
1013 }
1014 id = (unsigned long)match->data;
1015
1016 /* Poke in other ASIC variants here */
1017 switch (id) {
1018 case PINCTRL_AB8500:
1019 abx500_pinctrl_ab8500_init(&pct->soc);
1020 break;
1021 case PINCTRL_AB8505:
1022 abx500_pinctrl_ab8505_init(&pct->soc);
1023 break;
1024 default:
1025 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1026 return -EINVAL;
1027 }
1028
1029 if (!pct->soc) {
1030 dev_err(&pdev->dev, "Invalid SOC data\n");
1031 return -EINVAL;
1032 }
1033
1034 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1035 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1036 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1037
1038 ret = gpiochip_add_data(&pct->chip, pct);
1039 if (ret) {
1040 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1041 return ret;
1042 }
1043 dev_info(&pdev->dev, "added gpiochip\n");
1044
1045 abx500_pinctrl_desc.pins = pct->soc->pins;
1046 abx500_pinctrl_desc.npins = pct->soc->npins;
1047 pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1048 pct);
1049 if (IS_ERR(pct->pctldev)) {
1050 dev_err(&pdev->dev,
1051 "could not register abx500 pinctrl driver\n");
1052 ret = PTR_ERR(pct->pctldev);
1053 goto out_rem_chip;
1054 }
1055 dev_info(&pdev->dev, "registered pin controller\n");
1056
1057 /* We will handle a range of GPIO pins */
1058 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1059 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1060
1061 ret = gpiochip_add_pin_range(&pct->chip,
1062 dev_name(&pdev->dev),
1063 p->offset - 1, p->offset, p->npins);
1064 if (ret < 0)
1065 goto out_rem_chip;
1066 }
1067
1068 platform_set_drvdata(pdev, pct);
1069 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1070
1071 return 0;
1072
1073 out_rem_chip:
1074 gpiochip_remove(&pct->chip);
1075 return ret;
1076 }
1077
1078 /**
1079 * abx500_gpio_remove() - remove Ab8500-gpio driver
1080 * @pdev: Platform device registered
1081 */
abx500_gpio_remove(struct platform_device * pdev)1082 static int abx500_gpio_remove(struct platform_device *pdev)
1083 {
1084 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1085
1086 gpiochip_remove(&pct->chip);
1087 return 0;
1088 }
1089
1090 static struct platform_driver abx500_gpio_driver = {
1091 .driver = {
1092 .name = "abx500-gpio",
1093 .of_match_table = abx500_gpio_match,
1094 },
1095 .probe = abx500_gpio_probe,
1096 .remove = abx500_gpio_remove,
1097 };
1098
abx500_gpio_init(void)1099 static int __init abx500_gpio_init(void)
1100 {
1101 return platform_driver_register(&abx500_gpio_driver);
1102 }
1103 core_initcall(abx500_gpio_init);
1104