1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) ST-Ericsson SA 2012 4 * 5 * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson. 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/gpio/driver.h> 10 #include <linux/pinctrl/pinctrl.h> 11 #include <linux/mfd/abx500/ab8500.h> 12 #include "pinctrl-abx500.h" 13 14 /* All the pins that can be used for GPIO and some other functions */ 15 #define ABX500_GPIO(offset) (offset) 16 17 #define AB8505_PIN_N4 ABX500_GPIO(1) 18 #define AB8505_PIN_R5 ABX500_GPIO(2) 19 #define AB8505_PIN_P5 ABX500_GPIO(3) 20 /* hole */ 21 #define AB8505_PIN_B16 ABX500_GPIO(10) 22 #define AB8505_PIN_B17 ABX500_GPIO(11) 23 /* hole */ 24 #define AB8505_PIN_D17 ABX500_GPIO(13) 25 #define AB8505_PIN_C16 ABX500_GPIO(14) 26 /* hole */ 27 #define AB8505_PIN_P2 ABX500_GPIO(17) 28 #define AB8505_PIN_N3 ABX500_GPIO(18) 29 #define AB8505_PIN_T1 ABX500_GPIO(19) 30 #define AB8505_PIN_P3 ABX500_GPIO(20) 31 /* hole */ 32 #define AB8505_PIN_H14 ABX500_GPIO(34) 33 /* hole */ 34 #define AB8505_PIN_J15 ABX500_GPIO(40) 35 #define AB8505_PIN_J14 ABX500_GPIO(41) 36 /* hole */ 37 #define AB8505_PIN_L4 ABX500_GPIO(50) 38 /* hole */ 39 #define AB8505_PIN_D16 ABX500_GPIO(52) 40 #define AB8505_PIN_D15 ABX500_GPIO(53) 41 42 /* indicates the higher GPIO number */ 43 #define AB8505_GPIO_MAX_NUMBER 53 44 45 /* 46 * The names of the pins are denoted by GPIO number and ball name, even 47 * though they can be used for other things than GPIO, this is the first 48 * column in the table of the data sheet and often used on schematics and 49 * such. 50 */ 51 static const struct pinctrl_pin_desc ab8505_pins[] = { 52 PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"), 53 PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"), 54 PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"), 55 /* hole */ 56 PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"), 57 PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"), 58 /* hole */ 59 PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"), 60 PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"), 61 /* hole */ 62 PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"), 63 PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"), 64 PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"), 65 PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"), 66 /* hole */ 67 PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"), 68 /* hole */ 69 PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"), 70 PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"), 71 /* hole */ 72 PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"), 73 /* hole */ 74 PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"), 75 PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"), 76 }; 77 78 /* 79 * Maps local GPIO offsets to local pin numbers 80 */ 81 static const struct abx500_pinrange ab8505_pinranges[] = { 82 ABX500_PINRANGE(1, 3, ABX500_ALT_A), 83 ABX500_PINRANGE(10, 2, ABX500_DEFAULT), 84 ABX500_PINRANGE(13, 1, ABX500_DEFAULT), 85 ABX500_PINRANGE(14, 1, ABX500_ALT_A), 86 ABX500_PINRANGE(17, 4, ABX500_ALT_A), 87 ABX500_PINRANGE(34, 1, ABX500_ALT_A), 88 ABX500_PINRANGE(40, 2, ABX500_ALT_A), 89 ABX500_PINRANGE(50, 1, ABX500_DEFAULT), 90 ABX500_PINRANGE(52, 2, ABX500_ALT_A), 91 }; 92 93 /* 94 * Read the pin group names like this: 95 * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function 96 * 97 * The groups are arranged as sets per altfunction column, so we can 98 * mux in one group at a time by selecting the same altfunction for them 99 * all. When functions require pins on different altfunctions, you need 100 * to combine several groups. 101 */ 102 103 /* default column */ 104 static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 }; 105 static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 }; 106 static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 }; 107 static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 }; 108 static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 }; 109 static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 }; 110 static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 }; 111 /* audio data interface 2*/ 112 static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3, 113 AB8505_PIN_T1, AB8505_PIN_P3 }; 114 static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 }; 115 /* modem SDA/SCL */ 116 static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 }; 117 static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 }; 118 static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 }; 119 static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 }; 120 121 /* Altfunction A column */ 122 static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 }; 123 static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 }; 124 static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 }; 125 static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 }; 126 static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 }; 127 static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 }; 128 static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 }; 129 static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 }; 130 static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 }; 131 static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 }; 132 static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 }; 133 static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 }; 134 static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 }; 135 static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 }; 136 static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 }; 137 static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 }; 138 static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 }; 139 static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 }; 140 141 /* Altfunction B colum */ 142 static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 }; 143 static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 }; 144 static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 }; 145 146 /* Altfunction C column */ 147 static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 }; 148 149 #define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \ 150 .npins = ARRAY_SIZE(a##_pins), .altsetting = b } 151 152 static const struct abx500_pingroup ab8505_groups[] = { 153 AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT), 154 AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT), 155 AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT), 156 AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT), 157 AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT), 158 AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT), 159 AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT), 160 AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT), 161 AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT), 162 AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT), 163 AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT), 164 AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT), 165 AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT), 166 AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A), 167 AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A), 168 AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A), 169 AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A), 170 AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A), 171 AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A), 172 AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A), 173 AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A), 174 AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A), 175 AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A), 176 AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A), 177 AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A), 178 AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A), 179 AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A), 180 AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A), 181 AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A), 182 AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A), 183 AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B), 184 AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B), 185 AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B), 186 AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C), 187 }; 188 189 /* We use this macro to define the groups applicable to a function */ 190 #define AB8505_FUNC_GROUPS(a, b...) \ 191 static const char * const a##_groups[] = { b }; 192 193 AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1", 194 "sysclkreq4_d_1"); 195 AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", 196 "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1", 197 "gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1", 198 "gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1", 199 "gpio52_a_1", "gpio53_a_1"); 200 AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1"); 201 AB8505_FUNC_GROUPS(adi2, "adi2_d_1"); 202 AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1"); 203 AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1"); 204 AB8505_FUNC_GROUPS(resethw, "resethw_d_1"); 205 AB8505_FUNC_GROUPS(service, "service_d_1"); 206 AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1"); 207 AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1"); 208 AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1"); 209 AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1"); 210 AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1"); 211 212 #define FUNCTION(fname) \ 213 { \ 214 .name = #fname, \ 215 .groups = fname##_groups, \ 216 .ngroups = ARRAY_SIZE(fname##_groups), \ 217 } 218 219 static const struct abx500_function ab8505_functions[] = { 220 FUNCTION(sysclkreq), 221 FUNCTION(gpio), 222 FUNCTION(pwmout), 223 FUNCTION(adi2), 224 FUNCTION(extcpena), 225 FUNCTION(modsclsda), 226 FUNCTION(resethw), 227 FUNCTION(service), 228 FUNCTION(hiqclkena), 229 FUNCTION(pdm), 230 FUNCTION(uartdata), 231 FUNCTION(extvibra), 232 FUNCTION(extvibra), 233 FUNCTION(usbvdat), 234 }; 235 236 /* 237 * this table translates what's is in the AB8505 specification regarding the 238 * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C). 239 * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1, 240 * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val), 241 * 242 * example : 243 * 244 * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), 245 * means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A, 246 * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to 247 * select the mux. ALTA, ALTB and ALTC val indicates values to write in 248 * ALTERNATFUNC register. We need to specifies these values as SOC 249 * designers didn't apply the same logic on how to select mux in the 250 * ABx500 family. 251 * 252 * As this pins supports at least ALT_B mux, default mux is 253 * selected by writing 1 in GPIOSEL bit : 254 * 255 * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3 256 * default | 1 | 0 | 0 257 * alt_A | 0 | 0 | 1 258 * alt_B | 0 | 0 | 0 259 * alt_C | 0 | 1 | 0 260 * 261 * ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED), 262 * means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL 263 * register is used to select the mux. As this pins doesn't support at 264 * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit : 265 * 266 * | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1= 267 * default | 0 | 0 | 0 268 * alt_A | 1 | 0 | 0 269 */ 270 271 static struct 272 alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = { 273 ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */ 274 ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */ 275 ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */ 276 ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/ 277 ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */ 278 ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */ 279 ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */ 280 ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */ 281 ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */ 282 283 ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */ 284 ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */ 285 ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */ 286 ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reserved */ 287 ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */ 288 ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */ 289 ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */ 290 ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved */ 291 /* 292 * pins 17 to 20 are special case, only bit 0 is used to select 293 * alternate function for these 4 pins. 294 * bits 1 to 3 are reserved 295 */ 296 ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */ 297 ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */ 298 ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */ 299 ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */ 300 ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */ 301 ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */ 302 ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */ 303 ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */ 304 305 ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */ 306 ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */ 307 ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */ 308 ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */ 309 ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */ 310 ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */ 311 ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */ 312 ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */ 313 314 ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */ 315 ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */ 316 ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */ 317 ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */ 318 ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */ 319 ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */ 320 ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */ 321 ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/ 322 323 ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */ 324 ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */ 325 ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */ 326 ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */ 327 ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */ 328 ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */ 329 ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */ 330 ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */ 331 332 ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */ 333 ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */ 334 ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */ 335 ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */ 336 ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */ 337 }; 338 339 /* 340 * For AB8505 Only some GPIOs are interrupt capable, and they are 341 * organized in discontiguous clusters: 342 * 343 * GPIO10 to GPIO11 344 * GPIO13 345 * GPIO40 and GPIO41 346 * GPIO50 347 * GPIO52 to GPIO53 348 */ 349 static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = { 350 GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R), 351 GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R), 352 GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R), 353 GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R), 354 GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R), 355 }; 356 357 static struct abx500_pinctrl_soc_data ab8505_soc = { 358 .gpio_ranges = ab8505_pinranges, 359 .gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges), 360 .pins = ab8505_pins, 361 .npins = ARRAY_SIZE(ab8505_pins), 362 .functions = ab8505_functions, 363 .nfunctions = ARRAY_SIZE(ab8505_functions), 364 .groups = ab8505_groups, 365 .ngroups = ARRAY_SIZE(ab8505_groups), 366 .alternate_functions = ab8505_alternate_functions, 367 .gpio_irq_cluster = ab8505_gpio_irq_cluster, 368 .ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster), 369 .irq_gpio_rising_offset = AB8500_INT_GPIO6R, 370 .irq_gpio_falling_offset = AB8500_INT_GPIO6F, 371 .irq_gpio_factor = 1, 372 }; 373 374 void 375 abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) 376 { 377 *soc = &ab8505_soc; 378 } 379