1 /* 2 * Copyright (C) ST-Ericsson SA 2012 3 * 4 * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/pinctrl/pinctrl.h> 14 #include <linux/mfd/abx500/ab8500.h> 15 #include "pinctrl-abx500.h" 16 17 /* All the pins that can be used for GPIO and some other functions */ 18 #define ABX500_GPIO(offset) (offset) 19 20 #define AB8500_PIN_T10 ABX500_GPIO(1) 21 #define AB8500_PIN_T9 ABX500_GPIO(2) 22 #define AB8500_PIN_U9 ABX500_GPIO(3) 23 #define AB8500_PIN_W2 ABX500_GPIO(4) 24 /* hole */ 25 #define AB8500_PIN_Y18 ABX500_GPIO(6) 26 #define AB8500_PIN_AA20 ABX500_GPIO(7) 27 #define AB8500_PIN_W18 ABX500_GPIO(8) 28 #define AB8500_PIN_AA19 ABX500_GPIO(9) 29 #define AB8500_PIN_U17 ABX500_GPIO(10) 30 #define AB8500_PIN_AA18 ABX500_GPIO(11) 31 #define AB8500_PIN_U16 ABX500_GPIO(12) 32 #define AB8500_PIN_W17 ABX500_GPIO(13) 33 #define AB8500_PIN_F14 ABX500_GPIO(14) 34 #define AB8500_PIN_B17 ABX500_GPIO(15) 35 #define AB8500_PIN_F15 ABX500_GPIO(16) 36 #define AB8500_PIN_P5 ABX500_GPIO(17) 37 #define AB8500_PIN_R5 ABX500_GPIO(18) 38 #define AB8500_PIN_U5 ABX500_GPIO(19) 39 #define AB8500_PIN_T5 ABX500_GPIO(20) 40 #define AB8500_PIN_H19 ABX500_GPIO(21) 41 #define AB8500_PIN_G20 ABX500_GPIO(22) 42 #define AB8500_PIN_G19 ABX500_GPIO(23) 43 #define AB8500_PIN_T14 ABX500_GPIO(24) 44 #define AB8500_PIN_R16 ABX500_GPIO(25) 45 #define AB8500_PIN_M16 ABX500_GPIO(26) 46 #define AB8500_PIN_J6 ABX500_GPIO(27) 47 #define AB8500_PIN_K6 ABX500_GPIO(28) 48 #define AB8500_PIN_G6 ABX500_GPIO(29) 49 #define AB8500_PIN_H6 ABX500_GPIO(30) 50 #define AB8500_PIN_F5 ABX500_GPIO(31) 51 #define AB8500_PIN_G5 ABX500_GPIO(32) 52 /* hole */ 53 #define AB8500_PIN_R17 ABX500_GPIO(34) 54 #define AB8500_PIN_W15 ABX500_GPIO(35) 55 #define AB8500_PIN_A17 ABX500_GPIO(36) 56 #define AB8500_PIN_E15 ABX500_GPIO(37) 57 #define AB8500_PIN_C17 ABX500_GPIO(38) 58 #define AB8500_PIN_E16 ABX500_GPIO(39) 59 #define AB8500_PIN_T19 ABX500_GPIO(40) 60 #define AB8500_PIN_U19 ABX500_GPIO(41) 61 #define AB8500_PIN_U2 ABX500_GPIO(42) 62 63 /* indicates the highest GPIO number */ 64 #define AB8500_GPIO_MAX_NUMBER 42 65 66 /* 67 * The names of the pins are denoted by GPIO number and ball name, even 68 * though they can be used for other things than GPIO, this is the first 69 * column in the table of the data sheet and often used on schematics and 70 * such. 71 */ 72 static const struct pinctrl_pin_desc ab8500_pins[] = { 73 PINCTRL_PIN(AB8500_PIN_T10, "GPIO1_T10"), 74 PINCTRL_PIN(AB8500_PIN_T9, "GPIO2_T9"), 75 PINCTRL_PIN(AB8500_PIN_U9, "GPIO3_U9"), 76 PINCTRL_PIN(AB8500_PIN_W2, "GPIO4_W2"), 77 /* hole */ 78 PINCTRL_PIN(AB8500_PIN_Y18, "GPIO6_Y18"), 79 PINCTRL_PIN(AB8500_PIN_AA20, "GPIO7_AA20"), 80 PINCTRL_PIN(AB8500_PIN_W18, "GPIO8_W18"), 81 PINCTRL_PIN(AB8500_PIN_AA19, "GPIO9_AA19"), 82 PINCTRL_PIN(AB8500_PIN_U17, "GPIO10_U17"), 83 PINCTRL_PIN(AB8500_PIN_AA18, "GPIO11_AA18"), 84 PINCTRL_PIN(AB8500_PIN_U16, "GPIO12_U16"), 85 PINCTRL_PIN(AB8500_PIN_W17, "GPIO13_W17"), 86 PINCTRL_PIN(AB8500_PIN_F14, "GPIO14_F14"), 87 PINCTRL_PIN(AB8500_PIN_B17, "GPIO15_B17"), 88 PINCTRL_PIN(AB8500_PIN_F15, "GPIO16_F15"), 89 PINCTRL_PIN(AB8500_PIN_P5, "GPIO17_P5"), 90 PINCTRL_PIN(AB8500_PIN_R5, "GPIO18_R5"), 91 PINCTRL_PIN(AB8500_PIN_U5, "GPIO19_U5"), 92 PINCTRL_PIN(AB8500_PIN_T5, "GPIO20_T5"), 93 PINCTRL_PIN(AB8500_PIN_H19, "GPIO21_H19"), 94 PINCTRL_PIN(AB8500_PIN_G20, "GPIO22_G20"), 95 PINCTRL_PIN(AB8500_PIN_G19, "GPIO23_G19"), 96 PINCTRL_PIN(AB8500_PIN_T14, "GPIO24_T14"), 97 PINCTRL_PIN(AB8500_PIN_R16, "GPIO25_R16"), 98 PINCTRL_PIN(AB8500_PIN_M16, "GPIO26_M16"), 99 PINCTRL_PIN(AB8500_PIN_J6, "GPIO27_J6"), 100 PINCTRL_PIN(AB8500_PIN_K6, "GPIO28_K6"), 101 PINCTRL_PIN(AB8500_PIN_G6, "GPIO29_G6"), 102 PINCTRL_PIN(AB8500_PIN_H6, "GPIO30_H6"), 103 PINCTRL_PIN(AB8500_PIN_F5, "GPIO31_F5"), 104 PINCTRL_PIN(AB8500_PIN_G5, "GPIO32_G5"), 105 /* hole */ 106 PINCTRL_PIN(AB8500_PIN_R17, "GPIO34_R17"), 107 PINCTRL_PIN(AB8500_PIN_W15, "GPIO35_W15"), 108 PINCTRL_PIN(AB8500_PIN_A17, "GPIO36_A17"), 109 PINCTRL_PIN(AB8500_PIN_E15, "GPIO37_E15"), 110 PINCTRL_PIN(AB8500_PIN_C17, "GPIO38_C17"), 111 PINCTRL_PIN(AB8500_PIN_E16, "GPIO39_E16"), 112 PINCTRL_PIN(AB8500_PIN_T19, "GPIO40_T19"), 113 PINCTRL_PIN(AB8500_PIN_U19, "GPIO41_U19"), 114 PINCTRL_PIN(AB8500_PIN_U2, "GPIO42_U2"), 115 }; 116 117 /* 118 * Maps local GPIO offsets to local pin numbers 119 */ 120 static const struct abx500_pinrange ab8500_pinranges[] = { 121 ABX500_PINRANGE(1, 4, ABX500_ALT_A), 122 ABX500_PINRANGE(6, 4, ABX500_ALT_A), 123 ABX500_PINRANGE(10, 4, ABX500_DEFAULT), 124 ABX500_PINRANGE(14, 12, ABX500_ALT_A), 125 ABX500_PINRANGE(26, 1, ABX500_DEFAULT), 126 ABX500_PINRANGE(27, 6, ABX500_ALT_A), 127 ABX500_PINRANGE(34, 1, ABX500_ALT_A), 128 ABX500_PINRANGE(35, 1, ABX500_DEFAULT), 129 ABX500_PINRANGE(36, 7, ABX500_ALT_A), 130 }; 131 132 /* 133 * Read the pin group names like this: 134 * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function 135 * 136 * The groups are arranged as sets per altfunction column, so we can 137 * mux in one group at a time by selecting the same altfunction for them 138 * all. When functions require pins on different altfunctions, you need 139 * to combine several groups. 140 */ 141 142 /* default column */ 143 static const unsigned sysclkreq2_d_1_pins[] = { AB8500_PIN_T10 }; 144 static const unsigned sysclkreq3_d_1_pins[] = { AB8500_PIN_T9 }; 145 static const unsigned sysclkreq4_d_1_pins[] = { AB8500_PIN_U9 }; 146 static const unsigned sysclkreq6_d_1_pins[] = { AB8500_PIN_W2 }; 147 static const unsigned ycbcr0123_d_1_pins[] = { AB8500_PIN_Y18, AB8500_PIN_AA20, 148 AB8500_PIN_W18, AB8500_PIN_AA19}; 149 static const unsigned gpio10_d_1_pins[] = { AB8500_PIN_U17 }; 150 static const unsigned gpio11_d_1_pins[] = { AB8500_PIN_AA18 }; 151 static const unsigned gpio12_d_1_pins[] = { AB8500_PIN_U16 }; 152 static const unsigned gpio13_d_1_pins[] = { AB8500_PIN_W17 }; 153 static const unsigned pwmout1_d_1_pins[] = { AB8500_PIN_F14 }; 154 static const unsigned pwmout2_d_1_pins[] = { AB8500_PIN_B17 }; 155 static const unsigned pwmout3_d_1_pins[] = { AB8500_PIN_F15 }; 156 157 /* audio data interface 1*/ 158 static const unsigned adi1_d_1_pins[] = { AB8500_PIN_P5, AB8500_PIN_R5, 159 AB8500_PIN_U5, AB8500_PIN_T5 }; 160 /* USBUICC */ 161 static const unsigned usbuicc_d_1_pins[] = { AB8500_PIN_H19, AB8500_PIN_G20, 162 AB8500_PIN_G19 }; 163 static const unsigned sysclkreq7_d_1_pins[] = { AB8500_PIN_T14 }; 164 static const unsigned sysclkreq8_d_1_pins[] = { AB8500_PIN_R16 }; 165 static const unsigned gpio26_d_1_pins[] = { AB8500_PIN_M16 }; 166 /* Digital microphone 1 and 2 */ 167 static const unsigned dmic12_d_1_pins[] = { AB8500_PIN_J6, AB8500_PIN_K6 }; 168 /* Digital microphone 3 and 4 */ 169 static const unsigned dmic34_d_1_pins[] = { AB8500_PIN_G6, AB8500_PIN_H6 }; 170 /* Digital microphone 5 and 6 */ 171 static const unsigned dmic56_d_1_pins[] = { AB8500_PIN_F5, AB8500_PIN_G5 }; 172 static const unsigned extcpena_d_1_pins[] = { AB8500_PIN_R17 }; 173 static const unsigned gpio35_d_1_pins[] = { AB8500_PIN_W15 }; 174 /* APE SPI */ 175 static const unsigned apespi_d_1_pins[] = { AB8500_PIN_A17, AB8500_PIN_E15, 176 AB8500_PIN_C17, AB8500_PIN_E16}; 177 /* modem SDA/SCL */ 178 static const unsigned modsclsda_d_1_pins[] = { AB8500_PIN_T19, AB8500_PIN_U19 }; 179 static const unsigned sysclkreq5_d_1_pins[] = { AB8500_PIN_U2 }; 180 181 /* Altfunction A column */ 182 static const unsigned gpio1_a_1_pins[] = { AB8500_PIN_T10 }; 183 static const unsigned gpio2_a_1_pins[] = { AB8500_PIN_T9 }; 184 static const unsigned gpio3_a_1_pins[] = { AB8500_PIN_U9 }; 185 static const unsigned gpio4_a_1_pins[] = { AB8500_PIN_W2 }; 186 static const unsigned gpio6_a_1_pins[] = { AB8500_PIN_Y18 }; 187 static const unsigned gpio7_a_1_pins[] = { AB8500_PIN_AA20 }; 188 static const unsigned gpio8_a_1_pins[] = { AB8500_PIN_W18 }; 189 static const unsigned gpio9_a_1_pins[] = { AB8500_PIN_AA19 }; 190 /* YCbCr4 YCbCr5 YCbCr6 YCbCr7*/ 191 static const unsigned ycbcr4567_a_1_pins[] = { AB8500_PIN_U17, AB8500_PIN_AA18, 192 AB8500_PIN_U16, AB8500_PIN_W17}; 193 static const unsigned gpio14_a_1_pins[] = { AB8500_PIN_F14 }; 194 static const unsigned gpio15_a_1_pins[] = { AB8500_PIN_B17 }; 195 static const unsigned gpio16_a_1_pins[] = { AB8500_PIN_F15 }; 196 static const unsigned gpio17_a_1_pins[] = { AB8500_PIN_P5 }; 197 static const unsigned gpio18_a_1_pins[] = { AB8500_PIN_R5 }; 198 static const unsigned gpio19_a_1_pins[] = { AB8500_PIN_U5 }; 199 static const unsigned gpio20_a_1_pins[] = { AB8500_PIN_T5 }; 200 static const unsigned gpio21_a_1_pins[] = { AB8500_PIN_H19 }; 201 static const unsigned gpio22_a_1_pins[] = { AB8500_PIN_G20 }; 202 static const unsigned gpio23_a_1_pins[] = { AB8500_PIN_G19 }; 203 static const unsigned gpio24_a_1_pins[] = { AB8500_PIN_T14 }; 204 static const unsigned gpio25_a_1_pins[] = { AB8500_PIN_R16 }; 205 static const unsigned gpio27_a_1_pins[] = { AB8500_PIN_J6 }; 206 static const unsigned gpio28_a_1_pins[] = { AB8500_PIN_K6 }; 207 static const unsigned gpio29_a_1_pins[] = { AB8500_PIN_G6 }; 208 static const unsigned gpio30_a_1_pins[] = { AB8500_PIN_H6 }; 209 static const unsigned gpio31_a_1_pins[] = { AB8500_PIN_F5 }; 210 static const unsigned gpio32_a_1_pins[] = { AB8500_PIN_G5 }; 211 static const unsigned gpio34_a_1_pins[] = { AB8500_PIN_R17 }; 212 static const unsigned gpio36_a_1_pins[] = { AB8500_PIN_A17 }; 213 static const unsigned gpio37_a_1_pins[] = { AB8500_PIN_E15 }; 214 static const unsigned gpio38_a_1_pins[] = { AB8500_PIN_C17 }; 215 static const unsigned gpio39_a_1_pins[] = { AB8500_PIN_E16 }; 216 static const unsigned gpio40_a_1_pins[] = { AB8500_PIN_T19 }; 217 static const unsigned gpio41_a_1_pins[] = { AB8500_PIN_U19 }; 218 static const unsigned gpio42_a_1_pins[] = { AB8500_PIN_U2 }; 219 220 /* Altfunction B colum */ 221 static const unsigned hiqclkena_b_1_pins[] = { AB8500_PIN_U17 }; 222 static const unsigned usbuiccpd_b_1_pins[] = { AB8500_PIN_AA18 }; 223 static const unsigned i2ctrig1_b_1_pins[] = { AB8500_PIN_U16 }; 224 static const unsigned i2ctrig2_b_1_pins[] = { AB8500_PIN_W17 }; 225 226 /* Altfunction C column */ 227 static const unsigned usbvdat_c_1_pins[] = { AB8500_PIN_W17 }; 228 229 230 #define AB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \ 231 .npins = ARRAY_SIZE(a##_pins), .altsetting = b } 232 233 static const struct abx500_pingroup ab8500_groups[] = { 234 /* default column */ 235 AB8500_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT), 236 AB8500_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT), 237 AB8500_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT), 238 AB8500_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT), 239 AB8500_PIN_GROUP(ycbcr0123_d_1, ABX500_DEFAULT), 240 AB8500_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT), 241 AB8500_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT), 242 AB8500_PIN_GROUP(gpio12_d_1, ABX500_DEFAULT), 243 AB8500_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT), 244 AB8500_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT), 245 AB8500_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT), 246 AB8500_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT), 247 AB8500_PIN_GROUP(adi1_d_1, ABX500_DEFAULT), 248 AB8500_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT), 249 AB8500_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT), 250 AB8500_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT), 251 AB8500_PIN_GROUP(gpio26_d_1, ABX500_DEFAULT), 252 AB8500_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT), 253 AB8500_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT), 254 AB8500_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT), 255 AB8500_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT), 256 AB8500_PIN_GROUP(gpio35_d_1, ABX500_DEFAULT), 257 AB8500_PIN_GROUP(apespi_d_1, ABX500_DEFAULT), 258 AB8500_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT), 259 AB8500_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT), 260 /* Altfunction A column */ 261 AB8500_PIN_GROUP(gpio1_a_1, ABX500_ALT_A), 262 AB8500_PIN_GROUP(gpio2_a_1, ABX500_ALT_A), 263 AB8500_PIN_GROUP(gpio3_a_1, ABX500_ALT_A), 264 AB8500_PIN_GROUP(gpio4_a_1, ABX500_ALT_A), 265 AB8500_PIN_GROUP(gpio6_a_1, ABX500_ALT_A), 266 AB8500_PIN_GROUP(gpio7_a_1, ABX500_ALT_A), 267 AB8500_PIN_GROUP(gpio8_a_1, ABX500_ALT_A), 268 AB8500_PIN_GROUP(gpio9_a_1, ABX500_ALT_A), 269 AB8500_PIN_GROUP(ycbcr4567_a_1, ABX500_ALT_A), 270 AB8500_PIN_GROUP(gpio14_a_1, ABX500_ALT_A), 271 AB8500_PIN_GROUP(gpio15_a_1, ABX500_ALT_A), 272 AB8500_PIN_GROUP(gpio16_a_1, ABX500_ALT_A), 273 AB8500_PIN_GROUP(gpio17_a_1, ABX500_ALT_A), 274 AB8500_PIN_GROUP(gpio18_a_1, ABX500_ALT_A), 275 AB8500_PIN_GROUP(gpio19_a_1, ABX500_ALT_A), 276 AB8500_PIN_GROUP(gpio20_a_1, ABX500_ALT_A), 277 AB8500_PIN_GROUP(gpio21_a_1, ABX500_ALT_A), 278 AB8500_PIN_GROUP(gpio22_a_1, ABX500_ALT_A), 279 AB8500_PIN_GROUP(gpio23_a_1, ABX500_ALT_A), 280 AB8500_PIN_GROUP(gpio24_a_1, ABX500_ALT_A), 281 AB8500_PIN_GROUP(gpio25_a_1, ABX500_ALT_A), 282 AB8500_PIN_GROUP(gpio27_a_1, ABX500_ALT_A), 283 AB8500_PIN_GROUP(gpio28_a_1, ABX500_ALT_A), 284 AB8500_PIN_GROUP(gpio29_a_1, ABX500_ALT_A), 285 AB8500_PIN_GROUP(gpio30_a_1, ABX500_ALT_A), 286 AB8500_PIN_GROUP(gpio31_a_1, ABX500_ALT_A), 287 AB8500_PIN_GROUP(gpio32_a_1, ABX500_ALT_A), 288 AB8500_PIN_GROUP(gpio34_a_1, ABX500_ALT_A), 289 AB8500_PIN_GROUP(gpio36_a_1, ABX500_ALT_A), 290 AB8500_PIN_GROUP(gpio37_a_1, ABX500_ALT_A), 291 AB8500_PIN_GROUP(gpio38_a_1, ABX500_ALT_A), 292 AB8500_PIN_GROUP(gpio39_a_1, ABX500_ALT_A), 293 AB8500_PIN_GROUP(gpio40_a_1, ABX500_ALT_A), 294 AB8500_PIN_GROUP(gpio41_a_1, ABX500_ALT_A), 295 AB8500_PIN_GROUP(gpio42_a_1, ABX500_ALT_A), 296 /* Altfunction B column */ 297 AB8500_PIN_GROUP(hiqclkena_b_1, ABX500_ALT_B), 298 AB8500_PIN_GROUP(usbuiccpd_b_1, ABX500_ALT_B), 299 AB8500_PIN_GROUP(i2ctrig1_b_1, ABX500_ALT_B), 300 AB8500_PIN_GROUP(i2ctrig2_b_1, ABX500_ALT_B), 301 /* Altfunction C column */ 302 AB8500_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C), 303 }; 304 305 /* We use this macro to define the groups applicable to a function */ 306 #define AB8500_FUNC_GROUPS(a, b...) \ 307 static const char * const a##_groups[] = { b }; 308 309 AB8500_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1", 310 "sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1", 311 "sysclkreq7_d_1", "sysclkreq8_d_1"); 312 AB8500_FUNC_GROUPS(ycbcr, "ycbcr0123_d_1", "ycbcr4567_a_1"); 313 AB8500_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1", 314 "gpio6_a_1", "gpio7_a_1", "gpio8_a_1", "gpio9_a_1", 315 "gpio10_d_1", "gpio11_d_1", "gpio12_d_1", "gpio13_d_1", 316 "gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1", 317 "gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio21_a_1", 318 "gpio22_a_1", "gpio23_a_1", "gpio24_a_1", "gpio25_a_1", 319 "gpio26_d_1", "gpio27_a_1", "gpio28_a_1", "gpio29_a_1", 320 "gpio30_a_1", "gpio31_a_1", "gpio32_a_1", "gpio34_a_1", 321 "gpio35_d_1", "gpio36_a_1", "gpio37_a_1", "gpio38_a_1", 322 "gpio39_a_1", "gpio40_a_1", "gpio41_a_1", "gpio42_a_1"); 323 AB8500_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1"); 324 AB8500_FUNC_GROUPS(adi1, "adi1_d_1"); 325 AB8500_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_b_1"); 326 AB8500_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1"); 327 AB8500_FUNC_GROUPS(extcpena, "extcpena_d_1"); 328 AB8500_FUNC_GROUPS(apespi, "apespi_d_1"); 329 AB8500_FUNC_GROUPS(modsclsda, "modsclsda_d_1"); 330 AB8500_FUNC_GROUPS(hiqclkena, "hiqclkena_b_1"); 331 AB8500_FUNC_GROUPS(i2ctrig, "i2ctrig1_b_1", "i2ctrig2_b_1"); 332 AB8500_FUNC_GROUPS(usbvdat, "usbvdat_c_1"); 333 334 #define FUNCTION(fname) \ 335 { \ 336 .name = #fname, \ 337 .groups = fname##_groups, \ 338 .ngroups = ARRAY_SIZE(fname##_groups), \ 339 } 340 341 static const struct abx500_function ab8500_functions[] = { 342 FUNCTION(sysclkreq), 343 FUNCTION(ycbcr), 344 FUNCTION(gpio), 345 FUNCTION(pwmout), 346 FUNCTION(adi1), 347 FUNCTION(usbuicc), 348 FUNCTION(dmic), 349 FUNCTION(extcpena), 350 FUNCTION(apespi), 351 FUNCTION(modsclsda), 352 FUNCTION(hiqclkena), 353 FUNCTION(i2ctrig), 354 FUNCTION(usbvdat), 355 }; 356 357 /* 358 * this table translates what's is in the AB8500 specification regarding the 359 * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C). 360 * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1, 361 * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val), 362 * 363 * example : 364 * 365 * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 0, 1 ,2), 366 * means that pin AB8500_PIN_W17 (pin 13) supports 4 mux (default/ALT_A, 367 * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to 368 * select the mux. ALTA, ALTB and ALTC val indicates values to write in 369 * ALTERNATFUNC register. We need to specifies these values as SOC 370 * designers didn't apply the same logic on how to select mux in the 371 * ABx500 family. 372 * 373 * As this pins supports at least ALT_B mux, default mux is 374 * selected by writing 1 in GPIOSEL bit : 375 * 376 * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3 377 * default | 1 | 0 | 0 378 * alt_A | 0 | 0 | 0 379 * alt_B | 0 | 0 | 1 380 * alt_C | 0 | 1 | 0 381 * 382 * ALTERNATE_FUNCTIONS(8, 7, UNUSED, UNUSED), 383 * means that pin AB8500_PIN_W18 (pin 8) supports 2 mux, so only GPIOSEL 384 * register is used to select the mux. As this pins doesn't support at 385 * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit : 386 * 387 * | GPIOSEL bit=7 | alternatfunc bit2= | alternatfunc bit1= 388 * default | 0 | 0 | 0 389 * alt_A | 1 | 0 | 0 390 */ 391 392 static struct 393 alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1] = { 394 ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */ 395 ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */ 396 ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */ 397 ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/ 398 ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/ 399 /* bit 4 reserved */ 400 ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */ 401 ALTERNATE_FUNCTIONS(6, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO6, altA controlled by bit 5*/ 402 ALTERNATE_FUNCTIONS(7, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO7, altA controlled by bit 6*/ 403 ALTERNATE_FUNCTIONS(8, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO8, altA controlled by bit 7*/ 404 405 ALTERNATE_FUNCTIONS(9, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO9, altA controlled by bit 0*/ 406 ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 0, 1, 0), /* GPIO10, altA and altB controlled by bit 0 */ 407 ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 1, 0), /* GPIO11, altA and altB controlled by bit 1 */ 408 ALTERNATE_FUNCTIONS(12, 3, 2, UNUSED, 0, 1, 0), /* GPIO12, altA and altB controlled by bit 2 */ 409 ALTERNATE_FUNCTIONS(13, 4, 3, 4, 0, 1, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */ 410 ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */ 411 ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */ 412 ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */ 413 /* 414 * pins 17 to 20 are special case, only bit 0 is used to select 415 * alternate function for these 4 pins. 416 * bits 1 to 3 are reserved 417 */ 418 ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */ 419 ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */ 420 ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */ 421 ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */ 422 ALTERNATE_FUNCTIONS(21, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */ 423 ALTERNATE_FUNCTIONS(22, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */ 424 ALTERNATE_FUNCTIONS(23, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */ 425 ALTERNATE_FUNCTIONS(24, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */ 426 427 ALTERNATE_FUNCTIONS(25, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */ 428 /* pin 26 special case, no alternate function, bit 1 reserved */ 429 ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO26 */ 430 ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */ 431 ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */ 432 ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */ 433 ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */ 434 ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */ 435 ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */ 436 437 ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */ 438 ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */ 439 /* pin 35 special case, no alternate function, bit 2 reserved */ 440 ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO35 */ 441 ALTERNATE_FUNCTIONS(36, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO36, altA controlled by bit 3 */ 442 ALTERNATE_FUNCTIONS(37, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO37, altA controlled by bit 4 */ 443 ALTERNATE_FUNCTIONS(38, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO38, altA controlled by bit 5 */ 444 ALTERNATE_FUNCTIONS(39, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO39, altA controlled by bit 6 */ 445 ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */ 446 447 ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */ 448 ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */ 449 }; 450 451 /* 452 * Only some GPIOs are interrupt capable, and they are 453 * organized in discontiguous clusters: 454 * 455 * GPIO6 to GPIO13 456 * GPIO24 and GPIO25 457 * GPIO36 to GPIO41 458 */ 459 static struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = { 460 GPIO_IRQ_CLUSTER(6, 13, AB8500_INT_GPIO6R), 461 GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R), 462 GPIO_IRQ_CLUSTER(36, 41, AB8500_INT_GPIO36R), 463 }; 464 465 static struct abx500_pinctrl_soc_data ab8500_soc = { 466 .gpio_ranges = ab8500_pinranges, 467 .gpio_num_ranges = ARRAY_SIZE(ab8500_pinranges), 468 .pins = ab8500_pins, 469 .npins = ARRAY_SIZE(ab8500_pins), 470 .functions = ab8500_functions, 471 .nfunctions = ARRAY_SIZE(ab8500_functions), 472 .groups = ab8500_groups, 473 .ngroups = ARRAY_SIZE(ab8500_groups), 474 .alternate_functions = ab8500_alternate_functions, 475 .gpio_irq_cluster = ab8500_gpio_irq_cluster, 476 .ngpio_irq_cluster = ARRAY_SIZE(ab8500_gpio_irq_cluster), 477 .irq_gpio_rising_offset = AB8500_INT_GPIO6R, 478 .irq_gpio_falling_offset = AB8500_INT_GPIO6F, 479 .irq_gpio_factor = 1, 480 }; 481 482 void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc) 483 { 484 *soc = &ab8500_soc; 485 } 486