1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Marvell MVEBU pinctrl core driver 4 * 5 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 7 */ 8 9 #include <linux/err.h> 10 #include <linux/gpio/driver.h> 11 #include <linux/io.h> 12 #include <linux/mfd/syscon.h> 13 #include <linux/of.h> 14 #include <linux/of_address.h> 15 #include <linux/of_platform.h> 16 #include <linux/platform_device.h> 17 #include <linux/regmap.h> 18 #include <linux/seq_file.h> 19 #include <linux/slab.h> 20 21 #include <linux/pinctrl/machine.h> 22 #include <linux/pinctrl/pinconf.h> 23 #include <linux/pinctrl/pinctrl.h> 24 #include <linux/pinctrl/pinmux.h> 25 26 #include "pinctrl-mvebu.h" 27 28 #define MPPS_PER_REG 8 29 #define MPP_BITS 4 30 #define MPP_MASK 0xf 31 32 struct mvebu_pinctrl_function { 33 const char *name; 34 const char **groups; 35 unsigned num_groups; 36 }; 37 38 struct mvebu_pinctrl_group { 39 const char *name; 40 const struct mvebu_mpp_ctrl *ctrl; 41 struct mvebu_mpp_ctrl_data *data; 42 struct mvebu_mpp_ctrl_setting *settings; 43 unsigned num_settings; 44 unsigned gid; 45 unsigned *pins; 46 unsigned npins; 47 }; 48 49 struct mvebu_pinctrl { 50 struct device *dev; 51 struct pinctrl_dev *pctldev; 52 struct pinctrl_desc desc; 53 struct mvebu_pinctrl_group *groups; 54 unsigned num_groups; 55 struct mvebu_pinctrl_function *functions; 56 unsigned num_functions; 57 u8 variant; 58 }; 59 60 int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, 61 unsigned int pid, unsigned long *config) 62 { 63 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 64 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 65 66 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; 67 68 return 0; 69 } 70 71 int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, 72 unsigned int pid, unsigned long config) 73 { 74 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 75 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 76 unsigned long reg; 77 78 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); 79 writel(reg | (config << shift), data->base + off); 80 81 return 0; 82 } 83 84 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid( 85 struct mvebu_pinctrl *pctl, unsigned pid) 86 { 87 unsigned n; 88 for (n = 0; n < pctl->num_groups; n++) { 89 if (pid >= pctl->groups[n].pins[0] && 90 pid < pctl->groups[n].pins[0] + 91 pctl->groups[n].npins) 92 return &pctl->groups[n]; 93 } 94 return NULL; 95 } 96 97 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name( 98 struct mvebu_pinctrl *pctl, const char *name) 99 { 100 unsigned n; 101 102 for (n = 0; n < pctl->num_groups; n++) { 103 if (strcmp(name, pctl->groups[n].name) == 0) 104 return &pctl->groups[n]; 105 } 106 107 return NULL; 108 } 109 110 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val( 111 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, 112 unsigned long config) 113 { 114 unsigned n; 115 116 for (n = 0; n < grp->num_settings; n++) { 117 if (config == grp->settings[n].val) { 118 if (!pctl->variant || (pctl->variant & 119 grp->settings[n].variant)) 120 return &grp->settings[n]; 121 } 122 } 123 124 return NULL; 125 } 126 127 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name( 128 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, 129 const char *name) 130 { 131 unsigned n; 132 133 for (n = 0; n < grp->num_settings; n++) { 134 if (strcmp(name, grp->settings[n].name) == 0) { 135 if (!pctl->variant || (pctl->variant & 136 grp->settings[n].variant)) 137 return &grp->settings[n]; 138 } 139 } 140 141 return NULL; 142 } 143 144 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting( 145 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp) 146 { 147 unsigned n; 148 149 for (n = 0; n < grp->num_settings; n++) { 150 if (grp->settings[n].flags & 151 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 152 if (!pctl->variant || (pctl->variant & 153 grp->settings[n].variant)) 154 return &grp->settings[n]; 155 } 156 } 157 158 return NULL; 159 } 160 161 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name( 162 struct mvebu_pinctrl *pctl, const char *name) 163 { 164 unsigned n; 165 166 for (n = 0; n < pctl->num_functions; n++) { 167 if (strcmp(name, pctl->functions[n].name) == 0) 168 return &pctl->functions[n]; 169 } 170 171 return NULL; 172 } 173 174 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, 175 unsigned gid, unsigned long *config) 176 { 177 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 178 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 179 180 if (!grp->ctrl) 181 return -EINVAL; 182 183 return grp->ctrl->mpp_get(grp->data, grp->pins[0], config); 184 } 185 186 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, 187 unsigned gid, unsigned long *configs, 188 unsigned num_configs) 189 { 190 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 191 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 192 int i, ret; 193 194 if (!grp->ctrl) 195 return -EINVAL; 196 197 for (i = 0; i < num_configs; i++) { 198 ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]); 199 if (ret) 200 return ret; 201 } /* for each config */ 202 203 return 0; 204 } 205 206 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 207 struct seq_file *s, unsigned gid) 208 { 209 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 210 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 211 struct mvebu_mpp_ctrl_setting *curr; 212 unsigned long config; 213 unsigned n; 214 215 if (mvebu_pinconf_group_get(pctldev, gid, &config)) 216 return; 217 218 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config); 219 220 if (curr) { 221 seq_printf(s, "current: %s", curr->name); 222 if (curr->subname) 223 seq_printf(s, "(%s)", curr->subname); 224 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 225 seq_putc(s, '('); 226 if (curr->flags & MVEBU_SETTING_GPI) 227 seq_putc(s, 'i'); 228 if (curr->flags & MVEBU_SETTING_GPO) 229 seq_putc(s, 'o'); 230 seq_putc(s, ')'); 231 } 232 } else { 233 seq_puts(s, "current: UNKNOWN"); 234 } 235 236 if (grp->num_settings > 1) { 237 seq_puts(s, ", available = ["); 238 for (n = 0; n < grp->num_settings; n++) { 239 if (curr == &grp->settings[n]) 240 continue; 241 242 /* skip unsupported settings for this variant */ 243 if (pctl->variant && 244 !(pctl->variant & grp->settings[n].variant)) 245 continue; 246 247 seq_printf(s, " %s", grp->settings[n].name); 248 if (grp->settings[n].subname) 249 seq_printf(s, "(%s)", grp->settings[n].subname); 250 if (grp->settings[n].flags & 251 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 252 seq_putc(s, '('); 253 if (grp->settings[n].flags & MVEBU_SETTING_GPI) 254 seq_putc(s, 'i'); 255 if (grp->settings[n].flags & MVEBU_SETTING_GPO) 256 seq_putc(s, 'o'); 257 seq_putc(s, ')'); 258 } 259 } 260 seq_puts(s, " ]"); 261 } 262 } 263 264 static const struct pinconf_ops mvebu_pinconf_ops = { 265 .pin_config_group_get = mvebu_pinconf_group_get, 266 .pin_config_group_set = mvebu_pinconf_group_set, 267 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show, 268 }; 269 270 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev) 271 { 272 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 273 274 return pctl->num_functions; 275 } 276 277 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev, 278 unsigned fid) 279 { 280 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 281 282 return pctl->functions[fid].name; 283 } 284 285 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid, 286 const char * const **groups, 287 unsigned * const num_groups) 288 { 289 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 290 291 *groups = pctl->functions[fid].groups; 292 *num_groups = pctl->functions[fid].num_groups; 293 return 0; 294 } 295 296 static int mvebu_pinmux_set(struct pinctrl_dev *pctldev, unsigned fid, 297 unsigned gid) 298 { 299 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 300 struct mvebu_pinctrl_function *func = &pctl->functions[fid]; 301 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 302 struct mvebu_mpp_ctrl_setting *setting; 303 int ret; 304 unsigned long config; 305 306 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp, 307 func->name); 308 if (!setting) { 309 dev_err(pctl->dev, 310 "unable to find setting %s in group %s\n", 311 func->name, func->groups[gid]); 312 return -EINVAL; 313 } 314 315 config = setting->val; 316 ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); 317 if (ret) { 318 dev_err(pctl->dev, "cannot set group %s to %s\n", 319 func->groups[gid], func->name); 320 return ret; 321 } 322 323 return 0; 324 } 325 326 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 327 struct pinctrl_gpio_range *range, unsigned offset) 328 { 329 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 330 struct mvebu_pinctrl_group *grp; 331 struct mvebu_mpp_ctrl_setting *setting; 332 unsigned long config; 333 334 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); 335 if (!grp) 336 return -EINVAL; 337 338 if (grp->ctrl->mpp_gpio_req) 339 return grp->ctrl->mpp_gpio_req(grp->data, offset); 340 341 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 342 if (!setting) 343 return -ENOTSUPP; 344 345 config = setting->val; 346 347 return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); 348 } 349 350 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 351 struct pinctrl_gpio_range *range, unsigned offset, bool input) 352 { 353 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 354 struct mvebu_pinctrl_group *grp; 355 struct mvebu_mpp_ctrl_setting *setting; 356 357 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); 358 if (!grp) 359 return -EINVAL; 360 361 if (grp->ctrl->mpp_gpio_dir) 362 return grp->ctrl->mpp_gpio_dir(grp->data, offset, input); 363 364 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 365 if (!setting) 366 return -ENOTSUPP; 367 368 if ((input && (setting->flags & MVEBU_SETTING_GPI)) || 369 (!input && (setting->flags & MVEBU_SETTING_GPO))) 370 return 0; 371 372 return -ENOTSUPP; 373 } 374 375 static const struct pinmux_ops mvebu_pinmux_ops = { 376 .get_functions_count = mvebu_pinmux_get_funcs_count, 377 .get_function_name = mvebu_pinmux_get_func_name, 378 .get_function_groups = mvebu_pinmux_get_groups, 379 .gpio_request_enable = mvebu_pinmux_gpio_request_enable, 380 .gpio_set_direction = mvebu_pinmux_gpio_set_direction, 381 .set_mux = mvebu_pinmux_set, 382 }; 383 384 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 385 { 386 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 387 return pctl->num_groups; 388 } 389 390 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 391 unsigned gid) 392 { 393 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 394 return pctl->groups[gid].name; 395 } 396 397 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 398 unsigned gid, const unsigned **pins, 399 unsigned *num_pins) 400 { 401 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 402 *pins = pctl->groups[gid].pins; 403 *num_pins = pctl->groups[gid].npins; 404 return 0; 405 } 406 407 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 408 struct device_node *np, 409 struct pinctrl_map **map, 410 unsigned *num_maps) 411 { 412 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 413 struct property *prop; 414 const char *function; 415 const char *group; 416 int ret, nmaps, n; 417 418 *map = NULL; 419 *num_maps = 0; 420 421 ret = of_property_read_string(np, "marvell,function", &function); 422 if (ret) { 423 dev_err(pctl->dev, 424 "missing marvell,function in node %pOFn\n", np); 425 return 0; 426 } 427 428 nmaps = of_property_count_strings(np, "marvell,pins"); 429 if (nmaps < 0) { 430 dev_err(pctl->dev, 431 "missing marvell,pins in node %pOFn\n", np); 432 return 0; 433 } 434 435 *map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL); 436 if (!*map) 437 return -ENOMEM; 438 439 n = 0; 440 of_property_for_each_string(np, "marvell,pins", prop, group) { 441 struct mvebu_pinctrl_group *grp = 442 mvebu_pinctrl_find_group_by_name(pctl, group); 443 444 if (!grp) { 445 dev_err(pctl->dev, "unknown pin %s", group); 446 continue; 447 } 448 449 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) { 450 dev_err(pctl->dev, "unsupported function %s on pin %s", 451 function, group); 452 continue; 453 } 454 455 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP; 456 (*map)[n].data.mux.group = group; 457 (*map)[n].data.mux.function = function; 458 n++; 459 } 460 461 *num_maps = nmaps; 462 463 return 0; 464 } 465 466 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, 467 struct pinctrl_map *map, unsigned num_maps) 468 { 469 kfree(map); 470 } 471 472 static const struct pinctrl_ops mvebu_pinctrl_ops = { 473 .get_groups_count = mvebu_pinctrl_get_groups_count, 474 .get_group_name = mvebu_pinctrl_get_group_name, 475 .get_group_pins = mvebu_pinctrl_get_group_pins, 476 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map, 477 .dt_free_map = mvebu_pinctrl_dt_free_map, 478 }; 479 480 static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize, 481 const char *name) 482 { 483 if (*funcsize <= 0) 484 return -EOVERFLOW; 485 486 while (funcs->num_groups) { 487 /* function already there */ 488 if (strcmp(funcs->name, name) == 0) { 489 funcs->num_groups++; 490 return -EEXIST; 491 } 492 funcs++; 493 } 494 495 /* append new unique function */ 496 funcs->name = name; 497 funcs->num_groups = 1; 498 (*funcsize)--; 499 500 return 0; 501 } 502 503 static int mvebu_pinctrl_build_functions(struct platform_device *pdev, 504 struct mvebu_pinctrl *pctl) 505 { 506 struct mvebu_pinctrl_function *funcs; 507 int num = 0, funcsize = pctl->desc.npins; 508 int n, s; 509 510 /* we allocate functions for number of pins and hope 511 * there are fewer unique functions than pins available */ 512 funcs = devm_kcalloc(&pdev->dev, 513 funcsize, sizeof(struct mvebu_pinctrl_function), 514 GFP_KERNEL); 515 if (!funcs) 516 return -ENOMEM; 517 518 for (n = 0; n < pctl->num_groups; n++) { 519 struct mvebu_pinctrl_group *grp = &pctl->groups[n]; 520 for (s = 0; s < grp->num_settings; s++) { 521 int ret; 522 523 /* skip unsupported settings on this variant */ 524 if (pctl->variant && 525 !(pctl->variant & grp->settings[s].variant)) 526 continue; 527 528 /* check for unique functions and count groups */ 529 ret = _add_function(funcs, &funcsize, 530 grp->settings[s].name); 531 if (ret == -EOVERFLOW) 532 dev_err(&pdev->dev, 533 "More functions than pins(%d)\n", 534 pctl->desc.npins); 535 if (ret < 0) 536 continue; 537 538 num++; 539 } 540 } 541 542 pctl->num_functions = num; 543 pctl->functions = funcs; 544 545 for (n = 0; n < pctl->num_groups; n++) { 546 struct mvebu_pinctrl_group *grp = &pctl->groups[n]; 547 for (s = 0; s < grp->num_settings; s++) { 548 struct mvebu_pinctrl_function *f; 549 const char **groups; 550 551 /* skip unsupported settings on this variant */ 552 if (pctl->variant && 553 !(pctl->variant & grp->settings[s].variant)) 554 continue; 555 556 f = mvebu_pinctrl_find_function_by_name(pctl, 557 grp->settings[s].name); 558 559 /* allocate group name array if not done already */ 560 if (!f->groups) { 561 f->groups = devm_kcalloc(&pdev->dev, 562 f->num_groups, 563 sizeof(char *), 564 GFP_KERNEL); 565 if (!f->groups) 566 return -ENOMEM; 567 } 568 569 /* find next free group name and assign current name */ 570 groups = f->groups; 571 while (*groups) 572 groups++; 573 *groups = grp->name; 574 } 575 } 576 577 return 0; 578 } 579 580 int mvebu_pinctrl_probe(struct platform_device *pdev) 581 { 582 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); 583 struct mvebu_pinctrl *pctl; 584 struct pinctrl_pin_desc *pdesc; 585 unsigned gid, n, k; 586 unsigned size, noname = 0; 587 char *noname_buf; 588 void *p; 589 int ret; 590 591 if (!soc || !soc->controls || !soc->modes) { 592 dev_err(&pdev->dev, "wrong pinctrl soc info\n"); 593 return -EINVAL; 594 } 595 596 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl), 597 GFP_KERNEL); 598 if (!pctl) 599 return -ENOMEM; 600 601 pctl->desc.name = dev_name(&pdev->dev); 602 pctl->desc.owner = THIS_MODULE; 603 pctl->desc.pctlops = &mvebu_pinctrl_ops; 604 pctl->desc.pmxops = &mvebu_pinmux_ops; 605 pctl->desc.confops = &mvebu_pinconf_ops; 606 pctl->variant = soc->variant; 607 pctl->dev = &pdev->dev; 608 platform_set_drvdata(pdev, pctl); 609 610 /* count controls and create names for mvebu generic 611 register controls; also does sanity checks */ 612 pctl->num_groups = 0; 613 pctl->desc.npins = 0; 614 for (n = 0; n < soc->ncontrols; n++) { 615 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; 616 617 pctl->desc.npins += ctrl->npins; 618 /* initialize control's pins[] array */ 619 for (k = 0; k < ctrl->npins; k++) 620 ctrl->pins[k] = ctrl->pid + k; 621 622 /* 623 * We allow to pass controls with NULL name that we treat 624 * as a range of one-pin groups with generic mvebu register 625 * controls. 626 */ 627 if (!ctrl->name) { 628 pctl->num_groups += ctrl->npins; 629 noname += ctrl->npins; 630 } else { 631 pctl->num_groups += 1; 632 } 633 } 634 635 pdesc = devm_kcalloc(&pdev->dev, 636 pctl->desc.npins, 637 sizeof(struct pinctrl_pin_desc), 638 GFP_KERNEL); 639 if (!pdesc) 640 return -ENOMEM; 641 642 for (n = 0; n < pctl->desc.npins; n++) 643 pdesc[n].number = n; 644 pctl->desc.pins = pdesc; 645 646 /* 647 * allocate groups and name buffers for unnamed groups. 648 */ 649 size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8; 650 p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); 651 if (!p) 652 return -ENOMEM; 653 654 pctl->groups = p; 655 noname_buf = p + pctl->num_groups * sizeof(*pctl->groups); 656 657 /* assign mpp controls to groups */ 658 gid = 0; 659 for (n = 0; n < soc->ncontrols; n++) { 660 const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; 661 struct mvebu_mpp_ctrl_data *data = soc->control_data ? 662 &soc->control_data[n] : NULL; 663 664 pctl->groups[gid].gid = gid; 665 pctl->groups[gid].ctrl = ctrl; 666 pctl->groups[gid].data = data; 667 pctl->groups[gid].name = ctrl->name; 668 pctl->groups[gid].pins = ctrl->pins; 669 pctl->groups[gid].npins = ctrl->npins; 670 671 /* 672 * We treat unnamed controls as a range of one-pin groups 673 * with generic mvebu register controls. Use one group for 674 * each in this range and assign a default group name. 675 */ 676 if (!ctrl->name) { 677 pctl->groups[gid].name = noname_buf; 678 pctl->groups[gid].npins = 1; 679 sprintf(noname_buf, "mpp%d", ctrl->pid+0); 680 noname_buf += 8; 681 682 for (k = 1; k < ctrl->npins; k++) { 683 gid++; 684 pctl->groups[gid].gid = gid; 685 pctl->groups[gid].ctrl = ctrl; 686 pctl->groups[gid].data = data; 687 pctl->groups[gid].name = noname_buf; 688 pctl->groups[gid].pins = &ctrl->pins[k]; 689 pctl->groups[gid].npins = 1; 690 sprintf(noname_buf, "mpp%d", ctrl->pid+k); 691 noname_buf += 8; 692 } 693 } 694 gid++; 695 } 696 697 /* assign mpp modes to groups */ 698 for (n = 0; n < soc->nmodes; n++) { 699 struct mvebu_mpp_mode *mode = &soc->modes[n]; 700 struct mvebu_mpp_ctrl_setting *set = &mode->settings[0]; 701 struct mvebu_pinctrl_group *grp; 702 unsigned num_settings; 703 unsigned supp_settings; 704 705 for (num_settings = 0, supp_settings = 0; ; set++) { 706 if (!set->name) 707 break; 708 709 num_settings++; 710 711 /* skip unsupported settings for this variant */ 712 if (pctl->variant && !(pctl->variant & set->variant)) 713 continue; 714 715 supp_settings++; 716 717 /* find gpio/gpo/gpi settings */ 718 if (strcmp(set->name, "gpio") == 0) 719 set->flags = MVEBU_SETTING_GPI | 720 MVEBU_SETTING_GPO; 721 else if (strcmp(set->name, "gpo") == 0) 722 set->flags = MVEBU_SETTING_GPO; 723 else if (strcmp(set->name, "gpi") == 0) 724 set->flags = MVEBU_SETTING_GPI; 725 } 726 727 /* skip modes with no settings for this variant */ 728 if (!supp_settings) 729 continue; 730 731 grp = mvebu_pinctrl_find_group_by_pid(pctl, mode->pid); 732 if (!grp) { 733 dev_warn(&pdev->dev, "unknown pinctrl group %d\n", 734 mode->pid); 735 continue; 736 } 737 738 grp->settings = mode->settings; 739 grp->num_settings = num_settings; 740 } 741 742 ret = mvebu_pinctrl_build_functions(pdev, pctl); 743 if (ret) { 744 dev_err(&pdev->dev, "unable to build functions\n"); 745 return ret; 746 } 747 748 pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl); 749 if (IS_ERR(pctl->pctldev)) { 750 dev_err(&pdev->dev, "unable to register pinctrl driver\n"); 751 return PTR_ERR(pctl->pctldev); 752 } 753 754 dev_info(&pdev->dev, "registered pinctrl driver\n"); 755 756 /* register gpio ranges */ 757 for (n = 0; n < soc->ngpioranges; n++) 758 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]); 759 760 return 0; 761 } 762 763 /* 764 * mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl 765 * @pdev: platform device (with platform data already attached) 766 * 767 * Initialise a simple (single base address) mmio pinctrl driver, 768 * assigning the MMIO base address to all mvebu mpp ctrl instances. 769 */ 770 int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev) 771 { 772 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); 773 struct mvebu_mpp_ctrl_data *mpp_data; 774 void __iomem *base; 775 int i; 776 777 base = devm_platform_ioremap_resource(pdev, 0); 778 if (IS_ERR(base)) 779 return PTR_ERR(base); 780 781 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), 782 GFP_KERNEL); 783 if (!mpp_data) 784 return -ENOMEM; 785 786 for (i = 0; i < soc->ncontrols; i++) 787 mpp_data[i].base = base; 788 789 soc->control_data = mpp_data; 790 791 return mvebu_pinctrl_probe(pdev); 792 } 793 794 int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, 795 unsigned int pid, unsigned long *config) 796 { 797 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 798 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 799 unsigned int val; 800 int err; 801 802 err = regmap_read(data->regmap.map, data->regmap.offset + off, &val); 803 if (err) 804 return err; 805 806 *config = (val >> shift) & MVEBU_MPP_MASK; 807 808 return 0; 809 } 810 811 int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, 812 unsigned int pid, unsigned long config) 813 { 814 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 815 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; 816 817 return regmap_update_bits(data->regmap.map, data->regmap.offset + off, 818 MVEBU_MPP_MASK << shift, config << shift); 819 } 820 821 int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev, 822 struct device *syscon_dev, u32 offset) 823 { 824 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); 825 struct mvebu_mpp_ctrl_data *mpp_data; 826 struct regmap *regmap; 827 int i; 828 829 regmap = syscon_node_to_regmap(syscon_dev->of_node); 830 if (IS_ERR(regmap)) 831 return PTR_ERR(regmap); 832 833 mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data), 834 GFP_KERNEL); 835 if (!mpp_data) 836 return -ENOMEM; 837 838 for (i = 0; i < soc->ncontrols; i++) { 839 mpp_data[i].regmap.map = regmap; 840 mpp_data[i].regmap.offset = offset; 841 } 842 843 soc->control_data = mpp_data; 844 845 return mvebu_pinctrl_probe(pdev); 846 } 847