1 /* 2 * Marvell MVEBU pinctrl core driver 3 * 4 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13 #include <linux/platform_device.h> 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 #include <linux/io.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_platform.h> 20 #include <linux/err.h> 21 #include <linux/gpio.h> 22 #include <linux/pinctrl/machine.h> 23 #include <linux/pinctrl/pinconf.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 27 #include "pinctrl-mvebu.h" 28 29 #define MPPS_PER_REG 8 30 #define MPP_BITS 4 31 #define MPP_MASK 0xf 32 33 struct mvebu_pinctrl_function { 34 const char *name; 35 const char **groups; 36 unsigned num_groups; 37 }; 38 39 struct mvebu_pinctrl_group { 40 const char *name; 41 struct mvebu_mpp_ctrl *ctrl; 42 struct mvebu_mpp_ctrl_setting *settings; 43 unsigned num_settings; 44 unsigned gid; 45 unsigned *pins; 46 unsigned npins; 47 }; 48 49 struct mvebu_pinctrl { 50 struct device *dev; 51 struct pinctrl_dev *pctldev; 52 struct pinctrl_desc desc; 53 void __iomem *base; 54 struct mvebu_pinctrl_group *groups; 55 unsigned num_groups; 56 struct mvebu_pinctrl_function *functions; 57 unsigned num_functions; 58 u8 variant; 59 }; 60 61 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid( 62 struct mvebu_pinctrl *pctl, unsigned pid) 63 { 64 unsigned n; 65 for (n = 0; n < pctl->num_groups; n++) { 66 if (pid >= pctl->groups[n].pins[0] && 67 pid < pctl->groups[n].pins[0] + 68 pctl->groups[n].npins) 69 return &pctl->groups[n]; 70 } 71 return NULL; 72 } 73 74 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name( 75 struct mvebu_pinctrl *pctl, const char *name) 76 { 77 unsigned n; 78 for (n = 0; n < pctl->num_groups; n++) { 79 if (strcmp(name, pctl->groups[n].name) == 0) 80 return &pctl->groups[n]; 81 } 82 return NULL; 83 } 84 85 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val( 86 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, 87 unsigned long config) 88 { 89 unsigned n; 90 for (n = 0; n < grp->num_settings; n++) { 91 if (config == grp->settings[n].val) { 92 if (!pctl->variant || (pctl->variant & 93 grp->settings[n].variant)) 94 return &grp->settings[n]; 95 } 96 } 97 return NULL; 98 } 99 100 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name( 101 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp, 102 const char *name) 103 { 104 unsigned n; 105 for (n = 0; n < grp->num_settings; n++) { 106 if (strcmp(name, grp->settings[n].name) == 0) { 107 if (!pctl->variant || (pctl->variant & 108 grp->settings[n].variant)) 109 return &grp->settings[n]; 110 } 111 } 112 return NULL; 113 } 114 115 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting( 116 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp) 117 { 118 unsigned n; 119 for (n = 0; n < grp->num_settings; n++) { 120 if (grp->settings[n].flags & 121 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 122 if (!pctl->variant || (pctl->variant & 123 grp->settings[n].variant)) 124 return &grp->settings[n]; 125 } 126 } 127 return NULL; 128 } 129 130 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name( 131 struct mvebu_pinctrl *pctl, const char *name) 132 { 133 unsigned n; 134 for (n = 0; n < pctl->num_functions; n++) { 135 if (strcmp(name, pctl->functions[n].name) == 0) 136 return &pctl->functions[n]; 137 } 138 return NULL; 139 } 140 141 /* 142 * Common mpp pin configuration registers on MVEBU are 143 * registers of eight 4-bit values for each mpp setting. 144 * Register offset and bit mask are calculated accordingly below. 145 */ 146 static int mvebu_common_mpp_get(struct mvebu_pinctrl *pctl, 147 struct mvebu_pinctrl_group *grp, 148 unsigned long *config) 149 { 150 unsigned pin = grp->gid; 151 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS; 152 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS; 153 154 *config = readl(pctl->base + off); 155 *config >>= shift; 156 *config &= MPP_MASK; 157 158 return 0; 159 } 160 161 static int mvebu_common_mpp_set(struct mvebu_pinctrl *pctl, 162 struct mvebu_pinctrl_group *grp, 163 unsigned long config) 164 { 165 unsigned pin = grp->gid; 166 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS; 167 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS; 168 unsigned long reg; 169 170 reg = readl(pctl->base + off); 171 reg &= ~(MPP_MASK << shift); 172 reg |= (config << shift); 173 writel(reg, pctl->base + off); 174 175 return 0; 176 } 177 178 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, 179 unsigned gid, unsigned long *config) 180 { 181 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 182 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 183 184 if (!grp->ctrl) 185 return -EINVAL; 186 187 if (grp->ctrl->mpp_get) 188 return grp->ctrl->mpp_get(grp->ctrl, config); 189 190 return mvebu_common_mpp_get(pctl, grp, config); 191 } 192 193 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, 194 unsigned gid, unsigned long *configs, 195 unsigned num_configs) 196 { 197 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 198 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 199 int i, ret; 200 201 if (!grp->ctrl) 202 return -EINVAL; 203 204 for (i = 0; i < num_configs; i++) { 205 if (grp->ctrl->mpp_set) 206 ret = grp->ctrl->mpp_set(grp->ctrl, configs[i]); 207 else 208 ret = mvebu_common_mpp_set(pctl, grp, configs[i]); 209 210 if (ret) 211 return ret; 212 } /* for each config */ 213 214 return 0; 215 } 216 217 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 218 struct seq_file *s, unsigned gid) 219 { 220 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 221 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 222 struct mvebu_mpp_ctrl_setting *curr; 223 unsigned long config; 224 unsigned n; 225 226 if (mvebu_pinconf_group_get(pctldev, gid, &config)) 227 return; 228 229 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config); 230 231 if (curr) { 232 seq_printf(s, "current: %s", curr->name); 233 if (curr->subname) 234 seq_printf(s, "(%s)", curr->subname); 235 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 236 seq_printf(s, "("); 237 if (curr->flags & MVEBU_SETTING_GPI) 238 seq_printf(s, "i"); 239 if (curr->flags & MVEBU_SETTING_GPO) 240 seq_printf(s, "o"); 241 seq_printf(s, ")"); 242 } 243 } else 244 seq_printf(s, "current: UNKNOWN"); 245 246 if (grp->num_settings > 1) { 247 seq_printf(s, ", available = ["); 248 for (n = 0; n < grp->num_settings; n++) { 249 if (curr == &grp->settings[n]) 250 continue; 251 252 /* skip unsupported settings for this variant */ 253 if (pctl->variant && 254 !(pctl->variant & grp->settings[n].variant)) 255 continue; 256 257 seq_printf(s, " %s", grp->settings[n].name); 258 if (grp->settings[n].subname) 259 seq_printf(s, "(%s)", grp->settings[n].subname); 260 if (grp->settings[n].flags & 261 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) { 262 seq_printf(s, "("); 263 if (grp->settings[n].flags & MVEBU_SETTING_GPI) 264 seq_printf(s, "i"); 265 if (grp->settings[n].flags & MVEBU_SETTING_GPO) 266 seq_printf(s, "o"); 267 seq_printf(s, ")"); 268 } 269 } 270 seq_printf(s, " ]"); 271 } 272 return; 273 } 274 275 static const struct pinconf_ops mvebu_pinconf_ops = { 276 .pin_config_group_get = mvebu_pinconf_group_get, 277 .pin_config_group_set = mvebu_pinconf_group_set, 278 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show, 279 }; 280 281 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev) 282 { 283 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 284 285 return pctl->num_functions; 286 } 287 288 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev, 289 unsigned fid) 290 { 291 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 292 293 return pctl->functions[fid].name; 294 } 295 296 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid, 297 const char * const **groups, 298 unsigned * const num_groups) 299 { 300 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 301 302 *groups = pctl->functions[fid].groups; 303 *num_groups = pctl->functions[fid].num_groups; 304 return 0; 305 } 306 307 static int mvebu_pinmux_enable(struct pinctrl_dev *pctldev, unsigned fid, 308 unsigned gid) 309 { 310 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 311 struct mvebu_pinctrl_function *func = &pctl->functions[fid]; 312 struct mvebu_pinctrl_group *grp = &pctl->groups[gid]; 313 struct mvebu_mpp_ctrl_setting *setting; 314 int ret; 315 unsigned long config; 316 317 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp, 318 func->name); 319 if (!setting) { 320 dev_err(pctl->dev, 321 "unable to find setting %s in group %s\n", 322 func->name, func->groups[gid]); 323 return -EINVAL; 324 } 325 326 config = setting->val; 327 ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); 328 if (ret) { 329 dev_err(pctl->dev, "cannot set group %s to %s\n", 330 func->groups[gid], func->name); 331 return ret; 332 } 333 334 return 0; 335 } 336 337 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 338 struct pinctrl_gpio_range *range, unsigned offset) 339 { 340 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 341 struct mvebu_pinctrl_group *grp; 342 struct mvebu_mpp_ctrl_setting *setting; 343 unsigned long config; 344 345 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); 346 if (!grp) 347 return -EINVAL; 348 349 if (grp->ctrl->mpp_gpio_req) 350 return grp->ctrl->mpp_gpio_req(grp->ctrl, offset); 351 352 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 353 if (!setting) 354 return -ENOTSUPP; 355 356 config = setting->val; 357 358 return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1); 359 } 360 361 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 362 struct pinctrl_gpio_range *range, unsigned offset, bool input) 363 { 364 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 365 struct mvebu_pinctrl_group *grp; 366 struct mvebu_mpp_ctrl_setting *setting; 367 368 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset); 369 if (!grp) 370 return -EINVAL; 371 372 if (grp->ctrl->mpp_gpio_dir) 373 return grp->ctrl->mpp_gpio_dir(grp->ctrl, offset, input); 374 375 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 376 if (!setting) 377 return -ENOTSUPP; 378 379 if ((input && (setting->flags & MVEBU_SETTING_GPI)) || 380 (!input && (setting->flags & MVEBU_SETTING_GPO))) 381 return 0; 382 383 return -ENOTSUPP; 384 } 385 386 static const struct pinmux_ops mvebu_pinmux_ops = { 387 .get_functions_count = mvebu_pinmux_get_funcs_count, 388 .get_function_name = mvebu_pinmux_get_func_name, 389 .get_function_groups = mvebu_pinmux_get_groups, 390 .gpio_request_enable = mvebu_pinmux_gpio_request_enable, 391 .gpio_set_direction = mvebu_pinmux_gpio_set_direction, 392 .enable = mvebu_pinmux_enable, 393 }; 394 395 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 396 { 397 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 398 return pctl->num_groups; 399 } 400 401 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 402 unsigned gid) 403 { 404 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 405 return pctl->groups[gid].name; 406 } 407 408 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 409 unsigned gid, const unsigned **pins, 410 unsigned *num_pins) 411 { 412 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 413 *pins = pctl->groups[gid].pins; 414 *num_pins = pctl->groups[gid].npins; 415 return 0; 416 } 417 418 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 419 struct device_node *np, 420 struct pinctrl_map **map, 421 unsigned *num_maps) 422 { 423 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 424 struct property *prop; 425 const char *function; 426 const char *group; 427 int ret, nmaps, n; 428 429 *map = NULL; 430 *num_maps = 0; 431 432 ret = of_property_read_string(np, "marvell,function", &function); 433 if (ret) { 434 dev_err(pctl->dev, 435 "missing marvell,function in node %s\n", np->name); 436 return 0; 437 } 438 439 nmaps = of_property_count_strings(np, "marvell,pins"); 440 if (nmaps < 0) { 441 dev_err(pctl->dev, 442 "missing marvell,pins in node %s\n", np->name); 443 return 0; 444 } 445 446 *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL); 447 if (*map == NULL) { 448 dev_err(pctl->dev, 449 "cannot allocate pinctrl_map memory for %s\n", 450 np->name); 451 return -ENOMEM; 452 } 453 454 n = 0; 455 of_property_for_each_string(np, "marvell,pins", prop, group) { 456 struct mvebu_pinctrl_group *grp = 457 mvebu_pinctrl_find_group_by_name(pctl, group); 458 459 if (!grp) { 460 dev_err(pctl->dev, "unknown pin %s", group); 461 continue; 462 } 463 464 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) { 465 dev_err(pctl->dev, "unsupported function %s on pin %s", 466 function, group); 467 continue; 468 } 469 470 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP; 471 (*map)[n].data.mux.group = group; 472 (*map)[n].data.mux.function = function; 473 n++; 474 } 475 476 *num_maps = nmaps; 477 478 return 0; 479 } 480 481 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, 482 struct pinctrl_map *map, unsigned num_maps) 483 { 484 kfree(map); 485 } 486 487 static const struct pinctrl_ops mvebu_pinctrl_ops = { 488 .get_groups_count = mvebu_pinctrl_get_groups_count, 489 .get_group_name = mvebu_pinctrl_get_group_name, 490 .get_group_pins = mvebu_pinctrl_get_group_pins, 491 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map, 492 .dt_free_map = mvebu_pinctrl_dt_free_map, 493 }; 494 495 static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize, 496 const char *name) 497 { 498 if (*funcsize <= 0) 499 return -EOVERFLOW; 500 501 while (funcs->num_groups) { 502 /* function already there */ 503 if (strcmp(funcs->name, name) == 0) { 504 funcs->num_groups++; 505 return -EEXIST; 506 } 507 funcs++; 508 } 509 510 /* append new unique function */ 511 funcs->name = name; 512 funcs->num_groups = 1; 513 (*funcsize)--; 514 515 return 0; 516 } 517 518 static int mvebu_pinctrl_build_functions(struct platform_device *pdev, 519 struct mvebu_pinctrl *pctl) 520 { 521 struct mvebu_pinctrl_function *funcs; 522 int num = 0, funcsize = pctl->desc.npins; 523 int n, s; 524 525 /* we allocate functions for number of pins and hope 526 * there are fewer unique functions than pins available */ 527 funcs = devm_kzalloc(&pdev->dev, funcsize * 528 sizeof(struct mvebu_pinctrl_function), GFP_KERNEL); 529 if (!funcs) 530 return -ENOMEM; 531 532 for (n = 0; n < pctl->num_groups; n++) { 533 struct mvebu_pinctrl_group *grp = &pctl->groups[n]; 534 for (s = 0; s < grp->num_settings; s++) { 535 int ret; 536 537 /* skip unsupported settings on this variant */ 538 if (pctl->variant && 539 !(pctl->variant & grp->settings[s].variant)) 540 continue; 541 542 /* check for unique functions and count groups */ 543 ret = _add_function(funcs, &funcsize, 544 grp->settings[s].name); 545 if (ret == -EOVERFLOW) 546 dev_err(&pdev->dev, 547 "More functions than pins(%d)\n", 548 pctl->desc.npins); 549 if (ret < 0) 550 continue; 551 552 num++; 553 } 554 } 555 556 pctl->num_functions = num; 557 pctl->functions = funcs; 558 559 for (n = 0; n < pctl->num_groups; n++) { 560 struct mvebu_pinctrl_group *grp = &pctl->groups[n]; 561 for (s = 0; s < grp->num_settings; s++) { 562 struct mvebu_pinctrl_function *f; 563 const char **groups; 564 565 /* skip unsupported settings on this variant */ 566 if (pctl->variant && 567 !(pctl->variant & grp->settings[s].variant)) 568 continue; 569 570 f = mvebu_pinctrl_find_function_by_name(pctl, 571 grp->settings[s].name); 572 573 /* allocate group name array if not done already */ 574 if (!f->groups) { 575 f->groups = devm_kzalloc(&pdev->dev, 576 f->num_groups * sizeof(char *), 577 GFP_KERNEL); 578 if (!f->groups) 579 return -ENOMEM; 580 } 581 582 /* find next free group name and assign current name */ 583 groups = f->groups; 584 while (*groups) 585 groups++; 586 *groups = grp->name; 587 } 588 } 589 590 return 0; 591 } 592 593 int mvebu_pinctrl_probe(struct platform_device *pdev) 594 { 595 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); 596 struct resource *res; 597 struct mvebu_pinctrl *pctl; 598 void __iomem *base; 599 struct pinctrl_pin_desc *pdesc; 600 unsigned gid, n, k; 601 int ret; 602 603 if (!soc || !soc->controls || !soc->modes) { 604 dev_err(&pdev->dev, "wrong pinctrl soc info\n"); 605 return -EINVAL; 606 } 607 608 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 609 base = devm_ioremap_resource(&pdev->dev, res); 610 if (IS_ERR(base)) 611 return PTR_ERR(base); 612 613 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl), 614 GFP_KERNEL); 615 if (!pctl) { 616 dev_err(&pdev->dev, "unable to alloc driver\n"); 617 return -ENOMEM; 618 } 619 620 pctl->desc.name = dev_name(&pdev->dev); 621 pctl->desc.owner = THIS_MODULE; 622 pctl->desc.pctlops = &mvebu_pinctrl_ops; 623 pctl->desc.pmxops = &mvebu_pinmux_ops; 624 pctl->desc.confops = &mvebu_pinconf_ops; 625 pctl->variant = soc->variant; 626 pctl->base = base; 627 pctl->dev = &pdev->dev; 628 platform_set_drvdata(pdev, pctl); 629 630 /* count controls and create names for mvebu generic 631 register controls; also does sanity checks */ 632 pctl->num_groups = 0; 633 pctl->desc.npins = 0; 634 for (n = 0; n < soc->ncontrols; n++) { 635 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; 636 char *names; 637 638 pctl->desc.npins += ctrl->npins; 639 /* initial control pins */ 640 for (k = 0; k < ctrl->npins; k++) 641 ctrl->pins[k] = ctrl->pid + k; 642 643 /* special soc specific control */ 644 if (ctrl->mpp_get || ctrl->mpp_set) { 645 if (!ctrl->name || !ctrl->mpp_get || !ctrl->mpp_set) { 646 dev_err(&pdev->dev, "wrong soc control info\n"); 647 return -EINVAL; 648 } 649 pctl->num_groups += 1; 650 continue; 651 } 652 653 /* generic mvebu register control */ 654 names = devm_kzalloc(&pdev->dev, ctrl->npins * 8, GFP_KERNEL); 655 if (!names) { 656 dev_err(&pdev->dev, "failed to alloc mpp names\n"); 657 return -ENOMEM; 658 } 659 for (k = 0; k < ctrl->npins; k++) 660 sprintf(names + 8*k, "mpp%d", ctrl->pid+k); 661 ctrl->name = names; 662 pctl->num_groups += ctrl->npins; 663 } 664 665 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins * 666 sizeof(struct pinctrl_pin_desc), GFP_KERNEL); 667 if (!pdesc) { 668 dev_err(&pdev->dev, "failed to alloc pinctrl pins\n"); 669 return -ENOMEM; 670 } 671 672 for (n = 0; n < pctl->desc.npins; n++) 673 pdesc[n].number = n; 674 pctl->desc.pins = pdesc; 675 676 pctl->groups = devm_kzalloc(&pdev->dev, pctl->num_groups * 677 sizeof(struct mvebu_pinctrl_group), GFP_KERNEL); 678 if (!pctl->groups) { 679 dev_err(&pdev->dev, "failed to alloc pinctrl groups\n"); 680 return -ENOMEM; 681 } 682 683 /* assign mpp controls to groups */ 684 gid = 0; 685 for (n = 0; n < soc->ncontrols; n++) { 686 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; 687 pctl->groups[gid].gid = gid; 688 pctl->groups[gid].ctrl = ctrl; 689 pctl->groups[gid].name = ctrl->name; 690 pctl->groups[gid].pins = ctrl->pins; 691 pctl->groups[gid].npins = ctrl->npins; 692 693 /* generic mvebu register control maps to a number of groups */ 694 if (!ctrl->mpp_get && !ctrl->mpp_set) { 695 pctl->groups[gid].npins = 1; 696 697 for (k = 1; k < ctrl->npins; k++) { 698 gid++; 699 pctl->groups[gid].gid = gid; 700 pctl->groups[gid].ctrl = ctrl; 701 pctl->groups[gid].name = &ctrl->name[8*k]; 702 pctl->groups[gid].pins = &ctrl->pins[k]; 703 pctl->groups[gid].npins = 1; 704 } 705 } 706 gid++; 707 } 708 709 /* assign mpp modes to groups */ 710 for (n = 0; n < soc->nmodes; n++) { 711 struct mvebu_mpp_mode *mode = &soc->modes[n]; 712 struct mvebu_pinctrl_group *grp = 713 mvebu_pinctrl_find_group_by_pid(pctl, mode->pid); 714 unsigned num_settings; 715 716 if (!grp) { 717 dev_warn(&pdev->dev, "unknown pinctrl group %d\n", 718 mode->pid); 719 continue; 720 } 721 722 for (num_settings = 0; ;) { 723 struct mvebu_mpp_ctrl_setting *set = 724 &mode->settings[num_settings]; 725 726 if (!set->name) 727 break; 728 num_settings++; 729 730 /* skip unsupported settings for this variant */ 731 if (pctl->variant && !(pctl->variant & set->variant)) 732 continue; 733 734 /* find gpio/gpo/gpi settings */ 735 if (strcmp(set->name, "gpio") == 0) 736 set->flags = MVEBU_SETTING_GPI | 737 MVEBU_SETTING_GPO; 738 else if (strcmp(set->name, "gpo") == 0) 739 set->flags = MVEBU_SETTING_GPO; 740 else if (strcmp(set->name, "gpi") == 0) 741 set->flags = MVEBU_SETTING_GPI; 742 } 743 744 grp->settings = mode->settings; 745 grp->num_settings = num_settings; 746 } 747 748 ret = mvebu_pinctrl_build_functions(pdev, pctl); 749 if (ret) { 750 dev_err(&pdev->dev, "unable to build functions\n"); 751 return ret; 752 } 753 754 pctl->pctldev = pinctrl_register(&pctl->desc, &pdev->dev, pctl); 755 if (!pctl->pctldev) { 756 dev_err(&pdev->dev, "unable to register pinctrl driver\n"); 757 return -EINVAL; 758 } 759 760 dev_info(&pdev->dev, "registered pinctrl driver\n"); 761 762 /* register gpio ranges */ 763 for (n = 0; n < soc->ngpioranges; n++) 764 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]); 765 766 return 0; 767 } 768 769 int mvebu_pinctrl_remove(struct platform_device *pdev) 770 { 771 struct mvebu_pinctrl *pctl = platform_get_drvdata(pdev); 772 pinctrl_unregister(pctl->pctldev); 773 return 0; 774 } 775