1 /* 2 * Marvell Armada CP110 pinctrl driver based on mvebu pinctrl core 3 * 4 * Copyright (C) 2017 Marvell 5 * 6 * Hanna Hawa <hannah@marvell.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #include <linux/err.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/pinctrl/pinctrl.h> 21 #include <linux/platform_device.h> 22 23 #include "pinctrl-mvebu.h" 24 25 /* 26 * Even if the pin controller is the same the MMP available depend on the SoC 27 * integration. 28 * - In Armada7K (single CP) almost all the MPPs are available (except the 29 * MMP 39 to 43) 30 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from 31 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM, 32 * V_ARMADA_8K_CPS) set which MPP is available to the CPx. 33 * The x_PLUS enum mean that the MPP available for CPx and for Armada70x0 34 */ 35 enum { 36 V_ARMADA_7K = BIT(0), 37 V_ARMADA_8K_CPM = BIT(1), 38 V_ARMADA_8K_CPS = BIT(2), 39 V_ARMADA_7K_8K_CPM = (V_ARMADA_7K | V_ARMADA_8K_CPM), 40 V_ARMADA_7K_8K_CPS = (V_ARMADA_7K | V_ARMADA_8K_CPS), 41 }; 42 43 static struct mvebu_mpp_mode armada_cp110_mpp_modes[] = { 44 MPP_MODE(0, 45 MPP_FUNCTION(0, "gpio", NULL), 46 MPP_FUNCTION(1, "dev", "ale1"), 47 MPP_FUNCTION(2, "au", "i2smclk"), 48 MPP_FUNCTION(3, "ge0", "rxd3"), 49 MPP_FUNCTION(4, "tdm", "pclk"), 50 MPP_FUNCTION(6, "ptp", "pulse"), 51 MPP_FUNCTION(7, "mss_i2c", "sda"), 52 MPP_FUNCTION(8, "uart0", "rxd"), 53 MPP_FUNCTION(9, "sata0", "present_act"), 54 MPP_FUNCTION(10, "ge", "mdio")), 55 MPP_MODE(1, 56 MPP_FUNCTION(0, "gpio", NULL), 57 MPP_FUNCTION(1, "dev", "ale0"), 58 MPP_FUNCTION(2, "au", "i2sdo_spdifo"), 59 MPP_FUNCTION(3, "ge0", "rxd2"), 60 MPP_FUNCTION(4, "tdm", "drx"), 61 MPP_FUNCTION(6, "ptp", "clk"), 62 MPP_FUNCTION(7, "mss_i2c", "sck"), 63 MPP_FUNCTION(8, "uart0", "txd"), 64 MPP_FUNCTION(9, "sata1", "present_act"), 65 MPP_FUNCTION(10, "ge", "mdc")), 66 MPP_MODE(2, 67 MPP_FUNCTION(0, "gpio", NULL), 68 MPP_FUNCTION(1, "dev", "ad15"), 69 MPP_FUNCTION(2, "au", "i2sextclk"), 70 MPP_FUNCTION(3, "ge0", "rxd1"), 71 MPP_FUNCTION(4, "tdm", "dtx"), 72 MPP_FUNCTION(5, "mss_uart", "rxd"), 73 MPP_FUNCTION(6, "ptp", "pclk_out"), 74 MPP_FUNCTION(7, "i2c1", "sck"), 75 MPP_FUNCTION(8, "uart1", "rxd"), 76 MPP_FUNCTION(9, "sata0", "present_act"), 77 MPP_FUNCTION(10, "xg", "mdc")), 78 MPP_MODE(3, 79 MPP_FUNCTION(0, "gpio", NULL), 80 MPP_FUNCTION(1, "dev", "ad14"), 81 MPP_FUNCTION(2, "au", "i2slrclk"), 82 MPP_FUNCTION(3, "ge0", "rxd0"), 83 MPP_FUNCTION(4, "tdm", "fsync"), 84 MPP_FUNCTION(5, "mss_uart", "txd"), 85 MPP_FUNCTION(6, "pcie", "rstoutn"), 86 MPP_FUNCTION(7, "i2c1", "sda"), 87 MPP_FUNCTION(8, "uart1", "txd"), 88 MPP_FUNCTION(9, "sata1", "present_act"), 89 MPP_FUNCTION(10, "xg", "mdio")), 90 MPP_MODE(4, 91 MPP_FUNCTION(0, "gpio", NULL), 92 MPP_FUNCTION(1, "dev", "ad13"), 93 MPP_FUNCTION(2, "au", "i2sbclk"), 94 MPP_FUNCTION(3, "ge0", "rxctl"), 95 MPP_FUNCTION(4, "tdm", "rstn"), 96 MPP_FUNCTION(5, "mss_uart", "rxd"), 97 MPP_FUNCTION(6, "uart1", "cts"), 98 MPP_FUNCTION(7, "pcie0", "clkreq"), 99 MPP_FUNCTION(8, "uart3", "rxd"), 100 MPP_FUNCTION(10, "ge", "mdc")), 101 MPP_MODE(5, 102 MPP_FUNCTION(0, "gpio", NULL), 103 MPP_FUNCTION(1, "dev", "ad12"), 104 MPP_FUNCTION(2, "au", "i2sdi"), 105 MPP_FUNCTION(3, "ge0", "rxclk"), 106 MPP_FUNCTION(4, "tdm", "intn"), 107 MPP_FUNCTION(5, "mss_uart", "txd"), 108 MPP_FUNCTION(6, "uart1", "rts"), 109 MPP_FUNCTION(7, "pcie1", "clkreq"), 110 MPP_FUNCTION(8, "uart3", "txd"), 111 MPP_FUNCTION(10, "ge", "mdio")), 112 MPP_MODE(6, 113 MPP_FUNCTION(0, "gpio", NULL), 114 MPP_FUNCTION(1, "dev", "ad11"), 115 MPP_FUNCTION(3, "ge0", "txd3"), 116 MPP_FUNCTION(4, "spi0", "csn2"), 117 MPP_FUNCTION(5, "au", "i2sextclk"), 118 MPP_FUNCTION(6, "sata1", "present_act"), 119 MPP_FUNCTION(7, "pcie2", "clkreq"), 120 MPP_FUNCTION(8, "uart0", "rxd"), 121 MPP_FUNCTION(9, "ptp", "pulse")), 122 MPP_MODE(7, 123 MPP_FUNCTION(0, "gpio", NULL), 124 MPP_FUNCTION(1, "dev", "ad10"), 125 MPP_FUNCTION(3, "ge0", "txd2"), 126 MPP_FUNCTION(4, "spi0", "csn1"), 127 MPP_FUNCTION(5, "spi1", "csn1"), 128 MPP_FUNCTION(6, "sata0", "present_act"), 129 MPP_FUNCTION(7, "led", "data"), 130 MPP_FUNCTION(8, "uart0", "txd"), 131 MPP_FUNCTION(9, "ptp", "clk")), 132 MPP_MODE(8, 133 MPP_FUNCTION(0, "gpio", NULL), 134 MPP_FUNCTION(1, "dev", "ad9"), 135 MPP_FUNCTION(3, "ge0", "txd1"), 136 MPP_FUNCTION(4, "spi0", "csn0"), 137 MPP_FUNCTION(5, "spi1", "csn0"), 138 MPP_FUNCTION(6, "uart0", "cts"), 139 MPP_FUNCTION(7, "led", "stb"), 140 MPP_FUNCTION(8, "uart2", "rxd"), 141 MPP_FUNCTION(9, "ptp", "pclk_out"), 142 MPP_FUNCTION(10, "synce1", "clk")), 143 MPP_MODE(9, 144 MPP_FUNCTION(0, "gpio", NULL), 145 MPP_FUNCTION(1, "dev", "ad8"), 146 MPP_FUNCTION(3, "ge0", "txd0"), 147 MPP_FUNCTION(4, "spi0", "mosi"), 148 MPP_FUNCTION(5, "spi1", "mosi"), 149 MPP_FUNCTION(7, "pcie", "rstoutn"), 150 MPP_FUNCTION(10, "synce2", "clk")), 151 MPP_MODE(10, 152 MPP_FUNCTION(0, "gpio", NULL), 153 MPP_FUNCTION(1, "dev", "readyn"), 154 MPP_FUNCTION(3, "ge0", "txctl"), 155 MPP_FUNCTION(4, "spi0", "miso"), 156 MPP_FUNCTION(5, "spi1", "miso"), 157 MPP_FUNCTION(6, "uart0", "cts"), 158 MPP_FUNCTION(7, "sata1", "present_act")), 159 MPP_MODE(11, 160 MPP_FUNCTION(0, "gpio", NULL), 161 MPP_FUNCTION(1, "dev", "wen1"), 162 MPP_FUNCTION(3, "ge0", "txclkout"), 163 MPP_FUNCTION(4, "spi0", "clk"), 164 MPP_FUNCTION(5, "spi1", "clk"), 165 MPP_FUNCTION(6, "uart0", "rts"), 166 MPP_FUNCTION(7, "led", "clk"), 167 MPP_FUNCTION(8, "uart2", "txd"), 168 MPP_FUNCTION(9, "sata0", "present_act")), 169 MPP_MODE(12, 170 MPP_FUNCTION(0, "gpio", NULL), 171 MPP_FUNCTION(1, "dev", "clk_out"), 172 MPP_FUNCTION(2, "nf", "rbn1"), 173 MPP_FUNCTION(3, "spi1", "csn1"), 174 MPP_FUNCTION(4, "ge0", "rxclk")), 175 MPP_MODE(13, 176 MPP_FUNCTION(0, "gpio", NULL), 177 MPP_FUNCTION(1, "dev", "burstn"), 178 MPP_FUNCTION(2, "nf", "rbn0"), 179 MPP_FUNCTION(3, "spi1", "miso"), 180 MPP_FUNCTION(4, "ge0", "rxctl"), 181 MPP_FUNCTION(8, "mss_spi", "miso")), 182 MPP_MODE(14, 183 MPP_FUNCTION(0, "gpio", NULL), 184 MPP_FUNCTION(1, "dev", "bootcsn"), 185 MPP_FUNCTION(2, "dev", "csn0"), 186 MPP_FUNCTION(3, "spi1", "csn0"), 187 MPP_FUNCTION(4, "spi0", "csn3"), 188 MPP_FUNCTION(5, "au", "i2sextclk"), 189 MPP_FUNCTION(6, "spi0", "miso"), 190 MPP_FUNCTION(7, "sata0", "present_act"), 191 MPP_FUNCTION(8, "mss_spi", "csn")), 192 MPP_MODE(15, 193 MPP_FUNCTION(0, "gpio", NULL), 194 MPP_FUNCTION(1, "dev", "ad7"), 195 MPP_FUNCTION(3, "spi1", "mosi"), 196 MPP_FUNCTION(6, "spi0", "mosi"), 197 MPP_FUNCTION(8, "mss_spi", "mosi"), 198 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")), 199 MPP_MODE(16, 200 MPP_FUNCTION(0, "gpio", NULL), 201 MPP_FUNCTION(1, "dev", "ad6"), 202 MPP_FUNCTION(3, "spi1", "clk"), 203 MPP_FUNCTION(8, "mss_spi", "clk")), 204 MPP_MODE(17, 205 MPP_FUNCTION(0, "gpio", NULL), 206 MPP_FUNCTION(1, "dev", "ad5"), 207 MPP_FUNCTION(4, "ge0", "txd3")), 208 MPP_MODE(18, 209 MPP_FUNCTION(0, "gpio", NULL), 210 MPP_FUNCTION(1, "dev", "ad4"), 211 MPP_FUNCTION(4, "ge0", "txd2"), 212 MPP_FUNCTION(11, "ptp", "clk_cp2cp")), 213 MPP_MODE(19, 214 MPP_FUNCTION(0, "gpio", NULL), 215 MPP_FUNCTION(1, "dev", "ad3"), 216 MPP_FUNCTION(4, "ge0", "txd1"), 217 MPP_FUNCTION(11, "wakeup", "out_cp2cp")), 218 MPP_MODE(20, 219 MPP_FUNCTION(0, "gpio", NULL), 220 MPP_FUNCTION(1, "dev", "ad2"), 221 MPP_FUNCTION(4, "ge0", "txd0")), 222 MPP_MODE(21, 223 MPP_FUNCTION(0, "gpio", NULL), 224 MPP_FUNCTION(1, "dev", "ad1"), 225 MPP_FUNCTION(4, "ge0", "txctl"), 226 MPP_FUNCTION(11, "sei", "in_cp2cp")), 227 MPP_MODE(22, 228 MPP_FUNCTION(0, "gpio", NULL), 229 MPP_FUNCTION(1, "dev", "ad0"), 230 MPP_FUNCTION(4, "ge0", "txclkout"), 231 MPP_FUNCTION(11, "wakeup", "in_cp2cp")), 232 MPP_MODE(23, 233 MPP_FUNCTION(0, "gpio", NULL), 234 MPP_FUNCTION(1, "dev", "a1"), 235 MPP_FUNCTION(5, "au", "i2smclk"), 236 MPP_FUNCTION(11, "link", "rd_in_cp2cp")), 237 MPP_MODE(24, 238 MPP_FUNCTION(0, "gpio", NULL), 239 MPP_FUNCTION(1, "dev", "a0"), 240 MPP_FUNCTION(5, "au", "i2slrclk")), 241 MPP_MODE(25, 242 MPP_FUNCTION(0, "gpio", NULL), 243 MPP_FUNCTION(1, "dev", "oen"), 244 MPP_FUNCTION(5, "au", "i2sdo_spdifo")), 245 MPP_MODE(26, 246 MPP_FUNCTION(0, "gpio", NULL), 247 MPP_FUNCTION(1, "dev", "wen0"), 248 MPP_FUNCTION(5, "au", "i2sbclk")), 249 MPP_MODE(27, 250 MPP_FUNCTION(0, "gpio", NULL), 251 MPP_FUNCTION(1, "dev", "csn0"), 252 MPP_FUNCTION(2, "spi1", "miso"), 253 MPP_FUNCTION(3, "mss_gpio4", NULL), 254 MPP_FUNCTION(4, "ge0", "rxd3"), 255 MPP_FUNCTION(5, "spi0", "csn4"), 256 MPP_FUNCTION(8, "ge", "mdio"), 257 MPP_FUNCTION(9, "sata0", "present_act"), 258 MPP_FUNCTION(10, "uart0", "rts"), 259 MPP_FUNCTION(11, "rei", "in_cp2cp")), 260 MPP_MODE(28, 261 MPP_FUNCTION(0, "gpio", NULL), 262 MPP_FUNCTION(1, "dev", "csn1"), 263 MPP_FUNCTION(2, "spi1", "csn0"), 264 MPP_FUNCTION(3, "mss_gpio5", NULL), 265 MPP_FUNCTION(4, "ge0", "rxd2"), 266 MPP_FUNCTION(5, "spi0", "csn5"), 267 MPP_FUNCTION(6, "pcie2", "clkreq"), 268 MPP_FUNCTION(7, "ptp", "pulse"), 269 MPP_FUNCTION(8, "ge", "mdc"), 270 MPP_FUNCTION(9, "sata1", "present_act"), 271 MPP_FUNCTION(10, "uart0", "cts"), 272 MPP_FUNCTION(11, "led", "data")), 273 MPP_MODE(29, 274 MPP_FUNCTION(0, "gpio", NULL), 275 MPP_FUNCTION(1, "dev", "csn2"), 276 MPP_FUNCTION(2, "spi1", "mosi"), 277 MPP_FUNCTION(3, "mss_gpio6", NULL), 278 MPP_FUNCTION(4, "ge0", "rxd1"), 279 MPP_FUNCTION(5, "spi0", "csn6"), 280 MPP_FUNCTION(6, "pcie1", "clkreq"), 281 MPP_FUNCTION(7, "ptp", "clk"), 282 MPP_FUNCTION(8, "mss_i2c", "sda"), 283 MPP_FUNCTION(9, "sata0", "present_act"), 284 MPP_FUNCTION(10, "uart0", "rxd"), 285 MPP_FUNCTION(11, "led", "stb")), 286 MPP_MODE(30, 287 MPP_FUNCTION(0, "gpio", NULL), 288 MPP_FUNCTION(1, "dev", "csn3"), 289 MPP_FUNCTION(2, "spi1", "clk"), 290 MPP_FUNCTION(3, "mss_gpio7", NULL), 291 MPP_FUNCTION(4, "ge0", "rxd0"), 292 MPP_FUNCTION(5, "spi0", "csn7"), 293 MPP_FUNCTION(6, "pcie0", "clkreq"), 294 MPP_FUNCTION(7, "ptp", "pclk_out"), 295 MPP_FUNCTION(8, "mss_i2c", "sck"), 296 MPP_FUNCTION(9, "sata1", "present_act"), 297 MPP_FUNCTION(10, "uart0", "txd"), 298 MPP_FUNCTION(11, "led", "clk")), 299 MPP_MODE(31, 300 MPP_FUNCTION(0, "gpio", NULL), 301 MPP_FUNCTION(1, "dev", "a2"), 302 MPP_FUNCTION(3, "mss_gpio4", NULL), 303 MPP_FUNCTION(6, "pcie", "rstoutn"), 304 MPP_FUNCTION(8, "ge", "mdc")), 305 MPP_MODE(32, 306 MPP_FUNCTION(0, "gpio", NULL), 307 MPP_FUNCTION(1, "mii", "col"), 308 MPP_FUNCTION(2, "mii", "txerr"), 309 MPP_FUNCTION(3, "mss_spi", "miso"), 310 MPP_FUNCTION(4, "tdm", "drx"), 311 MPP_FUNCTION(5, "au", "i2sextclk"), 312 MPP_FUNCTION(6, "au", "i2sdi"), 313 MPP_FUNCTION(7, "ge", "mdio"), 314 MPP_FUNCTION(8, "sdio", "v18_en"), 315 MPP_FUNCTION(9, "pcie1", "clkreq"), 316 MPP_FUNCTION(10, "mss_gpio0", NULL)), 317 MPP_MODE(33, 318 MPP_FUNCTION(0, "gpio", NULL), 319 MPP_FUNCTION(1, "mii", "txclk"), 320 MPP_FUNCTION(2, "sdio", "pwr10"), 321 MPP_FUNCTION(3, "mss_spi", "csn"), 322 MPP_FUNCTION(4, "tdm", "fsync"), 323 MPP_FUNCTION(5, "au", "i2smclk"), 324 MPP_FUNCTION(6, "sdio", "bus_pwr"), 325 MPP_FUNCTION(8, "xg", "mdio"), 326 MPP_FUNCTION(9, "pcie2", "clkreq"), 327 MPP_FUNCTION(10, "mss_gpio1", NULL)), 328 MPP_MODE(34, 329 MPP_FUNCTION(0, "gpio", NULL), 330 MPP_FUNCTION(1, "mii", "rxerr"), 331 MPP_FUNCTION(2, "sdio", "pwr11"), 332 MPP_FUNCTION(3, "mss_spi", "mosi"), 333 MPP_FUNCTION(4, "tdm", "dtx"), 334 MPP_FUNCTION(5, "au", "i2slrclk"), 335 MPP_FUNCTION(6, "sdio", "wr_protect"), 336 MPP_FUNCTION(7, "ge", "mdc"), 337 MPP_FUNCTION(9, "pcie0", "clkreq"), 338 MPP_FUNCTION(10, "mss_gpio2", NULL)), 339 MPP_MODE(35, 340 MPP_FUNCTION(0, "gpio", NULL), 341 MPP_FUNCTION(1, "sata1", "present_act"), 342 MPP_FUNCTION(2, "i2c1", "sda"), 343 MPP_FUNCTION(3, "mss_spi", "clk"), 344 MPP_FUNCTION(4, "tdm", "pclk"), 345 MPP_FUNCTION(5, "au", "i2sdo_spdifo"), 346 MPP_FUNCTION(6, "sdio", "card_detect"), 347 MPP_FUNCTION(7, "xg", "mdio"), 348 MPP_FUNCTION(8, "ge", "mdio"), 349 MPP_FUNCTION(9, "pcie", "rstoutn"), 350 MPP_FUNCTION(10, "mss_gpio3", NULL)), 351 MPP_MODE(36, 352 MPP_FUNCTION(0, "gpio", NULL), 353 MPP_FUNCTION(1, "synce2", "clk"), 354 MPP_FUNCTION(2, "i2c1", "sck"), 355 MPP_FUNCTION(3, "ptp", "clk"), 356 MPP_FUNCTION(4, "synce1", "clk"), 357 MPP_FUNCTION(5, "au", "i2sbclk"), 358 MPP_FUNCTION(6, "sata0", "present_act"), 359 MPP_FUNCTION(7, "xg", "mdc"), 360 MPP_FUNCTION(8, "ge", "mdc"), 361 MPP_FUNCTION(9, "pcie2", "clkreq"), 362 MPP_FUNCTION(10, "mss_gpio5", NULL)), 363 MPP_MODE(37, 364 MPP_FUNCTION(0, "gpio", NULL), 365 MPP_FUNCTION(1, "uart2", "rxd"), 366 MPP_FUNCTION(2, "i2c0", "sck"), 367 MPP_FUNCTION(3, "ptp", "pclk_out"), 368 MPP_FUNCTION(4, "tdm", "intn"), 369 MPP_FUNCTION(5, "mss_i2c", "sck"), 370 MPP_FUNCTION(6, "sata1", "present_act"), 371 MPP_FUNCTION(7, "ge", "mdc"), 372 MPP_FUNCTION(8, "xg", "mdc"), 373 MPP_FUNCTION(9, "pcie1", "clkreq"), 374 MPP_FUNCTION(10, "mss_gpio6", NULL), 375 MPP_FUNCTION(11, "link", "rd_out_cp2cp")), 376 MPP_MODE(38, 377 MPP_FUNCTION(0, "gpio", NULL), 378 MPP_FUNCTION(1, "uart2", "txd"), 379 MPP_FUNCTION(2, "i2c0", "sda"), 380 MPP_FUNCTION(3, "ptp", "pulse"), 381 MPP_FUNCTION(4, "tdm", "rstn"), 382 MPP_FUNCTION(5, "mss_i2c", "sda"), 383 MPP_FUNCTION(6, "sata0", "present_act"), 384 MPP_FUNCTION(7, "ge", "mdio"), 385 MPP_FUNCTION(8, "xg", "mdio"), 386 MPP_FUNCTION(9, "au", "i2sextclk"), 387 MPP_FUNCTION(10, "mss_gpio7", NULL), 388 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")), 389 MPP_MODE(39, 390 MPP_FUNCTION(0, "gpio", NULL), 391 MPP_FUNCTION(1, "sdio", "wr_protect"), 392 MPP_FUNCTION(4, "au", "i2sbclk"), 393 MPP_FUNCTION(5, "ptp", "clk"), 394 MPP_FUNCTION(6, "spi0", "csn1"), 395 MPP_FUNCTION(9, "sata1", "present_act"), 396 MPP_FUNCTION(10, "mss_gpio0", NULL)), 397 MPP_MODE(40, 398 MPP_FUNCTION(0, "gpio", NULL), 399 MPP_FUNCTION(1, "sdio", "pwr11"), 400 MPP_FUNCTION(2, "synce1", "clk"), 401 MPP_FUNCTION(3, "mss_i2c", "sda"), 402 MPP_FUNCTION(4, "au", "i2sdo_spdifo"), 403 MPP_FUNCTION(5, "ptp", "pclk_out"), 404 MPP_FUNCTION(6, "spi0", "clk"), 405 MPP_FUNCTION(7, "uart1", "txd"), 406 MPP_FUNCTION(8, "ge", "mdio"), 407 MPP_FUNCTION(9, "sata0", "present_act"), 408 MPP_FUNCTION(10, "mss_gpio1", NULL)), 409 MPP_MODE(41, 410 MPP_FUNCTION(0, "gpio", NULL), 411 MPP_FUNCTION(1, "sdio", "pwr10"), 412 MPP_FUNCTION(2, "sdio", "bus_pwr"), 413 MPP_FUNCTION(3, "mss_i2c", "sck"), 414 MPP_FUNCTION(4, "au", "i2slrclk"), 415 MPP_FUNCTION(5, "ptp", "pulse"), 416 MPP_FUNCTION(6, "spi0", "mosi"), 417 MPP_FUNCTION(7, "uart1", "rxd"), 418 MPP_FUNCTION(8, "ge", "mdc"), 419 MPP_FUNCTION(9, "sata1", "present_act"), 420 MPP_FUNCTION(10, "mss_gpio2", NULL), 421 MPP_FUNCTION(11, "rei", "out_cp2cp")), 422 MPP_MODE(42, 423 MPP_FUNCTION(0, "gpio", NULL), 424 MPP_FUNCTION(1, "sdio", "v18_en"), 425 MPP_FUNCTION(2, "sdio", "wr_protect"), 426 MPP_FUNCTION(3, "synce2", "clk"), 427 MPP_FUNCTION(4, "au", "i2smclk"), 428 MPP_FUNCTION(5, "mss_uart", "txd"), 429 MPP_FUNCTION(6, "spi0", "miso"), 430 MPP_FUNCTION(7, "uart1", "cts"), 431 MPP_FUNCTION(8, "xg", "mdc"), 432 MPP_FUNCTION(9, "sata0", "present_act"), 433 MPP_FUNCTION(10, "mss_gpio4", NULL)), 434 MPP_MODE(43, 435 MPP_FUNCTION(0, "gpio", NULL), 436 MPP_FUNCTION(1, "sdio", "card_detect"), 437 MPP_FUNCTION(3, "synce1", "clk"), 438 MPP_FUNCTION(4, "au", "i2sextclk"), 439 MPP_FUNCTION(5, "mss_uart", "rxd"), 440 MPP_FUNCTION(6, "spi0", "csn0"), 441 MPP_FUNCTION(7, "uart1", "rts"), 442 MPP_FUNCTION(8, "xg", "mdio"), 443 MPP_FUNCTION(9, "sata1", "present_act"), 444 MPP_FUNCTION(10, "mss_gpio5", NULL), 445 MPP_FUNCTION(11, "wakeup", "out_cp2cp")), 446 MPP_MODE(44, 447 MPP_FUNCTION(0, "gpio", NULL), 448 MPP_FUNCTION(1, "ge1", "txd2"), 449 MPP_FUNCTION(7, "uart0", "rts"), 450 MPP_FUNCTION(11, "ptp", "clk_cp2cp")), 451 MPP_MODE(45, 452 MPP_FUNCTION(0, "gpio", NULL), 453 MPP_FUNCTION(1, "ge1", "txd3"), 454 MPP_FUNCTION(7, "uart0", "txd"), 455 MPP_FUNCTION(9, "pcie", "rstoutn")), 456 MPP_MODE(46, 457 MPP_FUNCTION(0, "gpio", NULL), 458 MPP_FUNCTION(1, "ge1", "txd1"), 459 MPP_FUNCTION(7, "uart1", "rts")), 460 MPP_MODE(47, 461 MPP_FUNCTION(0, "gpio", NULL), 462 MPP_FUNCTION(1, "ge1", "txd0"), 463 MPP_FUNCTION(5, "spi1", "clk"), 464 MPP_FUNCTION(7, "uart1", "txd"), 465 MPP_FUNCTION(8, "ge", "mdc")), 466 MPP_MODE(48, 467 MPP_FUNCTION(0, "gpio", NULL), 468 MPP_FUNCTION(1, "ge1", "txctl_txen"), 469 MPP_FUNCTION(5, "spi1", "mosi"), 470 MPP_FUNCTION(8, "xg", "mdc"), 471 MPP_FUNCTION(11, "wakeup", "in_cp2cp")), 472 MPP_MODE(49, 473 MPP_FUNCTION(0, "gpio", NULL), 474 MPP_FUNCTION(1, "ge1", "txclkout"), 475 MPP_FUNCTION(2, "mii", "crs"), 476 MPP_FUNCTION(5, "spi1", "miso"), 477 MPP_FUNCTION(7, "uart1", "rxd"), 478 MPP_FUNCTION(8, "ge", "mdio"), 479 MPP_FUNCTION(9, "pcie0", "clkreq"), 480 MPP_FUNCTION(10, "sdio", "v18_en"), 481 MPP_FUNCTION(11, "sei", "out_cp2cp")), 482 MPP_MODE(50, 483 MPP_FUNCTION(0, "gpio", NULL), 484 MPP_FUNCTION(1, "ge1", "rxclk"), 485 MPP_FUNCTION(2, "mss_i2c", "sda"), 486 MPP_FUNCTION(5, "spi1", "csn0"), 487 MPP_FUNCTION(6, "uart2", "txd"), 488 MPP_FUNCTION(7, "uart0", "rxd"), 489 MPP_FUNCTION(8, "xg", "mdio"), 490 MPP_FUNCTION(10, "sdio", "pwr11")), 491 MPP_MODE(51, 492 MPP_FUNCTION(0, "gpio", NULL), 493 MPP_FUNCTION(1, "ge1", "rxd0"), 494 MPP_FUNCTION(2, "mss_i2c", "sck"), 495 MPP_FUNCTION(5, "spi1", "csn1"), 496 MPP_FUNCTION(6, "uart2", "rxd"), 497 MPP_FUNCTION(7, "uart0", "cts"), 498 MPP_FUNCTION(10, "sdio", "pwr10")), 499 MPP_MODE(52, 500 MPP_FUNCTION(0, "gpio", NULL), 501 MPP_FUNCTION(1, "ge1", "rxd1"), 502 MPP_FUNCTION(2, "synce1", "clk"), 503 MPP_FUNCTION(4, "synce2", "clk"), 504 MPP_FUNCTION(5, "spi1", "csn2"), 505 MPP_FUNCTION(7, "uart1", "cts"), 506 MPP_FUNCTION(8, "led", "clk"), 507 MPP_FUNCTION(9, "pcie", "rstoutn"), 508 MPP_FUNCTION(10, "pcie0", "clkreq")), 509 MPP_MODE(53, 510 MPP_FUNCTION(0, "gpio", NULL), 511 MPP_FUNCTION(1, "ge1", "rxd2"), 512 MPP_FUNCTION(3, "ptp", "clk"), 513 MPP_FUNCTION(5, "spi1", "csn3"), 514 MPP_FUNCTION(7, "uart1", "rxd"), 515 MPP_FUNCTION(8, "led", "stb"), 516 MPP_FUNCTION(11, "sdio", "led")), 517 MPP_MODE(54, 518 MPP_FUNCTION(0, "gpio", NULL), 519 MPP_FUNCTION(1, "ge1", "rxd3"), 520 MPP_FUNCTION(2, "synce2", "clk"), 521 MPP_FUNCTION(3, "ptp", "pclk_out"), 522 MPP_FUNCTION(4, "synce1", "clk"), 523 MPP_FUNCTION(8, "led", "data"), 524 MPP_FUNCTION(10, "sdio", "hw_rst"), 525 MPP_FUNCTION(11, "sdio", "wr_protect")), 526 MPP_MODE(55, 527 MPP_FUNCTION(0, "gpio", NULL), 528 MPP_FUNCTION(1, "ge1", "rxctl_rxdv"), 529 MPP_FUNCTION(3, "ptp", "pulse"), 530 MPP_FUNCTION(10, "sdio", "led"), 531 MPP_FUNCTION(11, "sdio", "card_detect")), 532 MPP_MODE(56, 533 MPP_FUNCTION(0, "gpio", NULL), 534 MPP_FUNCTION(4, "tdm", "drx"), 535 MPP_FUNCTION(5, "au", "i2sdo_spdifo"), 536 MPP_FUNCTION(6, "spi0", "clk"), 537 MPP_FUNCTION(7, "uart1", "rxd"), 538 MPP_FUNCTION(9, "sata1", "present_act"), 539 MPP_FUNCTION(14, "sdio", "clk")), 540 MPP_MODE(57, 541 MPP_FUNCTION(0, "gpio", NULL), 542 MPP_FUNCTION(2, "mss_i2c", "sda"), 543 MPP_FUNCTION(3, "ptp", "pclk_out"), 544 MPP_FUNCTION(4, "tdm", "intn"), 545 MPP_FUNCTION(5, "au", "i2sbclk"), 546 MPP_FUNCTION(6, "spi0", "mosi"), 547 MPP_FUNCTION(7, "uart1", "txd"), 548 MPP_FUNCTION(9, "sata0", "present_act"), 549 MPP_FUNCTION(14, "sdio", "cmd")), 550 MPP_MODE(58, 551 MPP_FUNCTION(0, "gpio", NULL), 552 MPP_FUNCTION(2, "mss_i2c", "sck"), 553 MPP_FUNCTION(3, "ptp", "clk"), 554 MPP_FUNCTION(4, "tdm", "rstn"), 555 MPP_FUNCTION(5, "au", "i2sdi"), 556 MPP_FUNCTION(6, "spi0", "miso"), 557 MPP_FUNCTION(7, "uart1", "cts"), 558 MPP_FUNCTION(8, "led", "clk"), 559 MPP_FUNCTION(14, "sdio", "d0")), 560 MPP_MODE(59, 561 MPP_FUNCTION(0, "gpio", NULL), 562 MPP_FUNCTION(1, "mss_gpio7", NULL), 563 MPP_FUNCTION(2, "synce2", "clk"), 564 MPP_FUNCTION(4, "tdm", "fsync"), 565 MPP_FUNCTION(5, "au", "i2slrclk"), 566 MPP_FUNCTION(6, "spi0", "csn0"), 567 MPP_FUNCTION(7, "uart0", "cts"), 568 MPP_FUNCTION(8, "led", "stb"), 569 MPP_FUNCTION(9, "uart1", "txd"), 570 MPP_FUNCTION(14, "sdio", "d1")), 571 MPP_MODE(60, 572 MPP_FUNCTION(0, "gpio", NULL), 573 MPP_FUNCTION(1, "mss_gpio6", NULL), 574 MPP_FUNCTION(3, "ptp", "pulse"), 575 MPP_FUNCTION(4, "tdm", "dtx"), 576 MPP_FUNCTION(5, "au", "i2smclk"), 577 MPP_FUNCTION(6, "spi0", "csn1"), 578 MPP_FUNCTION(7, "uart0", "rts"), 579 MPP_FUNCTION(8, "led", "data"), 580 MPP_FUNCTION(9, "uart1", "rxd"), 581 MPP_FUNCTION(14, "sdio", "d2")), 582 MPP_MODE(61, 583 MPP_FUNCTION(0, "gpio", NULL), 584 MPP_FUNCTION(1, "mss_gpio5", NULL), 585 MPP_FUNCTION(3, "ptp", "clk"), 586 MPP_FUNCTION(4, "tdm", "pclk"), 587 MPP_FUNCTION(5, "au", "i2sextclk"), 588 MPP_FUNCTION(6, "spi0", "csn2"), 589 MPP_FUNCTION(7, "uart0", "txd"), 590 MPP_FUNCTION(8, "uart2", "txd"), 591 MPP_FUNCTION(9, "sata1", "present_act"), 592 MPP_FUNCTION(10, "ge", "mdio"), 593 MPP_FUNCTION(14, "sdio", "d3")), 594 MPP_MODE(62, 595 MPP_FUNCTION(0, "gpio", NULL), 596 MPP_FUNCTION(1, "mss_gpio4", NULL), 597 MPP_FUNCTION(2, "synce1", "clk"), 598 MPP_FUNCTION(3, "ptp", "pclk_out"), 599 MPP_FUNCTION(5, "sata1", "present_act"), 600 MPP_FUNCTION(6, "spi0", "csn3"), 601 MPP_FUNCTION(7, "uart0", "rxd"), 602 MPP_FUNCTION(8, "uart2", "rxd"), 603 MPP_FUNCTION(9, "sata0", "present_act"), 604 MPP_FUNCTION(10, "ge", "mdc")), 605 }; 606 607 static const struct of_device_id armada_cp110_pinctrl_of_match[] = { 608 { 609 .compatible = "marvell,armada-7k-pinctrl", 610 .data = (void *) V_ARMADA_7K, 611 }, 612 { 613 .compatible = "marvell,armada-8k-cpm-pinctrl", 614 .data = (void *) V_ARMADA_8K_CPM, 615 }, 616 { 617 .compatible = "marvell,armada-8k-cps-pinctrl", 618 .data = (void *) V_ARMADA_8K_CPS, 619 }, 620 { }, 621 }; 622 623 static const struct mvebu_mpp_ctrl armada_cp110_mpp_controls[] = { 624 MPP_FUNC_CTRL(0, 62, NULL, mvebu_regmap_mpp_ctrl), 625 }; 626 627 static void mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode *m, 628 u8 variant) 629 { 630 struct mvebu_mpp_ctrl_setting *s; 631 632 for (s = m->settings ; s->name ; s++) 633 s->variant = variant; 634 } 635 636 static int armada_cp110_pinctrl_probe(struct platform_device *pdev) 637 { 638 struct mvebu_pinctrl_soc_info *soc; 639 const struct of_device_id *match = 640 of_match_device(armada_cp110_pinctrl_of_match, &pdev->dev); 641 int i; 642 643 if (!pdev->dev.parent) 644 return -ENODEV; 645 646 soc = devm_kzalloc(&pdev->dev, 647 sizeof(struct mvebu_pinctrl_soc_info), GFP_KERNEL); 648 if (!soc) 649 return -ENOMEM; 650 651 soc->variant = (unsigned long) match->data & 0xff; 652 soc->controls = armada_cp110_mpp_controls; 653 soc->ncontrols = ARRAY_SIZE(armada_cp110_mpp_controls); 654 soc->modes = armada_cp110_mpp_modes; 655 soc->nmodes = ARRAY_SIZE(armada_cp110_mpp_modes); 656 for (i = 0; i < ARRAY_SIZE(armada_cp110_mpp_modes); i++) { 657 struct mvebu_mpp_mode *m = &armada_cp110_mpp_modes[i]; 658 659 switch (i) { 660 case 0 ... 31: 661 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPS); 662 break; 663 case 32 ... 38: 664 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM); 665 break; 666 case 39 ... 43: 667 mvebu_pinctrl_assign_variant(m, V_ARMADA_8K_CPM); 668 break; 669 case 44 ... 62: 670 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM); 671 break; 672 } 673 } 674 pdev->dev.platform_data = soc; 675 676 return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0); 677 } 678 679 static struct platform_driver armada_cp110_pinctrl_driver = { 680 .driver = { 681 .name = "armada-cp110-pinctrl", 682 .of_match_table = of_match_ptr(armada_cp110_pinctrl_of_match), 683 }, 684 .probe = armada_cp110_pinctrl_probe, 685 }; 686 687 builtin_platform_driver(armada_cp110_pinctrl_driver); 688