1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Marvell Armada 370 pinctrl driver based on mvebu pinctrl core 4 * 5 * Copyright (C) 2012 Marvell 6 * 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 8 */ 9 10 #include <linux/err.h> 11 #include <linux/init.h> 12 #include <linux/io.h> 13 #include <linux/platform_device.h> 14 #include <linux/clk.h> 15 #include <linux/of.h> 16 #include <linux/pinctrl/pinctrl.h> 17 18 #include "pinctrl-mvebu.h" 19 20 static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = { 21 MPP_MODE(0, 22 MPP_FUNCTION(0x0, "gpio", NULL), 23 MPP_FUNCTION(0x1, "uart0", "rxd")), 24 MPP_MODE(1, 25 MPP_FUNCTION(0x0, "gpo", NULL), 26 MPP_FUNCTION(0x1, "uart0", "txd")), 27 MPP_MODE(2, 28 MPP_FUNCTION(0x0, "gpio", NULL), 29 MPP_FUNCTION(0x1, "i2c0", "sck"), 30 MPP_FUNCTION(0x2, "uart0", "txd")), 31 MPP_MODE(3, 32 MPP_FUNCTION(0x0, "gpio", NULL), 33 MPP_FUNCTION(0x1, "i2c0", "sda"), 34 MPP_FUNCTION(0x2, "uart0", "rxd")), 35 MPP_MODE(4, 36 MPP_FUNCTION(0x0, "gpio", NULL), 37 MPP_FUNCTION(0x1, "vdd", "cpu-pd")), 38 MPP_MODE(5, 39 MPP_FUNCTION(0x0, "gpo", NULL), 40 MPP_FUNCTION(0x1, "ge0", "txclkout"), 41 MPP_FUNCTION(0x2, "uart1", "txd"), 42 MPP_FUNCTION(0x4, "spi1", "sck"), 43 MPP_FUNCTION(0x5, "audio", "mclk")), 44 MPP_MODE(6, 45 MPP_FUNCTION(0x0, "gpio", NULL), 46 MPP_FUNCTION(0x1, "ge0", "txd0"), 47 MPP_FUNCTION(0x2, "sata0", "prsnt"), 48 MPP_FUNCTION(0x4, "tdm", "rst"), 49 MPP_FUNCTION(0x5, "audio", "sdo")), 50 MPP_MODE(7, 51 MPP_FUNCTION(0x0, "gpo", NULL), 52 MPP_FUNCTION(0x1, "ge0", "txd1"), 53 MPP_FUNCTION(0x4, "tdm", "dtx"), 54 MPP_FUNCTION(0x5, "audio", "lrclk")), 55 MPP_MODE(8, 56 MPP_FUNCTION(0x0, "gpio", NULL), 57 MPP_FUNCTION(0x1, "ge0", "txd2"), 58 MPP_FUNCTION(0x2, "uart0", "rts"), 59 MPP_FUNCTION(0x4, "tdm", "drx"), 60 MPP_FUNCTION(0x5, "audio", "bclk")), 61 MPP_MODE(9, 62 MPP_FUNCTION(0x0, "gpo", NULL), 63 MPP_FUNCTION(0x1, "ge0", "txd3"), 64 MPP_FUNCTION(0x2, "uart1", "txd"), 65 MPP_FUNCTION(0x3, "sd0", "clk"), 66 MPP_FUNCTION(0x5, "audio", "spdifo")), 67 MPP_MODE(10, 68 MPP_FUNCTION(0x0, "gpio", NULL), 69 MPP_FUNCTION(0x1, "ge0", "txctl"), 70 MPP_FUNCTION(0x2, "uart0", "cts"), 71 MPP_FUNCTION(0x4, "tdm", "fsync"), 72 MPP_FUNCTION(0x5, "audio", "sdi")), 73 MPP_MODE(11, 74 MPP_FUNCTION(0x0, "gpio", NULL), 75 MPP_FUNCTION(0x1, "ge0", "rxd0"), 76 MPP_FUNCTION(0x2, "uart1", "rxd"), 77 MPP_FUNCTION(0x3, "sd0", "cmd"), 78 MPP_FUNCTION(0x4, "spi0", "cs1"), 79 MPP_FUNCTION(0x5, "sata1", "prsnt"), 80 MPP_FUNCTION(0x6, "spi1", "cs1")), 81 MPP_MODE(12, 82 MPP_FUNCTION(0x0, "gpio", NULL), 83 MPP_FUNCTION(0x1, "ge0", "rxd1"), 84 MPP_FUNCTION(0x2, "i2c1", "sda"), 85 MPP_FUNCTION(0x3, "sd0", "d0"), 86 MPP_FUNCTION(0x4, "spi1", "cs0"), 87 MPP_FUNCTION(0x5, "audio", "spdifi")), 88 MPP_MODE(13, 89 MPP_FUNCTION(0x0, "gpio", NULL), 90 MPP_FUNCTION(0x1, "ge0", "rxd2"), 91 MPP_FUNCTION(0x2, "i2c1", "sck"), 92 MPP_FUNCTION(0x3, "sd0", "d1"), 93 MPP_FUNCTION(0x4, "tdm", "pclk"), 94 MPP_FUNCTION(0x5, "audio", "rmclk")), 95 MPP_MODE(14, 96 MPP_FUNCTION(0x0, "gpio", NULL), 97 MPP_FUNCTION(0x1, "ge0", "rxd3"), 98 MPP_FUNCTION(0x2, "pcie", "clkreq0"), 99 MPP_FUNCTION(0x3, "sd0", "d2"), 100 MPP_FUNCTION(0x4, "spi1", "mosi"), 101 MPP_FUNCTION(0x5, "spi0", "cs2")), 102 MPP_MODE(15, 103 MPP_FUNCTION(0x0, "gpio", NULL), 104 MPP_FUNCTION(0x1, "ge0", "rxctl"), 105 MPP_FUNCTION(0x2, "pcie", "clkreq1"), 106 MPP_FUNCTION(0x3, "sd0", "d3"), 107 MPP_FUNCTION(0x4, "spi1", "miso"), 108 MPP_FUNCTION(0x5, "spi0", "cs3")), 109 MPP_MODE(16, 110 MPP_FUNCTION(0x0, "gpio", NULL), 111 MPP_FUNCTION(0x1, "ge0", "rxclk"), 112 MPP_FUNCTION(0x2, "uart1", "rxd"), 113 MPP_FUNCTION(0x4, "tdm", "int"), 114 MPP_FUNCTION(0x5, "audio", "extclk")), 115 MPP_MODE(17, 116 MPP_FUNCTION(0x0, "gpo", NULL), 117 MPP_FUNCTION(0x1, "ge", "mdc")), 118 MPP_MODE(18, 119 MPP_FUNCTION(0x0, "gpio", NULL), 120 MPP_FUNCTION(0x1, "ge", "mdio")), 121 MPP_MODE(19, 122 MPP_FUNCTION(0x0, "gpio", NULL), 123 MPP_FUNCTION(0x1, "ge0", "txclk"), 124 MPP_FUNCTION(0x2, "ge1", "txclkout"), 125 MPP_FUNCTION(0x4, "tdm", "pclk")), 126 MPP_MODE(20, 127 MPP_FUNCTION(0x0, "gpo", NULL), 128 MPP_FUNCTION(0x1, "ge0", "txd4"), 129 MPP_FUNCTION(0x2, "ge1", "txd0")), 130 MPP_MODE(21, 131 MPP_FUNCTION(0x0, "gpo", NULL), 132 MPP_FUNCTION(0x1, "ge0", "txd5"), 133 MPP_FUNCTION(0x2, "ge1", "txd1"), 134 MPP_FUNCTION(0x4, "uart1", "txd")), 135 MPP_MODE(22, 136 MPP_FUNCTION(0x0, "gpo", NULL), 137 MPP_FUNCTION(0x1, "ge0", "txd6"), 138 MPP_FUNCTION(0x2, "ge1", "txd2"), 139 MPP_FUNCTION(0x4, "uart0", "rts")), 140 MPP_MODE(23, 141 MPP_FUNCTION(0x0, "gpo", NULL), 142 MPP_FUNCTION(0x1, "ge0", "txd7"), 143 MPP_FUNCTION(0x2, "ge1", "txd3"), 144 MPP_FUNCTION(0x4, "spi1", "mosi")), 145 MPP_MODE(24, 146 MPP_FUNCTION(0x0, "gpio", NULL), 147 MPP_FUNCTION(0x1, "ge0", "col"), 148 MPP_FUNCTION(0x2, "ge1", "txctl"), 149 MPP_FUNCTION(0x4, "spi1", "cs0")), 150 MPP_MODE(25, 151 MPP_FUNCTION(0x0, "gpio", NULL), 152 MPP_FUNCTION(0x1, "ge0", "rxerr"), 153 MPP_FUNCTION(0x2, "ge1", "rxd0"), 154 MPP_FUNCTION(0x4, "uart1", "rxd")), 155 MPP_MODE(26, 156 MPP_FUNCTION(0x0, "gpio", NULL), 157 MPP_FUNCTION(0x1, "ge0", "crs"), 158 MPP_FUNCTION(0x2, "ge1", "rxd1"), 159 MPP_FUNCTION(0x4, "spi1", "miso")), 160 MPP_MODE(27, 161 MPP_FUNCTION(0x0, "gpio", NULL), 162 MPP_FUNCTION(0x1, "ge0", "rxd4"), 163 MPP_FUNCTION(0x2, "ge1", "rxd2"), 164 MPP_FUNCTION(0x4, "uart0", "cts")), 165 MPP_MODE(28, 166 MPP_FUNCTION(0x0, "gpio", NULL), 167 MPP_FUNCTION(0x1, "ge0", "rxd5"), 168 MPP_FUNCTION(0x2, "ge1", "rxd3")), 169 MPP_MODE(29, 170 MPP_FUNCTION(0x0, "gpio", NULL), 171 MPP_FUNCTION(0x1, "ge0", "rxd6"), 172 MPP_FUNCTION(0x2, "ge1", "rxctl"), 173 MPP_FUNCTION(0x4, "i2c1", "sda")), 174 MPP_MODE(30, 175 MPP_FUNCTION(0x0, "gpio", NULL), 176 MPP_FUNCTION(0x1, "ge0", "rxd7"), 177 MPP_FUNCTION(0x2, "ge1", "rxclk"), 178 MPP_FUNCTION(0x4, "i2c1", "sck")), 179 MPP_MODE(31, 180 MPP_FUNCTION(0x0, "gpio", NULL), 181 MPP_FUNCTION(0x3, "tclk", NULL), 182 MPP_FUNCTION(0x4, "ge0", "txerr")), 183 MPP_MODE(32, 184 MPP_FUNCTION(0x0, "gpio", NULL), 185 MPP_FUNCTION(0x1, "spi0", "cs0")), 186 MPP_MODE(33, 187 MPP_FUNCTION(0x0, "gpio", NULL), 188 MPP_FUNCTION(0x1, "dev", "bootcs"), 189 MPP_FUNCTION(0x2, "spi0", "cs0")), 190 MPP_MODE(34, 191 MPP_FUNCTION(0x0, "gpo", NULL), 192 MPP_FUNCTION(0x1, "dev", "we0"), 193 MPP_FUNCTION(0x2, "spi0", "mosi")), 194 MPP_MODE(35, 195 MPP_FUNCTION(0x0, "gpo", NULL), 196 MPP_FUNCTION(0x1, "dev", "oe"), 197 MPP_FUNCTION(0x2, "spi0", "sck")), 198 MPP_MODE(36, 199 MPP_FUNCTION(0x0, "gpo", NULL), 200 MPP_FUNCTION(0x1, "dev", "a1"), 201 MPP_FUNCTION(0x2, "spi0", "miso")), 202 MPP_MODE(37, 203 MPP_FUNCTION(0x0, "gpo", NULL), 204 MPP_FUNCTION(0x1, "dev", "a0"), 205 MPP_FUNCTION(0x2, "sata0", "prsnt")), 206 MPP_MODE(38, 207 MPP_FUNCTION(0x0, "gpio", NULL), 208 MPP_FUNCTION(0x1, "dev", "ready"), 209 MPP_FUNCTION(0x2, "uart1", "cts"), 210 MPP_FUNCTION(0x3, "uart0", "cts")), 211 MPP_MODE(39, 212 MPP_FUNCTION(0x0, "gpo", NULL), 213 MPP_FUNCTION(0x1, "dev", "ad0"), 214 MPP_FUNCTION(0x2, "audio", "spdifo")), 215 MPP_MODE(40, 216 MPP_FUNCTION(0x0, "gpio", NULL), 217 MPP_FUNCTION(0x1, "dev", "ad1"), 218 MPP_FUNCTION(0x2, "uart1", "rts"), 219 MPP_FUNCTION(0x3, "uart0", "rts")), 220 MPP_MODE(41, 221 MPP_FUNCTION(0x0, "gpio", NULL), 222 MPP_FUNCTION(0x1, "dev", "ad2"), 223 MPP_FUNCTION(0x2, "uart1", "rxd")), 224 MPP_MODE(42, 225 MPP_FUNCTION(0x0, "gpo", NULL), 226 MPP_FUNCTION(0x1, "dev", "ad3"), 227 MPP_FUNCTION(0x2, "uart1", "txd")), 228 MPP_MODE(43, 229 MPP_FUNCTION(0x0, "gpo", NULL), 230 MPP_FUNCTION(0x1, "dev", "ad4"), 231 MPP_FUNCTION(0x2, "audio", "bclk")), 232 MPP_MODE(44, 233 MPP_FUNCTION(0x0, "gpo", NULL), 234 MPP_FUNCTION(0x1, "dev", "ad5"), 235 MPP_FUNCTION(0x2, "audio", "mclk")), 236 MPP_MODE(45, 237 MPP_FUNCTION(0x0, "gpo", NULL), 238 MPP_FUNCTION(0x1, "dev", "ad6"), 239 MPP_FUNCTION(0x2, "audio", "lrclk")), 240 MPP_MODE(46, 241 MPP_FUNCTION(0x0, "gpo", NULL), 242 MPP_FUNCTION(0x1, "dev", "ad7"), 243 MPP_FUNCTION(0x2, "audio", "sdo")), 244 MPP_MODE(47, 245 MPP_FUNCTION(0x0, "gpo", NULL), 246 MPP_FUNCTION(0x1, "dev", "ad8"), 247 MPP_FUNCTION(0x3, "sd0", "clk"), 248 MPP_FUNCTION(0x5, "audio", "spdifo")), 249 MPP_MODE(48, 250 MPP_FUNCTION(0x0, "gpio", NULL), 251 MPP_FUNCTION(0x1, "dev", "ad9"), 252 MPP_FUNCTION(0x2, "uart0", "rts"), 253 MPP_FUNCTION(0x3, "sd0", "cmd"), 254 MPP_FUNCTION(0x4, "sata1", "prsnt"), 255 MPP_FUNCTION(0x5, "spi0", "cs1")), 256 MPP_MODE(49, 257 MPP_FUNCTION(0x0, "gpio", NULL), 258 MPP_FUNCTION(0x1, "dev", "ad10"), 259 MPP_FUNCTION(0x2, "pcie", "clkreq1"), 260 MPP_FUNCTION(0x3, "sd0", "d0"), 261 MPP_FUNCTION(0x4, "spi1", "cs0"), 262 MPP_FUNCTION(0x5, "audio", "spdifi")), 263 MPP_MODE(50, 264 MPP_FUNCTION(0x0, "gpio", NULL), 265 MPP_FUNCTION(0x1, "dev", "ad11"), 266 MPP_FUNCTION(0x2, "uart0", "cts"), 267 MPP_FUNCTION(0x3, "sd0", "d1"), 268 MPP_FUNCTION(0x4, "spi1", "miso"), 269 MPP_FUNCTION(0x5, "audio", "rmclk")), 270 MPP_MODE(51, 271 MPP_FUNCTION(0x0, "gpio", NULL), 272 MPP_FUNCTION(0x1, "dev", "ad12"), 273 MPP_FUNCTION(0x2, "i2c1", "sda"), 274 MPP_FUNCTION(0x3, "sd0", "d2"), 275 MPP_FUNCTION(0x4, "spi1", "mosi")), 276 MPP_MODE(52, 277 MPP_FUNCTION(0x0, "gpio", NULL), 278 MPP_FUNCTION(0x1, "dev", "ad13"), 279 MPP_FUNCTION(0x2, "i2c1", "sck"), 280 MPP_FUNCTION(0x3, "sd0", "d3"), 281 MPP_FUNCTION(0x4, "spi1", "sck")), 282 MPP_MODE(53, 283 MPP_FUNCTION(0x0, "gpio", NULL), 284 MPP_FUNCTION(0x1, "dev", "ad14"), 285 MPP_FUNCTION(0x2, "sd0", "clk"), 286 MPP_FUNCTION(0x3, "tdm", "pclk"), 287 MPP_FUNCTION(0x4, "spi0", "cs2"), 288 MPP_FUNCTION(0x5, "pcie", "clkreq1")), 289 MPP_MODE(54, 290 MPP_FUNCTION(0x0, "gpo", NULL), 291 MPP_FUNCTION(0x1, "dev", "ad15"), 292 MPP_FUNCTION(0x3, "tdm", "dtx")), 293 MPP_MODE(55, 294 MPP_FUNCTION(0x0, "gpio", NULL), 295 MPP_FUNCTION(0x1, "dev", "cs1"), 296 MPP_FUNCTION(0x2, "uart1", "txd"), 297 MPP_FUNCTION(0x3, "tdm", "rst"), 298 MPP_FUNCTION(0x4, "sata1", "prsnt"), 299 MPP_FUNCTION(0x5, "sata0", "prsnt")), 300 MPP_MODE(56, 301 MPP_FUNCTION(0x0, "gpio", NULL), 302 MPP_FUNCTION(0x1, "dev", "cs2"), 303 MPP_FUNCTION(0x2, "uart1", "cts"), 304 MPP_FUNCTION(0x3, "uart0", "cts"), 305 MPP_FUNCTION(0x4, "spi0", "cs3"), 306 MPP_FUNCTION(0x5, "pcie", "clkreq0"), 307 MPP_FUNCTION(0x6, "spi1", "cs1")), 308 MPP_MODE(57, 309 MPP_FUNCTION(0x0, "gpio", NULL), 310 MPP_FUNCTION(0x1, "dev", "cs3"), 311 MPP_FUNCTION(0x2, "uart1", "rxd"), 312 MPP_FUNCTION(0x3, "tdm", "fsync"), 313 MPP_FUNCTION(0x4, "sata0", "prsnt"), 314 MPP_FUNCTION(0x5, "audio", "sdo")), 315 MPP_MODE(58, 316 MPP_FUNCTION(0x0, "gpio", NULL), 317 MPP_FUNCTION(0x1, "dev", "cs0"), 318 MPP_FUNCTION(0x2, "uart1", "rts"), 319 MPP_FUNCTION(0x3, "tdm", "int"), 320 MPP_FUNCTION(0x5, "audio", "extclk"), 321 MPP_FUNCTION(0x6, "uart0", "rts")), 322 MPP_MODE(59, 323 MPP_FUNCTION(0x0, "gpo", NULL), 324 MPP_FUNCTION(0x1, "dev", "ale0"), 325 MPP_FUNCTION(0x2, "uart1", "rts"), 326 MPP_FUNCTION(0x3, "uart0", "rts"), 327 MPP_FUNCTION(0x5, "audio", "bclk")), 328 MPP_MODE(60, 329 MPP_FUNCTION(0x0, "gpio", NULL), 330 MPP_FUNCTION(0x1, "dev", "ale1"), 331 MPP_FUNCTION(0x2, "uart1", "rxd"), 332 MPP_FUNCTION(0x3, "sata0", "prsnt"), 333 MPP_FUNCTION(0x4, "pcie", "rstout"), 334 MPP_FUNCTION(0x5, "audio", "sdi")), 335 MPP_MODE(61, 336 MPP_FUNCTION(0x0, "gpo", NULL), 337 MPP_FUNCTION(0x1, "dev", "we1"), 338 MPP_FUNCTION(0x2, "uart1", "txd"), 339 MPP_FUNCTION(0x5, "audio", "lrclk")), 340 MPP_MODE(62, 341 MPP_FUNCTION(0x0, "gpio", NULL), 342 MPP_FUNCTION(0x1, "dev", "a2"), 343 MPP_FUNCTION(0x2, "uart1", "cts"), 344 MPP_FUNCTION(0x3, "tdm", "drx"), 345 MPP_FUNCTION(0x4, "pcie", "clkreq0"), 346 MPP_FUNCTION(0x5, "audio", "mclk"), 347 MPP_FUNCTION(0x6, "uart0", "cts")), 348 MPP_MODE(63, 349 MPP_FUNCTION(0x0, "gpio", NULL), 350 MPP_FUNCTION(0x1, "spi0", "sck"), 351 MPP_FUNCTION(0x2, "tclk", NULL)), 352 MPP_MODE(64, 353 MPP_FUNCTION(0x0, "gpio", NULL), 354 MPP_FUNCTION(0x1, "spi0", "miso"), 355 MPP_FUNCTION(0x2, "spi0", "cs1")), 356 MPP_MODE(65, 357 MPP_FUNCTION(0x0, "gpio", NULL), 358 MPP_FUNCTION(0x1, "spi0", "mosi"), 359 MPP_FUNCTION(0x2, "spi0", "cs2")), 360 }; 361 362 static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info; 363 364 static const struct of_device_id armada_370_pinctrl_of_match[] = { 365 { .compatible = "marvell,mv88f6710-pinctrl" }, 366 { }, 367 }; 368 369 static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = { 370 MPP_FUNC_CTRL(0, 65, NULL, mvebu_mmio_mpp_ctrl), 371 }; 372 373 static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = { 374 MPP_GPIO_RANGE(0, 0, 0, 32), 375 MPP_GPIO_RANGE(1, 32, 32, 32), 376 MPP_GPIO_RANGE(2, 64, 64, 2), 377 }; 378 379 static int armada_370_pinctrl_probe(struct platform_device *pdev) 380 { 381 struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info; 382 383 soc->variant = 0; /* no variants for Armada 370 */ 384 soc->controls = mv88f6710_mpp_controls; 385 soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls); 386 soc->modes = mv88f6710_mpp_modes; 387 soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes); 388 soc->gpioranges = mv88f6710_mpp_gpio_ranges; 389 soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges); 390 391 pdev->dev.platform_data = soc; 392 393 return mvebu_pinctrl_simple_mmio_probe(pdev); 394 } 395 396 static struct platform_driver armada_370_pinctrl_driver = { 397 .driver = { 398 .name = "armada-370-pinctrl", 399 .of_match_table = armada_370_pinctrl_of_match, 400 }, 401 .probe = armada_370_pinctrl_probe, 402 }; 403 builtin_platform_driver(armada_370_pinctrl_driver); 404