1 /*
2  * Pin controller and GPIO driver for Amlogic Meson8b.
3  *
4  * Copyright (C) 2015 Endless Mobile, Inc.
5  * Author: Carlo Caione <carlo@endlessm.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program. If not, see <http://www.gnu.org/licenses/>.
13  */
14 
15 #include <dt-bindings/gpio/meson8b-gpio.h>
16 #include "pinctrl-meson.h"
17 
18 #define AO_OFF	130
19 
20 static const struct pinctrl_pin_desc meson8b_pins[] = {
21 	MESON_PIN(GPIOX_0, 0),
22 	MESON_PIN(GPIOX_1, 0),
23 	MESON_PIN(GPIOX_2, 0),
24 	MESON_PIN(GPIOX_3, 0),
25 	MESON_PIN(GPIOX_4, 0),
26 	MESON_PIN(GPIOX_5, 0),
27 	MESON_PIN(GPIOX_6, 0),
28 	MESON_PIN(GPIOX_7, 0),
29 	MESON_PIN(GPIOX_8, 0),
30 	MESON_PIN(GPIOX_9, 0),
31 	MESON_PIN(GPIOX_10, 0),
32 	MESON_PIN(GPIOX_11, 0),
33 	MESON_PIN(GPIOX_16, 0),
34 	MESON_PIN(GPIOX_17, 0),
35 	MESON_PIN(GPIOX_18, 0),
36 	MESON_PIN(GPIOX_19, 0),
37 	MESON_PIN(GPIOX_20, 0),
38 	MESON_PIN(GPIOX_21, 0),
39 
40 	MESON_PIN(GPIOY_0, 0),
41 	MESON_PIN(GPIOY_1, 0),
42 	MESON_PIN(GPIOY_3, 0),
43 	MESON_PIN(GPIOY_6, 0),
44 	MESON_PIN(GPIOY_7, 0),
45 	MESON_PIN(GPIOY_8, 0),
46 	MESON_PIN(GPIOY_9, 0),
47 	MESON_PIN(GPIOY_10, 0),
48 	MESON_PIN(GPIOY_11, 0),
49 	MESON_PIN(GPIOY_12, 0),
50 	MESON_PIN(GPIOY_13, 0),
51 	MESON_PIN(GPIOY_14, 0),
52 
53 	MESON_PIN(GPIODV_9, 0),
54 	MESON_PIN(GPIODV_24, 0),
55 	MESON_PIN(GPIODV_25, 0),
56 	MESON_PIN(GPIODV_26, 0),
57 	MESON_PIN(GPIODV_27, 0),
58 	MESON_PIN(GPIODV_28, 0),
59 	MESON_PIN(GPIODV_29, 0),
60 
61 	MESON_PIN(GPIOH_0, 0),
62 	MESON_PIN(GPIOH_1, 0),
63 	MESON_PIN(GPIOH_2, 0),
64 	MESON_PIN(GPIOH_3, 0),
65 	MESON_PIN(GPIOH_4, 0),
66 	MESON_PIN(GPIOH_5, 0),
67 	MESON_PIN(GPIOH_6, 0),
68 	MESON_PIN(GPIOH_7, 0),
69 	MESON_PIN(GPIOH_8, 0),
70 	MESON_PIN(GPIOH_9, 0),
71 
72 	MESON_PIN(CARD_0, 0),
73 	MESON_PIN(CARD_1, 0),
74 	MESON_PIN(CARD_2, 0),
75 	MESON_PIN(CARD_3, 0),
76 	MESON_PIN(CARD_4, 0),
77 	MESON_PIN(CARD_5, 0),
78 	MESON_PIN(CARD_6, 0),
79 
80 	MESON_PIN(BOOT_0, 0),
81 	MESON_PIN(BOOT_1, 0),
82 	MESON_PIN(BOOT_2, 0),
83 	MESON_PIN(BOOT_3, 0),
84 	MESON_PIN(BOOT_4, 0),
85 	MESON_PIN(BOOT_5, 0),
86 	MESON_PIN(BOOT_6, 0),
87 	MESON_PIN(BOOT_7, 0),
88 	MESON_PIN(BOOT_8, 0),
89 	MESON_PIN(BOOT_9, 0),
90 	MESON_PIN(BOOT_10, 0),
91 	MESON_PIN(BOOT_11, 0),
92 	MESON_PIN(BOOT_12, 0),
93 	MESON_PIN(BOOT_13, 0),
94 	MESON_PIN(BOOT_14, 0),
95 	MESON_PIN(BOOT_15, 0),
96 	MESON_PIN(BOOT_16, 0),
97 	MESON_PIN(BOOT_17, 0),
98 	MESON_PIN(BOOT_18, 0),
99 
100 	MESON_PIN(DIF_0_P, 0),
101 	MESON_PIN(DIF_0_N, 0),
102 	MESON_PIN(DIF_1_P, 0),
103 	MESON_PIN(DIF_1_N, 0),
104 	MESON_PIN(DIF_2_P, 0),
105 	MESON_PIN(DIF_2_N, 0),
106 	MESON_PIN(DIF_3_P, 0),
107 	MESON_PIN(DIF_3_N, 0),
108 	MESON_PIN(DIF_4_P, 0),
109 	MESON_PIN(DIF_4_N, 0),
110 
111 	MESON_PIN(GPIOAO_0, AO_OFF),
112 	MESON_PIN(GPIOAO_1, AO_OFF),
113 	MESON_PIN(GPIOAO_2, AO_OFF),
114 	MESON_PIN(GPIOAO_3, AO_OFF),
115 	MESON_PIN(GPIOAO_4, AO_OFF),
116 	MESON_PIN(GPIOAO_5, AO_OFF),
117 	MESON_PIN(GPIOAO_6, AO_OFF),
118 	MESON_PIN(GPIOAO_7, AO_OFF),
119 	MESON_PIN(GPIOAO_8, AO_OFF),
120 	MESON_PIN(GPIOAO_9, AO_OFF),
121 	MESON_PIN(GPIOAO_10, AO_OFF),
122 	MESON_PIN(GPIOAO_11, AO_OFF),
123 	MESON_PIN(GPIOAO_12, AO_OFF),
124 	MESON_PIN(GPIOAO_13, AO_OFF),
125 	MESON_PIN(GPIO_BSD_EN, AO_OFF),
126 	MESON_PIN(GPIO_TEST_N, AO_OFF),
127 };
128 
129 /* bank X */
130 static const unsigned int sd_d0_a_pins[]	= { PIN(GPIOX_0, 0) };
131 static const unsigned int sd_d1_a_pins[]	= { PIN(GPIOX_1, 0) };
132 static const unsigned int sd_d2_a_pins[]	= { PIN(GPIOX_2, 0) };
133 static const unsigned int sd_d3_a_pins[]	= { PIN(GPIOX_3, 0) };
134 static const unsigned int sdxc_d0_0_a_pins[]	= { PIN(GPIOX_4, 0) };
135 static const unsigned int sdxc_d47_a_pins[]	= { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
136 						    PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
137 static const unsigned int sdxc_d13_0_a_pins[]	= { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0),
138 						    PIN(GPIOX_7, 0) };
139 static const unsigned int sd_clk_a_pins[]	= { PIN(GPIOX_8, 0) };
140 static const unsigned int sd_cmd_a_pins[]	= { PIN(GPIOX_9, 0) };
141 static const unsigned int xtal_32k_out_pins[]	= { PIN(GPIOX_10, 0) };
142 static const unsigned int xtal_24m_out_pins[]	= { PIN(GPIOX_11, 0) };
143 static const unsigned int uart_tx_b0_pins[]	= { PIN(GPIOX_16, 0) };
144 static const unsigned int uart_rx_b0_pins[]	= { PIN(GPIOX_17, 0) };
145 static const unsigned int uart_cts_b0_pins[]	= { PIN(GPIOX_18, 0) };
146 static const unsigned int uart_rts_b0_pins[]	= { PIN(GPIOX_19, 0) };
147 
148 static const unsigned int sdxc_d0_1_a_pins[]	= { PIN(GPIOX_0, 0) };
149 static const unsigned int sdxc_d13_1_a_pins[]	= { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
150 						    PIN(GPIOX_3, 0) };
151 static const unsigned int pcm_out_a_pins[]	= { PIN(GPIOX_4, 0) };
152 static const unsigned int pcm_in_a_pins[]	= { PIN(GPIOX_5, 0) };
153 static const unsigned int pcm_fs_a_pins[]	= { PIN(GPIOX_6, 0) };
154 static const unsigned int pcm_clk_a_pins[]	= { PIN(GPIOX_7, 0) };
155 static const unsigned int sdxc_clk_a_pins[]	= { PIN(GPIOX_8, 0) };
156 static const unsigned int sdxc_cmd_a_pins[]	= { PIN(GPIOX_9, 0) };
157 static const unsigned int pwm_vs_0_pins[]	= { PIN(GPIOX_10, 0) };
158 static const unsigned int pwm_e_pins[]		= { PIN(GPIOX_10, 0) };
159 static const unsigned int pwm_vs_1_pins[]	= { PIN(GPIOX_11, 0) };
160 
161 static const unsigned int uart_tx_a_pins[]	= { PIN(GPIOX_4, 0) };
162 static const unsigned int uart_rx_a_pins[]	= { PIN(GPIOX_5, 0) };
163 static const unsigned int uart_cts_a_pins[]	= { PIN(GPIOX_6, 0) };
164 static const unsigned int uart_rts_a_pins[]	= { PIN(GPIOX_7, 0) };
165 static const unsigned int uart_tx_b1_pins[]	= { PIN(GPIOX_8, 0) };
166 static const unsigned int uart_rx_b1_pins[]	= { PIN(GPIOX_9, 0) };
167 static const unsigned int uart_cts_b1_pins[]	= { PIN(GPIOX_10, 0) };
168 static const unsigned int uart_rts_b1_pins[]	= { PIN(GPIOX_20, 0) };
169 
170 static const unsigned int iso7816_0_clk_pins[]	= { PIN(GPIOX_6, 0) };
171 static const unsigned int iso7816_0_data_pins[]	= { PIN(GPIOX_7, 0) };
172 static const unsigned int spi_sclk_0_pins[]	= { PIN(GPIOX_8, 0) };
173 static const unsigned int spi_miso_0_pins[]	= { PIN(GPIOX_9, 0) };
174 static const unsigned int spi_mosi_0_pins[]	= { PIN(GPIOX_10, 0) };
175 static const unsigned int iso7816_det_pins[]	= { PIN(GPIOX_16, 0) };
176 static const unsigned int iso7816_reset_pins[]	= { PIN(GPIOX_17, 0) };
177 static const unsigned int iso7816_1_clk_pins[]	= { PIN(GPIOX_18, 0) };
178 static const unsigned int iso7816_1_data_pins[]	= { PIN(GPIOX_19, 0) };
179 static const unsigned int spi_ss0_0_pins[]	= { PIN(GPIOX_20, 0) };
180 
181 static const unsigned int tsin_clk_b_pins[]	= { PIN(GPIOX_8, 0) };
182 static const unsigned int tsin_sop_b_pins[]	= { PIN(GPIOX_9, 0) };
183 static const unsigned int tsin_d0_b_pins[]	= { PIN(GPIOX_10, 0) };
184 static const unsigned int pwm_b_pins[]		= { PIN(GPIOX_11, 0) };
185 static const unsigned int i2c_sda_d0_pins[]	= { PIN(GPIOX_16, 0) };
186 static const unsigned int i2c_sck_d0_pins[]	= { PIN(GPIOX_17, 0) };
187 static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) };
188 
189 /* bank Y */
190 static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) };
191 static const unsigned int tsin_sop_a_pins[]	= { PIN(GPIOY_1, 0) };
192 static const unsigned int tsin_d17_a_pins[]	= { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0),
193 						    PIN(GPIOY_10, 0), PIN(GPIOY_11, 0),
194 						    PIN(GPIOY_12, 0), PIN(GPIOY_13, 0),
195 						    PIN(GPIOY_14, 0) };
196 static const unsigned int tsin_clk_a_pins[]	= { PIN(GPIOY_8, 0) };
197 static const unsigned int tsin_d0_a_pins[]	= { PIN(GPIOY_9, 0) };
198 
199 static const unsigned int spdif_out_0_pins[]	= { PIN(GPIOY_3, 0) };
200 
201 static const unsigned int xtal_24m_pins[]	= { PIN(GPIOY_3, 0) };
202 static const unsigned int iso7816_2_clk_pins[]	= { PIN(GPIOY_13, 0) };
203 static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) };
204 
205 /* bank DV */
206 static const unsigned int pwm_d_pins[]		= { PIN(GPIODV_28, 0) };
207 static const unsigned int pwm_c0_pins[]		= { PIN(GPIODV_29, 0) };
208 
209 static const unsigned int pwm_vs_2_pins[]	= { PIN(GPIODV_9, 0) };
210 static const unsigned int pwm_vs_3_pins[]	= { PIN(GPIODV_28, 0) };
211 static const unsigned int pwm_vs_4_pins[]	= { PIN(GPIODV_29, 0) };
212 
213 static const unsigned int xtal24_out_pins[]	= { PIN(GPIODV_29, 0) };
214 
215 static const unsigned int uart_tx_c_pins[]	= { PIN(GPIODV_24, 0) };
216 static const unsigned int uart_rx_c_pins[]	= { PIN(GPIODV_25, 0) };
217 static const unsigned int uart_cts_c_pins[]	= { PIN(GPIODV_26, 0) };
218 static const unsigned int uart_rts_c_pins[]	= { PIN(GPIODV_27, 0) };
219 
220 static const unsigned int pwm_c1_pins[]		= { PIN(GPIODV_9, 0) };
221 
222 static const unsigned int i2c_sda_a_pins[]	= { PIN(GPIODV_24, 0) };
223 static const unsigned int i2c_sck_a_pins[]	= { PIN(GPIODV_25, 0) };
224 static const unsigned int i2c_sda_b0_pins[]	= { PIN(GPIODV_26, 0) };
225 static const unsigned int i2c_sck_b0_pins[]	= { PIN(GPIODV_27, 0) };
226 static const unsigned int i2c_sda_c0_pins[]	= { PIN(GPIODV_28, 0) };
227 static const unsigned int i2c_sck_c0_pins[]	= { PIN(GPIODV_29, 0) };
228 
229 /* bank H */
230 static const unsigned int hdmi_hpd_pins[]	= { PIN(GPIOH_0, 0) };
231 static const unsigned int hdmi_sda_pins[]	= { PIN(GPIOH_1, 0) };
232 static const unsigned int hdmi_scl_pins[]	= { PIN(GPIOH_2, 0) };
233 static const unsigned int hdmi_cec_0_pins[]	= { PIN(GPIOH_3, 0) };
234 static const unsigned int eth_txd1_0_pins[]	= { PIN(GPIOH_5, 0) };
235 static const unsigned int eth_txd0_0_pins[]	= { PIN(GPIOH_6, 0) };
236 static const unsigned int clk_24m_out_pins[]	= { PIN(GPIOH_9, 0) };
237 
238 static const unsigned int spi_ss1_pins[]	= { PIN(GPIOH_0, 0) };
239 static const unsigned int spi_ss2_pins[]	= { PIN(GPIOH_1, 0) };
240 static const unsigned int spi_ss0_1_pins[]	= { PIN(GPIOH_3, 0) };
241 static const unsigned int spi_miso_1_pins[]	= { PIN(GPIOH_4, 0) };
242 static const unsigned int spi_mosi_1_pins[]	= { PIN(GPIOH_5, 0) };
243 static const unsigned int spi_sclk_1_pins[]	= { PIN(GPIOH_6, 0) };
244 
245 static const unsigned int eth_txd3_pins[]	= { PIN(GPIOH_7, 0) };
246 static const unsigned int eth_txd2_pins[]	= { PIN(GPIOH_8, 0) };
247 static const unsigned int eth_tx_clk_pins[]	= { PIN(GPIOH_9, 0) };
248 
249 static const unsigned int i2c_sda_b1_pins[]	= { PIN(GPIOH_3, 0) };
250 static const unsigned int i2c_sck_b1_pins[]	= { PIN(GPIOH_4, 0) };
251 static const unsigned int i2c_sda_c1_pins[]	= { PIN(GPIOH_5, 0) };
252 static const unsigned int i2c_sck_c1_pins[]	= { PIN(GPIOH_6, 0) };
253 static const unsigned int i2c_sda_d1_pins[]	= { PIN(GPIOH_7, 0) };
254 static const unsigned int i2c_sck_d1_pins[]	= { PIN(GPIOH_8, 0) };
255 
256 /* bank BOOT */
257 static const unsigned int nand_io_pins[]	= { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
258 						    PIN(BOOT_2, 0), PIN(BOOT_3, 0),
259 						    PIN(BOOT_4, 0), PIN(BOOT_5, 0),
260 						    PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
261 static const unsigned int nand_io_ce0_pins[]	= { PIN(BOOT_8, 0) };
262 static const unsigned int nand_io_ce1_pins[]	= { PIN(BOOT_9, 0) };
263 static const unsigned int nand_io_rb0_pins[]	= { PIN(BOOT_10, 0) };
264 static const unsigned int nand_ale_pins[]	= { PIN(BOOT_11, 0) };
265 static const unsigned int nand_cle_pins[]	= { PIN(BOOT_12, 0) };
266 static const unsigned int nand_wen_clk_pins[]	= { PIN(BOOT_13, 0) };
267 static const unsigned int nand_ren_clk_pins[]	= { PIN(BOOT_14, 0) };
268 static const unsigned int nand_dqs_0_pins[]	= { PIN(BOOT_15, 0) };
269 static const unsigned int nand_dqs_1_pins[]	= { PIN(BOOT_18, 0) };
270 
271 static const unsigned int sdxc_d0_c_pins[]	= { PIN(BOOT_0, 0)};
272 static const unsigned int sdxc_d13_c_pins[]	= { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
273 						    PIN(BOOT_3, 0) };
274 static const unsigned int sdxc_d47_c_pins[]	= { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
275 						    PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
276 static const unsigned int sdxc_clk_c_pins[]	= { PIN(BOOT_8, 0) };
277 static const unsigned int sdxc_cmd_c_pins[]	= { PIN(BOOT_10, 0) };
278 static const unsigned int nor_d_pins[]		= { PIN(BOOT_11, 0) };
279 static const unsigned int nor_q_pins[]		= { PIN(BOOT_12, 0) };
280 static const unsigned int nor_c_pins[]		= { PIN(BOOT_13, 0) };
281 static const unsigned int nor_cs_pins[]		= { PIN(BOOT_18, 0) };
282 
283 static const unsigned int sd_d0_c_pins[]	= { PIN(BOOT_0, 0) };
284 static const unsigned int sd_d1_c_pins[]	= { PIN(BOOT_1, 0) };
285 static const unsigned int sd_d2_c_pins[]	= { PIN(BOOT_2, 0) };
286 static const unsigned int sd_d3_c_pins[]	= { PIN(BOOT_3, 0) };
287 static const unsigned int sd_cmd_c_pins[]	= { PIN(BOOT_8, 0) };
288 static const unsigned int sd_clk_c_pins[]	= { PIN(BOOT_10, 0) };
289 
290 /* bank CARD */
291 static const unsigned int sd_d1_b_pins[]	= { PIN(CARD_0, 0) };
292 static const unsigned int sd_d0_b_pins[]	= { PIN(CARD_1, 0) };
293 static const unsigned int sd_clk_b_pins[]	= { PIN(CARD_2, 0) };
294 static const unsigned int sd_cmd_b_pins[]	= { PIN(CARD_3, 0) };
295 static const unsigned int sd_d3_b_pins[]	= { PIN(CARD_4, 0) };
296 static const unsigned int sd_d2_b_pins[]	= { PIN(CARD_5, 0) };
297 
298 static const unsigned int sdxc_d13_b_pins[]	= { PIN(CARD_0, 0), PIN(CARD_4, 0),
299 						    PIN(CARD_5, 0) };
300 static const unsigned int sdxc_d0_b_pins[]	= { PIN(CARD_1, 0) };
301 static const unsigned int sdxc_clk_b_pins[]	= { PIN(CARD_2, 0) };
302 static const unsigned int sdxc_cmd_b_pins[]	= { PIN(CARD_3, 0) };
303 
304 /* bank AO */
305 static const unsigned int uart_tx_ao_a_pins[]	= { PIN(GPIOAO_0, AO_OFF) };
306 static const unsigned int uart_rx_ao_a_pins[]	= { PIN(GPIOAO_1, AO_OFF) };
307 static const unsigned int uart_cts_ao_a_pins[]	= { PIN(GPIOAO_2, AO_OFF) };
308 static const unsigned int uart_rts_ao_a_pins[]	= { PIN(GPIOAO_3, AO_OFF) };
309 static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
310 static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
311 static const unsigned int clk_32k_in_out_pins[]	= { PIN(GPIOAO_6, AO_OFF) };
312 static const unsigned int remote_input_pins[]	= { PIN(GPIOAO_7, AO_OFF) };
313 static const unsigned int hdmi_cec_1_pins[]	= { PIN(GPIOAO_12, AO_OFF) };
314 static const unsigned int ir_blaster_pins[]	= { PIN(GPIOAO_13, AO_OFF) };
315 
316 static const unsigned int pwm_c2_pins[]		= { PIN(GPIOAO_3, AO_OFF) };
317 static const unsigned int i2c_sck_ao_pins[]	= { PIN(GPIOAO_4, AO_OFF) };
318 static const unsigned int i2c_sda_ao_pins[]	= { PIN(GPIOAO_5, AO_OFF) };
319 static const unsigned int ir_remote_out_pins[]	= { PIN(GPIOAO_7, AO_OFF) };
320 static const unsigned int i2s_am_clk_out_pins[]	= { PIN(GPIOAO_8, AO_OFF) };
321 static const unsigned int i2s_ao_clk_out_pins[]	= { PIN(GPIOAO_9, AO_OFF) };
322 static const unsigned int i2s_lr_clk_out_pins[]	= { PIN(GPIOAO_10, AO_OFF) };
323 static const unsigned int i2s_out_01_pins[]	= { PIN(GPIOAO_11, AO_OFF) };
324 
325 static const unsigned int uart_tx_ao_b0_pins[]	= { PIN(GPIOAO_0, AO_OFF) };
326 static const unsigned int uart_rx_ao_b0_pins[]	= { PIN(GPIOAO_1, AO_OFF) };
327 static const unsigned int uart_cts_ao_b_pins[]	= { PIN(GPIOAO_2, AO_OFF) };
328 static const unsigned int uart_rts_ao_b_pins[]	= { PIN(GPIOAO_3, AO_OFF) };
329 static const unsigned int uart_tx_ao_b1_pins[]	= { PIN(GPIOAO_4, AO_OFF) };
330 static const unsigned int uart_rx_ao_b1_pins[]	= { PIN(GPIOAO_5, AO_OFF) };
331 static const unsigned int spdif_out_1_pins[]	= { PIN(GPIOAO_6, AO_OFF) };
332 
333 static const unsigned int i2s_in_ch01_pins[]	= { PIN(GPIOAO_6, AO_OFF) };
334 static const unsigned int i2s_ao_clk_in_pins[]	= { PIN(GPIOAO_9, AO_OFF) };
335 static const unsigned int i2s_lr_clk_in_pins[]	= { PIN(GPIOAO_10, AO_OFF) };
336 
337 /* bank DIF */
338 static const unsigned int eth_rxd1_pins[]	= { PIN(DIF_0_P, 0) };
339 static const unsigned int eth_rxd0_pins[]	= { PIN(DIF_0_N, 0) };
340 static const unsigned int eth_rx_dv_pins[]	= { PIN(DIF_1_P, 0) };
341 static const unsigned int eth_rx_clk_pins[]	= { PIN(DIF_1_N, 0) };
342 static const unsigned int eth_txd0_1_pins[]	= { PIN(DIF_2_P, 0) };
343 static const unsigned int eth_txd1_1_pins[]	= { PIN(DIF_2_N, 0) };
344 static const unsigned int eth_tx_en_pins[]	= { PIN(DIF_3_P, 0) };
345 static const unsigned int eth_ref_clk_pins[]	= { PIN(DIF_3_N, 0) };
346 static const unsigned int eth_mdc_pins[]	= { PIN(DIF_4_P, 0) };
347 static const unsigned int eth_mdio_en_pins[]	= { PIN(DIF_4_N, 0) };
348 
349 static struct meson_pmx_group meson8b_groups[] = {
350 	GPIO_GROUP(GPIOX_0, 0),
351 	GPIO_GROUP(GPIOX_1, 0),
352 	GPIO_GROUP(GPIOX_2, 0),
353 	GPIO_GROUP(GPIOX_3, 0),
354 	GPIO_GROUP(GPIOX_4, 0),
355 	GPIO_GROUP(GPIOX_5, 0),
356 	GPIO_GROUP(GPIOX_6, 0),
357 	GPIO_GROUP(GPIOX_7, 0),
358 	GPIO_GROUP(GPIOX_8, 0),
359 	GPIO_GROUP(GPIOX_9, 0),
360 	GPIO_GROUP(GPIOX_10, 0),
361 	GPIO_GROUP(GPIOX_11, 0),
362 	GPIO_GROUP(GPIOX_16, 0),
363 	GPIO_GROUP(GPIOX_17, 0),
364 	GPIO_GROUP(GPIOX_18, 0),
365 	GPIO_GROUP(GPIOX_19, 0),
366 	GPIO_GROUP(GPIOX_20, 0),
367 	GPIO_GROUP(GPIOX_21, 0),
368 
369 	GPIO_GROUP(GPIOY_0, 0),
370 	GPIO_GROUP(GPIOY_1, 0),
371 	GPIO_GROUP(GPIOY_3, 0),
372 	GPIO_GROUP(GPIOY_6, 0),
373 	GPIO_GROUP(GPIOY_7, 0),
374 	GPIO_GROUP(GPIOY_8, 0),
375 	GPIO_GROUP(GPIOY_9, 0),
376 	GPIO_GROUP(GPIOY_10, 0),
377 	GPIO_GROUP(GPIOY_11, 0),
378 	GPIO_GROUP(GPIOY_12, 0),
379 	GPIO_GROUP(GPIOY_13, 0),
380 	GPIO_GROUP(GPIOY_14, 0),
381 
382 	GPIO_GROUP(GPIODV_9, 0),
383 	GPIO_GROUP(GPIODV_24, 0),
384 	GPIO_GROUP(GPIODV_25, 0),
385 	GPIO_GROUP(GPIODV_26, 0),
386 	GPIO_GROUP(GPIODV_27, 0),
387 	GPIO_GROUP(GPIODV_28, 0),
388 	GPIO_GROUP(GPIODV_29, 0),
389 
390 	GPIO_GROUP(GPIOH_0, 0),
391 	GPIO_GROUP(GPIOH_1, 0),
392 	GPIO_GROUP(GPIOH_2, 0),
393 	GPIO_GROUP(GPIOH_3, 0),
394 	GPIO_GROUP(GPIOH_4, 0),
395 	GPIO_GROUP(GPIOH_5, 0),
396 	GPIO_GROUP(GPIOH_6, 0),
397 	GPIO_GROUP(GPIOH_7, 0),
398 	GPIO_GROUP(GPIOH_8, 0),
399 	GPIO_GROUP(GPIOH_9, 0),
400 
401 	GPIO_GROUP(DIF_0_P, 0),
402 	GPIO_GROUP(DIF_0_N, 0),
403 	GPIO_GROUP(DIF_1_P, 0),
404 	GPIO_GROUP(DIF_1_N, 0),
405 	GPIO_GROUP(DIF_2_P, 0),
406 	GPIO_GROUP(DIF_2_N, 0),
407 	GPIO_GROUP(DIF_3_P, 0),
408 	GPIO_GROUP(DIF_3_N, 0),
409 	GPIO_GROUP(DIF_4_P, 0),
410 	GPIO_GROUP(DIF_4_N, 0),
411 
412 	GPIO_GROUP(GPIOAO_0, AO_OFF),
413 	GPIO_GROUP(GPIOAO_1, AO_OFF),
414 	GPIO_GROUP(GPIOAO_2, AO_OFF),
415 	GPIO_GROUP(GPIOAO_3, AO_OFF),
416 	GPIO_GROUP(GPIOAO_4, AO_OFF),
417 	GPIO_GROUP(GPIOAO_5, AO_OFF),
418 	GPIO_GROUP(GPIOAO_6, AO_OFF),
419 	GPIO_GROUP(GPIOAO_7, AO_OFF),
420 	GPIO_GROUP(GPIOAO_8, AO_OFF),
421 	GPIO_GROUP(GPIOAO_9, AO_OFF),
422 	GPIO_GROUP(GPIOAO_10, AO_OFF),
423 	GPIO_GROUP(GPIOAO_11, AO_OFF),
424 	GPIO_GROUP(GPIOAO_12, AO_OFF),
425 	GPIO_GROUP(GPIOAO_13, AO_OFF),
426 	GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
427 	GPIO_GROUP(GPIO_TEST_N, AO_OFF),
428 
429 	/* bank X */
430 	GROUP(sd_d0_a,		8,	5),
431 	GROUP(sd_d1_a,		8,	4),
432 	GROUP(sd_d2_a,		8,	3),
433 	GROUP(sd_d3_a,		8,	2),
434 	GROUP(sdxc_d0_0_a,	5,	29),
435 	GROUP(sdxc_d47_a,	5,	12),
436 	GROUP(sdxc_d13_0_a,	5,	28),
437 	GROUP(sd_clk_a,		8,	1),
438 	GROUP(sd_cmd_a,		8,	0),
439 	GROUP(xtal_32k_out,	3,	22),
440 	GROUP(xtal_24m_out,	3,	20),
441 	GROUP(uart_tx_b0,	4,	9),
442 	GROUP(uart_rx_b0,	4,	8),
443 	GROUP(uart_cts_b0,	4,	7),
444 	GROUP(uart_rts_b0,	4,	6),
445 	GROUP(sdxc_d0_1_a,	5,	14),
446 	GROUP(sdxc_d13_1_a,	5,	13),
447 	GROUP(pcm_out_a,	3,	30),
448 	GROUP(pcm_in_a,		3,	29),
449 	GROUP(pcm_fs_a,		3,	28),
450 	GROUP(pcm_clk_a,	3,	27),
451 	GROUP(sdxc_clk_a,	5,	11),
452 	GROUP(sdxc_cmd_a,	5,	10),
453 	GROUP(pwm_vs_0,		7,	31),
454 	GROUP(pwm_e,		9,	19),
455 	GROUP(pwm_vs_1,		7,	30),
456 	GROUP(uart_tx_a,	4,	17),
457 	GROUP(uart_rx_a,	4,	16),
458 	GROUP(uart_cts_a,	4,	15),
459 	GROUP(uart_rts_a,	4,	14),
460 	GROUP(uart_tx_b1,	6,	19),
461 	GROUP(uart_rx_b1,	6,	18),
462 	GROUP(uart_cts_b1,	6,	17),
463 	GROUP(uart_rts_b1,	6,	16),
464 	GROUP(iso7816_0_clk,	5,	9),
465 	GROUP(iso7816_0_data,	5,	8),
466 	GROUP(spi_sclk_0,	4,	22),
467 	GROUP(spi_miso_0,	4,	24),
468 	GROUP(spi_mosi_0,	4,	23),
469 	GROUP(iso7816_det,	4,	21),
470 	GROUP(iso7816_reset,	4,	20),
471 	GROUP(iso7816_1_clk,	4,	19),
472 	GROUP(iso7816_1_data,	4,	18),
473 	GROUP(spi_ss0_0,	4,	25),
474 	GROUP(tsin_clk_b,	3,	6),
475 	GROUP(tsin_sop_b,	3,	7),
476 	GROUP(tsin_d0_b,	3,	8),
477 	GROUP(pwm_b,		2,	3),
478 	GROUP(i2c_sda_d0,	4,	5),
479 	GROUP(i2c_sck_d0,	4,	4),
480 	GROUP(tsin_d_valid_b,	3,	9),
481 
482 	/* bank Y */
483 	GROUP(tsin_d_valid_a,	3,	2),
484 	GROUP(tsin_sop_a,	3,	1),
485 	GROUP(tsin_d17_a,	3,	5),
486 	GROUP(tsin_clk_a,	3,	0),
487 	GROUP(tsin_d0_a,	3,	4),
488 	GROUP(spdif_out_0,	1,	7),
489 	GROUP(xtal_24m,		3,	18),
490 	GROUP(iso7816_2_clk,	5,	7),
491 	GROUP(iso7816_2_data,	5,	6),
492 
493 	/* bank DV */
494 	GROUP(pwm_d,		3,	26),
495 	GROUP(pwm_c0,		3,	25),
496 	GROUP(pwm_vs_2,		7,	28),
497 	GROUP(pwm_vs_3,		7,	27),
498 	GROUP(pwm_vs_4,		7,	26),
499 	GROUP(xtal24_out,	7,	25),
500 	GROUP(uart_tx_c,	6,	23),
501 	GROUP(uart_rx_c,	6,	22),
502 	GROUP(uart_cts_c,	6,	21),
503 	GROUP(uart_rts_c,	6,	20),
504 	GROUP(pwm_c1,		3,	24),
505 	GROUP(i2c_sda_a,	9,	31),
506 	GROUP(i2c_sck_a,	9,	30),
507 	GROUP(i2c_sda_b0,	9,	29),
508 	GROUP(i2c_sck_b0,	9,	28),
509 	GROUP(i2c_sda_c0,	9,	27),
510 	GROUP(i2c_sck_c0,	9,	26),
511 
512 	/* bank H */
513 	GROUP(hdmi_hpd,		1,	26),
514 	GROUP(hdmi_sda,		1,	25),
515 	GROUP(hdmi_scl,		1,	24),
516 	GROUP(hdmi_cec_0,	1,	23),
517 	GROUP(eth_txd1_0,	7,	21),
518 	GROUP(eth_txd0_0,	7,	20),
519 	GROUP(clk_24m_out,	4,	1),
520 	GROUP(spi_ss1,		8,	11),
521 	GROUP(spi_ss2,		8,	12),
522 	GROUP(spi_ss0_1,	9,	13),
523 	GROUP(spi_miso_1,	9,	12),
524 	GROUP(spi_mosi_1,	9,	11),
525 	GROUP(spi_sclk_1,	9,	10),
526 	GROUP(eth_txd3,		6,	13),
527 	GROUP(eth_txd2,		6,	12),
528 	GROUP(eth_tx_clk,	6,	11),
529 	GROUP(i2c_sda_b1,	5,	27),
530 	GROUP(i2c_sck_b1,	5,	26),
531 	GROUP(i2c_sda_c1,	5,	25),
532 	GROUP(i2c_sck_c1,	5,	24),
533 	GROUP(i2c_sda_d1,	4,	3),
534 	GROUP(i2c_sck_d1,	4,	2),
535 
536 	/* bank BOOT */
537 	GROUP(nand_io,		2,	26),
538 	GROUP(nand_io_ce0,	2,	25),
539 	GROUP(nand_io_ce1,	2,	24),
540 	GROUP(nand_io_rb0,	2,	17),
541 	GROUP(nand_ale,		2,	21),
542 	GROUP(nand_cle,		2,	20),
543 	GROUP(nand_wen_clk,	2,	19),
544 	GROUP(nand_ren_clk,	2,	18),
545 	GROUP(nand_dqs_0,	2,	27),
546 	GROUP(nand_dqs_1,	2,	28),
547 	GROUP(sdxc_d0_c,	4,	30),
548 	GROUP(sdxc_d13_c,	4,	29),
549 	GROUP(sdxc_d47_c,	4,	28),
550 	GROUP(sdxc_clk_c,	7,	19),
551 	GROUP(sdxc_cmd_c,	7,	18),
552 	GROUP(nor_d,		5,	1),
553 	GROUP(nor_q,		5,	3),
554 	GROUP(nor_c,		5,	2),
555 	GROUP(nor_cs,		5,	0),
556 	GROUP(sd_d0_c,		6,	29),
557 	GROUP(sd_d1_c,		6,	28),
558 	GROUP(sd_d2_c,		6,	27),
559 	GROUP(sd_d3_c,		6,	26),
560 	GROUP(sd_cmd_c,		6,	30),
561 	GROUP(sd_clk_c,		6,	31),
562 
563 	/* bank CARD */
564 	GROUP(sd_d1_b,		2,	14),
565 	GROUP(sd_d0_b,		2,	15),
566 	GROUP(sd_clk_b,		2,	11),
567 	GROUP(sd_cmd_b,		2,	10),
568 	GROUP(sd_d3_b,		2,	12),
569 	GROUP(sd_d2_b,		2,	13),
570 	GROUP(sdxc_d13_b,	2,	6),
571 	GROUP(sdxc_d0_b,	2,	7),
572 	GROUP(sdxc_clk_b,	2,	5),
573 	GROUP(sdxc_cmd_b,	2,	4),
574 
575 	/* bank AO */
576 	GROUP(uart_tx_ao_a,	0,	12),
577 	GROUP(uart_rx_ao_a,	0,	11),
578 	GROUP(uart_cts_ao_a,	0,	10),
579 	GROUP(uart_rts_ao_a,	0,	9),
580 	GROUP(i2c_mst_sck_ao,	0,	6),
581 	GROUP(i2c_mst_sda_ao,	0,	5),
582 	GROUP(clk_32k_in_out,	0,	18),
583 	GROUP(remote_input,	0,	0),
584 	GROUP(hdmi_cec_1,	0,	17),
585 	GROUP(ir_blaster,	0,	31),
586 	GROUP(pwm_c2,		0,	22),
587 	GROUP(i2c_sck_ao,	0,	2),
588 	GROUP(i2c_sda_ao,	0,	1),
589 	GROUP(ir_remote_out,	0,	21),
590 	GROUP(i2s_am_clk_out,	0,	30),
591 	GROUP(i2s_ao_clk_out,	0,	29),
592 	GROUP(i2s_lr_clk_out,	0,	28),
593 	GROUP(i2s_out_01,	0,	27),
594 	GROUP(uart_tx_ao_b0,	0,	26),
595 	GROUP(uart_rx_ao_b0,	0,	25),
596 	GROUP(uart_cts_ao_b,	0,	8),
597 	GROUP(uart_rts_ao_b,	0,	7),
598 	GROUP(uart_tx_ao_b1,	0,	24),
599 	GROUP(uart_rx_ao_b1,	0,	23),
600 	GROUP(spdif_out_1,	0,	16),
601 	GROUP(i2s_in_ch01,	0,	13),
602 	GROUP(i2s_ao_clk_in,	0,	15),
603 	GROUP(i2s_lr_clk_in,	0,	14),
604 
605 	/* bank DIF */
606 	GROUP(eth_rxd1,		6,	0),
607 	GROUP(eth_rxd0,		6,	1),
608 	GROUP(eth_rx_dv,	6,	2),
609 	GROUP(eth_rx_clk,	6,	3),
610 	GROUP(eth_txd0_1,	6,	4),
611 	GROUP(eth_txd1_1,	6,	5),
612 	GROUP(eth_tx_en,	6,	0),
613 	GROUP(eth_ref_clk,	6,	8),
614 	GROUP(eth_mdc,		6,	9),
615 	GROUP(eth_mdio_en,	6,	10),
616 };
617 
618 static const char * const gpio_groups[] = {
619 	"GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
620 	"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
621 	"GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
622 	"GPIOX_19", "GPIOX_20", "GPIOX_21",
623 
624 	"GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
625 	"GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
626 	"GPIOY_13", "GPIOY_14",
627 
628 	"GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
629 	"GPIODV_27", "GPIODV_28", "GPIODV_29",
630 
631 	"GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
632 	"GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
633 
634 	"CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
635 	"CARD_5", "CARD_6",
636 
637 	"BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
638 	"BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
639 	"BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
640 	"BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
641 
642 	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
643 	"GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
644 	"GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
645 	"GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N",
646 
647 	"DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
648 	"DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
649 	"DIF_4_P", "DIF_4_N"
650 };
651 
652 static const char * const sd_a_groups[] = {
653 	"sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
654 	"sd_cmd_a"
655 };
656 
657 static const char * const sdxc_a_groups[] = {
658 	"sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
659 	"sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
660 };
661 
662 static const char * const pcm_a_groups[] = {
663 	"pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
664 };
665 
666 static const char * const uart_a_groups[] = {
667 	"uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
668 };
669 
670 static const char * const uart_b_groups[] = {
671 	"uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
672 	"uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
673 };
674 
675 static const char * const iso7816_groups[] = {
676 	"iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
677 	"iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
678 };
679 
680 static const char * const i2c_d_groups[] = {
681 	"i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
682 };
683 
684 static const char * const xtal_groups[] = {
685 	"xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
686 };
687 
688 static const char * const uart_c_groups[] = {
689 	"uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
690 };
691 
692 static const char * const i2c_c_groups[] = {
693 	"i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
694 };
695 
696 static const char * const hdmi_groups[] = {
697 	"hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0",
698 	"hdmi_cec_1"
699 };
700 
701 static const char * const spi_groups[] = {
702 	"spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
703 	"spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
704 	"spi_miso_1", "spi_ss2"
705 };
706 
707 static const char * const ethernet_groups[] = {
708 	"eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
709 	"eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
710 	"eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
711 	"eth_txd2", "eth_txd3"
712 };
713 
714 static const char * const i2c_a_groups[] = {
715 	"i2c_sda_a", "i2c_sck_a",
716 };
717 
718 static const char * const i2c_b_groups[] = {
719 	"i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
720 };
721 
722 static const char * const sd_c_groups[] = {
723 	"sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
724 	"sd_cmd_c", "sd_clk_c"
725 };
726 
727 static const char * const sdxc_c_groups[] = {
728 	"sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
729 	"sdxc_clk_c"
730 };
731 
732 static const char * const nand_groups[] = {
733 	"nand_io", "nand_io_ce0", "nand_io_ce1",
734 	"nand_io_rb0", "nand_ale", "nand_cle",
735 	"nand_wen_clk", "nand_ren_clk", "nand_dqs0",
736 	"nand_dqs1"
737 };
738 
739 static const char * const nor_groups[] = {
740 	"nor_d", "nor_q", "nor_c", "nor_cs"
741 };
742 
743 static const char * const sd_b_groups[] = {
744 	"sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
745 	"sd_d3_b", "sd_d2_b"
746 };
747 
748 static const char * const sdxc_b_groups[] = {
749 	"sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
750 };
751 
752 static const char * const uart_ao_groups[] = {
753 	"uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
754 };
755 
756 static const char * const remote_groups[] = {
757 	"remote_input", "ir_blaster", "ir_remote_out"
758 };
759 
760 static const char * const i2c_slave_ao_groups[] = {
761 	"i2c_sck_ao", "i2c_sda_ao"
762 };
763 
764 static const char * const uart_ao_b_groups[] = {
765 	"uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
766 	"uart_cts_ao_b", "uart_rts_ao_b"
767 };
768 
769 static const char * const i2c_mst_ao_groups[] = {
770 	"i2c_mst_sck_ao", "i2c_mst_sda_ao"
771 };
772 
773 static const char * const clk_groups[] = {
774 	"clk_24m_out", "clk_32k_in_out"
775 };
776 
777 static const char * const spdif_groups[] = {
778 	"spdif_out_1", "spdif_out_0"
779 };
780 
781 static const char * const i2s_groups[] = {
782 	"i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
783 	"i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
784 	"i2s_lr_clk_in"
785 };
786 
787 static const char * const pwm_b_groups[] = {
788 	"pwm_b"
789 };
790 
791 static const char * const pwm_c_groups[] = {
792 	"pwm_c0", "pwm_c1", "pwm_c2"
793 };
794 
795 static const char * const pwm_d_groups[] = {
796 	"pwm_d"
797 };
798 
799 static const char * const pwm_e_groups[] = {
800 	"pwm_e"
801 };
802 
803 static const char * const pwm_vs_groups[] = {
804 	"pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
805 	"pwm_vs_3", "pwm_vs_4"
806 };
807 
808 static const char * const tsin_a_groups[] = {
809 	"tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
810 	"tsin_d_valid_a"
811 };
812 
813 static const char * const tsin_b_groups[] = {
814 	"tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
815 };
816 
817 static struct meson_pmx_func meson8b_functions[] = {
818 	FUNCTION(gpio),
819 	FUNCTION(sd_a),
820 	FUNCTION(sdxc_a),
821 	FUNCTION(pcm_a),
822 	FUNCTION(uart_a),
823 	FUNCTION(uart_b),
824 	FUNCTION(iso7816),
825 	FUNCTION(i2c_d),
826 	FUNCTION(xtal),
827 	FUNCTION(uart_c),
828 	FUNCTION(i2c_c),
829 	FUNCTION(hdmi),
830 	FUNCTION(spi),
831 	FUNCTION(ethernet),
832 	FUNCTION(i2c_a),
833 	FUNCTION(i2c_b),
834 	FUNCTION(sd_c),
835 	FUNCTION(sdxc_c),
836 	FUNCTION(nand),
837 	FUNCTION(nor),
838 	FUNCTION(sd_b),
839 	FUNCTION(sdxc_b),
840 	FUNCTION(uart_ao),
841 	FUNCTION(remote),
842 	FUNCTION(i2c_slave_ao),
843 	FUNCTION(uart_ao_b),
844 	FUNCTION(i2c_mst_ao),
845 	FUNCTION(clk),
846 	FUNCTION(spdif),
847 	FUNCTION(i2s),
848 	FUNCTION(pwm_b),
849 	FUNCTION(pwm_c),
850 	FUNCTION(pwm_d),
851 	FUNCTION(pwm_e),
852 	FUNCTION(pwm_vs),
853 	FUNCTION(tsin_a),
854 	FUNCTION(tsin_b),
855 };
856 
857 static struct meson_bank meson8b_banks[] = {
858 	/*   name    first                      last                   pullen  pull    dir     out     in  */
859 	BANK("X",    PIN(GPIOX_0, 0),		PIN(GPIOX_21, 0),      4,  0,  4,  0,  0,  0,  1,  0,  2,  0),
860 	BANK("Y",    PIN(GPIOY_0, 0),		PIN(GPIOY_14, 0),      3,  0,  3,  0,  3,  0,  4,  0,  5,  0),
861 	BANK("DV",   PIN(GPIODV_9, 0),		PIN(GPIODV_29, 0),     0,  0,  0,  0,  7,  0,  8,  0,  9,  0),
862 	BANK("H",    PIN(GPIOH_0, 0),		PIN(GPIOH_9, 0),       1, 16,  1, 16,  9, 19, 10, 19, 11, 19),
863 	BANK("CARD", PIN(CARD_0, 0),		PIN(CARD_6, 0),        2, 20,  2, 20,  0, 22,  1, 22,  2, 22),
864 	BANK("BOOT", PIN(BOOT_0, 0),		PIN(BOOT_18, 0),       2,  0,  2,  0,  9,  0, 10,  0, 11,  0),
865 	BANK("DIF",  PIN(DIF_0_P, 0),		PIN(DIF_4_N, 0),       5,  8,  5,  8, 12, 12, 13, 12, 14, 12),
866 };
867 
868 static struct meson_bank meson8b_ao_banks[] = {
869 	/*   name    first                  last                      pullen  pull    dir     out     in  */
870 	BANK("AO",   PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0,  0,  0, 16,  0,  0,  0, 16,  1,  0),
871 };
872 
873 static struct meson_domain_data meson8b_domain_data[] = {
874 	{
875 		.name		= "banks",
876 		.banks		= meson8b_banks,
877 		.num_banks	= ARRAY_SIZE(meson8b_banks),
878 		.pin_base	= 0,
879 		.num_pins	= 130,
880 	},
881 	{
882 		.name		= "ao-bank",
883 		.banks		= meson8b_ao_banks,
884 		.num_banks	= ARRAY_SIZE(meson8b_ao_banks),
885 		.pin_base	= 130,
886 		.num_pins	= 16,
887 	},
888 };
889 
890 struct meson_pinctrl_data meson8b_pinctrl_data = {
891 	.pins		= meson8b_pins,
892 	.groups		= meson8b_groups,
893 	.funcs		= meson8b_functions,
894 	.domain_data	= meson8b_domain_data,
895 	.num_pins	= ARRAY_SIZE(meson8b_pins),
896 	.num_groups	= ARRAY_SIZE(meson8b_groups),
897 	.num_funcs	= ARRAY_SIZE(meson8b_functions),
898 	.num_domains	= ARRAY_SIZE(meson8b_domain_data),
899 };
900