1 /* 2 * Pin controller and GPIO driver for Amlogic Meson8b. 3 * 4 * Copyright (C) 2015 Endless Mobile, Inc. 5 * Author: Carlo Caione <carlo@endlessm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program. If not, see <http://www.gnu.org/licenses/>. 13 */ 14 15 #include <dt-bindings/gpio/meson8b-gpio.h> 16 #include "pinctrl-meson.h" 17 18 #define AO_OFF 130 19 20 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = { 21 MESON_PIN(GPIOX_0, 0), 22 MESON_PIN(GPIOX_1, 0), 23 MESON_PIN(GPIOX_2, 0), 24 MESON_PIN(GPIOX_3, 0), 25 MESON_PIN(GPIOX_4, 0), 26 MESON_PIN(GPIOX_5, 0), 27 MESON_PIN(GPIOX_6, 0), 28 MESON_PIN(GPIOX_7, 0), 29 MESON_PIN(GPIOX_8, 0), 30 MESON_PIN(GPIOX_9, 0), 31 MESON_PIN(GPIOX_10, 0), 32 MESON_PIN(GPIOX_11, 0), 33 MESON_PIN(GPIOX_16, 0), 34 MESON_PIN(GPIOX_17, 0), 35 MESON_PIN(GPIOX_18, 0), 36 MESON_PIN(GPIOX_19, 0), 37 MESON_PIN(GPIOX_20, 0), 38 MESON_PIN(GPIOX_21, 0), 39 40 MESON_PIN(GPIOY_0, 0), 41 MESON_PIN(GPIOY_1, 0), 42 MESON_PIN(GPIOY_3, 0), 43 MESON_PIN(GPIOY_6, 0), 44 MESON_PIN(GPIOY_7, 0), 45 MESON_PIN(GPIOY_8, 0), 46 MESON_PIN(GPIOY_9, 0), 47 MESON_PIN(GPIOY_10, 0), 48 MESON_PIN(GPIOY_11, 0), 49 MESON_PIN(GPIOY_12, 0), 50 MESON_PIN(GPIOY_13, 0), 51 MESON_PIN(GPIOY_14, 0), 52 53 MESON_PIN(GPIODV_9, 0), 54 MESON_PIN(GPIODV_24, 0), 55 MESON_PIN(GPIODV_25, 0), 56 MESON_PIN(GPIODV_26, 0), 57 MESON_PIN(GPIODV_27, 0), 58 MESON_PIN(GPIODV_28, 0), 59 MESON_PIN(GPIODV_29, 0), 60 61 MESON_PIN(GPIOH_0, 0), 62 MESON_PIN(GPIOH_1, 0), 63 MESON_PIN(GPIOH_2, 0), 64 MESON_PIN(GPIOH_3, 0), 65 MESON_PIN(GPIOH_4, 0), 66 MESON_PIN(GPIOH_5, 0), 67 MESON_PIN(GPIOH_6, 0), 68 MESON_PIN(GPIOH_7, 0), 69 MESON_PIN(GPIOH_8, 0), 70 MESON_PIN(GPIOH_9, 0), 71 72 MESON_PIN(CARD_0, 0), 73 MESON_PIN(CARD_1, 0), 74 MESON_PIN(CARD_2, 0), 75 MESON_PIN(CARD_3, 0), 76 MESON_PIN(CARD_4, 0), 77 MESON_PIN(CARD_5, 0), 78 MESON_PIN(CARD_6, 0), 79 80 MESON_PIN(BOOT_0, 0), 81 MESON_PIN(BOOT_1, 0), 82 MESON_PIN(BOOT_2, 0), 83 MESON_PIN(BOOT_3, 0), 84 MESON_PIN(BOOT_4, 0), 85 MESON_PIN(BOOT_5, 0), 86 MESON_PIN(BOOT_6, 0), 87 MESON_PIN(BOOT_7, 0), 88 MESON_PIN(BOOT_8, 0), 89 MESON_PIN(BOOT_9, 0), 90 MESON_PIN(BOOT_10, 0), 91 MESON_PIN(BOOT_11, 0), 92 MESON_PIN(BOOT_12, 0), 93 MESON_PIN(BOOT_13, 0), 94 MESON_PIN(BOOT_14, 0), 95 MESON_PIN(BOOT_15, 0), 96 MESON_PIN(BOOT_16, 0), 97 MESON_PIN(BOOT_17, 0), 98 MESON_PIN(BOOT_18, 0), 99 100 MESON_PIN(DIF_0_P, 0), 101 MESON_PIN(DIF_0_N, 0), 102 MESON_PIN(DIF_1_P, 0), 103 MESON_PIN(DIF_1_N, 0), 104 MESON_PIN(DIF_2_P, 0), 105 MESON_PIN(DIF_2_N, 0), 106 MESON_PIN(DIF_3_P, 0), 107 MESON_PIN(DIF_3_N, 0), 108 MESON_PIN(DIF_4_P, 0), 109 MESON_PIN(DIF_4_N, 0), 110 }; 111 112 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = { 113 MESON_PIN(GPIOAO_0, AO_OFF), 114 MESON_PIN(GPIOAO_1, AO_OFF), 115 MESON_PIN(GPIOAO_2, AO_OFF), 116 MESON_PIN(GPIOAO_3, AO_OFF), 117 MESON_PIN(GPIOAO_4, AO_OFF), 118 MESON_PIN(GPIOAO_5, AO_OFF), 119 MESON_PIN(GPIOAO_6, AO_OFF), 120 MESON_PIN(GPIOAO_7, AO_OFF), 121 MESON_PIN(GPIOAO_8, AO_OFF), 122 MESON_PIN(GPIOAO_9, AO_OFF), 123 MESON_PIN(GPIOAO_10, AO_OFF), 124 MESON_PIN(GPIOAO_11, AO_OFF), 125 MESON_PIN(GPIOAO_12, AO_OFF), 126 MESON_PIN(GPIOAO_13, AO_OFF), 127 128 /* 129 * The following 2 pins are not mentionned in the public datasheet 130 * According to this datasheet, they can't be used with the gpio 131 * interrupt controller 132 */ 133 MESON_PIN(GPIO_BSD_EN, AO_OFF), 134 MESON_PIN(GPIO_TEST_N, AO_OFF), 135 }; 136 137 /* bank X */ 138 static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) }; 139 static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) }; 140 static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) }; 141 static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) }; 142 static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, 0) }; 143 static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0), 144 PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) }; 145 static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0), 146 PIN(GPIOX_7, 0) }; 147 static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) }; 148 static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; 149 static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) }; 150 static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) }; 151 static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) }; 152 static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) }; 153 static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) }; 154 static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) }; 155 156 static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, 0) }; 157 static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0), 158 PIN(GPIOX_3, 0) }; 159 static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) }; 160 static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) }; 161 static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) }; 162 static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) }; 163 static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) }; 164 static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; 165 static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, 0) }; 166 static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) }; 167 static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, 0) }; 168 169 static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, 0) }; 170 static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, 0) }; 171 static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, 0) }; 172 static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, 0) }; 173 static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, 0) }; 174 static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, 0) }; 175 static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, 0) }; 176 static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, 0) }; 177 178 static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, 0) }; 179 static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, 0) }; 180 static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, 0) }; 181 static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, 0) }; 182 static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, 0) }; 183 static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) }; 184 static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) }; 185 static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, 0) }; 186 static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, 0) }; 187 static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, 0) }; 188 189 static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, 0) }; 190 static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, 0) }; 191 static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, 0) }; 192 static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, 0) }; 193 static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) }; 194 static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) }; 195 static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) }; 196 197 /* bank Y */ 198 static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) }; 199 static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, 0) }; 200 static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0), 201 PIN(GPIOY_10, 0), PIN(GPIOY_11, 0), 202 PIN(GPIOY_12, 0), PIN(GPIOY_13, 0), 203 PIN(GPIOY_14, 0) }; 204 static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, 0) }; 205 static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, 0) }; 206 207 static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, 0) }; 208 209 static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, 0) }; 210 static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, 0) }; 211 static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) }; 212 213 /* bank DV */ 214 static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) }; 215 static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, 0) }; 216 217 static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, 0) }; 218 static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, 0) }; 219 static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, 0) }; 220 221 static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, 0) }; 222 223 static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, 0) }; 224 static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, 0) }; 225 static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, 0) }; 226 static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, 0) }; 227 228 static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, 0) }; 229 230 static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, 0) }; 231 static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, 0) }; 232 static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, 0) }; 233 static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, 0) }; 234 static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, 0) }; 235 static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, 0) }; 236 237 /* bank H */ 238 static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) }; 239 static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) }; 240 static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) }; 241 static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, 0) }; 242 static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, 0) }; 243 static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, 0) }; 244 static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, 0) }; 245 246 static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, 0) }; 247 static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, 0) }; 248 static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, 0) }; 249 static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, 0) }; 250 static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, 0) }; 251 static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, 0) }; 252 253 static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, 0) }; 254 static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, 0) }; 255 static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, 0) }; 256 257 static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, 0) }; 258 static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, 0) }; 259 static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, 0) }; 260 static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, 0) }; 261 static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) }; 262 static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) }; 263 264 /* bank BOOT */ 265 static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0), 266 PIN(BOOT_2, 0), PIN(BOOT_3, 0), 267 PIN(BOOT_4, 0), PIN(BOOT_5, 0), 268 PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; 269 static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) }; 270 static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) }; 271 static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) }; 272 static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) }; 273 static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) }; 274 static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) }; 275 static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) }; 276 static const unsigned int nand_dqs_15_pins[] = { PIN(BOOT_15, 0) }; 277 static const unsigned int nand_dqs_18_pins[] = { PIN(BOOT_18, 0) }; 278 279 static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)}; 280 static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0), 281 PIN(BOOT_3, 0) }; 282 static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0), 283 PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; 284 static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, 0) }; 285 static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, 0) }; 286 static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) }; 287 static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) }; 288 static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) }; 289 static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) }; 290 291 static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) }; 292 static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) }; 293 static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) }; 294 static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) }; 295 static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, 0) }; 296 static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, 0) }; 297 298 /* bank CARD */ 299 static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) }; 300 static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) }; 301 static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) }; 302 static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) }; 303 static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) }; 304 static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) }; 305 306 static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0), 307 PIN(CARD_5, 0) }; 308 static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) }; 309 static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) }; 310 static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) }; 311 312 /* bank AO */ 313 static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) }; 314 static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) }; 315 static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) }; 316 static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) }; 317 static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; 318 static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; 319 static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, AO_OFF) }; 320 static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) }; 321 static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, AO_OFF) }; 322 static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, AO_OFF) }; 323 324 static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, AO_OFF) }; 325 static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; 326 static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; 327 static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, AO_OFF) }; 328 static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, AO_OFF) }; 329 static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, AO_OFF) }; 330 static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, AO_OFF) }; 331 static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, AO_OFF) }; 332 333 static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) }; 334 static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) }; 335 static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, AO_OFF) }; 336 static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, AO_OFF) }; 337 static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) }; 338 static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) }; 339 static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, AO_OFF) }; 340 341 static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, AO_OFF) }; 342 static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, AO_OFF) }; 343 static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, AO_OFF) }; 344 345 /* bank DIF */ 346 static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, 0) }; 347 static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, 0) }; 348 static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, 0) }; 349 static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, 0) }; 350 static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, 0) }; 351 static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, 0) }; 352 static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, 0) }; 353 static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) }; 354 static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) }; 355 static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) }; 356 357 static struct meson_pmx_group meson8b_cbus_groups[] = { 358 GPIO_GROUP(GPIOX_0, 0), 359 GPIO_GROUP(GPIOX_1, 0), 360 GPIO_GROUP(GPIOX_2, 0), 361 GPIO_GROUP(GPIOX_3, 0), 362 GPIO_GROUP(GPIOX_4, 0), 363 GPIO_GROUP(GPIOX_5, 0), 364 GPIO_GROUP(GPIOX_6, 0), 365 GPIO_GROUP(GPIOX_7, 0), 366 GPIO_GROUP(GPIOX_8, 0), 367 GPIO_GROUP(GPIOX_9, 0), 368 GPIO_GROUP(GPIOX_10, 0), 369 GPIO_GROUP(GPIOX_11, 0), 370 GPIO_GROUP(GPIOX_16, 0), 371 GPIO_GROUP(GPIOX_17, 0), 372 GPIO_GROUP(GPIOX_18, 0), 373 GPIO_GROUP(GPIOX_19, 0), 374 GPIO_GROUP(GPIOX_20, 0), 375 GPIO_GROUP(GPIOX_21, 0), 376 377 GPIO_GROUP(GPIOY_0, 0), 378 GPIO_GROUP(GPIOY_1, 0), 379 GPIO_GROUP(GPIOY_3, 0), 380 GPIO_GROUP(GPIOY_6, 0), 381 GPIO_GROUP(GPIOY_7, 0), 382 GPIO_GROUP(GPIOY_8, 0), 383 GPIO_GROUP(GPIOY_9, 0), 384 GPIO_GROUP(GPIOY_10, 0), 385 GPIO_GROUP(GPIOY_11, 0), 386 GPIO_GROUP(GPIOY_12, 0), 387 GPIO_GROUP(GPIOY_13, 0), 388 GPIO_GROUP(GPIOY_14, 0), 389 390 GPIO_GROUP(GPIODV_9, 0), 391 GPIO_GROUP(GPIODV_24, 0), 392 GPIO_GROUP(GPIODV_25, 0), 393 GPIO_GROUP(GPIODV_26, 0), 394 GPIO_GROUP(GPIODV_27, 0), 395 GPIO_GROUP(GPIODV_28, 0), 396 GPIO_GROUP(GPIODV_29, 0), 397 398 GPIO_GROUP(GPIOH_0, 0), 399 GPIO_GROUP(GPIOH_1, 0), 400 GPIO_GROUP(GPIOH_2, 0), 401 GPIO_GROUP(GPIOH_3, 0), 402 GPIO_GROUP(GPIOH_4, 0), 403 GPIO_GROUP(GPIOH_5, 0), 404 GPIO_GROUP(GPIOH_6, 0), 405 GPIO_GROUP(GPIOH_7, 0), 406 GPIO_GROUP(GPIOH_8, 0), 407 GPIO_GROUP(GPIOH_9, 0), 408 409 GPIO_GROUP(DIF_0_P, 0), 410 GPIO_GROUP(DIF_0_N, 0), 411 GPIO_GROUP(DIF_1_P, 0), 412 GPIO_GROUP(DIF_1_N, 0), 413 GPIO_GROUP(DIF_2_P, 0), 414 GPIO_GROUP(DIF_2_N, 0), 415 GPIO_GROUP(DIF_3_P, 0), 416 GPIO_GROUP(DIF_3_N, 0), 417 GPIO_GROUP(DIF_4_P, 0), 418 GPIO_GROUP(DIF_4_N, 0), 419 420 /* bank X */ 421 GROUP(sd_d0_a, 8, 5), 422 GROUP(sd_d1_a, 8, 4), 423 GROUP(sd_d2_a, 8, 3), 424 GROUP(sd_d3_a, 8, 2), 425 GROUP(sdxc_d0_0_a, 5, 29), 426 GROUP(sdxc_d47_a, 5, 12), 427 GROUP(sdxc_d13_0_a, 5, 28), 428 GROUP(sd_clk_a, 8, 1), 429 GROUP(sd_cmd_a, 8, 0), 430 GROUP(xtal_32k_out, 3, 22), 431 GROUP(xtal_24m_out, 3, 20), 432 GROUP(uart_tx_b0, 4, 9), 433 GROUP(uart_rx_b0, 4, 8), 434 GROUP(uart_cts_b0, 4, 7), 435 GROUP(uart_rts_b0, 4, 6), 436 GROUP(sdxc_d0_1_a, 5, 14), 437 GROUP(sdxc_d13_1_a, 5, 13), 438 GROUP(pcm_out_a, 3, 30), 439 GROUP(pcm_in_a, 3, 29), 440 GROUP(pcm_fs_a, 3, 28), 441 GROUP(pcm_clk_a, 3, 27), 442 GROUP(sdxc_clk_a, 5, 11), 443 GROUP(sdxc_cmd_a, 5, 10), 444 GROUP(pwm_vs_0, 7, 31), 445 GROUP(pwm_e, 9, 19), 446 GROUP(pwm_vs_1, 7, 30), 447 GROUP(uart_tx_a, 4, 17), 448 GROUP(uart_rx_a, 4, 16), 449 GROUP(uart_cts_a, 4, 15), 450 GROUP(uart_rts_a, 4, 14), 451 GROUP(uart_tx_b1, 6, 19), 452 GROUP(uart_rx_b1, 6, 18), 453 GROUP(uart_cts_b1, 6, 17), 454 GROUP(uart_rts_b1, 6, 16), 455 GROUP(iso7816_0_clk, 5, 9), 456 GROUP(iso7816_0_data, 5, 8), 457 GROUP(spi_sclk_0, 4, 22), 458 GROUP(spi_miso_0, 4, 24), 459 GROUP(spi_mosi_0, 4, 23), 460 GROUP(iso7816_det, 4, 21), 461 GROUP(iso7816_reset, 4, 20), 462 GROUP(iso7816_1_clk, 4, 19), 463 GROUP(iso7816_1_data, 4, 18), 464 GROUP(spi_ss0_0, 4, 25), 465 GROUP(tsin_clk_b, 3, 6), 466 GROUP(tsin_sop_b, 3, 7), 467 GROUP(tsin_d0_b, 3, 8), 468 GROUP(pwm_b, 2, 3), 469 GROUP(i2c_sda_d0, 4, 5), 470 GROUP(i2c_sck_d0, 4, 4), 471 GROUP(tsin_d_valid_b, 3, 9), 472 473 /* bank Y */ 474 GROUP(tsin_d_valid_a, 3, 2), 475 GROUP(tsin_sop_a, 3, 1), 476 GROUP(tsin_d17_a, 3, 5), 477 GROUP(tsin_clk_a, 3, 0), 478 GROUP(tsin_d0_a, 3, 4), 479 GROUP(spdif_out_0, 1, 7), 480 GROUP(xtal_24m, 3, 18), 481 GROUP(iso7816_2_clk, 5, 7), 482 GROUP(iso7816_2_data, 5, 6), 483 484 /* bank DV */ 485 GROUP(pwm_d, 3, 26), 486 GROUP(pwm_c0, 3, 25), 487 GROUP(pwm_vs_2, 7, 28), 488 GROUP(pwm_vs_3, 7, 27), 489 GROUP(pwm_vs_4, 7, 26), 490 GROUP(xtal24_out, 7, 25), 491 GROUP(uart_tx_c, 6, 23), 492 GROUP(uart_rx_c, 6, 22), 493 GROUP(uart_cts_c, 6, 21), 494 GROUP(uart_rts_c, 6, 20), 495 GROUP(pwm_c1, 3, 24), 496 GROUP(i2c_sda_a, 9, 31), 497 GROUP(i2c_sck_a, 9, 30), 498 GROUP(i2c_sda_b0, 9, 29), 499 GROUP(i2c_sck_b0, 9, 28), 500 GROUP(i2c_sda_c0, 9, 27), 501 GROUP(i2c_sck_c0, 9, 26), 502 503 /* bank H */ 504 GROUP(hdmi_hpd, 1, 26), 505 GROUP(hdmi_sda, 1, 25), 506 GROUP(hdmi_scl, 1, 24), 507 GROUP(hdmi_cec_0, 1, 23), 508 GROUP(eth_txd1_0, 7, 21), 509 GROUP(eth_txd0_0, 7, 20), 510 GROUP(clk_24m_out, 4, 1), 511 GROUP(spi_ss1, 8, 11), 512 GROUP(spi_ss2, 8, 12), 513 GROUP(spi_ss0_1, 9, 13), 514 GROUP(spi_miso_1, 9, 12), 515 GROUP(spi_mosi_1, 9, 11), 516 GROUP(spi_sclk_1, 9, 10), 517 GROUP(eth_txd3, 6, 13), 518 GROUP(eth_txd2, 6, 12), 519 GROUP(eth_tx_clk, 6, 11), 520 GROUP(i2c_sda_b1, 5, 27), 521 GROUP(i2c_sck_b1, 5, 26), 522 GROUP(i2c_sda_c1, 5, 25), 523 GROUP(i2c_sck_c1, 5, 24), 524 GROUP(i2c_sda_d1, 4, 3), 525 GROUP(i2c_sck_d1, 4, 2), 526 527 /* bank BOOT */ 528 GROUP(nand_io, 2, 26), 529 GROUP(nand_io_ce0, 2, 25), 530 GROUP(nand_io_ce1, 2, 24), 531 GROUP(nand_io_rb0, 2, 17), 532 GROUP(nand_ale, 2, 21), 533 GROUP(nand_cle, 2, 20), 534 GROUP(nand_wen_clk, 2, 19), 535 GROUP(nand_ren_clk, 2, 18), 536 GROUP(nand_dqs_15, 2, 27), 537 GROUP(nand_dqs_18, 2, 28), 538 GROUP(sdxc_d0_c, 4, 30), 539 GROUP(sdxc_d13_c, 4, 29), 540 GROUP(sdxc_d47_c, 4, 28), 541 GROUP(sdxc_clk_c, 7, 19), 542 GROUP(sdxc_cmd_c, 7, 18), 543 GROUP(nor_d, 5, 1), 544 GROUP(nor_q, 5, 3), 545 GROUP(nor_c, 5, 2), 546 GROUP(nor_cs, 5, 0), 547 GROUP(sd_d0_c, 6, 29), 548 GROUP(sd_d1_c, 6, 28), 549 GROUP(sd_d2_c, 6, 27), 550 GROUP(sd_d3_c, 6, 26), 551 GROUP(sd_cmd_c, 6, 30), 552 GROUP(sd_clk_c, 6, 31), 553 554 /* bank CARD */ 555 GROUP(sd_d1_b, 2, 14), 556 GROUP(sd_d0_b, 2, 15), 557 GROUP(sd_clk_b, 2, 11), 558 GROUP(sd_cmd_b, 2, 10), 559 GROUP(sd_d3_b, 2, 12), 560 GROUP(sd_d2_b, 2, 13), 561 GROUP(sdxc_d13_b, 2, 6), 562 GROUP(sdxc_d0_b, 2, 7), 563 GROUP(sdxc_clk_b, 2, 5), 564 GROUP(sdxc_cmd_b, 2, 4), 565 566 /* bank DIF */ 567 GROUP(eth_rxd1, 6, 0), 568 GROUP(eth_rxd0, 6, 1), 569 GROUP(eth_rx_dv, 6, 2), 570 GROUP(eth_rx_clk, 6, 3), 571 GROUP(eth_txd0_1, 6, 4), 572 GROUP(eth_txd1_1, 6, 5), 573 GROUP(eth_tx_en, 6, 6), 574 GROUP(eth_ref_clk, 6, 8), 575 GROUP(eth_mdc, 6, 9), 576 GROUP(eth_mdio_en, 6, 10), 577 }; 578 579 static struct meson_pmx_group meson8b_aobus_groups[] = { 580 GPIO_GROUP(GPIOAO_0, AO_OFF), 581 GPIO_GROUP(GPIOAO_1, AO_OFF), 582 GPIO_GROUP(GPIOAO_2, AO_OFF), 583 GPIO_GROUP(GPIOAO_3, AO_OFF), 584 GPIO_GROUP(GPIOAO_4, AO_OFF), 585 GPIO_GROUP(GPIOAO_5, AO_OFF), 586 GPIO_GROUP(GPIOAO_6, AO_OFF), 587 GPIO_GROUP(GPIOAO_7, AO_OFF), 588 GPIO_GROUP(GPIOAO_8, AO_OFF), 589 GPIO_GROUP(GPIOAO_9, AO_OFF), 590 GPIO_GROUP(GPIOAO_10, AO_OFF), 591 GPIO_GROUP(GPIOAO_11, AO_OFF), 592 GPIO_GROUP(GPIOAO_12, AO_OFF), 593 GPIO_GROUP(GPIOAO_13, AO_OFF), 594 GPIO_GROUP(GPIO_BSD_EN, AO_OFF), 595 GPIO_GROUP(GPIO_TEST_N, AO_OFF), 596 597 /* bank AO */ 598 GROUP(uart_tx_ao_a, 0, 12), 599 GROUP(uart_rx_ao_a, 0, 11), 600 GROUP(uart_cts_ao_a, 0, 10), 601 GROUP(uart_rts_ao_a, 0, 9), 602 GROUP(i2c_mst_sck_ao, 0, 6), 603 GROUP(i2c_mst_sda_ao, 0, 5), 604 GROUP(clk_32k_in_out, 0, 18), 605 GROUP(remote_input, 0, 0), 606 GROUP(hdmi_cec_1, 0, 17), 607 GROUP(ir_blaster, 0, 31), 608 GROUP(pwm_c2, 0, 22), 609 GROUP(i2c_sck_ao, 0, 2), 610 GROUP(i2c_sda_ao, 0, 1), 611 GROUP(ir_remote_out, 0, 21), 612 GROUP(i2s_am_clk_out, 0, 30), 613 GROUP(i2s_ao_clk_out, 0, 29), 614 GROUP(i2s_lr_clk_out, 0, 28), 615 GROUP(i2s_out_01, 0, 27), 616 GROUP(uart_tx_ao_b0, 0, 26), 617 GROUP(uart_rx_ao_b0, 0, 25), 618 GROUP(uart_cts_ao_b, 0, 8), 619 GROUP(uart_rts_ao_b, 0, 7), 620 GROUP(uart_tx_ao_b1, 0, 24), 621 GROUP(uart_rx_ao_b1, 0, 23), 622 GROUP(spdif_out_1, 0, 16), 623 GROUP(i2s_in_ch01, 0, 13), 624 GROUP(i2s_ao_clk_in, 0, 15), 625 GROUP(i2s_lr_clk_in, 0, 14), 626 }; 627 628 static const char * const gpio_groups[] = { 629 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", 630 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", 631 "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18", 632 "GPIOX_19", "GPIOX_20", "GPIOX_21", 633 634 "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7", 635 "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12", 636 "GPIOY_13", "GPIOY_14", 637 638 "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26", 639 "GPIODV_27", "GPIODV_28", "GPIODV_29", 640 641 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", 642 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", 643 644 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", 645 "CARD_5", "CARD_6", 646 647 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", 648 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", 649 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", 650 "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18", 651 652 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", 653 "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", 654 "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11", 655 "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N", 656 657 "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N", 658 "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N", 659 "DIF_4_P", "DIF_4_N" 660 }; 661 662 static const char * const sd_a_groups[] = { 663 "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", 664 "sd_cmd_a" 665 }; 666 667 static const char * const sdxc_a_groups[] = { 668 "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a", 669 "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a" 670 }; 671 672 static const char * const pcm_a_groups[] = { 673 "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a" 674 }; 675 676 static const char * const uart_a_groups[] = { 677 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a" 678 }; 679 680 static const char * const uart_b_groups[] = { 681 "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0", 682 "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1" 683 }; 684 685 static const char * const iso7816_groups[] = { 686 "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data", 687 "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data" 688 }; 689 690 static const char * const i2c_d_groups[] = { 691 "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1" 692 }; 693 694 static const char * const xtal_groups[] = { 695 "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out" 696 }; 697 698 static const char * const uart_c_groups[] = { 699 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c" 700 }; 701 702 static const char * const i2c_c_groups[] = { 703 "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1" 704 }; 705 706 static const char * const hdmi_groups[] = { 707 "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0" 708 }; 709 710 static const char * const hdmi_cec_groups[] = { 711 "hdmi_cec_1" 712 }; 713 714 static const char * const spi_groups[] = { 715 "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0", 716 "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1", 717 "spi_miso_1", "spi_ss2" 718 }; 719 720 static const char * const ethernet_groups[] = { 721 "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1", 722 "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv", 723 "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk", 724 "eth_txd2", "eth_txd3" 725 }; 726 727 static const char * const i2c_a_groups[] = { 728 "i2c_sda_a", "i2c_sck_a", 729 }; 730 731 static const char * const i2c_b_groups[] = { 732 "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1" 733 }; 734 735 static const char * const sd_c_groups[] = { 736 "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c", 737 "sd_cmd_c", "sd_clk_c" 738 }; 739 740 static const char * const sdxc_c_groups[] = { 741 "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c", 742 "sdxc_clk_c" 743 }; 744 745 static const char * const nand_groups[] = { 746 "nand_io", "nand_io_ce0", "nand_io_ce1", 747 "nand_io_rb0", "nand_ale", "nand_cle", 748 "nand_wen_clk", "nand_ren_clk", "nand_dqs_15", 749 "nand_dqs_18" 750 }; 751 752 static const char * const nor_groups[] = { 753 "nor_d", "nor_q", "nor_c", "nor_cs" 754 }; 755 756 static const char * const sd_b_groups[] = { 757 "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b", 758 "sd_d3_b", "sd_d2_b" 759 }; 760 761 static const char * const sdxc_b_groups[] = { 762 "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b" 763 }; 764 765 static const char * const uart_ao_groups[] = { 766 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a" 767 }; 768 769 static const char * const remote_groups[] = { 770 "remote_input", "ir_blaster", "ir_remote_out" 771 }; 772 773 static const char * const i2c_slave_ao_groups[] = { 774 "i2c_sck_ao", "i2c_sda_ao" 775 }; 776 777 static const char * const uart_ao_b_groups[] = { 778 "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1", 779 "uart_cts_ao_b", "uart_rts_ao_b" 780 }; 781 782 static const char * const i2c_mst_ao_groups[] = { 783 "i2c_mst_sck_ao", "i2c_mst_sda_ao" 784 }; 785 786 static const char * const clk_24m_groups[] = { 787 "clk_24m_out" 788 }; 789 790 static const char * const clk_32k_groups[] = { 791 "clk_32k_in_out" 792 }; 793 794 static const char * const spdif_0_groups[] = { 795 "spdif_out_0" 796 }; 797 798 static const char * const spdif_1_groups[] = { 799 "spdif_out_1" 800 }; 801 802 static const char * const i2s_groups[] = { 803 "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out", 804 "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in", 805 "i2s_lr_clk_in" 806 }; 807 808 static const char * const pwm_b_groups[] = { 809 "pwm_b" 810 }; 811 812 static const char * const pwm_c_groups[] = { 813 "pwm_c0", "pwm_c1" 814 }; 815 816 static const char * const pwm_c_ao_groups[] = { 817 "pwm_c2" 818 }; 819 820 static const char * const pwm_d_groups[] = { 821 "pwm_d" 822 }; 823 824 static const char * const pwm_e_groups[] = { 825 "pwm_e" 826 }; 827 828 static const char * const pwm_vs_groups[] = { 829 "pwm_vs_0", "pwm_vs_1", "pwm_vs_2", 830 "pwm_vs_3", "pwm_vs_4" 831 }; 832 833 static const char * const tsin_a_groups[] = { 834 "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a", 835 "tsin_d_valid_a" 836 }; 837 838 static const char * const tsin_b_groups[] = { 839 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b" 840 }; 841 842 static struct meson_pmx_func meson8b_cbus_functions[] = { 843 FUNCTION(gpio), 844 FUNCTION(sd_a), 845 FUNCTION(sdxc_a), 846 FUNCTION(pcm_a), 847 FUNCTION(uart_a), 848 FUNCTION(uart_b), 849 FUNCTION(iso7816), 850 FUNCTION(i2c_d), 851 FUNCTION(xtal), 852 FUNCTION(uart_c), 853 FUNCTION(i2c_c), 854 FUNCTION(hdmi), 855 FUNCTION(spi), 856 FUNCTION(ethernet), 857 FUNCTION(i2c_a), 858 FUNCTION(i2c_b), 859 FUNCTION(sd_c), 860 FUNCTION(sdxc_c), 861 FUNCTION(nand), 862 FUNCTION(nor), 863 FUNCTION(sd_b), 864 FUNCTION(sdxc_b), 865 FUNCTION(spdif_0), 866 FUNCTION(pwm_b), 867 FUNCTION(pwm_c), 868 FUNCTION(pwm_d), 869 FUNCTION(pwm_e), 870 FUNCTION(pwm_vs), 871 FUNCTION(tsin_a), 872 FUNCTION(tsin_b), 873 FUNCTION(clk_24m), 874 }; 875 876 static struct meson_pmx_func meson8b_aobus_functions[] = { 877 FUNCTION(uart_ao), 878 FUNCTION(uart_ao_b), 879 FUNCTION(i2c_slave_ao), 880 FUNCTION(i2c_mst_ao), 881 FUNCTION(i2s), 882 FUNCTION(remote), 883 FUNCTION(clk_32k), 884 FUNCTION(pwm_c_ao), 885 FUNCTION(spdif_1), 886 FUNCTION(hdmi_cec), 887 }; 888 889 static struct meson_bank meson8b_cbus_banks[] = { 890 /* name first last irq pullen pull dir out in */ 891 BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 97, 118, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), 892 BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 80, 96, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), 893 BANK("DV", PIN(GPIODV_9, 0), PIN(GPIODV_29, 0), 59, 79, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), 894 BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), 895 BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), 896 BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), 897 898 /* 899 * The following bank is not mentionned in the public datasheet 900 * There is no information whether it can be used with the gpio 901 * interrupt controller 902 */ 903 BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12), 904 }; 905 906 static struct meson_bank meson8b_aobus_banks[] = { 907 /* name first last irq pullen pull dir out in */ 908 BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), 909 }; 910 911 struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { 912 .name = "cbus-banks", 913 .pin_base = 0, 914 .pins = meson8b_cbus_pins, 915 .groups = meson8b_cbus_groups, 916 .funcs = meson8b_cbus_functions, 917 .banks = meson8b_cbus_banks, 918 .num_pins = ARRAY_SIZE(meson8b_cbus_pins), 919 .num_groups = ARRAY_SIZE(meson8b_cbus_groups), 920 .num_funcs = ARRAY_SIZE(meson8b_cbus_functions), 921 .num_banks = ARRAY_SIZE(meson8b_cbus_banks), 922 }; 923 924 struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { 925 .name = "aobus-banks", 926 .pin_base = 130, 927 .pins = meson8b_aobus_pins, 928 .groups = meson8b_aobus_groups, 929 .funcs = meson8b_aobus_functions, 930 .banks = meson8b_aobus_banks, 931 .num_pins = ARRAY_SIZE(meson8b_aobus_pins), 932 .num_groups = ARRAY_SIZE(meson8b_aobus_groups), 933 .num_funcs = ARRAY_SIZE(meson8b_aobus_functions), 934 .num_banks = ARRAY_SIZE(meson8b_aobus_banks), 935 }; 936