1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Pin controller and GPIO driver for Amlogic Meson8 and Meson8m2.
4  *
5  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
6  */
7 
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include "pinctrl-meson.h"
10 #include "pinctrl-meson8-pmx.h"
11 
12 static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
13 	MESON_PIN(GPIOX_0),
14 	MESON_PIN(GPIOX_1),
15 	MESON_PIN(GPIOX_2),
16 	MESON_PIN(GPIOX_3),
17 	MESON_PIN(GPIOX_4),
18 	MESON_PIN(GPIOX_5),
19 	MESON_PIN(GPIOX_6),
20 	MESON_PIN(GPIOX_7),
21 	MESON_PIN(GPIOX_8),
22 	MESON_PIN(GPIOX_9),
23 	MESON_PIN(GPIOX_10),
24 	MESON_PIN(GPIOX_11),
25 	MESON_PIN(GPIOX_12),
26 	MESON_PIN(GPIOX_13),
27 	MESON_PIN(GPIOX_14),
28 	MESON_PIN(GPIOX_15),
29 	MESON_PIN(GPIOX_16),
30 	MESON_PIN(GPIOX_17),
31 	MESON_PIN(GPIOX_18),
32 	MESON_PIN(GPIOX_19),
33 	MESON_PIN(GPIOX_20),
34 	MESON_PIN(GPIOX_21),
35 	MESON_PIN(GPIOY_0),
36 	MESON_PIN(GPIOY_1),
37 	MESON_PIN(GPIOY_2),
38 	MESON_PIN(GPIOY_3),
39 	MESON_PIN(GPIOY_4),
40 	MESON_PIN(GPIOY_5),
41 	MESON_PIN(GPIOY_6),
42 	MESON_PIN(GPIOY_7),
43 	MESON_PIN(GPIOY_8),
44 	MESON_PIN(GPIOY_9),
45 	MESON_PIN(GPIOY_10),
46 	MESON_PIN(GPIOY_11),
47 	MESON_PIN(GPIOY_12),
48 	MESON_PIN(GPIOY_13),
49 	MESON_PIN(GPIOY_14),
50 	MESON_PIN(GPIOY_15),
51 	MESON_PIN(GPIOY_16),
52 	MESON_PIN(GPIODV_0),
53 	MESON_PIN(GPIODV_1),
54 	MESON_PIN(GPIODV_2),
55 	MESON_PIN(GPIODV_3),
56 	MESON_PIN(GPIODV_4),
57 	MESON_PIN(GPIODV_5),
58 	MESON_PIN(GPIODV_6),
59 	MESON_PIN(GPIODV_7),
60 	MESON_PIN(GPIODV_8),
61 	MESON_PIN(GPIODV_9),
62 	MESON_PIN(GPIODV_10),
63 	MESON_PIN(GPIODV_11),
64 	MESON_PIN(GPIODV_12),
65 	MESON_PIN(GPIODV_13),
66 	MESON_PIN(GPIODV_14),
67 	MESON_PIN(GPIODV_15),
68 	MESON_PIN(GPIODV_16),
69 	MESON_PIN(GPIODV_17),
70 	MESON_PIN(GPIODV_18),
71 	MESON_PIN(GPIODV_19),
72 	MESON_PIN(GPIODV_20),
73 	MESON_PIN(GPIODV_21),
74 	MESON_PIN(GPIODV_22),
75 	MESON_PIN(GPIODV_23),
76 	MESON_PIN(GPIODV_24),
77 	MESON_PIN(GPIODV_25),
78 	MESON_PIN(GPIODV_26),
79 	MESON_PIN(GPIODV_27),
80 	MESON_PIN(GPIODV_28),
81 	MESON_PIN(GPIODV_29),
82 	MESON_PIN(GPIOH_0),
83 	MESON_PIN(GPIOH_1),
84 	MESON_PIN(GPIOH_2),
85 	MESON_PIN(GPIOH_3),
86 	MESON_PIN(GPIOH_4),
87 	MESON_PIN(GPIOH_5),
88 	MESON_PIN(GPIOH_6),
89 	MESON_PIN(GPIOH_7),
90 	MESON_PIN(GPIOH_8),
91 	MESON_PIN(GPIOH_9),
92 	MESON_PIN(GPIOZ_0),
93 	MESON_PIN(GPIOZ_1),
94 	MESON_PIN(GPIOZ_2),
95 	MESON_PIN(GPIOZ_3),
96 	MESON_PIN(GPIOZ_4),
97 	MESON_PIN(GPIOZ_5),
98 	MESON_PIN(GPIOZ_6),
99 	MESON_PIN(GPIOZ_7),
100 	MESON_PIN(GPIOZ_8),
101 	MESON_PIN(GPIOZ_9),
102 	MESON_PIN(GPIOZ_10),
103 	MESON_PIN(GPIOZ_11),
104 	MESON_PIN(GPIOZ_12),
105 	MESON_PIN(GPIOZ_13),
106 	MESON_PIN(GPIOZ_14),
107 	MESON_PIN(CARD_0),
108 	MESON_PIN(CARD_1),
109 	MESON_PIN(CARD_2),
110 	MESON_PIN(CARD_3),
111 	MESON_PIN(CARD_4),
112 	MESON_PIN(CARD_5),
113 	MESON_PIN(CARD_6),
114 	MESON_PIN(BOOT_0),
115 	MESON_PIN(BOOT_1),
116 	MESON_PIN(BOOT_2),
117 	MESON_PIN(BOOT_3),
118 	MESON_PIN(BOOT_4),
119 	MESON_PIN(BOOT_5),
120 	MESON_PIN(BOOT_6),
121 	MESON_PIN(BOOT_7),
122 	MESON_PIN(BOOT_8),
123 	MESON_PIN(BOOT_9),
124 	MESON_PIN(BOOT_10),
125 	MESON_PIN(BOOT_11),
126 	MESON_PIN(BOOT_12),
127 	MESON_PIN(BOOT_13),
128 	MESON_PIN(BOOT_14),
129 	MESON_PIN(BOOT_15),
130 	MESON_PIN(BOOT_16),
131 	MESON_PIN(BOOT_17),
132 	MESON_PIN(BOOT_18),
133 };
134 
135 static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
136 	MESON_PIN(GPIOAO_0),
137 	MESON_PIN(GPIOAO_1),
138 	MESON_PIN(GPIOAO_2),
139 	MESON_PIN(GPIOAO_3),
140 	MESON_PIN(GPIOAO_4),
141 	MESON_PIN(GPIOAO_5),
142 	MESON_PIN(GPIOAO_6),
143 	MESON_PIN(GPIOAO_7),
144 	MESON_PIN(GPIOAO_8),
145 	MESON_PIN(GPIOAO_9),
146 	MESON_PIN(GPIOAO_10),
147 	MESON_PIN(GPIOAO_11),
148 	MESON_PIN(GPIOAO_12),
149 	MESON_PIN(GPIOAO_13),
150 	MESON_PIN(GPIO_BSD_EN),
151 	MESON_PIN(GPIO_TEST_N),
152 };
153 
154 /* bank X */
155 static const unsigned int sd_d0_a_pins[]	= { GPIOX_0 };
156 static const unsigned int sd_d1_a_pins[]	= { GPIOX_1 };
157 static const unsigned int sd_d2_a_pins[]	= { GPIOX_2 };
158 static const unsigned int sd_d3_a_pins[]	= { GPIOX_3 };
159 static const unsigned int sd_clk_a_pins[]	= { GPIOX_8 };
160 static const unsigned int sd_cmd_a_pins[]	= { GPIOX_9 };
161 
162 static const unsigned int sdxc_d0_a_pins[]	= { GPIOX_0 };
163 static const unsigned int sdxc_d13_a_pins[]	= { GPIOX_1, GPIOX_2, GPIOX_3 };
164 static const unsigned int sdxc_d47_a_pins[]	= { GPIOX_4, GPIOX_5, GPIOX_6,
165 						    GPIOX_7 };
166 static const unsigned int sdxc_clk_a_pins[]	= { GPIOX_8 };
167 static const unsigned int sdxc_cmd_a_pins[]	= { GPIOX_9 };
168 
169 static const unsigned int pcm_out_a_pins[]	= { GPIOX_4 };
170 static const unsigned int pcm_in_a_pins[]	= { GPIOX_5 };
171 static const unsigned int pcm_fs_a_pins[]	= { GPIOX_6 };
172 static const unsigned int pcm_clk_a_pins[]	= { GPIOX_7 };
173 
174 static const unsigned int uart_tx_a0_pins[]	= { GPIOX_4 };
175 static const unsigned int uart_rx_a0_pins[]	= { GPIOX_5 };
176 static const unsigned int uart_cts_a0_pins[]	= { GPIOX_6 };
177 static const unsigned int uart_rts_a0_pins[]	= { GPIOX_7 };
178 
179 static const unsigned int uart_tx_a1_pins[]	= { GPIOX_12 };
180 static const unsigned int uart_rx_a1_pins[]	= { GPIOX_13 };
181 static const unsigned int uart_cts_a1_pins[]	= { GPIOX_14 };
182 static const unsigned int uart_rts_a1_pins[]	= { GPIOX_15 };
183 
184 static const unsigned int uart_tx_b0_pins[]	= { GPIOX_16 };
185 static const unsigned int uart_rx_b0_pins[]	= { GPIOX_17 };
186 static const unsigned int uart_cts_b0_pins[]	= { GPIOX_18 };
187 static const unsigned int uart_rts_b0_pins[]	= { GPIOX_19 };
188 
189 static const unsigned int iso7816_det_pins[]	= { GPIOX_16 };
190 static const unsigned int iso7816_reset_pins[]	= { GPIOX_17 };
191 static const unsigned int iso7816_clk_pins[]	= { GPIOX_18 };
192 static const unsigned int iso7816_data_pins[]	= { GPIOX_19 };
193 
194 static const unsigned int i2c_sda_d0_pins[]	= { GPIOX_16 };
195 static const unsigned int i2c_sck_d0_pins[]	= { GPIOX_17 };
196 
197 static const unsigned int xtal_32k_out_pins[]	= { GPIOX_10 };
198 static const unsigned int xtal_24m_out_pins[]	= { GPIOX_11 };
199 
200 static const unsigned int pwm_e_pins[]		= { GPIOX_10 };
201 static const unsigned int pwm_b_x_pins[]	= { GPIOX_11 };
202 
203 /* bank Y */
204 static const unsigned int uart_tx_c_pins[]	= { GPIOY_0 };
205 static const unsigned int uart_rx_c_pins[]	= { GPIOY_1 };
206 static const unsigned int uart_cts_c_pins[]	= { GPIOY_2 };
207 static const unsigned int uart_rts_c_pins[]	= { GPIOY_3 };
208 
209 static const unsigned int pcm_out_b_pins[]	= { GPIOY_4 };
210 static const unsigned int pcm_in_b_pins[]	= { GPIOY_5 };
211 static const unsigned int pcm_fs_b_pins[]	= { GPIOY_6 };
212 static const unsigned int pcm_clk_b_pins[]	= { GPIOY_7 };
213 
214 static const unsigned int i2c_sda_c0_pins[]	= { GPIOY_0 };
215 static const unsigned int i2c_sck_c0_pins[]	= { GPIOY_1 };
216 
217 static const unsigned int pwm_a_y_pins[]	= { GPIOY_16 };
218 
219 static const unsigned int i2s_out_ch45_pins[]	= { GPIOY_0 };
220 static const unsigned int i2s_out_ch23_pins[]	= { GPIOY_1 };
221 static const unsigned int i2s_out_ch01_pins[]	= { GPIOY_4 };
222 static const unsigned int i2s_in_ch01_pins[]	= { GPIOY_5 };
223 static const unsigned int i2s_lr_clk_in_pins[]	= { GPIOY_6 };
224 static const unsigned int i2s_ao_clk_in_pins[]	= { GPIOY_7 };
225 static const unsigned int i2s_am_clk_pins[]	= { GPIOY_8 };
226 static const unsigned int i2s_out_ch78_pins[]	= { GPIOY_9 };
227 
228 static const unsigned int spdif_in_pins[]	= { GPIOY_2 };
229 static const unsigned int spdif_out_pins[]	= { GPIOY_3 };
230 
231 /* bank DV */
232 static const unsigned int dvin_rgb_pins[] = {
233 	GPIODV_0, GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5,
234 	GPIODV_6, GPIODV_7, GPIODV_8, GPIODV_9, GPIODV_10, GPIODV_11,
235 	GPIODV_12, GPIODV_13, GPIODV_14, GPIODV_15, GPIODV_16, GPIODV_17,
236 	GPIODV_18, GPIODV_19, GPIODV_20, GPIODV_21, GPIODV_22, GPIODV_23
237 };
238 static const unsigned int dvin_vs_pins[]	= { GPIODV_24 };
239 static const unsigned int dvin_hs_pins[]	= { GPIODV_25 };
240 static const unsigned int dvin_clk_pins[]	= { GPIODV_26 };
241 static const unsigned int dvin_de_pins[]	= { GPIODV_27 };
242 
243 static const unsigned int enc_0_pins[]		= { GPIODV_0 };
244 static const unsigned int enc_1_pins[]		= { GPIODV_1 };
245 static const unsigned int enc_2_pins[]		= { GPIODV_2 };
246 static const unsigned int enc_3_pins[]		= { GPIODV_3 };
247 static const unsigned int enc_4_pins[]		= { GPIODV_4 };
248 static const unsigned int enc_5_pins[]		= { GPIODV_5 };
249 static const unsigned int enc_6_pins[]		= { GPIODV_6 };
250 static const unsigned int enc_7_pins[]		= { GPIODV_7 };
251 static const unsigned int enc_8_pins[]		= { GPIODV_8 };
252 static const unsigned int enc_9_pins[]		= { GPIODV_9 };
253 static const unsigned int enc_10_pins[]		= { GPIODV_10 };
254 static const unsigned int enc_11_pins[]		= { GPIODV_11 };
255 static const unsigned int enc_12_pins[]		= { GPIODV_12 };
256 static const unsigned int enc_13_pins[]		= { GPIODV_13 };
257 static const unsigned int enc_14_pins[]		= { GPIODV_14 };
258 static const unsigned int enc_15_pins[]		= { GPIODV_15 };
259 static const unsigned int enc_16_pins[]		= { GPIODV_16 };
260 static const unsigned int enc_17_pins[]		= { GPIODV_17 };
261 
262 static const unsigned int uart_tx_b1_pins[]	= { GPIODV_24 };
263 static const unsigned int uart_rx_b1_pins[]	= { GPIODV_25 };
264 static const unsigned int uart_cts_b1_pins[]	= { GPIODV_26 };
265 static const unsigned int uart_rts_b1_pins[]	= { GPIODV_27 };
266 
267 static const unsigned int vga_vs_pins[]		= { GPIODV_24 };
268 static const unsigned int vga_hs_pins[]		= { GPIODV_25 };
269 
270 static const unsigned int pwm_c_dv9_pins[]	= { GPIODV_9 };
271 static const unsigned int pwm_c_dv29_pins[]	= { GPIODV_29 };
272 static const unsigned int pwm_d_pins[]		= { GPIODV_28 };
273 
274 /* bank H */
275 static const unsigned int hdmi_hpd_pins[]	= { GPIOH_0 };
276 static const unsigned int hdmi_sda_pins[]	= { GPIOH_1 };
277 static const unsigned int hdmi_scl_pins[]	= { GPIOH_2 };
278 static const unsigned int hdmi_cec_pins[]	= { GPIOH_3 };
279 
280 static const unsigned int spi_ss0_0_pins[]	= { GPIOH_3 };
281 static const unsigned int spi_miso_0_pins[]	= { GPIOH_4 };
282 static const unsigned int spi_mosi_0_pins[]	= { GPIOH_5 };
283 static const unsigned int spi_sclk_0_pins[]	= { GPIOH_6 };
284 
285 static const unsigned int i2c_sda_d1_pins[]	= { GPIOH_7 };
286 static const unsigned int i2c_sck_d1_pins[]	= { GPIOH_8 };
287 
288 /* bank Z */
289 static const unsigned int spi_ss0_1_pins[]	= { GPIOZ_9 };
290 static const unsigned int spi_ss1_1_pins[]	= { GPIOZ_10 };
291 static const unsigned int spi_sclk_1_pins[]	= { GPIOZ_11 };
292 static const unsigned int spi_mosi_1_pins[]	= { GPIOZ_12 };
293 static const unsigned int spi_miso_1_pins[]	= { GPIOZ_13 };
294 static const unsigned int spi_ss2_1_pins[]	= { GPIOZ_14 };
295 
296 static const unsigned int eth_txd3_pins[]	= { GPIOZ_0 };
297 static const unsigned int eth_txd2_pins[]	= { GPIOZ_1 };
298 static const unsigned int eth_rxd3_pins[]	= { GPIOZ_2 };
299 static const unsigned int eth_rxd2_pins[]	= { GPIOZ_3 };
300 static const unsigned int eth_tx_clk_50m_pins[]	= { GPIOZ_4 };
301 static const unsigned int eth_tx_en_pins[]	= { GPIOZ_5 };
302 static const unsigned int eth_txd1_pins[]	= { GPIOZ_6 };
303 static const unsigned int eth_txd0_pins[]	= { GPIOZ_7 };
304 static const unsigned int eth_rx_clk_in_pins[]	= { GPIOZ_8 };
305 static const unsigned int eth_rx_dv_pins[]	= { GPIOZ_9 };
306 static const unsigned int eth_rxd1_pins[]	= { GPIOZ_10 };
307 static const unsigned int eth_rxd0_pins[]	= { GPIOZ_11 };
308 static const unsigned int eth_mdio_pins[]	= { GPIOZ_12 };
309 static const unsigned int eth_mdc_pins[]	= { GPIOZ_13 };
310 
311 static const unsigned int i2c_sda_a0_pins[]	= { GPIOZ_0 };
312 static const unsigned int i2c_sck_a0_pins[]	= { GPIOZ_1 };
313 
314 static const unsigned int i2c_sda_b_pins[]	= { GPIOZ_2 };
315 static const unsigned int i2c_sck_b_pins[]	= { GPIOZ_3 };
316 
317 static const unsigned int i2c_sda_c1_pins[]	= { GPIOZ_4 };
318 static const unsigned int i2c_sck_c1_pins[]	= { GPIOZ_5 };
319 
320 static const unsigned int i2c_sda_a1_pins[]	= { GPIOZ_0 };
321 static const unsigned int i2c_sck_a1_pins[]	= { GPIOZ_1 };
322 
323 static const unsigned int i2c_sda_a2_pins[]	= { GPIOZ_0 };
324 static const unsigned int i2c_sck_a2_pins[]	= { GPIOZ_1 };
325 
326 static const unsigned int pwm_a_z0_pins[]	= { GPIOZ_0 };
327 static const unsigned int pwm_a_z7_pins[]	= { GPIOZ_7 };
328 static const unsigned int pwm_b_z_pins[]	= { GPIOZ_1 };
329 static const unsigned int pwm_c_z_pins[]	= { GPIOZ_8 };
330 
331 /* bank BOOT */
332 static const unsigned int sd_d0_c_pins[]	= { BOOT_0 };
333 static const unsigned int sd_d1_c_pins[]	= { BOOT_1 };
334 static const unsigned int sd_d2_c_pins[]	= { BOOT_2 };
335 static const unsigned int sd_d3_c_pins[]	= { BOOT_3 };
336 static const unsigned int sd_cmd_c_pins[]	= { BOOT_16 };
337 static const unsigned int sd_clk_c_pins[]	= { BOOT_17 };
338 
339 static const unsigned int sdxc_d0_c_pins[]	= { BOOT_0};
340 static const unsigned int sdxc_d13_c_pins[]	= { BOOT_1, BOOT_2, BOOT_3 };
341 static const unsigned int sdxc_d47_c_pins[]	= { BOOT_4, BOOT_5, BOOT_6,
342 						    BOOT_7 };
343 static const unsigned int sdxc_cmd_c_pins[]	= { BOOT_16 };
344 static const unsigned int sdxc_clk_c_pins[]	= { BOOT_17 };
345 
346 static const unsigned int nand_io_pins[] = {
347 	BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
348 };
349 static const unsigned int nand_io_ce0_pins[]	= { BOOT_8 };
350 static const unsigned int nand_io_ce1_pins[]	= { BOOT_9 };
351 static const unsigned int nand_io_rb0_pins[]	= { BOOT_10 };
352 static const unsigned int nand_ale_pins[]	= { BOOT_11 };
353 static const unsigned int nand_cle_pins[]	= { BOOT_12 };
354 static const unsigned int nand_wen_clk_pins[]	= { BOOT_13 };
355 static const unsigned int nand_ren_clk_pins[]	= { BOOT_14 };
356 static const unsigned int nand_dqs_pins[]	= { BOOT_15 };
357 static const unsigned int nand_ce2_pins[]	= { BOOT_16 };
358 static const unsigned int nand_ce3_pins[]	= { BOOT_17 };
359 
360 static const unsigned int nor_d_pins[]		= { BOOT_11 };
361 static const unsigned int nor_q_pins[]		= { BOOT_12 };
362 static const unsigned int nor_c_pins[]		= { BOOT_13 };
363 static const unsigned int nor_cs_pins[]		= { BOOT_18 };
364 
365 /* bank CARD */
366 static const unsigned int sd_d1_b_pins[]	= { CARD_0 };
367 static const unsigned int sd_d0_b_pins[]	= { CARD_1 };
368 static const unsigned int sd_clk_b_pins[]	= { CARD_2 };
369 static const unsigned int sd_cmd_b_pins[]	= { CARD_3 };
370 static const unsigned int sd_d3_b_pins[]	= { CARD_4 };
371 static const unsigned int sd_d2_b_pins[]	= { CARD_5 };
372 
373 static const unsigned int sdxc_d13_b_pins[]	= { CARD_0, CARD_4, CARD_5 };
374 static const unsigned int sdxc_d0_b_pins[]	= { CARD_1 };
375 static const unsigned int sdxc_clk_b_pins[]	= { CARD_2 };
376 static const unsigned int sdxc_cmd_b_pins[]	= { CARD_3 };
377 
378 /* bank AO */
379 static const unsigned int uart_tx_ao_a_pins[]	= { GPIOAO_0 };
380 static const unsigned int uart_rx_ao_a_pins[]	= { GPIOAO_1 };
381 static const unsigned int uart_cts_ao_a_pins[]	= { GPIOAO_2 };
382 static const unsigned int uart_rts_ao_a_pins[]	= { GPIOAO_3 };
383 
384 static const unsigned int remote_input_pins[]	= { GPIOAO_7 };
385 static const unsigned int remote_output_ao_pins[] = { GPIOAO_13 };
386 
387 static const unsigned int i2c_slave_sck_ao_pins[] = { GPIOAO_4 };
388 static const unsigned int i2c_slave_sda_ao_pins[] = { GPIOAO_5 };
389 
390 static const unsigned int uart_tx_ao_b0_pins[]	= { GPIOAO_0 };
391 static const unsigned int uart_rx_ao_b0_pins[]	= { GPIOAO_1 };
392 
393 static const unsigned int uart_tx_ao_b1_pins[]	= { GPIOAO_4 };
394 static const unsigned int uart_rx_ao_b1_pins[]	= { GPIOAO_5 };
395 
396 static const unsigned int i2c_mst_sck_ao_pins[]	= { GPIOAO_4 };
397 static const unsigned int i2c_mst_sda_ao_pins[]	= { GPIOAO_5 };
398 
399 static const unsigned int pwm_f_ao_pins[]	= { GPIO_TEST_N };
400 
401 static const unsigned int i2s_am_clk_out_ao_pins[] = { GPIOAO_8 };
402 static const unsigned int i2s_ao_clk_out_ao_pins[] = { GPIOAO_9 };
403 static const unsigned int i2s_lr_clk_out_ao_pins[] = { GPIOAO_10 };
404 static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };
405 
406 static const unsigned int hdmi_cec_ao_pins[]	= { GPIOAO_12 };
407 
408 static struct meson_pmx_group meson8_cbus_groups[] = {
409 	GPIO_GROUP(GPIOX_0),
410 	GPIO_GROUP(GPIOX_1),
411 	GPIO_GROUP(GPIOX_2),
412 	GPIO_GROUP(GPIOX_3),
413 	GPIO_GROUP(GPIOX_4),
414 	GPIO_GROUP(GPIOX_5),
415 	GPIO_GROUP(GPIOX_6),
416 	GPIO_GROUP(GPIOX_7),
417 	GPIO_GROUP(GPIOX_8),
418 	GPIO_GROUP(GPIOX_9),
419 	GPIO_GROUP(GPIOX_10),
420 	GPIO_GROUP(GPIOX_11),
421 	GPIO_GROUP(GPIOX_12),
422 	GPIO_GROUP(GPIOX_13),
423 	GPIO_GROUP(GPIOX_14),
424 	GPIO_GROUP(GPIOX_15),
425 	GPIO_GROUP(GPIOX_16),
426 	GPIO_GROUP(GPIOX_17),
427 	GPIO_GROUP(GPIOX_18),
428 	GPIO_GROUP(GPIOX_19),
429 	GPIO_GROUP(GPIOX_20),
430 	GPIO_GROUP(GPIOX_21),
431 	GPIO_GROUP(GPIOY_0),
432 	GPIO_GROUP(GPIOY_1),
433 	GPIO_GROUP(GPIOY_2),
434 	GPIO_GROUP(GPIOY_3),
435 	GPIO_GROUP(GPIOY_4),
436 	GPIO_GROUP(GPIOY_5),
437 	GPIO_GROUP(GPIOY_6),
438 	GPIO_GROUP(GPIOY_7),
439 	GPIO_GROUP(GPIOY_8),
440 	GPIO_GROUP(GPIOY_9),
441 	GPIO_GROUP(GPIOY_10),
442 	GPIO_GROUP(GPIOY_11),
443 	GPIO_GROUP(GPIOY_12),
444 	GPIO_GROUP(GPIOY_13),
445 	GPIO_GROUP(GPIOY_14),
446 	GPIO_GROUP(GPIOY_15),
447 	GPIO_GROUP(GPIOY_16),
448 	GPIO_GROUP(GPIODV_0),
449 	GPIO_GROUP(GPIODV_1),
450 	GPIO_GROUP(GPIODV_2),
451 	GPIO_GROUP(GPIODV_3),
452 	GPIO_GROUP(GPIODV_4),
453 	GPIO_GROUP(GPIODV_5),
454 	GPIO_GROUP(GPIODV_6),
455 	GPIO_GROUP(GPIODV_7),
456 	GPIO_GROUP(GPIODV_8),
457 	GPIO_GROUP(GPIODV_9),
458 	GPIO_GROUP(GPIODV_10),
459 	GPIO_GROUP(GPIODV_11),
460 	GPIO_GROUP(GPIODV_12),
461 	GPIO_GROUP(GPIODV_13),
462 	GPIO_GROUP(GPIODV_14),
463 	GPIO_GROUP(GPIODV_15),
464 	GPIO_GROUP(GPIODV_16),
465 	GPIO_GROUP(GPIODV_17),
466 	GPIO_GROUP(GPIODV_18),
467 	GPIO_GROUP(GPIODV_19),
468 	GPIO_GROUP(GPIODV_20),
469 	GPIO_GROUP(GPIODV_21),
470 	GPIO_GROUP(GPIODV_22),
471 	GPIO_GROUP(GPIODV_23),
472 	GPIO_GROUP(GPIODV_24),
473 	GPIO_GROUP(GPIODV_25),
474 	GPIO_GROUP(GPIODV_26),
475 	GPIO_GROUP(GPIODV_27),
476 	GPIO_GROUP(GPIODV_28),
477 	GPIO_GROUP(GPIODV_29),
478 	GPIO_GROUP(GPIOH_0),
479 	GPIO_GROUP(GPIOH_1),
480 	GPIO_GROUP(GPIOH_2),
481 	GPIO_GROUP(GPIOH_3),
482 	GPIO_GROUP(GPIOH_4),
483 	GPIO_GROUP(GPIOH_5),
484 	GPIO_GROUP(GPIOH_6),
485 	GPIO_GROUP(GPIOH_7),
486 	GPIO_GROUP(GPIOH_8),
487 	GPIO_GROUP(GPIOH_9),
488 	GPIO_GROUP(GPIOZ_0),
489 	GPIO_GROUP(GPIOZ_1),
490 	GPIO_GROUP(GPIOZ_2),
491 	GPIO_GROUP(GPIOZ_3),
492 	GPIO_GROUP(GPIOZ_4),
493 	GPIO_GROUP(GPIOZ_5),
494 	GPIO_GROUP(GPIOZ_6),
495 	GPIO_GROUP(GPIOZ_7),
496 	GPIO_GROUP(GPIOZ_8),
497 	GPIO_GROUP(GPIOZ_9),
498 	GPIO_GROUP(GPIOZ_10),
499 	GPIO_GROUP(GPIOZ_11),
500 	GPIO_GROUP(GPIOZ_12),
501 	GPIO_GROUP(GPIOZ_13),
502 	GPIO_GROUP(GPIOZ_14),
503 	GPIO_GROUP(CARD_0),
504 	GPIO_GROUP(CARD_1),
505 	GPIO_GROUP(CARD_2),
506 	GPIO_GROUP(CARD_3),
507 	GPIO_GROUP(CARD_4),
508 	GPIO_GROUP(CARD_5),
509 	GPIO_GROUP(CARD_6),
510 	GPIO_GROUP(BOOT_0),
511 	GPIO_GROUP(BOOT_1),
512 	GPIO_GROUP(BOOT_2),
513 	GPIO_GROUP(BOOT_3),
514 	GPIO_GROUP(BOOT_4),
515 	GPIO_GROUP(BOOT_5),
516 	GPIO_GROUP(BOOT_6),
517 	GPIO_GROUP(BOOT_7),
518 	GPIO_GROUP(BOOT_8),
519 	GPIO_GROUP(BOOT_9),
520 	GPIO_GROUP(BOOT_10),
521 	GPIO_GROUP(BOOT_11),
522 	GPIO_GROUP(BOOT_12),
523 	GPIO_GROUP(BOOT_13),
524 	GPIO_GROUP(BOOT_14),
525 	GPIO_GROUP(BOOT_15),
526 	GPIO_GROUP(BOOT_16),
527 	GPIO_GROUP(BOOT_17),
528 	GPIO_GROUP(BOOT_18),
529 
530 	/* bank X */
531 	GROUP(sd_d0_a,		8,	5),
532 	GROUP(sd_d1_a,		8,	4),
533 	GROUP(sd_d2_a,		8,	3),
534 	GROUP(sd_d3_a,		8,	2),
535 	GROUP(sd_clk_a,		8,	1),
536 	GROUP(sd_cmd_a,		8,	0),
537 
538 	GROUP(sdxc_d0_a,	5,	14),
539 	GROUP(sdxc_d13_a,	5,	13),
540 	GROUP(sdxc_d47_a,	5,	12),
541 	GROUP(sdxc_clk_a,	5,	11),
542 	GROUP(sdxc_cmd_a,	5,	10),
543 
544 	GROUP(pcm_out_a,	3,	30),
545 	GROUP(pcm_in_a,		3,	29),
546 	GROUP(pcm_fs_a,		3,	28),
547 	GROUP(pcm_clk_a,	3,	27),
548 
549 	GROUP(uart_tx_a0,	4,	17),
550 	GROUP(uart_rx_a0,	4,	16),
551 	GROUP(uart_cts_a0,	4,	15),
552 	GROUP(uart_rts_a0,	4,	14),
553 
554 	GROUP(uart_tx_a1,	4,	13),
555 	GROUP(uart_rx_a1,	4,	12),
556 	GROUP(uart_cts_a1,	4,	11),
557 	GROUP(uart_rts_a1,	4,	10),
558 
559 	GROUP(uart_tx_b0,	4,	9),
560 	GROUP(uart_rx_b0,	4,	8),
561 	GROUP(uart_cts_b0,	4,	7),
562 	GROUP(uart_rts_b0,	4,	6),
563 
564 	GROUP(iso7816_det,	4,	21),
565 	GROUP(iso7816_reset,	4,	20),
566 	GROUP(iso7816_clk,	4,	19),
567 	GROUP(iso7816_data,	4,	18),
568 
569 	GROUP(i2c_sda_d0,	4,	5),
570 	GROUP(i2c_sck_d0,	4,	4),
571 
572 	GROUP(xtal_32k_out,	3,	22),
573 	GROUP(xtal_24m_out,	3,	23),
574 
575 	GROUP(pwm_e,		9,	19),
576 	GROUP(pwm_b_x,		2,	3),
577 
578 	/* bank Y */
579 	GROUP(uart_tx_c,	1,	19),
580 	GROUP(uart_rx_c,	1,	18),
581 	GROUP(uart_cts_c,	1,	17),
582 	GROUP(uart_rts_c,	1,	16),
583 
584 	GROUP(pcm_out_b,	4,	25),
585 	GROUP(pcm_in_b,		4,	24),
586 	GROUP(pcm_fs_b,		4,	23),
587 	GROUP(pcm_clk_b,	4,	22),
588 
589 	GROUP(i2c_sda_c0,	1,	15),
590 	GROUP(i2c_sck_c0,	1,	14),
591 
592 	GROUP(pwm_a_y,		9,	14),
593 
594 	GROUP(i2s_out_ch45,	1,	10),
595 	GROUP(i2s_out_ch23,	1,	19),
596 	GROUP(i2s_out_ch01,	1,	6),
597 	GROUP(i2s_in_ch01,	1,	5),
598 	GROUP(i2s_lr_clk_in,	1,	4),
599 	GROUP(i2s_ao_clk_in,	1,	2),
600 	GROUP(i2s_am_clk,	1,	0),
601 	GROUP(i2s_out_ch78,	1,	11),
602 
603 	GROUP(spdif_in,		1,	8),
604 	GROUP(spdif_out,	1,	7),
605 
606 	/* bank DV */
607 	GROUP(dvin_rgb,		0,	6),
608 	GROUP(dvin_vs,		0,	9),
609 	GROUP(dvin_hs,		0,	8),
610 	GROUP(dvin_clk,		0,	7),
611 	GROUP(dvin_de,		0,	10),
612 
613 	GROUP(enc_0,		7,	0),
614 	GROUP(enc_1,		7,	1),
615 	GROUP(enc_2,		7,	2),
616 	GROUP(enc_3,		7,	3),
617 	GROUP(enc_4,		7,	4),
618 	GROUP(enc_5,		7,	5),
619 	GROUP(enc_6,		7,	6),
620 	GROUP(enc_7,		7,	7),
621 	GROUP(enc_8,		7,	8),
622 	GROUP(enc_9,		7,	9),
623 	GROUP(enc_10,		7,	10),
624 	GROUP(enc_11,		7,	11),
625 	GROUP(enc_12,		7,	12),
626 	GROUP(enc_13,		7,	13),
627 	GROUP(enc_14,		7,	14),
628 	GROUP(enc_15,		7,	15),
629 	GROUP(enc_16,		7,	16),
630 	GROUP(enc_17,		7,	17),
631 
632 	GROUP(uart_tx_b1,	6,	23),
633 	GROUP(uart_rx_b1,	6,	22),
634 	GROUP(uart_cts_b1,	6,	21),
635 	GROUP(uart_rts_b1,	6,	20),
636 
637 	GROUP(vga_vs,		0,	21),
638 	GROUP(vga_hs,		0,	20),
639 
640 	GROUP(pwm_c_dv9,	3,	24),
641 	GROUP(pwm_c_dv29,	3,	25),
642 	GROUP(pwm_d,		3,	26),
643 
644 	/* bank H */
645 	GROUP(hdmi_hpd,		1,	26),
646 	GROUP(hdmi_sda,		1,	25),
647 	GROUP(hdmi_scl,		1,	24),
648 	GROUP(hdmi_cec,		1,	23),
649 
650 	GROUP(spi_ss0_0,	9,	13),
651 	GROUP(spi_miso_0,	9,	12),
652 	GROUP(spi_mosi_0,	9,	11),
653 	GROUP(spi_sclk_0,	9,	10),
654 
655 	GROUP(i2c_sda_d1,	4,	3),
656 	GROUP(i2c_sck_d1,	4,	2),
657 
658 	/* bank Z */
659 	GROUP(spi_ss0_1,	8,	16),
660 	GROUP(spi_ss1_1,	8,	12),
661 	GROUP(spi_sclk_1,	8,	15),
662 	GROUP(spi_mosi_1,	8,	14),
663 	GROUP(spi_miso_1,	8,	13),
664 	GROUP(spi_ss2_1,	8,	17),
665 
666 	GROUP(eth_tx_clk_50m,	6,	15),
667 	GROUP(eth_tx_en,	6,	14),
668 	GROUP(eth_txd1,		6,	13),
669 	GROUP(eth_txd0,		6,	12),
670 	GROUP(eth_rx_clk_in,	6,	10),
671 	GROUP(eth_rx_dv,	6,	11),
672 	GROUP(eth_rxd1,		6,	8),
673 	GROUP(eth_rxd0,		6,	7),
674 	GROUP(eth_mdio,		6,	6),
675 	GROUP(eth_mdc,		6,	5),
676 
677 	/* NOTE: the following four groups are only available on Meson8m2: */
678 	GROUP(eth_rxd2,		6,	3),
679 	GROUP(eth_rxd3,		6,	2),
680 	GROUP(eth_txd2,		6,	1),
681 	GROUP(eth_txd3,		6,	0),
682 
683 	GROUP(i2c_sda_a0,	5,	31),
684 	GROUP(i2c_sck_a0,	5,	30),
685 
686 	GROUP(i2c_sda_b,	5,	27),
687 	GROUP(i2c_sck_b,	5,	26),
688 
689 	GROUP(i2c_sda_c1,	5,	25),
690 	GROUP(i2c_sck_c1,	5,	24),
691 
692 	GROUP(i2c_sda_a1,	5,	9),
693 	GROUP(i2c_sck_a1,	5,	8),
694 
695 	GROUP(i2c_sda_a2,	5,	7),
696 	GROUP(i2c_sck_a2,	5,	6),
697 
698 	GROUP(pwm_a_z0,		9,	16),
699 	GROUP(pwm_a_z7,		2,	0),
700 	GROUP(pwm_b_z,		9,	15),
701 	GROUP(pwm_c_z,		2,	1),
702 
703 	/* bank BOOT */
704 	GROUP(sd_d0_c,		6,	29),
705 	GROUP(sd_d1_c,		6,	28),
706 	GROUP(sd_d2_c,		6,	27),
707 	GROUP(sd_d3_c,		6,	26),
708 	GROUP(sd_cmd_c,		6,	25),
709 	GROUP(sd_clk_c,		6,	24),
710 
711 	GROUP(sdxc_d0_c,	4,	30),
712 	GROUP(sdxc_d13_c,	4,	29),
713 	GROUP(sdxc_d47_c,	4,	28),
714 	GROUP(sdxc_cmd_c,	4,	27),
715 	GROUP(sdxc_clk_c,	4,	26),
716 
717 	GROUP(nand_io,		2,	26),
718 	GROUP(nand_io_ce0,	2,	25),
719 	GROUP(nand_io_ce1,	2,	24),
720 	GROUP(nand_io_rb0,	2,	17),
721 	GROUP(nand_ale,		2,	21),
722 	GROUP(nand_cle,		2,	20),
723 	GROUP(nand_wen_clk,	2,	19),
724 	GROUP(nand_ren_clk,	2,	18),
725 	GROUP(nand_dqs,		2,	27),
726 	GROUP(nand_ce2,		2,	23),
727 	GROUP(nand_ce3,		2,	22),
728 
729 	GROUP(nor_d,		5,	1),
730 	GROUP(nor_q,		5,	3),
731 	GROUP(nor_c,		5,	2),
732 	GROUP(nor_cs,		5,	0),
733 
734 	/* bank CARD */
735 	GROUP(sd_d1_b,		2,	14),
736 	GROUP(sd_d0_b,		2,	15),
737 	GROUP(sd_clk_b,		2,	11),
738 	GROUP(sd_cmd_b,		2,	10),
739 	GROUP(sd_d3_b,		2,	12),
740 	GROUP(sd_d2_b,		2,	13),
741 
742 	GROUP(sdxc_d13_b,	2,	6),
743 	GROUP(sdxc_d0_b,	2,	7),
744 	GROUP(sdxc_clk_b,	2,	5),
745 	GROUP(sdxc_cmd_b,	2,	4),
746 };
747 
748 static struct meson_pmx_group meson8_aobus_groups[] = {
749 	GPIO_GROUP(GPIOAO_0),
750 	GPIO_GROUP(GPIOAO_1),
751 	GPIO_GROUP(GPIOAO_2),
752 	GPIO_GROUP(GPIOAO_3),
753 	GPIO_GROUP(GPIOAO_4),
754 	GPIO_GROUP(GPIOAO_5),
755 	GPIO_GROUP(GPIOAO_6),
756 	GPIO_GROUP(GPIOAO_7),
757 	GPIO_GROUP(GPIOAO_8),
758 	GPIO_GROUP(GPIOAO_9),
759 	GPIO_GROUP(GPIOAO_10),
760 	GPIO_GROUP(GPIOAO_11),
761 	GPIO_GROUP(GPIOAO_12),
762 	GPIO_GROUP(GPIOAO_13),
763 	GPIO_GROUP(GPIO_BSD_EN),
764 	GPIO_GROUP(GPIO_TEST_N),
765 
766 	/* bank AO */
767 	GROUP(uart_tx_ao_a,		0,	12),
768 	GROUP(uart_rx_ao_a,		0,	11),
769 	GROUP(uart_cts_ao_a,		0,	10),
770 	GROUP(uart_rts_ao_a,		0,	9),
771 
772 	GROUP(remote_input,		0,	0),
773 	GROUP(remote_output_ao,		0,	31),
774 
775 	GROUP(i2c_slave_sck_ao,		0,	2),
776 	GROUP(i2c_slave_sda_ao,		0,	1),
777 
778 	GROUP(uart_tx_ao_b0,		0,	26),
779 	GROUP(uart_rx_ao_b0,		0,	25),
780 
781 	GROUP(uart_tx_ao_b1,		0,	24),
782 	GROUP(uart_rx_ao_b1,		0,	23),
783 
784 	GROUP(i2c_mst_sck_ao,		0,	6),
785 	GROUP(i2c_mst_sda_ao,		0,	5),
786 
787 	GROUP(pwm_f_ao,			0,	19),
788 
789 	GROUP(i2s_am_clk_out_ao,	0,	30),
790 	GROUP(i2s_ao_clk_out_ao,	0,	29),
791 	GROUP(i2s_lr_clk_out_ao,	0,	28),
792 	GROUP(i2s_out_ch01_ao,		0,	27),
793 
794 	GROUP(hdmi_cec_ao,		0,	17),
795 };
796 
797 static const char * const gpio_periphs_groups[] = {
798 	"GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
799 	"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
800 	"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
801 	"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
802 	"GPIOX_20", "GPIOX_21",
803 
804 	"GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
805 	"GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
806 	"GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
807 	"GPIOY_15", "GPIOY_16",
808 
809 	"GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
810 	"GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
811 	"GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
812 	"GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
813 	"GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
814 	"GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
815 
816 	"GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
817 	"GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
818 
819 	"GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
820 	"GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
821 	"GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
822 
823 	"CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
824 	"CARD_5", "CARD_6",
825 
826 	"BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
827 	"BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
828 	"BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
829 	"BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
830 };
831 
832 static const char * const gpio_aobus_groups[] = {
833 	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
834 	"GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
835 	"GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
836 	"GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
837 };
838 
839 static const char * const sd_a_groups[] = {
840 	"sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", "sd_cmd_a"
841 };
842 
843 static const char * const sdxc_a_groups[] = {
844 	"sdxc_d0_a", "sdxc_d13_a", "sdxc_d47_a", "sdxc_clk_a", "sdxc_cmd_a"
845 };
846 
847 static const char * const pcm_a_groups[] = {
848 	"pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
849 };
850 
851 static const char * const uart_a_groups[] = {
852 	"uart_tx_a0", "uart_rx_a0", "uart_cts_a0", "uart_rts_a0",
853 	"uart_tx_a1", "uart_rx_a1", "uart_cts_a1", "uart_rts_a1"
854 };
855 
856 static const char * const uart_b_groups[] = {
857 	"uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
858 	"uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
859 };
860 
861 static const char * const iso7816_groups[] = {
862 	"iso7816_det", "iso7816_reset", "iso7816_clk", "iso7816_data"
863 };
864 
865 static const char * const i2c_d_groups[] = {
866 	"i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
867 };
868 
869 static const char * const xtal_groups[] = {
870 	"xtal_32k_out", "xtal_24m_out"
871 };
872 
873 static const char * const uart_c_groups[] = {
874 	"uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
875 };
876 
877 static const char * const pcm_b_groups[] = {
878 	"pcm_out_b", "pcm_in_b", "pcm_fs_b", "pcm_clk_b"
879 };
880 
881 static const char * const i2c_c_groups[] = {
882 	"i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
883 };
884 
885 static const char * const dvin_groups[] = {
886 	"dvin_rgb", "dvin_vs", "dvin_hs", "dvin_clk", "dvin_de"
887 };
888 
889 static const char * const enc_groups[] = {
890 	"enc_0", "enc_1", "enc_2", "enc_3", "enc_4", "enc_5",
891 	"enc_6", "enc_7", "enc_8", "enc_9", "enc_10", "enc_11",
892 	"enc_12", "enc_13", "enc_14", "enc_15", "enc_16", "enc_17"
893 };
894 
895 static const char * const vga_groups[] = {
896 	"vga_vs", "vga_hs"
897 };
898 
899 static const char * const hdmi_groups[] = {
900 	"hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec"
901 };
902 
903 static const char * const spi_groups[] = {
904 	"spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
905 	"spi_ss0_1", "spi_ss1_1", "spi_sclk_1", "spi_mosi_1",
906 	"spi_miso_1", "spi_ss2_1"
907 };
908 
909 static const char * const ethernet_groups[] = {
910 	"eth_tx_clk_50m", "eth_tx_en", "eth_txd1",
911 	"eth_txd0", "eth_rx_clk_in", "eth_rx_dv",
912 	"eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc", "eth_rxd2",
913 	"eth_rxd3", "eth_txd2", "eth_txd3"
914 };
915 
916 static const char * const i2c_a_groups[] = {
917 	"i2c_sda_a0", "i2c_sck_a0", "i2c_sda_a1", "i2c_sck_a1",
918 	"i2c_sda_a2", "i2c_sck_a2"
919 };
920 
921 static const char * const i2c_b_groups[] = {
922 	"i2c_sda_b", "i2c_sck_b"
923 };
924 
925 static const char * const i2s_groups[] = {
926 	"i2s_out_ch45", "i2s_out_ch23_pins", "i2s_out_ch01_pins",
927 	"i2s_in_ch01_pins", "i2s_lr_clk_in_pins", "i2s_ao_clk_in_pins",
928 	"i2s_am_clk_pins", "i2s_out_ch78_pins"
929 };
930 
931 static const char * const sd_c_groups[] = {
932 	"sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
933 	"sd_cmd_c", "sd_clk_c"
934 };
935 
936 static const char * const sdxc_c_groups[] = {
937 	"sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
938 	"sdxc_clk_c"
939 };
940 
941 static const char * const nand_groups[] = {
942 	"nand_io", "nand_io_ce0", "nand_io_ce1",
943 	"nand_io_rb0", "nand_ale", "nand_cle",
944 	"nand_wen_clk", "nand_ren_clk", "nand_dqs",
945 	"nand_ce2", "nand_ce3"
946 };
947 
948 static const char * const nor_groups[] = {
949 	"nor_d", "nor_q", "nor_c", "nor_cs"
950 };
951 
952 static const char * const pwm_a_groups[] = {
953 	"pwm_a_y", "pwm_a_z0", "pwm_a_z7"
954 };
955 
956 static const char * const pwm_b_groups[] = {
957 	"pwm_b_x", "pwm_b_z"
958 };
959 
960 static const char * const pwm_c_groups[] = {
961 	"pwm_c_dv9", "pwm_c_dv29", "pwm_c_z"
962 };
963 
964 static const char * const pwm_d_groups[] = {
965 	"pwm_d"
966 };
967 
968 static const char * const pwm_e_groups[] = {
969 	"pwm_e"
970 };
971 
972 static const char * const sd_b_groups[] = {
973 	"sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
974 	"sd_d3_b", "sd_d2_b"
975 };
976 
977 static const char * const sdxc_b_groups[] = {
978 	"sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
979 };
980 
981 static const char * const spdif_groups[] = {
982 	"spdif_in", "spdif_out"
983 };
984 
985 static const char * const uart_ao_groups[] = {
986 	"uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
987 };
988 
989 static const char * const remote_groups[] = {
990 	"remote_input", "remote_output_ao"
991 };
992 
993 static const char * const i2c_slave_ao_groups[] = {
994 	"i2c_slave_sck_ao", "i2c_slave_sda_ao"
995 };
996 
997 static const char * const uart_ao_b_groups[] = {
998 	"uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1"
999 };
1000 
1001 static const char * const i2c_mst_ao_groups[] = {
1002 	"i2c_mst_sck_ao", "i2c_mst_sda_ao"
1003 };
1004 
1005 static const char * const pwm_f_ao_groups[] = {
1006 	"pwm_f_ao"
1007 };
1008 
1009 static const char * const i2s_ao_groups[] = {
1010 	"i2s_am_clk_out_ao", "i2s_ao_clk_out_ao", "i2s_lr_clk_out_ao",
1011 	"i2s_out_ch01_ao"
1012 };
1013 
1014 static const char * const hdmi_cec_ao_groups[] = {
1015 	"hdmi_cec_ao"
1016 };
1017 
1018 static struct meson_pmx_func meson8_cbus_functions[] = {
1019 	FUNCTION(gpio_periphs),
1020 	FUNCTION(sd_a),
1021 	FUNCTION(sdxc_a),
1022 	FUNCTION(pcm_a),
1023 	FUNCTION(uart_a),
1024 	FUNCTION(uart_b),
1025 	FUNCTION(iso7816),
1026 	FUNCTION(i2c_d),
1027 	FUNCTION(xtal),
1028 	FUNCTION(uart_c),
1029 	FUNCTION(pcm_b),
1030 	FUNCTION(i2c_c),
1031 	FUNCTION(dvin),
1032 	FUNCTION(enc),
1033 	FUNCTION(vga),
1034 	FUNCTION(hdmi),
1035 	FUNCTION(spi),
1036 	FUNCTION(ethernet),
1037 	FUNCTION(i2c_a),
1038 	FUNCTION(i2c_b),
1039 	FUNCTION(sd_c),
1040 	FUNCTION(sdxc_c),
1041 	FUNCTION(nand),
1042 	FUNCTION(nor),
1043 	FUNCTION(sd_b),
1044 	FUNCTION(sdxc_b),
1045 	FUNCTION(pwm_a),
1046 	FUNCTION(pwm_b),
1047 	FUNCTION(pwm_c),
1048 	FUNCTION(pwm_d),
1049 	FUNCTION(pwm_e),
1050 	FUNCTION(i2s),
1051 	FUNCTION(spdif),
1052 };
1053 
1054 static struct meson_pmx_func meson8_aobus_functions[] = {
1055 	FUNCTION(gpio_aobus),
1056 	FUNCTION(uart_ao),
1057 	FUNCTION(remote),
1058 	FUNCTION(i2c_slave_ao),
1059 	FUNCTION(uart_ao_b),
1060 	FUNCTION(i2c_mst_ao),
1061 	FUNCTION(pwm_f_ao),
1062 	FUNCTION(i2s_ao),
1063 	FUNCTION(hdmi_cec_ao),
1064 };
1065 
1066 static struct meson_bank meson8_cbus_banks[] = {
1067 	/*   name    first     last         irq       pullen  pull    dir     out     in  */
1068 	BANK("X",    GPIOX_0,  GPIOX_21,    112, 133, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),
1069 	BANK("Y",    GPIOY_0,  GPIOY_16,    95,  111, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),
1070 	BANK("DV",   GPIODV_0, GPIODV_29,   65,   94, 0,  0,  0,  0,  7,  0,  8,  0,  9,  0),
1071 	BANK("H",    GPIOH_0,  GPIOH_9,     29,   38, 1, 16,  1, 16,  9, 19, 10, 19, 11, 19),
1072 	BANK("Z",    GPIOZ_0,  GPIOZ_14,    14,   28, 1,  0,  1,  0,  3, 17,  4, 17,  5, 17),
1073 	BANK("CARD", CARD_0,   CARD_6,      58,   64, 2, 20,  2, 20,  0, 22,  1, 22,  2, 22),
1074 	BANK("BOOT", BOOT_0,   BOOT_18,     39,   57, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),
1075 };
1076 
1077 static struct meson_bank meson8_aobus_banks[] = {
1078 	/*   name    first     last         irq    pullen  pull    dir     out     in  */
1079 	BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16,  0,  0,  0,  0,  0, 16,  1,  0),
1080 };
1081 
1082 static struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
1083 	.name		= "cbus-banks",
1084 	.pins		= meson8_cbus_pins,
1085 	.groups		= meson8_cbus_groups,
1086 	.funcs		= meson8_cbus_functions,
1087 	.banks		= meson8_cbus_banks,
1088 	.num_pins	= ARRAY_SIZE(meson8_cbus_pins),
1089 	.num_groups	= ARRAY_SIZE(meson8_cbus_groups),
1090 	.num_funcs	= ARRAY_SIZE(meson8_cbus_functions),
1091 	.num_banks	= ARRAY_SIZE(meson8_cbus_banks),
1092 	.pmx_ops	= &meson8_pmx_ops,
1093 };
1094 
1095 static struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
1096 	.name		= "ao-bank",
1097 	.pins		= meson8_aobus_pins,
1098 	.groups		= meson8_aobus_groups,
1099 	.funcs		= meson8_aobus_functions,
1100 	.banks		= meson8_aobus_banks,
1101 	.num_pins	= ARRAY_SIZE(meson8_aobus_pins),
1102 	.num_groups	= ARRAY_SIZE(meson8_aobus_groups),
1103 	.num_funcs	= ARRAY_SIZE(meson8_aobus_functions),
1104 	.num_banks	= ARRAY_SIZE(meson8_aobus_banks),
1105 	.pmx_ops	= &meson8_pmx_ops,
1106 	.parse_dt	= &meson8_aobus_parse_dt_extra,
1107 };
1108 
1109 static const struct of_device_id meson8_pinctrl_dt_match[] = {
1110 	{
1111 		.compatible = "amlogic,meson8-cbus-pinctrl",
1112 		.data = &meson8_cbus_pinctrl_data,
1113 	},
1114 	{
1115 		.compatible = "amlogic,meson8-aobus-pinctrl",
1116 		.data = &meson8_aobus_pinctrl_data,
1117 	},
1118 	{
1119 		.compatible = "amlogic,meson8m2-cbus-pinctrl",
1120 		.data = &meson8_cbus_pinctrl_data,
1121 	},
1122 	{
1123 		.compatible = "amlogic,meson8m2-aobus-pinctrl",
1124 		.data = &meson8_aobus_pinctrl_data,
1125 	},
1126 	{ },
1127 };
1128 
1129 static struct platform_driver meson8_pinctrl_driver = {
1130 	.probe		= meson_pinctrl_probe,
1131 	.driver = {
1132 		.name	= "meson8-pinctrl",
1133 		.of_match_table = meson8_pinctrl_dt_match,
1134 	},
1135 };
1136 builtin_platform_driver(meson8_pinctrl_driver);
1137