1 /*
2  * Pin controller and GPIO driver for Amlogic Meson GXL.
3  *
4  * Copyright (C) 2016 Endless Mobile, Inc.
5  * Author: Carlo Caione <carlo@endlessm.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program. If not, see <http://www.gnu.org/licenses/>.
13  */
14 
15 #include <dt-bindings/gpio/meson-gxl-gpio.h>
16 #include "pinctrl-meson.h"
17 
18 #define EE_OFF	10
19 
20 static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {
21 	MESON_PIN(GPIOZ_0, EE_OFF),
22 	MESON_PIN(GPIOZ_1, EE_OFF),
23 	MESON_PIN(GPIOZ_2, EE_OFF),
24 	MESON_PIN(GPIOZ_3, EE_OFF),
25 	MESON_PIN(GPIOZ_4, EE_OFF),
26 	MESON_PIN(GPIOZ_5, EE_OFF),
27 	MESON_PIN(GPIOZ_6, EE_OFF),
28 	MESON_PIN(GPIOZ_7, EE_OFF),
29 	MESON_PIN(GPIOZ_8, EE_OFF),
30 	MESON_PIN(GPIOZ_9, EE_OFF),
31 	MESON_PIN(GPIOZ_10, EE_OFF),
32 	MESON_PIN(GPIOZ_11, EE_OFF),
33 	MESON_PIN(GPIOZ_12, EE_OFF),
34 	MESON_PIN(GPIOZ_13, EE_OFF),
35 	MESON_PIN(GPIOZ_14, EE_OFF),
36 	MESON_PIN(GPIOZ_15, EE_OFF),
37 
38 	MESON_PIN(GPIOH_0, EE_OFF),
39 	MESON_PIN(GPIOH_1, EE_OFF),
40 	MESON_PIN(GPIOH_2, EE_OFF),
41 	MESON_PIN(GPIOH_3, EE_OFF),
42 	MESON_PIN(GPIOH_4, EE_OFF),
43 	MESON_PIN(GPIOH_5, EE_OFF),
44 	MESON_PIN(GPIOH_6, EE_OFF),
45 	MESON_PIN(GPIOH_7, EE_OFF),
46 	MESON_PIN(GPIOH_8, EE_OFF),
47 	MESON_PIN(GPIOH_9, EE_OFF),
48 
49 	MESON_PIN(BOOT_0, EE_OFF),
50 	MESON_PIN(BOOT_1, EE_OFF),
51 	MESON_PIN(BOOT_2, EE_OFF),
52 	MESON_PIN(BOOT_3, EE_OFF),
53 	MESON_PIN(BOOT_4, EE_OFF),
54 	MESON_PIN(BOOT_5, EE_OFF),
55 	MESON_PIN(BOOT_6, EE_OFF),
56 	MESON_PIN(BOOT_7, EE_OFF),
57 	MESON_PIN(BOOT_8, EE_OFF),
58 	MESON_PIN(BOOT_9, EE_OFF),
59 	MESON_PIN(BOOT_10, EE_OFF),
60 	MESON_PIN(BOOT_11, EE_OFF),
61 	MESON_PIN(BOOT_12, EE_OFF),
62 	MESON_PIN(BOOT_13, EE_OFF),
63 	MESON_PIN(BOOT_14, EE_OFF),
64 	MESON_PIN(BOOT_15, EE_OFF),
65 
66 	MESON_PIN(CARD_0, EE_OFF),
67 	MESON_PIN(CARD_1, EE_OFF),
68 	MESON_PIN(CARD_2, EE_OFF),
69 	MESON_PIN(CARD_3, EE_OFF),
70 	MESON_PIN(CARD_4, EE_OFF),
71 	MESON_PIN(CARD_5, EE_OFF),
72 	MESON_PIN(CARD_6, EE_OFF),
73 
74 	MESON_PIN(GPIODV_0, EE_OFF),
75 	MESON_PIN(GPIODV_1, EE_OFF),
76 	MESON_PIN(GPIODV_2, EE_OFF),
77 	MESON_PIN(GPIODV_3, EE_OFF),
78 	MESON_PIN(GPIODV_4, EE_OFF),
79 	MESON_PIN(GPIODV_5, EE_OFF),
80 	MESON_PIN(GPIODV_6, EE_OFF),
81 	MESON_PIN(GPIODV_7, EE_OFF),
82 	MESON_PIN(GPIODV_8, EE_OFF),
83 	MESON_PIN(GPIODV_9, EE_OFF),
84 	MESON_PIN(GPIODV_10, EE_OFF),
85 	MESON_PIN(GPIODV_11, EE_OFF),
86 	MESON_PIN(GPIODV_12, EE_OFF),
87 	MESON_PIN(GPIODV_13, EE_OFF),
88 	MESON_PIN(GPIODV_14, EE_OFF),
89 	MESON_PIN(GPIODV_15, EE_OFF),
90 	MESON_PIN(GPIODV_16, EE_OFF),
91 	MESON_PIN(GPIODV_17, EE_OFF),
92 	MESON_PIN(GPIODV_19, EE_OFF),
93 	MESON_PIN(GPIODV_20, EE_OFF),
94 	MESON_PIN(GPIODV_21, EE_OFF),
95 	MESON_PIN(GPIODV_22, EE_OFF),
96 	MESON_PIN(GPIODV_23, EE_OFF),
97 	MESON_PIN(GPIODV_24, EE_OFF),
98 	MESON_PIN(GPIODV_25, EE_OFF),
99 	MESON_PIN(GPIODV_26, EE_OFF),
100 	MESON_PIN(GPIODV_27, EE_OFF),
101 	MESON_PIN(GPIODV_28, EE_OFF),
102 	MESON_PIN(GPIODV_29, EE_OFF),
103 
104 	MESON_PIN(GPIOX_0, EE_OFF),
105 	MESON_PIN(GPIOX_1, EE_OFF),
106 	MESON_PIN(GPIOX_2, EE_OFF),
107 	MESON_PIN(GPIOX_3, EE_OFF),
108 	MESON_PIN(GPIOX_4, EE_OFF),
109 	MESON_PIN(GPIOX_5, EE_OFF),
110 	MESON_PIN(GPIOX_6, EE_OFF),
111 	MESON_PIN(GPIOX_7, EE_OFF),
112 	MESON_PIN(GPIOX_8, EE_OFF),
113 	MESON_PIN(GPIOX_9, EE_OFF),
114 	MESON_PIN(GPIOX_10, EE_OFF),
115 	MESON_PIN(GPIOX_11, EE_OFF),
116 	MESON_PIN(GPIOX_12, EE_OFF),
117 	MESON_PIN(GPIOX_13, EE_OFF),
118 	MESON_PIN(GPIOX_14, EE_OFF),
119 	MESON_PIN(GPIOX_15, EE_OFF),
120 	MESON_PIN(GPIOX_16, EE_OFF),
121 	MESON_PIN(GPIOX_17, EE_OFF),
122 	MESON_PIN(GPIOX_18, EE_OFF),
123 
124 	MESON_PIN(GPIOCLK_0, EE_OFF),
125 	MESON_PIN(GPIOCLK_1, EE_OFF),
126 
127 	MESON_PIN(GPIO_TEST_N, EE_OFF),
128 };
129 
130 static const unsigned int emmc_nand_d07_pins[] = {
131 	PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
132 	PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF),
133 	PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF),
134 };
135 static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
136 static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
137 static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
138 
139 static const unsigned int nor_d_pins[]		= { PIN(BOOT_11, EE_OFF) };
140 static const unsigned int nor_q_pins[]		= { PIN(BOOT_12, EE_OFF) };
141 static const unsigned int nor_c_pins[]		= { PIN(BOOT_13, EE_OFF) };
142 static const unsigned int nor_cs_pins[]		= { PIN(BOOT_15, EE_OFF) };
143 
144 static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
145 static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
146 static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
147 static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
148 static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };
149 static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };
150 
151 static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) };
152 static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) };
153 static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) };
154 static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) };
155 static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_4, EE_OFF) };
156 static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_5, EE_OFF) };
157 static const unsigned int sdio_irq_pins[] = { PIN(GPIOX_7, EE_OFF) };
158 
159 static const unsigned int nand_ce0_pins[]	= { PIN(BOOT_8, EE_OFF) };
160 static const unsigned int nand_ce1_pins[]	= { PIN(BOOT_9, EE_OFF) };
161 static const unsigned int nand_rb0_pins[]	= { PIN(BOOT_10, EE_OFF) };
162 static const unsigned int nand_ale_pins[]	= { PIN(BOOT_11, EE_OFF) };
163 static const unsigned int nand_cle_pins[]	= { PIN(BOOT_12, EE_OFF) };
164 static const unsigned int nand_wen_clk_pins[]	= { PIN(BOOT_13, EE_OFF) };
165 static const unsigned int nand_ren_wr_pins[]	= { PIN(BOOT_14, EE_OFF) };
166 static const unsigned int nand_dqs_pins[]	= { PIN(BOOT_15, EE_OFF) };
167 
168 static const unsigned int uart_tx_a_pins[]	= { PIN(GPIOX_12, EE_OFF) };
169 static const unsigned int uart_rx_a_pins[]	= { PIN(GPIOX_13, EE_OFF) };
170 static const unsigned int uart_cts_a_pins[]	= { PIN(GPIOX_14, EE_OFF) };
171 static const unsigned int uart_rts_a_pins[]	= { PIN(GPIOX_15, EE_OFF) };
172 
173 static const unsigned int uart_tx_b_pins[]	= { PIN(GPIODV_24, EE_OFF) };
174 static const unsigned int uart_rx_b_pins[]	= { PIN(GPIODV_25, EE_OFF) };
175 static const unsigned int uart_cts_b_pins[]	= { PIN(GPIODV_26, EE_OFF) };
176 static const unsigned int uart_rts_b_pins[]	= { PIN(GPIODV_27, EE_OFF) };
177 
178 static const unsigned int uart_tx_c_pins[]	= { PIN(GPIOX_8, EE_OFF) };
179 static const unsigned int uart_rx_c_pins[]	= { PIN(GPIOX_9, EE_OFF) };
180 static const unsigned int uart_cts_c_pins[]	= { PIN(GPIOX_10, EE_OFF) };
181 static const unsigned int uart_rts_c_pins[]	= { PIN(GPIOX_11, EE_OFF) };
182 
183 static const unsigned int i2c_sck_a_pins[]	= { PIN(GPIODV_25, EE_OFF) };
184 static const unsigned int i2c_sda_a_pins[]	= { PIN(GPIODV_24, EE_OFF) };
185 
186 static const unsigned int i2c_sck_b_pins[]	= { PIN(GPIODV_27, EE_OFF) };
187 static const unsigned int i2c_sda_b_pins[]	= { PIN(GPIODV_26, EE_OFF) };
188 
189 static const unsigned int i2c_sck_c_pins[]	= { PIN(GPIODV_29, EE_OFF) };
190 static const unsigned int i2c_sda_c_pins[]	= { PIN(GPIODV_28, EE_OFF) };
191 
192 static const unsigned int i2c_sck_c_dv19_pins[]	= { PIN(GPIODV_19, EE_OFF) };
193 static const unsigned int i2c_sda_c_dv18_pins[]	= { PIN(GPIODV_18, EE_OFF) };
194 
195 static const unsigned int eth_mdio_pins[]	= { PIN(GPIOZ_0, EE_OFF) };
196 static const unsigned int eth_mdc_pins[]	= { PIN(GPIOZ_1, EE_OFF) };
197 static const unsigned int eth_clk_rx_clk_pins[]	= { PIN(GPIOZ_2, EE_OFF) };
198 static const unsigned int eth_rx_dv_pins[]	= { PIN(GPIOZ_3, EE_OFF) };
199 static const unsigned int eth_rxd0_pins[]	= { PIN(GPIOZ_4, EE_OFF) };
200 static const unsigned int eth_rxd1_pins[]	= { PIN(GPIOZ_5, EE_OFF) };
201 static const unsigned int eth_rxd2_pins[]	= { PIN(GPIOZ_6, EE_OFF) };
202 static const unsigned int eth_rxd3_pins[]	= { PIN(GPIOZ_7, EE_OFF) };
203 static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) };
204 static const unsigned int eth_tx_en_pins[]	= { PIN(GPIOZ_9, EE_OFF) };
205 static const unsigned int eth_txd0_pins[]	= { PIN(GPIOZ_10, EE_OFF) };
206 static const unsigned int eth_txd1_pins[]	= { PIN(GPIOZ_11, EE_OFF) };
207 static const unsigned int eth_txd2_pins[]	= { PIN(GPIOZ_12, EE_OFF) };
208 static const unsigned int eth_txd3_pins[]	= { PIN(GPIOZ_13, EE_OFF) };
209 
210 static const unsigned int pwm_a_pins[]		= { PIN(GPIOX_6, EE_OFF) };
211 
212 static const unsigned int pwm_b_pins[]		= { PIN(GPIODV_29, EE_OFF) };
213 
214 static const unsigned int pwm_c_pins[]		= { PIN(GPIOZ_15, EE_OFF) };
215 
216 static const unsigned int pwm_d_pins[]		= { PIN(GPIODV_28, EE_OFF) };
217 
218 static const unsigned int pwm_e_pins[]		= { PIN(GPIOX_16, EE_OFF) };
219 
220 static const unsigned int pwm_f_clk_pins[]	= { PIN(GPIOCLK_1, EE_OFF) };
221 static const unsigned int pwm_f_x_pins[]	= { PIN(GPIOX_7, EE_OFF) };
222 
223 static const unsigned int hdmi_hpd_pins[]	= { PIN(GPIOH_0, EE_OFF) };
224 static const unsigned int hdmi_sda_pins[]	= { PIN(GPIOH_1, EE_OFF) };
225 static const unsigned int hdmi_scl_pins[]	= { PIN(GPIOH_2, EE_OFF) };
226 
227 static const unsigned int i2s_am_clk_pins[]	= { PIN(GPIOH_6, EE_OFF) };
228 static const unsigned int i2s_out_ao_clk_pins[]	= { PIN(GPIOH_7, EE_OFF) };
229 static const unsigned int i2s_out_lr_clk_pins[]	= { PIN(GPIOH_8, EE_OFF) };
230 static const unsigned int i2s_out_ch01_pins[]	= { PIN(GPIOH_9, EE_OFF) };
231 static const unsigned int i2s_out_ch23_z_pins[]	= { PIN(GPIOZ_5, EE_OFF) };
232 static const unsigned int i2s_out_ch45_z_pins[]	= { PIN(GPIOZ_6, EE_OFF) };
233 static const unsigned int i2s_out_ch67_z_pins[]	= { PIN(GPIOZ_7, EE_OFF) };
234 
235 static const unsigned int spdif_out_h_pins[]	= { PIN(GPIOH_4, EE_OFF) };
236 
237 static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {
238 	MESON_PIN(GPIOAO_0, 0),
239 	MESON_PIN(GPIOAO_1, 0),
240 	MESON_PIN(GPIOAO_2, 0),
241 	MESON_PIN(GPIOAO_3, 0),
242 	MESON_PIN(GPIOAO_4, 0),
243 	MESON_PIN(GPIOAO_5, 0),
244 	MESON_PIN(GPIOAO_6, 0),
245 	MESON_PIN(GPIOAO_7, 0),
246 	MESON_PIN(GPIOAO_8, 0),
247 	MESON_PIN(GPIOAO_9, 0),
248 };
249 
250 static const unsigned int uart_tx_ao_a_pins[]	= { PIN(GPIOAO_0, 0) };
251 static const unsigned int uart_rx_ao_a_pins[]	= { PIN(GPIOAO_1, 0) };
252 static const unsigned int uart_tx_ao_b_0_pins[]	= { PIN(GPIOAO_0, 0) };
253 static const unsigned int uart_rx_ao_b_1_pins[]	= { PIN(GPIOAO_1, 0) };
254 static const unsigned int uart_cts_ao_a_pins[]	= { PIN(GPIOAO_2, 0) };
255 static const unsigned int uart_rts_ao_a_pins[]	= { PIN(GPIOAO_3, 0) };
256 static const unsigned int uart_tx_ao_b_pins[]	= { PIN(GPIOAO_4, 0) };
257 static const unsigned int uart_rx_ao_b_pins[]	= { PIN(GPIOAO_5, 0) };
258 static const unsigned int uart_cts_ao_b_pins[]	= { PIN(GPIOAO_2, 0) };
259 static const unsigned int uart_rts_ao_b_pins[]	= { PIN(GPIOAO_3, 0) };
260 
261 static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };
262 static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
263 static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };
264 static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
265 
266 static const unsigned int remote_input_ao_pins[] = {PIN(GPIOAO_7, 0) };
267 
268 static const unsigned int pwm_ao_a_3_pins[]	= { PIN(GPIOAO_3, 0) };
269 static const unsigned int pwm_ao_a_8_pins[]	= { PIN(GPIOAO_8, 0) };
270 
271 static const unsigned int pwm_ao_b_pins[]	= { PIN(GPIOAO_9, 0) };
272 static const unsigned int pwm_ao_b_6_pins[]	= { PIN(GPIOAO_6, 0) };
273 
274 static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, EE_OFF) };
275 static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, EE_OFF) };
276 
277 static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, EE_OFF) };
278 static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, EE_OFF) };
279 
280 static struct meson_pmx_group meson_gxl_periphs_groups[] = {
281 	GPIO_GROUP(GPIOZ_0, EE_OFF),
282 	GPIO_GROUP(GPIOZ_1, EE_OFF),
283 	GPIO_GROUP(GPIOZ_2, EE_OFF),
284 	GPIO_GROUP(GPIOZ_3, EE_OFF),
285 	GPIO_GROUP(GPIOZ_4, EE_OFF),
286 	GPIO_GROUP(GPIOZ_5, EE_OFF),
287 	GPIO_GROUP(GPIOZ_6, EE_OFF),
288 	GPIO_GROUP(GPIOZ_7, EE_OFF),
289 	GPIO_GROUP(GPIOZ_8, EE_OFF),
290 	GPIO_GROUP(GPIOZ_9, EE_OFF),
291 	GPIO_GROUP(GPIOZ_10, EE_OFF),
292 	GPIO_GROUP(GPIOZ_11, EE_OFF),
293 	GPIO_GROUP(GPIOZ_12, EE_OFF),
294 	GPIO_GROUP(GPIOZ_13, EE_OFF),
295 	GPIO_GROUP(GPIOZ_14, EE_OFF),
296 	GPIO_GROUP(GPIOZ_15, EE_OFF),
297 
298 	GPIO_GROUP(GPIOH_0, EE_OFF),
299 	GPIO_GROUP(GPIOH_1, EE_OFF),
300 	GPIO_GROUP(GPIOH_2, EE_OFF),
301 	GPIO_GROUP(GPIOH_3, EE_OFF),
302 	GPIO_GROUP(GPIOH_4, EE_OFF),
303 	GPIO_GROUP(GPIOH_5, EE_OFF),
304 	GPIO_GROUP(GPIOH_6, EE_OFF),
305 	GPIO_GROUP(GPIOH_7, EE_OFF),
306 	GPIO_GROUP(GPIOH_8, EE_OFF),
307 	GPIO_GROUP(GPIOH_9, EE_OFF),
308 
309 	GPIO_GROUP(BOOT_0, EE_OFF),
310 	GPIO_GROUP(BOOT_1, EE_OFF),
311 	GPIO_GROUP(BOOT_2, EE_OFF),
312 	GPIO_GROUP(BOOT_3, EE_OFF),
313 	GPIO_GROUP(BOOT_4, EE_OFF),
314 	GPIO_GROUP(BOOT_5, EE_OFF),
315 	GPIO_GROUP(BOOT_6, EE_OFF),
316 	GPIO_GROUP(BOOT_7, EE_OFF),
317 	GPIO_GROUP(BOOT_8, EE_OFF),
318 	GPIO_GROUP(BOOT_9, EE_OFF),
319 	GPIO_GROUP(BOOT_10, EE_OFF),
320 	GPIO_GROUP(BOOT_11, EE_OFF),
321 	GPIO_GROUP(BOOT_12, EE_OFF),
322 	GPIO_GROUP(BOOT_13, EE_OFF),
323 	GPIO_GROUP(BOOT_14, EE_OFF),
324 	GPIO_GROUP(BOOT_15, EE_OFF),
325 
326 	GPIO_GROUP(CARD_0, EE_OFF),
327 	GPIO_GROUP(CARD_1, EE_OFF),
328 	GPIO_GROUP(CARD_2, EE_OFF),
329 	GPIO_GROUP(CARD_3, EE_OFF),
330 	GPIO_GROUP(CARD_4, EE_OFF),
331 	GPIO_GROUP(CARD_5, EE_OFF),
332 	GPIO_GROUP(CARD_6, EE_OFF),
333 
334 	GPIO_GROUP(GPIODV_0, EE_OFF),
335 	GPIO_GROUP(GPIODV_1, EE_OFF),
336 	GPIO_GROUP(GPIODV_2, EE_OFF),
337 	GPIO_GROUP(GPIODV_3, EE_OFF),
338 	GPIO_GROUP(GPIODV_4, EE_OFF),
339 	GPIO_GROUP(GPIODV_5, EE_OFF),
340 	GPIO_GROUP(GPIODV_6, EE_OFF),
341 	GPIO_GROUP(GPIODV_7, EE_OFF),
342 	GPIO_GROUP(GPIODV_8, EE_OFF),
343 	GPIO_GROUP(GPIODV_9, EE_OFF),
344 	GPIO_GROUP(GPIODV_10, EE_OFF),
345 	GPIO_GROUP(GPIODV_11, EE_OFF),
346 	GPIO_GROUP(GPIODV_12, EE_OFF),
347 	GPIO_GROUP(GPIODV_13, EE_OFF),
348 	GPIO_GROUP(GPIODV_14, EE_OFF),
349 	GPIO_GROUP(GPIODV_15, EE_OFF),
350 	GPIO_GROUP(GPIODV_16, EE_OFF),
351 	GPIO_GROUP(GPIODV_17, EE_OFF),
352 	GPIO_GROUP(GPIODV_19, EE_OFF),
353 	GPIO_GROUP(GPIODV_20, EE_OFF),
354 	GPIO_GROUP(GPIODV_21, EE_OFF),
355 	GPIO_GROUP(GPIODV_22, EE_OFF),
356 	GPIO_GROUP(GPIODV_23, EE_OFF),
357 	GPIO_GROUP(GPIODV_24, EE_OFF),
358 	GPIO_GROUP(GPIODV_25, EE_OFF),
359 	GPIO_GROUP(GPIODV_26, EE_OFF),
360 	GPIO_GROUP(GPIODV_27, EE_OFF),
361 	GPIO_GROUP(GPIODV_28, EE_OFF),
362 	GPIO_GROUP(GPIODV_29, EE_OFF),
363 
364 	GPIO_GROUP(GPIOX_0, EE_OFF),
365 	GPIO_GROUP(GPIOX_1, EE_OFF),
366 	GPIO_GROUP(GPIOX_2, EE_OFF),
367 	GPIO_GROUP(GPIOX_3, EE_OFF),
368 	GPIO_GROUP(GPIOX_4, EE_OFF),
369 	GPIO_GROUP(GPIOX_5, EE_OFF),
370 	GPIO_GROUP(GPIOX_6, EE_OFF),
371 	GPIO_GROUP(GPIOX_7, EE_OFF),
372 	GPIO_GROUP(GPIOX_8, EE_OFF),
373 	GPIO_GROUP(GPIOX_9, EE_OFF),
374 	GPIO_GROUP(GPIOX_10, EE_OFF),
375 	GPIO_GROUP(GPIOX_11, EE_OFF),
376 	GPIO_GROUP(GPIOX_12, EE_OFF),
377 	GPIO_GROUP(GPIOX_13, EE_OFF),
378 	GPIO_GROUP(GPIOX_14, EE_OFF),
379 	GPIO_GROUP(GPIOX_15, EE_OFF),
380 	GPIO_GROUP(GPIOX_16, EE_OFF),
381 	GPIO_GROUP(GPIOX_17, EE_OFF),
382 	GPIO_GROUP(GPIOX_18, EE_OFF),
383 
384 	GPIO_GROUP(GPIOCLK_0, EE_OFF),
385 	GPIO_GROUP(GPIOCLK_1, EE_OFF),
386 
387 	GPIO_GROUP(GPIO_TEST_N, EE_OFF),
388 
389 	/* Bank X */
390 	GROUP(sdio_d0,		5,	31),
391 	GROUP(sdio_d1,		5,	30),
392 	GROUP(sdio_d2,		5,	29),
393 	GROUP(sdio_d3,		5,	28),
394 	GROUP(sdio_clk,		5,	27),
395 	GROUP(sdio_cmd,		5,	26),
396 	GROUP(sdio_irq,		5,	24),
397 	GROUP(uart_tx_a,	5,	19),
398 	GROUP(uart_rx_a,	5,	18),
399 	GROUP(uart_cts_a,	5,	17),
400 	GROUP(uart_rts_a,	5,	16),
401 	GROUP(uart_tx_c,	5,	13),
402 	GROUP(uart_rx_c,	5,	12),
403 	GROUP(uart_cts_c,	5,	11),
404 	GROUP(uart_rts_c,	5,	10),
405 	GROUP(pwm_a,		5,	25),
406 	GROUP(pwm_e,		5,	15),
407 	GROUP(pwm_f_x,		5,	14),
408 
409 	/* Bank Z */
410 	GROUP(eth_mdio,		4,	23),
411 	GROUP(eth_mdc,		4,	22),
412 	GROUP(eth_clk_rx_clk,	4,	21),
413 	GROUP(eth_rx_dv,	4,	20),
414 	GROUP(eth_rxd0,		4,	19),
415 	GROUP(eth_rxd1,		4,	18),
416 	GROUP(eth_rxd2,		4,	17),
417 	GROUP(eth_rxd3,		4,	16),
418 	GROUP(eth_rgmii_tx_clk,	4,	15),
419 	GROUP(eth_tx_en,	4,	14),
420 	GROUP(eth_txd0,		4,	13),
421 	GROUP(eth_txd1,		4,	12),
422 	GROUP(eth_txd2,		4,	11),
423 	GROUP(eth_txd3,		4,	10),
424 	GROUP(pwm_c,		3,	20),
425 	GROUP(i2s_out_ch23_z,	3,	26),
426 	GROUP(i2s_out_ch45_z,	3,	25),
427 	GROUP(i2s_out_ch67_z,	3,	24),
428 
429 	/* Bank H */
430 	GROUP(hdmi_hpd,		6,	31),
431 	GROUP(hdmi_sda,		6,	30),
432 	GROUP(hdmi_scl,		6,	29),
433 	GROUP(i2s_am_clk,	6,	26),
434 	GROUP(i2s_out_ao_clk,	6,	25),
435 	GROUP(i2s_out_lr_clk,	6,	24),
436 	GROUP(i2s_out_ch01,	6,	23),
437 	GROUP(spdif_out_h,	6,	28),
438 
439 	/* Bank DV */
440 	GROUP(uart_tx_b,	2,	16),
441 	GROUP(uart_rx_b,	2,	15),
442 	GROUP(uart_cts_b,	2,	14),
443 	GROUP(uart_rts_b,	2,	13),
444 	GROUP(i2c_sda_c_dv18,	1,	17),
445 	GROUP(i2c_sck_c_dv19,	1,	16),
446 	GROUP(i2c_sda_a,	1,	15),
447 	GROUP(i2c_sck_a,	1,	14),
448 	GROUP(i2c_sda_b,	1,	13),
449 	GROUP(i2c_sck_b,	1,	12),
450 	GROUP(i2c_sda_c,	1,	11),
451 	GROUP(i2c_sck_c,	1,	10),
452 	GROUP(pwm_b,		2,	11),
453 	GROUP(pwm_d,		2,	12),
454 
455 	/* Bank BOOT */
456 	GROUP(emmc_nand_d07,	7,	31),
457 	GROUP(emmc_clk,		7,	30),
458 	GROUP(emmc_cmd,		7,	29),
459 	GROUP(emmc_ds,		7,	28),
460 	GROUP(nor_d,		7,	13),
461 	GROUP(nor_q,		7,	12),
462 	GROUP(nor_c,		7,	11),
463 	GROUP(nor_cs,		7,	10),
464 	GROUP(nand_ce0,		7,	7),
465 	GROUP(nand_ce1,		7,	6),
466 	GROUP(nand_rb0,		7,	5),
467 	GROUP(nand_ale,		7,	4),
468 	GROUP(nand_cle,		7,	3),
469 	GROUP(nand_wen_clk,	7,	2),
470 	GROUP(nand_ren_wr,	7,	1),
471 	GROUP(nand_dqs,		7,	0),
472 
473 	/* Bank CARD */
474 	GROUP(sdcard_d1,	6,	5),
475 	GROUP(sdcard_d0,	6,	4),
476 	GROUP(sdcard_d3,	6,	1),
477 	GROUP(sdcard_d2,	6,	0),
478 	GROUP(sdcard_cmd,	6,	2),
479 	GROUP(sdcard_clk,	6,	3),
480 
481 	/* Bank CLK */
482 	GROUP(pwm_f_clk,	8,	30),
483 };
484 
485 static struct meson_pmx_group meson_gxl_aobus_groups[] = {
486 	GPIO_GROUP(GPIOAO_0, 0),
487 	GPIO_GROUP(GPIOAO_1, 0),
488 	GPIO_GROUP(GPIOAO_2, 0),
489 	GPIO_GROUP(GPIOAO_3, 0),
490 	GPIO_GROUP(GPIOAO_4, 0),
491 	GPIO_GROUP(GPIOAO_5, 0),
492 	GPIO_GROUP(GPIOAO_6, 0),
493 	GPIO_GROUP(GPIOAO_7, 0),
494 	GPIO_GROUP(GPIOAO_8, 0),
495 	GPIO_GROUP(GPIOAO_9, 0),
496 
497 	/* bank AO */
498 	GROUP(uart_tx_ao_b_0,	0,	26),
499 	GROUP(uart_rx_ao_b_1,	0,	25),
500 	GROUP(uart_tx_ao_b,	0,	24),
501 	GROUP(uart_rx_ao_b,	0,	23),
502 	GROUP(uart_tx_ao_a,	0,	12),
503 	GROUP(uart_rx_ao_a,	0,	11),
504 	GROUP(uart_cts_ao_a,	0,	10),
505 	GROUP(uart_rts_ao_a,	0,	9),
506 	GROUP(uart_cts_ao_b,	0,	8),
507 	GROUP(uart_rts_ao_b,	0,	7),
508 	GROUP(i2c_sck_ao,	0,	6),
509 	GROUP(i2c_sda_ao,	0,	5),
510 	GROUP(i2c_slave_sck_ao, 0,	2),
511 	GROUP(i2c_slave_sda_ao, 0,	1),
512 	GROUP(remote_input_ao,	0,	0),
513 	GROUP(pwm_ao_a_3,	0,	22),
514 	GROUP(pwm_ao_b_6,	0,	18),
515 	GROUP(pwm_ao_a_8,	0,	17),
516 	GROUP(pwm_ao_b,		0,	3),
517 	GROUP(i2s_out_ch23_ao,	1,	0),
518 	GROUP(i2s_out_ch45_ao,	1,	1),
519 	GROUP(spdif_out_ao_6,	0,	16),
520 	GROUP(spdif_out_ao_9,	0,	4),
521 };
522 
523 static const char * const gpio_periphs_groups[] = {
524 	"GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
525 	"GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
526 	"GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
527 	"GPIOZ_15",
528 
529 	"GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
530 	"GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
531 
532 	"BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
533 	"BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
534 	"BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
535 	"BOOT_15",
536 
537 	"CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
538 	"CARD_5", "CARD_6",
539 
540 	"GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
541 	"GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
542 	"GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
543 	"GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
544 	"GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
545 	"GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
546 
547 	"GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
548 	"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
549 	"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
550 	"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18",
551 
552 	"GPIO_TEST_N",
553 };
554 
555 static const char * const emmc_groups[] = {
556 	"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
557 };
558 
559 static const char * const nor_groups[] = {
560 	"nor_d", "nor_q", "nor_c", "nor_cs",
561 };
562 
563 static const char * const sdcard_groups[] = {
564 	"sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
565 	"sdcard_cmd", "sdcard_clk",
566 };
567 
568 static const char * const sdio_groups[] = {
569 	"sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
570 	"sdio_cmd", "sdio_clk", "sdio_irq",
571 };
572 
573 static const char * const nand_groups[] = {
574 	"nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
575 	"nand_wen_clk", "nand_ren_wr", "nand_dqs",
576 };
577 
578 static const char * const uart_a_groups[] = {
579 	"uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
580 };
581 
582 static const char * const uart_b_groups[] = {
583 	"uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b",
584 };
585 
586 static const char * const uart_c_groups[] = {
587 	"uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c",
588 };
589 
590 static const char * const i2c_a_groups[] = {
591 	"i2c_sck_a", "i2c_sda_a",
592 };
593 
594 static const char * const i2c_b_groups[] = {
595 	"i2c_sck_b", "i2c_sda_b",
596 };
597 
598 static const char * const i2c_c_groups[] = {
599 	"i2c_sck_c", "i2c_sda_c", "i2c_sda_c_dv18", "i2c_sck_c_dv19",
600 };
601 
602 static const char * const eth_groups[] = {
603 	"eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv",
604 	"eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3",
605 	"eth_rgmii_tx_clk", "eth_tx_en",
606 	"eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3",
607 };
608 
609 static const char * const pwm_a_groups[] = {
610 	"pwm_a",
611 };
612 
613 static const char * const pwm_b_groups[] = {
614 	"pwm_b",
615 };
616 
617 static const char * const pwm_c_groups[] = {
618 	"pwm_c",
619 };
620 
621 static const char * const pwm_d_groups[] = {
622 	"pwm_d",
623 };
624 
625 static const char * const pwm_e_groups[] = {
626 	"pwm_e",
627 };
628 
629 static const char * const pwm_f_groups[] = {
630 	"pwm_f_clk", "pwm_f_x",
631 };
632 
633 static const char * const hdmi_hpd_groups[] = {
634 	"hdmi_hpd",
635 };
636 
637 static const char * const hdmi_i2c_groups[] = {
638 	"hdmi_sda", "hdmi_scl",
639 };
640 
641 static const char * const i2s_out_groups[] = {
642 	"i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk",
643 	"i2s_out_ch01", "i2s_out_ch23_z", "i2s_out_ch45_z", "i2s_out_ch67_z",
644 };
645 
646 static const char * const spdif_out_groups[] = {
647 	"spdif_out_h",
648 };
649 
650 static const char * const gpio_aobus_groups[] = {
651 	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
652 	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
653 };
654 
655 static const char * const uart_ao_groups[] = {
656 	"uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a",
657 };
658 
659 static const char * const uart_ao_b_groups[] = {
660 	"uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b",
661 	"uart_tx_ao_b_0", "uart_rx_ao_b_1",
662 };
663 
664 static const char * const i2c_ao_groups[] = {
665 	"i2c_sck_ao", "i2c_sda_ao",
666 };
667 
668 static const char * const i2c_slave_ao_groups[] = {
669 	"i2c_slave_sck_ao", "i2c_slave_sda_ao",
670 };
671 
672 static const char * const remote_input_ao_groups[] = {
673 	"remote_input_ao",
674 };
675 
676 static const char * const pwm_ao_a_groups[] = {
677 	"pwm_ao_a_3", "pwm_ao_a_8",
678 };
679 
680 static const char * const pwm_ao_b_groups[] = {
681 	"pwm_ao_b", "pwm_ao_b_6",
682 };
683 
684 static const char * const i2s_out_ao_groups[] = {
685 	"i2s_out_ch23_ao", "i2s_out_ch45_ao",
686 };
687 
688 static const char * const spdif_out_ao_groups[] = {
689 	"spdif_out_ao_6", "spdif_out_ao_9",
690 };
691 
692 static struct meson_pmx_func meson_gxl_periphs_functions[] = {
693 	FUNCTION(gpio_periphs),
694 	FUNCTION(emmc),
695 	FUNCTION(nor),
696 	FUNCTION(sdcard),
697 	FUNCTION(sdio),
698 	FUNCTION(nand),
699 	FUNCTION(uart_a),
700 	FUNCTION(uart_b),
701 	FUNCTION(uart_c),
702 	FUNCTION(i2c_a),
703 	FUNCTION(i2c_b),
704 	FUNCTION(i2c_c),
705 	FUNCTION(eth),
706 	FUNCTION(pwm_a),
707 	FUNCTION(pwm_b),
708 	FUNCTION(pwm_c),
709 	FUNCTION(pwm_d),
710 	FUNCTION(pwm_e),
711 	FUNCTION(pwm_f),
712 	FUNCTION(hdmi_hpd),
713 	FUNCTION(hdmi_i2c),
714 	FUNCTION(i2s_out),
715 	FUNCTION(spdif_out),
716 };
717 
718 static struct meson_pmx_func meson_gxl_aobus_functions[] = {
719 	FUNCTION(gpio_aobus),
720 	FUNCTION(uart_ao),
721 	FUNCTION(uart_ao_b),
722 	FUNCTION(i2c_ao),
723 	FUNCTION(i2c_slave_ao),
724 	FUNCTION(remote_input_ao),
725 	FUNCTION(pwm_ao_a),
726 	FUNCTION(pwm_ao_b),
727 	FUNCTION(i2s_out_ao),
728 	FUNCTION(spdif_out_ao),
729 };
730 
731 static struct meson_bank meson_gxl_periphs_banks[] = {
732 	/*   name    first                      last                    pullen  pull    dir     out     in  */
733 	BANK("X",    PIN(GPIOX_0, EE_OFF),	PIN(GPIOX_18, EE_OFF),  4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
734 	BANK("DV",   PIN(GPIODV_0, EE_OFF),	PIN(GPIODV_29, EE_OFF), 0,  0,  0,  0,  0,  0,  1,  0,  2,  0),
735 	BANK("H",    PIN(GPIOH_0, EE_OFF),	PIN(GPIOH_9, EE_OFF),   1, 20,  1, 20,  3, 20,  4, 20,  5, 20),
736 	BANK("Z",    PIN(GPIOZ_0, EE_OFF),	PIN(GPIOZ_15, EE_OFF),  3,  0,  3,  0,  9,  0,  10, 0, 11,  0),
737 	BANK("CARD", PIN(CARD_0, EE_OFF),	PIN(CARD_6, EE_OFF),    2, 20,  2, 20,  6, 20,  7, 20,  8, 20),
738 	BANK("BOOT", PIN(BOOT_0, EE_OFF),	PIN(BOOT_15, EE_OFF),   2,  0,  2,  0,  6,  0,  7,  0,  8,  0),
739 	BANK("CLK",  PIN(GPIOCLK_0, EE_OFF),	PIN(GPIOCLK_1, EE_OFF), 3, 28,  3, 28,  9, 28, 10, 28, 11, 28),
740 };
741 
742 static struct meson_bank meson_gxl_aobus_banks[] = {
743 	/*   name    first              last              pullen  pull    dir     out     in  */
744 	BANK("AO",   PIN(GPIOAO_0, 0),  PIN(GPIOAO_9, 0), 0,  0,  0, 16,  0,  0,  0, 16,  1,  0),
745 };
746 
747 struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
748 	.name		= "periphs-banks",
749 	.pin_base	= 10,
750 	.pins		= meson_gxl_periphs_pins,
751 	.groups		= meson_gxl_periphs_groups,
752 	.funcs		= meson_gxl_periphs_functions,
753 	.banks		= meson_gxl_periphs_banks,
754 	.num_pins	= ARRAY_SIZE(meson_gxl_periphs_pins),
755 	.num_groups	= ARRAY_SIZE(meson_gxl_periphs_groups),
756 	.num_funcs	= ARRAY_SIZE(meson_gxl_periphs_functions),
757 	.num_banks	= ARRAY_SIZE(meson_gxl_periphs_banks),
758 };
759 
760 struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
761 	.name		= "aobus-banks",
762 	.pin_base	= 0,
763 	.pins		= meson_gxl_aobus_pins,
764 	.groups		= meson_gxl_aobus_groups,
765 	.funcs		= meson_gxl_aobus_functions,
766 	.banks		= meson_gxl_aobus_banks,
767 	.num_pins	= ARRAY_SIZE(meson_gxl_aobus_pins),
768 	.num_groups	= ARRAY_SIZE(meson_gxl_aobus_groups),
769 	.num_funcs	= ARRAY_SIZE(meson_gxl_aobus_functions),
770 	.num_banks	= ARRAY_SIZE(meson_gxl_aobus_banks),
771 };
772