1 /* 2 * Pin controller and GPIO driver for Amlogic Meson GXL. 3 * 4 * Copyright (C) 2016 Endless Mobile, Inc. 5 * Author: Carlo Caione <carlo@endlessm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program. If not, see <http://www.gnu.org/licenses/>. 13 */ 14 15 #include <dt-bindings/gpio/meson-gxl-gpio.h> 16 #include "pinctrl-meson.h" 17 18 #define EE_OFF 10 19 20 static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { 21 MESON_PIN(GPIOZ_0, EE_OFF), 22 MESON_PIN(GPIOZ_1, EE_OFF), 23 MESON_PIN(GPIOZ_2, EE_OFF), 24 MESON_PIN(GPIOZ_3, EE_OFF), 25 MESON_PIN(GPIOZ_4, EE_OFF), 26 MESON_PIN(GPIOZ_5, EE_OFF), 27 MESON_PIN(GPIOZ_6, EE_OFF), 28 MESON_PIN(GPIOZ_7, EE_OFF), 29 MESON_PIN(GPIOZ_8, EE_OFF), 30 MESON_PIN(GPIOZ_9, EE_OFF), 31 MESON_PIN(GPIOZ_10, EE_OFF), 32 MESON_PIN(GPIOZ_11, EE_OFF), 33 MESON_PIN(GPIOZ_12, EE_OFF), 34 MESON_PIN(GPIOZ_13, EE_OFF), 35 MESON_PIN(GPIOZ_14, EE_OFF), 36 MESON_PIN(GPIOZ_15, EE_OFF), 37 38 MESON_PIN(GPIOH_0, EE_OFF), 39 MESON_PIN(GPIOH_1, EE_OFF), 40 MESON_PIN(GPIOH_2, EE_OFF), 41 MESON_PIN(GPIOH_3, EE_OFF), 42 MESON_PIN(GPIOH_4, EE_OFF), 43 MESON_PIN(GPIOH_5, EE_OFF), 44 MESON_PIN(GPIOH_6, EE_OFF), 45 MESON_PIN(GPIOH_7, EE_OFF), 46 MESON_PIN(GPIOH_8, EE_OFF), 47 MESON_PIN(GPIOH_9, EE_OFF), 48 49 MESON_PIN(BOOT_0, EE_OFF), 50 MESON_PIN(BOOT_1, EE_OFF), 51 MESON_PIN(BOOT_2, EE_OFF), 52 MESON_PIN(BOOT_3, EE_OFF), 53 MESON_PIN(BOOT_4, EE_OFF), 54 MESON_PIN(BOOT_5, EE_OFF), 55 MESON_PIN(BOOT_6, EE_OFF), 56 MESON_PIN(BOOT_7, EE_OFF), 57 MESON_PIN(BOOT_8, EE_OFF), 58 MESON_PIN(BOOT_9, EE_OFF), 59 MESON_PIN(BOOT_10, EE_OFF), 60 MESON_PIN(BOOT_11, EE_OFF), 61 MESON_PIN(BOOT_12, EE_OFF), 62 MESON_PIN(BOOT_13, EE_OFF), 63 MESON_PIN(BOOT_14, EE_OFF), 64 MESON_PIN(BOOT_15, EE_OFF), 65 66 MESON_PIN(CARD_0, EE_OFF), 67 MESON_PIN(CARD_1, EE_OFF), 68 MESON_PIN(CARD_2, EE_OFF), 69 MESON_PIN(CARD_3, EE_OFF), 70 MESON_PIN(CARD_4, EE_OFF), 71 MESON_PIN(CARD_5, EE_OFF), 72 MESON_PIN(CARD_6, EE_OFF), 73 74 MESON_PIN(GPIODV_0, EE_OFF), 75 MESON_PIN(GPIODV_1, EE_OFF), 76 MESON_PIN(GPIODV_2, EE_OFF), 77 MESON_PIN(GPIODV_3, EE_OFF), 78 MESON_PIN(GPIODV_4, EE_OFF), 79 MESON_PIN(GPIODV_5, EE_OFF), 80 MESON_PIN(GPIODV_6, EE_OFF), 81 MESON_PIN(GPIODV_7, EE_OFF), 82 MESON_PIN(GPIODV_8, EE_OFF), 83 MESON_PIN(GPIODV_9, EE_OFF), 84 MESON_PIN(GPIODV_10, EE_OFF), 85 MESON_PIN(GPIODV_11, EE_OFF), 86 MESON_PIN(GPIODV_12, EE_OFF), 87 MESON_PIN(GPIODV_13, EE_OFF), 88 MESON_PIN(GPIODV_14, EE_OFF), 89 MESON_PIN(GPIODV_15, EE_OFF), 90 MESON_PIN(GPIODV_16, EE_OFF), 91 MESON_PIN(GPIODV_17, EE_OFF), 92 MESON_PIN(GPIODV_19, EE_OFF), 93 MESON_PIN(GPIODV_20, EE_OFF), 94 MESON_PIN(GPIODV_21, EE_OFF), 95 MESON_PIN(GPIODV_22, EE_OFF), 96 MESON_PIN(GPIODV_23, EE_OFF), 97 MESON_PIN(GPIODV_24, EE_OFF), 98 MESON_PIN(GPIODV_25, EE_OFF), 99 MESON_PIN(GPIODV_26, EE_OFF), 100 MESON_PIN(GPIODV_27, EE_OFF), 101 MESON_PIN(GPIODV_28, EE_OFF), 102 MESON_PIN(GPIODV_29, EE_OFF), 103 104 MESON_PIN(GPIOX_0, EE_OFF), 105 MESON_PIN(GPIOX_1, EE_OFF), 106 MESON_PIN(GPIOX_2, EE_OFF), 107 MESON_PIN(GPIOX_3, EE_OFF), 108 MESON_PIN(GPIOX_4, EE_OFF), 109 MESON_PIN(GPIOX_5, EE_OFF), 110 MESON_PIN(GPIOX_6, EE_OFF), 111 MESON_PIN(GPIOX_7, EE_OFF), 112 MESON_PIN(GPIOX_8, EE_OFF), 113 MESON_PIN(GPIOX_9, EE_OFF), 114 MESON_PIN(GPIOX_10, EE_OFF), 115 MESON_PIN(GPIOX_11, EE_OFF), 116 MESON_PIN(GPIOX_12, EE_OFF), 117 MESON_PIN(GPIOX_13, EE_OFF), 118 MESON_PIN(GPIOX_14, EE_OFF), 119 MESON_PIN(GPIOX_15, EE_OFF), 120 MESON_PIN(GPIOX_16, EE_OFF), 121 MESON_PIN(GPIOX_17, EE_OFF), 122 MESON_PIN(GPIOX_18, EE_OFF), 123 124 MESON_PIN(GPIOCLK_0, EE_OFF), 125 MESON_PIN(GPIOCLK_1, EE_OFF), 126 127 MESON_PIN(GPIO_TEST_N, EE_OFF), 128 }; 129 130 static const unsigned int emmc_nand_d07_pins[] = { 131 PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), 132 PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), 133 PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), 134 }; 135 static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; 136 static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; 137 static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) }; 138 139 static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) }; 140 static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) }; 141 static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) }; 142 static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) }; 143 static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) }; 144 static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) }; 145 146 static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; 147 static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; 148 static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; 149 static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; 150 static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_4, EE_OFF) }; 151 static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_5, EE_OFF) }; 152 static const unsigned int sdio_irq_pins[] = { PIN(GPIOX_7, EE_OFF) }; 153 154 static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) }; 155 static const unsigned int nand_ce1_pins[] = { PIN(BOOT_9, EE_OFF) }; 156 static const unsigned int nand_rb0_pins[] = { PIN(BOOT_10, EE_OFF) }; 157 static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, EE_OFF) }; 158 static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, EE_OFF) }; 159 static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, EE_OFF) }; 160 static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_14, EE_OFF) }; 161 static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, EE_OFF) }; 162 163 static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; 164 static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; 165 static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; 166 static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; 167 168 static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; 169 static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; 170 171 static const unsigned int uart_tx_c_pins[] = { PIN(GPIOX_8, EE_OFF) }; 172 static const unsigned int uart_rx_c_pins[] = { PIN(GPIOX_9, EE_OFF) }; 173 174 static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) }; 175 static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) }; 176 177 static const unsigned int i2c_sck_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; 178 static const unsigned int i2c_sda_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; 179 180 static const unsigned int i2c_sck_c_pins[] = { PIN(GPIODV_29, EE_OFF) }; 181 static const unsigned int i2c_sda_c_pins[] = { PIN(GPIODV_28, EE_OFF) }; 182 183 static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; 184 static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; 185 static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; 186 static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; 187 static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; 188 static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; 189 static const unsigned int eth_rxd2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; 190 static const unsigned int eth_rxd3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; 191 static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; 192 static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_9, EE_OFF) }; 193 static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; 194 static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; 195 static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) }; 196 static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) }; 197 198 static const unsigned int pwm_e_pins[] = { PIN(GPIOX_16, EE_OFF) }; 199 200 static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, EE_OFF) }; 201 static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, EE_OFF) }; 202 static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, EE_OFF) }; 203 204 static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { 205 MESON_PIN(GPIOAO_0, 0), 206 MESON_PIN(GPIOAO_1, 0), 207 MESON_PIN(GPIOAO_2, 0), 208 MESON_PIN(GPIOAO_3, 0), 209 MESON_PIN(GPIOAO_4, 0), 210 MESON_PIN(GPIOAO_5, 0), 211 MESON_PIN(GPIOAO_6, 0), 212 MESON_PIN(GPIOAO_7, 0), 213 MESON_PIN(GPIOAO_8, 0), 214 MESON_PIN(GPIOAO_9, 0), 215 }; 216 217 static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) }; 218 static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) }; 219 static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) }; 220 static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) }; 221 static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_4, 0) }; 222 static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_5, 0) }; 223 static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) }; 224 static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) }; 225 226 static const unsigned int remote_input_ao_pins[] = {PIN(GPIOAO_7, 0) }; 227 228 static const unsigned int pwm_ao_b_pins[] = { PIN(GPIOAO_9, 0) }; 229 230 static struct meson_pmx_group meson_gxl_periphs_groups[] = { 231 GPIO_GROUP(GPIOZ_0, EE_OFF), 232 GPIO_GROUP(GPIOZ_1, EE_OFF), 233 GPIO_GROUP(GPIOZ_2, EE_OFF), 234 GPIO_GROUP(GPIOZ_3, EE_OFF), 235 GPIO_GROUP(GPIOZ_4, EE_OFF), 236 GPIO_GROUP(GPIOZ_5, EE_OFF), 237 GPIO_GROUP(GPIOZ_6, EE_OFF), 238 GPIO_GROUP(GPIOZ_7, EE_OFF), 239 GPIO_GROUP(GPIOZ_8, EE_OFF), 240 GPIO_GROUP(GPIOZ_9, EE_OFF), 241 GPIO_GROUP(GPIOZ_10, EE_OFF), 242 GPIO_GROUP(GPIOZ_11, EE_OFF), 243 GPIO_GROUP(GPIOZ_12, EE_OFF), 244 GPIO_GROUP(GPIOZ_13, EE_OFF), 245 GPIO_GROUP(GPIOZ_14, EE_OFF), 246 GPIO_GROUP(GPIOZ_15, EE_OFF), 247 248 GPIO_GROUP(GPIOH_0, EE_OFF), 249 GPIO_GROUP(GPIOH_1, EE_OFF), 250 GPIO_GROUP(GPIOH_2, EE_OFF), 251 GPIO_GROUP(GPIOH_3, EE_OFF), 252 GPIO_GROUP(GPIOH_4, EE_OFF), 253 GPIO_GROUP(GPIOH_5, EE_OFF), 254 GPIO_GROUP(GPIOH_6, EE_OFF), 255 GPIO_GROUP(GPIOH_7, EE_OFF), 256 GPIO_GROUP(GPIOH_8, EE_OFF), 257 GPIO_GROUP(GPIOH_9, EE_OFF), 258 259 GPIO_GROUP(BOOT_0, EE_OFF), 260 GPIO_GROUP(BOOT_1, EE_OFF), 261 GPIO_GROUP(BOOT_2, EE_OFF), 262 GPIO_GROUP(BOOT_3, EE_OFF), 263 GPIO_GROUP(BOOT_4, EE_OFF), 264 GPIO_GROUP(BOOT_5, EE_OFF), 265 GPIO_GROUP(BOOT_6, EE_OFF), 266 GPIO_GROUP(BOOT_7, EE_OFF), 267 GPIO_GROUP(BOOT_8, EE_OFF), 268 GPIO_GROUP(BOOT_9, EE_OFF), 269 GPIO_GROUP(BOOT_10, EE_OFF), 270 GPIO_GROUP(BOOT_11, EE_OFF), 271 GPIO_GROUP(BOOT_12, EE_OFF), 272 GPIO_GROUP(BOOT_13, EE_OFF), 273 GPIO_GROUP(BOOT_14, EE_OFF), 274 GPIO_GROUP(BOOT_15, EE_OFF), 275 276 GPIO_GROUP(CARD_0, EE_OFF), 277 GPIO_GROUP(CARD_1, EE_OFF), 278 GPIO_GROUP(CARD_2, EE_OFF), 279 GPIO_GROUP(CARD_3, EE_OFF), 280 GPIO_GROUP(CARD_4, EE_OFF), 281 GPIO_GROUP(CARD_5, EE_OFF), 282 GPIO_GROUP(CARD_6, EE_OFF), 283 284 GPIO_GROUP(GPIODV_0, EE_OFF), 285 GPIO_GROUP(GPIODV_1, EE_OFF), 286 GPIO_GROUP(GPIODV_2, EE_OFF), 287 GPIO_GROUP(GPIODV_3, EE_OFF), 288 GPIO_GROUP(GPIODV_4, EE_OFF), 289 GPIO_GROUP(GPIODV_5, EE_OFF), 290 GPIO_GROUP(GPIODV_6, EE_OFF), 291 GPIO_GROUP(GPIODV_7, EE_OFF), 292 GPIO_GROUP(GPIODV_8, EE_OFF), 293 GPIO_GROUP(GPIODV_9, EE_OFF), 294 GPIO_GROUP(GPIODV_10, EE_OFF), 295 GPIO_GROUP(GPIODV_11, EE_OFF), 296 GPIO_GROUP(GPIODV_12, EE_OFF), 297 GPIO_GROUP(GPIODV_13, EE_OFF), 298 GPIO_GROUP(GPIODV_14, EE_OFF), 299 GPIO_GROUP(GPIODV_15, EE_OFF), 300 GPIO_GROUP(GPIODV_16, EE_OFF), 301 GPIO_GROUP(GPIODV_17, EE_OFF), 302 GPIO_GROUP(GPIODV_19, EE_OFF), 303 GPIO_GROUP(GPIODV_20, EE_OFF), 304 GPIO_GROUP(GPIODV_21, EE_OFF), 305 GPIO_GROUP(GPIODV_22, EE_OFF), 306 GPIO_GROUP(GPIODV_23, EE_OFF), 307 GPIO_GROUP(GPIODV_24, EE_OFF), 308 GPIO_GROUP(GPIODV_25, EE_OFF), 309 GPIO_GROUP(GPIODV_26, EE_OFF), 310 GPIO_GROUP(GPIODV_27, EE_OFF), 311 GPIO_GROUP(GPIODV_28, EE_OFF), 312 GPIO_GROUP(GPIODV_29, EE_OFF), 313 314 GPIO_GROUP(GPIOX_0, EE_OFF), 315 GPIO_GROUP(GPIOX_1, EE_OFF), 316 GPIO_GROUP(GPIOX_2, EE_OFF), 317 GPIO_GROUP(GPIOX_3, EE_OFF), 318 GPIO_GROUP(GPIOX_4, EE_OFF), 319 GPIO_GROUP(GPIOX_5, EE_OFF), 320 GPIO_GROUP(GPIOX_6, EE_OFF), 321 GPIO_GROUP(GPIOX_7, EE_OFF), 322 GPIO_GROUP(GPIOX_8, EE_OFF), 323 GPIO_GROUP(GPIOX_9, EE_OFF), 324 GPIO_GROUP(GPIOX_10, EE_OFF), 325 GPIO_GROUP(GPIOX_11, EE_OFF), 326 GPIO_GROUP(GPIOX_12, EE_OFF), 327 GPIO_GROUP(GPIOX_13, EE_OFF), 328 GPIO_GROUP(GPIOX_14, EE_OFF), 329 GPIO_GROUP(GPIOX_15, EE_OFF), 330 GPIO_GROUP(GPIOX_16, EE_OFF), 331 GPIO_GROUP(GPIOX_17, EE_OFF), 332 GPIO_GROUP(GPIOX_18, EE_OFF), 333 334 GPIO_GROUP(GPIOCLK_0, EE_OFF), 335 GPIO_GROUP(GPIOCLK_1, EE_OFF), 336 337 GPIO_GROUP(GPIO_TEST_N, EE_OFF), 338 339 /* Bank X */ 340 GROUP(sdio_d0, 5, 31), 341 GROUP(sdio_d1, 5, 30), 342 GROUP(sdio_d2, 5, 29), 343 GROUP(sdio_d3, 5, 28), 344 GROUP(sdio_cmd, 5, 27), 345 GROUP(sdio_clk, 5, 26), 346 GROUP(sdio_irq, 5, 24), 347 GROUP(uart_tx_a, 5, 19), 348 GROUP(uart_rx_a, 5, 18), 349 GROUP(uart_cts_a, 5, 17), 350 GROUP(uart_rts_a, 5, 16), 351 GROUP(uart_tx_c, 5, 13), 352 GROUP(uart_rx_c, 5, 12), 353 GROUP(pwm_e, 5, 15), 354 355 /* Bank Z */ 356 GROUP(eth_mdio, 4, 22), 357 GROUP(eth_mdc, 4, 23), 358 GROUP(eth_clk_rx_clk, 4, 21), 359 GROUP(eth_rx_dv, 4, 20), 360 GROUP(eth_rxd0, 4, 19), 361 GROUP(eth_rxd1, 4, 18), 362 GROUP(eth_rxd2, 4, 17), 363 GROUP(eth_rxd3, 4, 16), 364 GROUP(eth_rgmii_tx_clk, 4, 15), 365 GROUP(eth_tx_en, 4, 14), 366 GROUP(eth_txd0, 4, 13), 367 GROUP(eth_txd1, 4, 12), 368 GROUP(eth_txd2, 4, 11), 369 GROUP(eth_txd3, 4, 10), 370 371 /* Bank H */ 372 GROUP(hdmi_hpd, 6, 31), 373 GROUP(hdmi_sda, 6, 30), 374 GROUP(hdmi_scl, 6, 29), 375 376 /* Bank DV */ 377 GROUP(uart_tx_b, 2, 16), 378 GROUP(uart_rx_b, 2, 15), 379 GROUP(i2c_sck_a, 1, 15), 380 GROUP(i2c_sda_a, 1, 14), 381 GROUP(i2c_sck_b, 1, 13), 382 GROUP(i2c_sda_b, 1, 12), 383 GROUP(i2c_sck_c, 1, 11), 384 GROUP(i2c_sda_c, 1, 10), 385 386 /* Bank BOOT */ 387 GROUP(emmc_nand_d07, 7, 31), 388 GROUP(emmc_clk, 7, 30), 389 GROUP(emmc_cmd, 7, 29), 390 GROUP(emmc_ds, 7, 28), 391 GROUP(nand_ce0, 7, 7), 392 GROUP(nand_ce1, 7, 6), 393 GROUP(nand_rb0, 7, 5), 394 GROUP(nand_ale, 7, 4), 395 GROUP(nand_cle, 7, 3), 396 GROUP(nand_wen_clk, 7, 2), 397 GROUP(nand_ren_wr, 7, 1), 398 GROUP(nand_dqs, 7, 0), 399 400 /* Bank CARD */ 401 GROUP(sdcard_d1, 6, 5), 402 GROUP(sdcard_d0, 6, 4), 403 GROUP(sdcard_d3, 6, 1), 404 GROUP(sdcard_d2, 6, 0), 405 GROUP(sdcard_cmd, 6, 2), 406 GROUP(sdcard_clk, 6, 3), 407 }; 408 409 static struct meson_pmx_group meson_gxl_aobus_groups[] = { 410 GPIO_GROUP(GPIOAO_0, 0), 411 GPIO_GROUP(GPIOAO_1, 0), 412 GPIO_GROUP(GPIOAO_2, 0), 413 GPIO_GROUP(GPIOAO_3, 0), 414 GPIO_GROUP(GPIOAO_4, 0), 415 GPIO_GROUP(GPIOAO_5, 0), 416 GPIO_GROUP(GPIOAO_6, 0), 417 GPIO_GROUP(GPIOAO_7, 0), 418 GPIO_GROUP(GPIOAO_8, 0), 419 GPIO_GROUP(GPIOAO_9, 0), 420 421 /* bank AO */ 422 GROUP(uart_tx_ao_b, 0, 24), 423 GROUP(uart_rx_ao_b, 0, 25), 424 GROUP(uart_tx_ao_a, 0, 12), 425 GROUP(uart_rx_ao_a, 0, 11), 426 GROUP(uart_cts_ao_a, 0, 10), 427 GROUP(uart_rts_ao_a, 0, 9), 428 GROUP(uart_cts_ao_b, 0, 8), 429 GROUP(uart_rts_ao_b, 0, 7), 430 GROUP(remote_input_ao, 0, 0), 431 GROUP(pwm_ao_b, 0, 3), 432 }; 433 434 static const char * const gpio_periphs_groups[] = { 435 "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", 436 "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", 437 "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", 438 "GPIOZ_15", 439 440 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", 441 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", 442 443 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", 444 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", 445 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", 446 "BOOT_15", 447 448 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", 449 "CARD_5", "CARD_6", 450 451 "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", 452 "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", 453 "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", 454 "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", 455 "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", 456 "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", 457 458 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", 459 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", 460 "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", 461 "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", 462 463 "GPIO_TEST_N", 464 }; 465 466 static const char * const emmc_groups[] = { 467 "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", 468 }; 469 470 static const char * const sdcard_groups[] = { 471 "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", 472 "sdcard_cmd", "sdcard_clk", 473 }; 474 475 static const char * const sdio_groups[] = { 476 "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", 477 "sdio_cmd", "sdio_clk", "sdio_irq", 478 }; 479 480 static const char * const nand_groups[] = { 481 "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle", 482 "nand_wen_clk", "nand_ren_wr", "nand_dqs", 483 }; 484 485 static const char * const uart_a_groups[] = { 486 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", 487 }; 488 489 static const char * const uart_b_groups[] = { 490 "uart_tx_b", "uart_rx_b", 491 }; 492 493 static const char * const uart_c_groups[] = { 494 "uart_tx_c", "uart_rx_c", 495 }; 496 497 static const char * const i2c_a_groups[] = { 498 "i2c_sck_a", "i2c_sda_a", 499 }; 500 501 static const char * const i2c_b_groups[] = { 502 "i2c_sck_b", "i2c_sda_b", 503 }; 504 505 static const char * const i2c_c_groups[] = { 506 "i2c_sck_c", "i2c_sda_c", 507 }; 508 509 static const char * const eth_groups[] = { 510 "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", 511 "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", 512 "eth_rgmii_tx_clk", "eth_tx_en", 513 "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", 514 }; 515 516 static const char * const pwm_e_groups[] = { 517 "pwm_e", 518 }; 519 520 static const char * const hdmi_hpd_groups[] = { 521 "hdmi_hpd", 522 }; 523 524 static const char * const hdmi_i2c_groups[] = { 525 "hdmi_sda", "hdmi_scl", 526 }; 527 528 static const char * const gpio_aobus_groups[] = { 529 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", 530 "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", 531 }; 532 533 static const char * const uart_ao_groups[] = { 534 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", 535 }; 536 537 static const char * const uart_ao_b_groups[] = { 538 "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", 539 }; 540 541 static const char * const remote_input_ao_groups[] = { 542 "remote_input_ao", 543 }; 544 545 static const char * const pwm_ao_b_groups[] = { 546 "pwm_ao_b", 547 }; 548 549 static struct meson_pmx_func meson_gxl_periphs_functions[] = { 550 FUNCTION(gpio_periphs), 551 FUNCTION(emmc), 552 FUNCTION(sdcard), 553 FUNCTION(sdio), 554 FUNCTION(nand), 555 FUNCTION(uart_a), 556 FUNCTION(uart_b), 557 FUNCTION(uart_c), 558 FUNCTION(i2c_a), 559 FUNCTION(i2c_b), 560 FUNCTION(i2c_c), 561 FUNCTION(eth), 562 FUNCTION(pwm_e), 563 FUNCTION(hdmi_hpd), 564 FUNCTION(hdmi_i2c), 565 }; 566 567 static struct meson_pmx_func meson_gxl_aobus_functions[] = { 568 FUNCTION(gpio_aobus), 569 FUNCTION(uart_ao), 570 FUNCTION(uart_ao_b), 571 FUNCTION(remote_input_ao), 572 FUNCTION(pwm_ao_b), 573 }; 574 575 static struct meson_bank meson_gxl_periphs_banks[] = { 576 /* name first last pullen pull dir out in */ 577 BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_18, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), 578 BANK("DV", PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), 579 BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_9, EE_OFF), 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), 580 BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), 581 BANK("CARD", PIN(CARD_0, EE_OFF), PIN(CARD_6, EE_OFF), 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), 582 BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), 583 BANK("CLK", PIN(GPIOCLK_0, EE_OFF), PIN(GPIOCLK_1, EE_OFF), 3, 28, 3, 28, 9, 28, 10, 28, 11, 28), 584 }; 585 586 static struct meson_bank meson_gxl_aobus_banks[] = { 587 /* name first last pullen pull dir out in */ 588 BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_9, 0), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), 589 }; 590 591 struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { 592 .name = "periphs-banks", 593 .pin_base = 10, 594 .pins = meson_gxl_periphs_pins, 595 .groups = meson_gxl_periphs_groups, 596 .funcs = meson_gxl_periphs_functions, 597 .banks = meson_gxl_periphs_banks, 598 .num_pins = ARRAY_SIZE(meson_gxl_periphs_pins), 599 .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), 600 .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), 601 .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), 602 }; 603 604 struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { 605 .name = "aobus-banks", 606 .pin_base = 0, 607 .pins = meson_gxl_aobus_pins, 608 .groups = meson_gxl_aobus_groups, 609 .funcs = meson_gxl_aobus_functions, 610 .banks = meson_gxl_aobus_banks, 611 .num_pins = ARRAY_SIZE(meson_gxl_aobus_pins), 612 .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), 613 .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), 614 .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), 615 }; 616