1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin 4 * bindings for MediaTek SoC. 5 * 6 * Copyright (C) 2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * Zhiyong Tao <zhiyong.tao@mediatek.com> 9 * Hongzhou.Yang <hongzhou.yang@mediatek.com> 10 */ 11 12 #include <linux/gpio/driver.h> 13 #include <linux/module.h> 14 #include <dt-bindings/pinctrl/mt65xx.h> 15 #include "pinctrl-paris.h" 16 17 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 18 19 /* Custom pinconf parameters */ 20 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 21 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 22 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 23 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 24 #define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5) 25 26 static const struct pinconf_generic_params mtk_custom_bindings[] = { 27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 31 {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2}, 32 }; 33 34 #ifdef CONFIG_DEBUG_FS 35 static const struct pin_config_item mtk_conf_items[] = { 36 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 37 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 38 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 39 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 40 PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true), 41 }; 42 #endif 43 44 static const char * const mtk_gpio_functions[] = { 45 "func0", "func1", "func2", "func3", 46 "func4", "func5", "func6", "func7", 47 "func8", "func9", "func10", "func11", 48 "func12", "func13", "func14", "func15", 49 }; 50 51 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 52 struct pinctrl_gpio_range *range, 53 unsigned int pin) 54 { 55 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 56 const struct mtk_pin_desc *desc; 57 58 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 59 60 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 61 hw->soc->gpio_m); 62 } 63 64 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 65 struct pinctrl_gpio_range *range, 66 unsigned int pin, bool input) 67 { 68 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 69 const struct mtk_pin_desc *desc; 70 71 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 72 73 /* hardware would take 0 as input direction */ 74 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 75 } 76 77 static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 78 unsigned int pin, unsigned long *config) 79 { 80 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 81 u32 param = pinconf_to_config_param(*config); 82 int pullup, err, reg, ret = 1; 83 const struct mtk_pin_desc *desc; 84 85 if (pin >= hw->soc->npins) { 86 err = -EINVAL; 87 goto out; 88 } 89 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 90 91 switch (param) { 92 case PIN_CONFIG_BIAS_DISABLE: 93 case PIN_CONFIG_BIAS_PULL_UP: 94 case PIN_CONFIG_BIAS_PULL_DOWN: 95 if (hw->soc->bias_get_combo) { 96 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 97 if (err) 98 goto out; 99 if (param == PIN_CONFIG_BIAS_DISABLE) { 100 if (ret == MTK_PUPD_SET_R1R0_00) 101 ret = MTK_DISABLE; 102 } else if (param == PIN_CONFIG_BIAS_PULL_UP) { 103 /* When desire to get pull-up value, return 104 * error if current setting is pull-down 105 */ 106 if (!pullup) 107 err = -EINVAL; 108 } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { 109 /* When desire to get pull-down value, return 110 * error if current setting is pull-up 111 */ 112 if (pullup) 113 err = -EINVAL; 114 } 115 } else { 116 err = -ENOTSUPP; 117 } 118 break; 119 case PIN_CONFIG_SLEW_RATE: 120 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret); 121 break; 122 case PIN_CONFIG_INPUT_ENABLE: 123 case PIN_CONFIG_OUTPUT_ENABLE: 124 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 125 if (err) 126 goto out; 127 /* CONFIG Current direction return value 128 * ------------- ----------------- ---------------------- 129 * OUTPUT_ENABLE output 1 (= HW value) 130 * input 0 (= HW value) 131 * INPUT_ENABLE output 0 (= reverse HW value) 132 * input 1 (= reverse HW value) 133 */ 134 if (param == PIN_CONFIG_INPUT_ENABLE) 135 ret = !ret; 136 137 break; 138 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 139 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 140 if (err) 141 goto out; 142 /* return error when in output mode 143 * because schmitt trigger only work in input mode 144 */ 145 if (ret) { 146 err = -EINVAL; 147 goto out; 148 } 149 150 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret); 151 152 break; 153 case PIN_CONFIG_DRIVE_STRENGTH: 154 if (hw->soc->drive_get) 155 err = hw->soc->drive_get(hw, desc, &ret); 156 else 157 err = -ENOTSUPP; 158 break; 159 case MTK_PIN_CONFIG_TDSEL: 160 case MTK_PIN_CONFIG_RDSEL: 161 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 162 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 163 err = mtk_hw_get_value(hw, desc, reg, &ret); 164 break; 165 case MTK_PIN_CONFIG_PU_ADV: 166 case MTK_PIN_CONFIG_PD_ADV: 167 if (hw->soc->adv_pull_get) { 168 pullup = param == MTK_PIN_CONFIG_PU_ADV; 169 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 170 } else 171 err = -ENOTSUPP; 172 break; 173 case MTK_PIN_CONFIG_DRV_ADV: 174 if (hw->soc->adv_drive_get) 175 err = hw->soc->adv_drive_get(hw, desc, &ret); 176 else 177 err = -ENOTSUPP; 178 break; 179 default: 180 err = -ENOTSUPP; 181 } 182 183 out: 184 if (!err) 185 *config = pinconf_to_config_packed(param, ret); 186 187 return err; 188 } 189 190 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 191 enum pin_config_param param, 192 enum pin_config_param arg) 193 { 194 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 195 const struct mtk_pin_desc *desc; 196 int err = 0; 197 u32 reg; 198 199 if (pin >= hw->soc->npins) { 200 err = -EINVAL; 201 goto err; 202 } 203 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 204 205 switch ((u32)param) { 206 case PIN_CONFIG_BIAS_DISABLE: 207 if (hw->soc->bias_set_combo) 208 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); 209 else 210 err = -ENOTSUPP; 211 break; 212 case PIN_CONFIG_BIAS_PULL_UP: 213 if (hw->soc->bias_set_combo) 214 err = hw->soc->bias_set_combo(hw, desc, 1, arg); 215 else 216 err = -ENOTSUPP; 217 break; 218 case PIN_CONFIG_BIAS_PULL_DOWN: 219 if (hw->soc->bias_set_combo) 220 err = hw->soc->bias_set_combo(hw, desc, 0, arg); 221 else 222 err = -ENOTSUPP; 223 break; 224 case PIN_CONFIG_OUTPUT_ENABLE: 225 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 226 MTK_DISABLE); 227 /* Keep set direction to consider the case that a GPIO pin 228 * does not have SMT control 229 */ 230 if (err != -ENOTSUPP) 231 goto err; 232 233 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 234 MTK_OUTPUT); 235 break; 236 case PIN_CONFIG_INPUT_ENABLE: 237 /* regard all non-zero value as enable */ 238 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); 239 if (err) 240 goto err; 241 242 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 243 MTK_INPUT); 244 break; 245 case PIN_CONFIG_SLEW_RATE: 246 /* regard all non-zero value as enable */ 247 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg); 248 break; 249 case PIN_CONFIG_OUTPUT: 250 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 251 arg); 252 if (err) 253 goto err; 254 255 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 256 MTK_OUTPUT); 257 break; 258 case PIN_CONFIG_INPUT_SCHMITT: 259 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 260 /* arg = 1: Input mode & SMT enable ; 261 * arg = 0: Output mode & SMT disable 262 */ 263 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg); 264 if (err) 265 goto err; 266 267 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg); 268 break; 269 case PIN_CONFIG_DRIVE_STRENGTH: 270 if (hw->soc->drive_set) 271 err = hw->soc->drive_set(hw, desc, arg); 272 else 273 err = -ENOTSUPP; 274 break; 275 case MTK_PIN_CONFIG_TDSEL: 276 case MTK_PIN_CONFIG_RDSEL: 277 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 278 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 279 err = mtk_hw_set_value(hw, desc, reg, arg); 280 break; 281 case MTK_PIN_CONFIG_PU_ADV: 282 case MTK_PIN_CONFIG_PD_ADV: 283 if (hw->soc->adv_pull_set) { 284 bool pullup; 285 286 pullup = param == MTK_PIN_CONFIG_PU_ADV; 287 err = hw->soc->adv_pull_set(hw, desc, pullup, 288 arg); 289 } else 290 err = -ENOTSUPP; 291 break; 292 case MTK_PIN_CONFIG_DRV_ADV: 293 if (hw->soc->adv_drive_set) 294 err = hw->soc->adv_drive_set(hw, desc, arg); 295 else 296 err = -ENOTSUPP; 297 break; 298 default: 299 err = -ENOTSUPP; 300 } 301 302 err: 303 return err; 304 } 305 306 static struct mtk_pinctrl_group * 307 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) 308 { 309 int i; 310 311 for (i = 0; i < hw->soc->ngrps; i++) { 312 struct mtk_pinctrl_group *grp = hw->groups + i; 313 314 if (grp->pin == pin) 315 return grp; 316 } 317 318 return NULL; 319 } 320 321 static const struct mtk_func_desc * 322 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum) 323 { 324 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; 325 const struct mtk_func_desc *func = pin->funcs; 326 327 while (func && func->name) { 328 if (func->muxval == fnum) 329 return func; 330 func++; 331 } 332 333 return NULL; 334 } 335 336 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num, 337 u32 fnum) 338 { 339 int i; 340 341 for (i = 0; i < hw->soc->npins; i++) { 342 const struct mtk_pin_desc *pin = hw->soc->pins + i; 343 344 if (pin->number == pin_num) { 345 const struct mtk_func_desc *func = pin->funcs; 346 347 while (func && func->name) { 348 if (func->muxval == fnum) 349 return true; 350 func++; 351 } 352 353 break; 354 } 355 } 356 357 return false; 358 } 359 360 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, 361 u32 pin, u32 fnum, 362 struct mtk_pinctrl_group *grp, 363 struct pinctrl_map **map, 364 unsigned *reserved_maps, 365 unsigned *num_maps) 366 { 367 bool ret; 368 369 if (*num_maps == *reserved_maps) 370 return -ENOSPC; 371 372 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 373 (*map)[*num_maps].data.mux.group = grp->name; 374 375 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); 376 if (!ret) { 377 dev_err(pctl->dev, "invalid function %d on pin %d .\n", 378 fnum, pin); 379 return -EINVAL; 380 } 381 382 (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum]; 383 (*num_maps)++; 384 385 return 0; 386 } 387 388 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, 389 struct device_node *node, 390 struct pinctrl_map **map, 391 unsigned *reserved_maps, 392 unsigned *num_maps) 393 { 394 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 395 int num_pins, num_funcs, maps_per_pin, i, err; 396 struct mtk_pinctrl_group *grp; 397 unsigned int num_configs; 398 bool has_config = false; 399 unsigned long *configs; 400 u32 pinfunc, pin, func; 401 struct property *pins; 402 unsigned reserve = 0; 403 404 pins = of_find_property(node, "pinmux", NULL); 405 if (!pins) { 406 dev_err(hw->dev, "missing pins property in node %pOFn .\n", 407 node); 408 return -EINVAL; 409 } 410 411 err = pinconf_generic_parse_dt_config(node, pctldev, &configs, 412 &num_configs); 413 if (err) 414 return err; 415 416 if (num_configs) 417 has_config = true; 418 419 num_pins = pins->length / sizeof(u32); 420 num_funcs = num_pins; 421 maps_per_pin = 0; 422 if (num_funcs) 423 maps_per_pin++; 424 if (has_config && num_pins >= 1) 425 maps_per_pin++; 426 427 if (!num_pins || !maps_per_pin) { 428 err = -EINVAL; 429 goto exit; 430 } 431 432 reserve = num_pins * maps_per_pin; 433 434 err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, 435 reserve); 436 if (err < 0) 437 goto exit; 438 439 for (i = 0; i < num_pins; i++) { 440 err = of_property_read_u32_index(node, "pinmux", i, &pinfunc); 441 if (err) 442 goto exit; 443 444 pin = MTK_GET_PIN_NO(pinfunc); 445 func = MTK_GET_PIN_FUNC(pinfunc); 446 447 if (pin >= hw->soc->npins || 448 func >= ARRAY_SIZE(mtk_gpio_functions)) { 449 dev_err(hw->dev, "invalid pins value.\n"); 450 err = -EINVAL; 451 goto exit; 452 } 453 454 grp = mtk_pctrl_find_group_by_pin(hw, pin); 455 if (!grp) { 456 dev_err(hw->dev, "unable to match pin %d to group\n", 457 pin); 458 err = -EINVAL; 459 goto exit; 460 } 461 462 err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map, 463 reserved_maps, num_maps); 464 if (err < 0) 465 goto exit; 466 467 if (has_config) { 468 err = pinctrl_utils_add_map_configs(pctldev, map, 469 reserved_maps, 470 num_maps, 471 grp->name, 472 configs, 473 num_configs, 474 PIN_MAP_TYPE_CONFIGS_GROUP); 475 if (err < 0) 476 goto exit; 477 } 478 } 479 480 err = 0; 481 482 exit: 483 kfree(configs); 484 return err; 485 } 486 487 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 488 struct device_node *np_config, 489 struct pinctrl_map **map, 490 unsigned *num_maps) 491 { 492 struct device_node *np; 493 unsigned reserved_maps; 494 int ret; 495 496 *map = NULL; 497 *num_maps = 0; 498 reserved_maps = 0; 499 500 for_each_child_of_node(np_config, np) { 501 ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map, 502 &reserved_maps, 503 num_maps); 504 if (ret < 0) { 505 pinctrl_utils_free_map(pctldev, *map, *num_maps); 506 of_node_put(np); 507 return ret; 508 } 509 } 510 511 return 0; 512 } 513 514 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 515 { 516 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 517 518 return hw->soc->ngrps; 519 } 520 521 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev, 522 unsigned group) 523 { 524 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 525 526 return hw->groups[group].name; 527 } 528 529 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 530 unsigned group, const unsigned **pins, 531 unsigned *num_pins) 532 { 533 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 534 535 *pins = (unsigned *)&hw->groups[group].pin; 536 *num_pins = 1; 537 538 return 0; 539 } 540 541 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field) 542 { 543 const struct mtk_pin_desc *desc; 544 int value, err; 545 546 if (gpio >= hw->soc->npins) 547 return -EINVAL; 548 549 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 550 551 err = mtk_hw_get_value(hw, desc, field, &value); 552 if (err) 553 return err; 554 555 return value; 556 } 557 558 #define mtk_pctrl_get_pinmux(hw, gpio) \ 559 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE) 560 561 #define mtk_pctrl_get_direction(hw, gpio) \ 562 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR) 563 564 #define mtk_pctrl_get_out(hw, gpio) \ 565 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO) 566 567 #define mtk_pctrl_get_in(hw, gpio) \ 568 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI) 569 570 #define mtk_pctrl_get_smt(hw, gpio) \ 571 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT) 572 573 #define mtk_pctrl_get_ies(hw, gpio) \ 574 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES) 575 576 #define mtk_pctrl_get_driving(hw, gpio) \ 577 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV) 578 579 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, 580 unsigned int gpio, char *buf, unsigned int buf_len) 581 { 582 int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel = -1; 583 const struct mtk_pin_desc *desc; 584 u32 try_all_type = 0; 585 586 if (gpio >= hw->soc->npins) 587 return -EINVAL; 588 589 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 590 pinmux = mtk_pctrl_get_pinmux(hw, gpio); 591 if (pinmux >= hw->soc->nfuncs) 592 pinmux -= hw->soc->nfuncs; 593 594 mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); 595 596 if (hw->soc->pull_type) 597 try_all_type = hw->soc->pull_type[desc->number]; 598 599 if (hw->rsel_si_unit && (try_all_type & MTK_PULL_RSEL_TYPE)) { 600 rsel = pullen; 601 pullen = 1; 602 } else { 603 /* Case for: R1R0 */ 604 if (pullen == MTK_PUPD_SET_R1R0_00) { 605 pullen = 0; 606 r1 = 0; 607 r0 = 0; 608 } else if (pullen == MTK_PUPD_SET_R1R0_01) { 609 pullen = 1; 610 r1 = 0; 611 r0 = 1; 612 } else if (pullen == MTK_PUPD_SET_R1R0_10) { 613 pullen = 1; 614 r1 = 1; 615 r0 = 0; 616 } else if (pullen == MTK_PUPD_SET_R1R0_11) { 617 pullen = 1; 618 r1 = 1; 619 r0 = 1; 620 } 621 622 /* Case for: RSEL */ 623 if (pullen >= MTK_PULL_SET_RSEL_000 && 624 pullen <= MTK_PULL_SET_RSEL_111) { 625 rsel = pullen - MTK_PULL_SET_RSEL_000; 626 pullen = 1; 627 } 628 } 629 len += scnprintf(buf + len, buf_len - len, 630 "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", 631 gpio, 632 pinmux, 633 mtk_pctrl_get_direction(hw, gpio), 634 mtk_pctrl_get_out(hw, gpio), 635 mtk_pctrl_get_in(hw, gpio), 636 mtk_pctrl_get_driving(hw, gpio), 637 mtk_pctrl_get_smt(hw, gpio), 638 mtk_pctrl_get_ies(hw, gpio), 639 pullen, 640 pullup); 641 642 if (r1 != -1) { 643 len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n", 644 r1, r0); 645 } else if (rsel != -1) { 646 len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel); 647 } else { 648 len += scnprintf(buf + len, buf_len - len, "\n"); 649 } 650 651 return len; 652 } 653 EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin); 654 655 #define PIN_DBG_BUF_SZ 96 656 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 657 unsigned int gpio) 658 { 659 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 660 char buf[PIN_DBG_BUF_SZ]; 661 662 (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ); 663 664 seq_printf(s, "%s", buf); 665 } 666 667 static const struct pinctrl_ops mtk_pctlops = { 668 .dt_node_to_map = mtk_pctrl_dt_node_to_map, 669 .dt_free_map = pinctrl_utils_free_map, 670 .get_groups_count = mtk_pctrl_get_groups_count, 671 .get_group_name = mtk_pctrl_get_group_name, 672 .get_group_pins = mtk_pctrl_get_group_pins, 673 .pin_dbg_show = mtk_pctrl_dbg_show, 674 }; 675 676 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 677 { 678 return ARRAY_SIZE(mtk_gpio_functions); 679 } 680 681 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev, 682 unsigned selector) 683 { 684 return mtk_gpio_functions[selector]; 685 } 686 687 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev, 688 unsigned function, 689 const char * const **groups, 690 unsigned * const num_groups) 691 { 692 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 693 694 *groups = hw->grp_names; 695 *num_groups = hw->soc->ngrps; 696 697 return 0; 698 } 699 700 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev, 701 unsigned function, 702 unsigned group) 703 { 704 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 705 struct mtk_pinctrl_group *grp = hw->groups + group; 706 const struct mtk_func_desc *desc_func; 707 const struct mtk_pin_desc *desc; 708 bool ret; 709 710 ret = mtk_pctrl_is_function_valid(hw, grp->pin, function); 711 if (!ret) { 712 dev_err(hw->dev, "invalid function %d on group %d .\n", 713 function, group); 714 return -EINVAL; 715 } 716 717 desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function); 718 if (!desc_func) 719 return -EINVAL; 720 721 desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; 722 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval); 723 724 return 0; 725 } 726 727 static const struct pinmux_ops mtk_pmxops = { 728 .get_functions_count = mtk_pmx_get_funcs_cnt, 729 .get_function_name = mtk_pmx_get_func_name, 730 .get_function_groups = mtk_pmx_get_func_groups, 731 .set_mux = mtk_pmx_set_mux, 732 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 733 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 734 }; 735 736 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, 737 unsigned long *config) 738 { 739 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 740 741 *config = hw->groups[group].config; 742 743 return 0; 744 } 745 746 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, 747 unsigned long *configs, unsigned num_configs) 748 { 749 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 750 struct mtk_pinctrl_group *grp = &hw->groups[group]; 751 int i, ret; 752 753 for (i = 0; i < num_configs; i++) { 754 ret = mtk_pinconf_set(pctldev, grp->pin, 755 pinconf_to_config_param(configs[i]), 756 pinconf_to_config_argument(configs[i])); 757 if (ret < 0) 758 return ret; 759 760 grp->config = configs[i]; 761 } 762 763 return 0; 764 } 765 766 static const struct pinconf_ops mtk_confops = { 767 .pin_config_get = mtk_pinconf_get, 768 .pin_config_group_get = mtk_pconf_group_get, 769 .pin_config_group_set = mtk_pconf_group_set, 770 .is_generic = true, 771 }; 772 773 static struct pinctrl_desc mtk_desc = { 774 .name = PINCTRL_PINCTRL_DEV, 775 .pctlops = &mtk_pctlops, 776 .pmxops = &mtk_pmxops, 777 .confops = &mtk_confops, 778 .owner = THIS_MODULE, 779 }; 780 781 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio) 782 { 783 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 784 const struct mtk_pin_desc *desc; 785 int value, err; 786 787 if (gpio >= hw->soc->npins) 788 return -EINVAL; 789 790 /* 791 * "Virtual" GPIOs are always and only used for interrupts 792 * Since they are only used for interrupts, they are always inputs 793 */ 794 if (mtk_is_virt_gpio(hw, gpio)) 795 return 1; 796 797 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 798 799 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value); 800 if (err) 801 return err; 802 803 if (value) 804 return GPIO_LINE_DIRECTION_OUT; 805 806 return GPIO_LINE_DIRECTION_IN; 807 } 808 809 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 810 { 811 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 812 const struct mtk_pin_desc *desc; 813 int value, err; 814 815 if (gpio >= hw->soc->npins) 816 return -EINVAL; 817 818 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 819 820 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 821 if (err) 822 return err; 823 824 return !!value; 825 } 826 827 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 828 { 829 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 830 const struct mtk_pin_desc *desc; 831 832 if (gpio >= hw->soc->npins) 833 return; 834 835 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 836 837 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 838 } 839 840 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 841 { 842 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 843 844 if (gpio >= hw->soc->npins) 845 return -EINVAL; 846 847 return pinctrl_gpio_direction_input(chip->base + gpio); 848 } 849 850 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 851 int value) 852 { 853 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 854 855 if (gpio >= hw->soc->npins) 856 return -EINVAL; 857 858 mtk_gpio_set(chip, gpio, value); 859 860 return pinctrl_gpio_direction_output(chip->base + gpio); 861 } 862 863 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 864 { 865 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 866 const struct mtk_pin_desc *desc; 867 868 if (!hw->eint) 869 return -ENOTSUPP; 870 871 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 872 873 if (desc->eint.eint_n == EINT_NA) 874 return -ENOTSUPP; 875 876 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 877 } 878 879 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 880 unsigned long config) 881 { 882 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 883 const struct mtk_pin_desc *desc; 884 u32 debounce; 885 886 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 887 888 if (!hw->eint || 889 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 890 desc->eint.eint_n == EINT_NA) 891 return -ENOTSUPP; 892 893 debounce = pinconf_to_config_argument(config); 894 895 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 896 } 897 898 static int mtk_build_gpiochip(struct mtk_pinctrl *hw) 899 { 900 struct gpio_chip *chip = &hw->chip; 901 int ret; 902 903 chip->label = PINCTRL_PINCTRL_DEV; 904 chip->parent = hw->dev; 905 chip->request = gpiochip_generic_request; 906 chip->free = gpiochip_generic_free; 907 chip->get_direction = mtk_gpio_get_direction; 908 chip->direction_input = mtk_gpio_direction_input; 909 chip->direction_output = mtk_gpio_direction_output; 910 chip->get = mtk_gpio_get; 911 chip->set = mtk_gpio_set; 912 chip->to_irq = mtk_gpio_to_irq; 913 chip->set_config = mtk_gpio_set_config; 914 chip->base = -1; 915 chip->ngpio = hw->soc->npins; 916 chip->of_gpio_n_cells = 2; 917 918 ret = gpiochip_add_data(chip, hw); 919 if (ret < 0) 920 return ret; 921 922 return 0; 923 } 924 925 static int mtk_pctrl_build_state(struct platform_device *pdev) 926 { 927 struct mtk_pinctrl *hw = platform_get_drvdata(pdev); 928 int i; 929 930 /* Allocate groups */ 931 hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 932 sizeof(*hw->groups), GFP_KERNEL); 933 if (!hw->groups) 934 return -ENOMEM; 935 936 /* We assume that one pin is one group, use pin name as group name. */ 937 hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 938 sizeof(*hw->grp_names), GFP_KERNEL); 939 if (!hw->grp_names) 940 return -ENOMEM; 941 942 for (i = 0; i < hw->soc->npins; i++) { 943 const struct mtk_pin_desc *pin = hw->soc->pins + i; 944 struct mtk_pinctrl_group *group = hw->groups + i; 945 946 group->name = pin->name; 947 group->pin = pin->number; 948 949 hw->grp_names[i] = pin->name; 950 } 951 952 return 0; 953 } 954 955 int mtk_paris_pinctrl_probe(struct platform_device *pdev, 956 const struct mtk_pin_soc *soc) 957 { 958 struct pinctrl_pin_desc *pins; 959 struct mtk_pinctrl *hw; 960 int err, i; 961 962 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 963 if (!hw) 964 return -ENOMEM; 965 966 platform_set_drvdata(pdev, hw); 967 hw->soc = soc; 968 hw->dev = &pdev->dev; 969 970 if (!hw->soc->nbase_names) { 971 dev_err(&pdev->dev, 972 "SoC should be assigned at least one register base\n"); 973 return -EINVAL; 974 } 975 976 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 977 sizeof(*hw->base), GFP_KERNEL); 978 if (!hw->base) 979 return -ENOMEM; 980 981 for (i = 0; i < hw->soc->nbase_names; i++) { 982 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, 983 hw->soc->base_names[i]); 984 if (IS_ERR(hw->base[i])) 985 return PTR_ERR(hw->base[i]); 986 } 987 988 hw->nbase = hw->soc->nbase_names; 989 990 if (of_find_property(hw->dev->of_node, 991 "mediatek,rsel_resistance_in_si_unit", NULL)) 992 hw->rsel_si_unit = true; 993 else 994 hw->rsel_si_unit = false; 995 996 spin_lock_init(&hw->lock); 997 998 err = mtk_pctrl_build_state(pdev); 999 if (err) { 1000 dev_err(&pdev->dev, "build state failed: %d\n", err); 1001 return -EINVAL; 1002 } 1003 1004 /* Copy from internal struct mtk_pin_desc to register to the core */ 1005 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 1006 GFP_KERNEL); 1007 if (!pins) 1008 return -ENOMEM; 1009 1010 for (i = 0; i < hw->soc->npins; i++) { 1011 pins[i].number = hw->soc->pins[i].number; 1012 pins[i].name = hw->soc->pins[i].name; 1013 } 1014 1015 /* Setup pins descriptions per SoC types */ 1016 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 1017 mtk_desc.npins = hw->soc->npins; 1018 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 1019 mtk_desc.custom_params = mtk_custom_bindings; 1020 #ifdef CONFIG_DEBUG_FS 1021 mtk_desc.custom_conf_items = mtk_conf_items; 1022 #endif 1023 1024 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 1025 &hw->pctrl); 1026 if (err) 1027 return err; 1028 1029 err = pinctrl_enable(hw->pctrl); 1030 if (err) 1031 return err; 1032 1033 err = mtk_build_eint(hw, pdev); 1034 if (err) 1035 dev_warn(&pdev->dev, 1036 "Failed to add EINT, but pinctrl still can work\n"); 1037 1038 /* Build gpiochip should be after pinctrl_enable is done */ 1039 err = mtk_build_gpiochip(hw); 1040 if (err) { 1041 dev_err(&pdev->dev, "Failed to add gpio_chip\n"); 1042 return err; 1043 } 1044 1045 platform_set_drvdata(pdev, hw); 1046 1047 return 0; 1048 } 1049 EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe); 1050 1051 static int mtk_paris_pinctrl_suspend(struct device *device) 1052 { 1053 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1054 1055 return mtk_eint_do_suspend(pctl->eint); 1056 } 1057 1058 static int mtk_paris_pinctrl_resume(struct device *device) 1059 { 1060 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1061 1062 return mtk_eint_do_resume(pctl->eint); 1063 } 1064 1065 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = { 1066 .suspend_noirq = mtk_paris_pinctrl_suspend, 1067 .resume_noirq = mtk_paris_pinctrl_resume, 1068 }; 1069 1070 MODULE_LICENSE("GPL v2"); 1071 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris"); 1072